1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2017 Realtek Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 *****************************************************************************/ 16 #ifndef __RTL8188F_CMD_H__ 17 #define __RTL8188F_CMD_H__ 18 19 /* --------------------------------------------------------------------------------------------------------- 20 * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ 21 * --------------------------------------------------------------------------------------------------------- */ 22 23 enum h2c_cmd_8188F { 24 /* Common Class: 000 */ 25 H2C_8188F_RSVD_PAGE = 0x00, 26 H2C_8188F_MEDIA_STATUS_RPT = 0x01, 27 H2C_8188F_SCAN_ENABLE = 0x02, 28 H2C_8188F_KEEP_ALIVE = 0x03, 29 H2C_8188F_DISCON_DECISION = 0x04, 30 H2C_8188F_PSD_OFFLOAD = 0x05, 31 H2C_8188F_AP_OFFLOAD = 0x08, 32 H2C_8188F_BCN_RSVDPAGE = 0x09, 33 H2C_8188F_PROBERSP_RSVDPAGE = 0x0A, 34 H2C_8188F_FCS_RSVDPAGE = 0x10, 35 H2C_8188F_FCS_INFO = 0x11, 36 H2C_8188F_AP_WOW_GPIO_CTRL = 0x13, 37 38 /* PoweSave Class: 001 */ 39 H2C_8188F_SET_PWR_MODE = 0x20, 40 H2C_8188F_PS_TUNING_PARA = 0x21, 41 H2C_8188F_PS_TUNING_PARA2 = 0x22, 42 H2C_8188F_P2P_LPS_PARAM = 0x23, 43 H2C_8188F_P2P_PS_OFFLOAD = 0x24, 44 H2C_8188F_PS_SCAN_ENABLE = 0x25, 45 H2C_8188F_SAP_PS_ = 0x26, 46 H2C_8188F_INACTIVE_PS_ = 0x27, /* Inactive_PS */ 47 H2C_8188F_FWLPS_IN_IPS_ = 0x28, 48 49 /* Dynamic Mechanism Class: 010 */ 50 H2C_8188F_MACID_CFG = 0x40, 51 H2C_8188F_TXBF = 0x41, 52 H2C_8188F_RSSI_SETTING = 0x42, 53 H2C_8188F_AP_REQ_TXRPT = 0x43, 54 H2C_8188F_INIT_RATE_COLLECT = 0x44, 55 H2C_8188F_RA_PARA_ADJUST = 0x46, 56 57 /* BT Class: 011 */ 58 H2C_8188F_B_TYPE_TDMA = 0x60, 59 H2C_8188F_BT_INFO = 0x61, 60 H2C_8188F_FORCE_BT_TXPWR = 0x62, 61 H2C_8188F_BT_IGNORE_WLANACT = 0x63, 62 H2C_8188F_DAC_SWING_VALUE = 0x64, 63 H2C_8188F_ANT_SEL_RSV = 0x65, 64 H2C_8188F_WL_OPMODE = 0x66, 65 H2C_8188F_BT_MP_OPER = 0x67, 66 H2C_8188F_BT_CONTROL = 0x68, 67 H2C_8188F_BT_WIFI_CTRL = 0x69, 68 H2C_8188F_BT_FW_PATCH = 0x6A, 69 H2C_8188F_BT_WLAN_CALIBRATION = 0x6D, 70 71 /* WOWLAN Class: 100 */ 72 H2C_8188F_WOWLAN = 0x80, 73 H2C_8188F_REMOTE_WAKE_CTRL = 0x81, 74 H2C_8188F_AOAC_GLOBAL_INFO = 0x82, 75 H2C_8188F_AOAC_RSVD_PAGE = 0x83, 76 H2C_8188F_AOAC_RSVD_PAGE2 = 0x84, 77 H2C_8188F_D0_SCAN_OFFLOAD_CTRL = 0x85, 78 H2C_8188F_D0_SCAN_OFFLOAD_INFO = 0x86, 79 H2C_8188F_CHNL_SWITCH_OFFLOAD = 0x87, 80 H2C_8188F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, 81 H2C_8188F_P2P_OFFLOAD = 0x8B, 82 83 H2C_8188F_RESET_TSF = 0xC0, 84 H2C_8188F_MAXID, 85 }; 86 87 /* --------------------------------------------------------------------------------------------------------- 88 * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- 89 * --------------------------------------------------------------------------------------------------------- 90 * _RSVDPAGE_LOC_CMD_0x00 */ 91 #define SET_8188F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 92 #define SET_8188F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 93 #define SET_8188F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 94 #define SET_8188F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 95 #define SET_8188F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 96 97 /* _KEEP_ALIVE_CMD_0x03 */ 98 #define SET_8188F_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 99 #define SET_8188F_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 100 #define SET_8188F_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 101 #define SET_8188F_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 102 103 /* _DISCONNECT_DECISION_CMD_0x04 */ 104 #define SET_8188F_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 105 #define SET_8188F_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 106 #define SET_8188F_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 107 #define SET_8188F_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 108 109 /* _PWR_MOD_CMD_0x20 */ 110 #define SET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 111 #define SET_8188F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) 112 #define SET_8188F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) 113 #define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 114 #define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 115 #define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) 116 #define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 117 118 #define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) 119 120 /* _PS_TUNE_PARAM_CMD_0x21 */ 121 #define SET_8188F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 122 #define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 123 #define SET_8188F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) 124 #define SET_8188F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) 125 #define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 126 127 /* _MACID_CFG_CMD_0x40 */ 128 #define SET_8188F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 129 #define SET_8188F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) 130 #define SET_8188F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) 131 #define SET_8188F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) 132 #define SET_8188F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) 133 #define SET_8188F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) 134 #define SET_8188F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) 135 #define SET_8188F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) 136 #define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 137 #define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 138 #define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) 139 #define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) 140 141 /* _RSSI_SETTING_CMD_0x42 */ 142 #define SET_8188F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 143 #define SET_8188F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) 144 #define SET_8188F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 145 146 /* _AP_REQ_TXRPT_CMD_0x43 */ 147 #define SET_8188F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 148 #define SET_8188F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 149 150 /* _FORCE_BT_TXPWR_CMD_0x62 */ 151 #define SET_8188F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 152 153 /* _FORCE_BT_MP_OPER_CMD_0x67 */ 154 #define SET_8188F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 155 #define SET_8188F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 156 #define SET_8188F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 157 #define SET_8188F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 158 #define SET_8188F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 159 #define SET_8188F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 160 161 /* _BT_FW_PATCH_0x6A */ 162 #define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) 163 #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 164 #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 165 #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 166 #define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 167 168 169 /* --------------------------------------------------------------------------------------------------------- 170 * ------------------------------------------- Structure -------------------------------------------------- 171 * --------------------------------------------------------------------------------------------------------- */ 172 173 174 /* --------------------------------------------------------------------------------------------------------- 175 * ---------------------------------- Function Statement -------------------------------------------------- 176 * --------------------------------------------------------------------------------------------------------- */ 177 178 /* host message to firmware cmd */ 179 void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); 180 void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); 181 void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); 182 /* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ 183 void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter); 184 void rtl8188f_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); 185 void rtl8188f_download_rsvd_page(PADAPTER padapter, u8 mstatus); 186 #ifdef CONFIG_BT_COEXIST 187 void rtl8188f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); 188 #endif /* CONFIG_BT_COEXIST */ 189 #ifdef CONFIG_P2P 190 void rtl8188f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); 191 #endif /* CONFIG_P2P */ 192 193 #ifdef CONFIG_P2P_WOWLAN 194 void rtl8188f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); 195 #endif 196 197 void rtl8188f_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); 198 199 s32 FillH2CCmd8188F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 200 u8 GetTxBufferRsvdPageNum8188F(_adapter *padapter, bool wowlan); 201 #endif 202