xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/btc/halbtcoutsrc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2016 - 2017 Realtek Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  * more details.
14  *
15  *****************************************************************************/
16 #ifndef	__HALBTC_OUT_SRC_H__
17 #define __HALBTC_OUT_SRC_H__
18 
19 enum {
20 	BTC_CCK_1,
21 	BTC_CCK_2,
22 	BTC_CCK_5_5,
23 	BTC_CCK_11,
24 	BTC_OFDM_6,
25 	BTC_OFDM_9,
26 	BTC_OFDM_12,
27 	BTC_OFDM_18,
28 	BTC_OFDM_24,
29 	BTC_OFDM_36,
30 	BTC_OFDM_48,
31 	BTC_OFDM_54,
32 	BTC_MCS_0,
33 	BTC_MCS_1,
34 	BTC_MCS_2,
35 	BTC_MCS_3,
36 	BTC_MCS_4,
37 	BTC_MCS_5,
38 	BTC_MCS_6,
39 	BTC_MCS_7,
40 	BTC_MCS_8,
41 	BTC_MCS_9,
42 	BTC_MCS_10,
43 	BTC_MCS_11,
44 	BTC_MCS_12,
45 	BTC_MCS_13,
46 	BTC_MCS_14,
47 	BTC_MCS_15,
48 	BTC_MCS_16,
49 	BTC_MCS_17,
50 	BTC_MCS_18,
51 	BTC_MCS_19,
52 	BTC_MCS_20,
53 	BTC_MCS_21,
54 	BTC_MCS_22,
55 	BTC_MCS_23,
56 	BTC_MCS_24,
57 	BTC_MCS_25,
58 	BTC_MCS_26,
59 	BTC_MCS_27,
60 	BTC_MCS_28,
61 	BTC_MCS_29,
62 	BTC_MCS_30,
63 	BTC_MCS_31,
64 	BTC_VHT_1SS_MCS_0,
65 	BTC_VHT_1SS_MCS_1,
66 	BTC_VHT_1SS_MCS_2,
67 	BTC_VHT_1SS_MCS_3,
68 	BTC_VHT_1SS_MCS_4,
69 	BTC_VHT_1SS_MCS_5,
70 	BTC_VHT_1SS_MCS_6,
71 	BTC_VHT_1SS_MCS_7,
72 	BTC_VHT_1SS_MCS_8,
73 	BTC_VHT_1SS_MCS_9,
74 	BTC_VHT_2SS_MCS_0,
75 	BTC_VHT_2SS_MCS_1,
76 	BTC_VHT_2SS_MCS_2,
77 	BTC_VHT_2SS_MCS_3,
78 	BTC_VHT_2SS_MCS_4,
79 	BTC_VHT_2SS_MCS_5,
80 	BTC_VHT_2SS_MCS_6,
81 	BTC_VHT_2SS_MCS_7,
82 	BTC_VHT_2SS_MCS_8,
83 	BTC_VHT_2SS_MCS_9,
84 	BTC_VHT_3SS_MCS_0,
85 	BTC_VHT_3SS_MCS_1,
86 	BTC_VHT_3SS_MCS_2,
87 	BTC_VHT_3SS_MCS_3,
88 	BTC_VHT_3SS_MCS_4,
89 	BTC_VHT_3SS_MCS_5,
90 	BTC_VHT_3SS_MCS_6,
91 	BTC_VHT_3SS_MCS_7,
92 	BTC_VHT_3SS_MCS_8,
93 	BTC_VHT_3SS_MCS_9,
94 	BTC_VHT_4SS_MCS_0,
95 	BTC_VHT_4SS_MCS_1,
96 	BTC_VHT_4SS_MCS_2,
97 	BTC_VHT_4SS_MCS_3,
98 	BTC_VHT_4SS_MCS_4,
99 	BTC_VHT_4SS_MCS_5,
100 	BTC_VHT_4SS_MCS_6,
101 	BTC_VHT_4SS_MCS_7,
102 	BTC_VHT_4SS_MCS_8,
103 	BTC_VHT_4SS_MCS_9,
104 	BTC_MCS_32,
105 	BTC_UNKNOWN,
106 	BTC_PKT_MGNT,
107 	BTC_PKT_CTRL,
108 	BTC_PKT_UNKNOWN,
109 	BTC_PKT_NOT_FOR_ME,
110 	BTC_RATE_MAX
111 };
112 
113 enum {
114 	BTC_MULTIPORT_SCC,
115 	BTC_MULTIPORT_MCC_DUAL_CHANNEL,
116 	BTC_MULTIPORT_MCC_DUAL_BAND,
117 	BTC_MULTIPORT_MAX
118 };
119 
120 #define		BTC_COEX_8822B_COMMON_CODE	0
121 #define		BTC_COEX_OFFLOAD			0
122 #define		BTC_TMP_BUF_SHORT		20
123 
124 extern u1Byte	gl_btc_trace_buf[];
125 #define		BTC_SPRINTF			rsprintf
126 #define		BTC_TRACE(_MSG_)\
127 do {\
128 	if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\
129 		RTW_INFO("%s", _MSG_);\
130 	} \
131 } while (0)
132 #define		BT_PrintData(adapter, _MSG_, len, data)	RTW_DBG_DUMP((_MSG_), data, len)
133 
134 
135 #define		NORMAL_EXEC					FALSE
136 #define		FORCE_EXEC						TRUE
137 
138 #define		NM_EXCU						FALSE
139 #define		FC_EXCU						TRUE
140 
141 #define		BTC_RF_OFF					0x0
142 #define		BTC_RF_ON					0x1
143 
144 #define		BTC_RF_A					0x0
145 #define		BTC_RF_B					0x1
146 #define		BTC_RF_C					0x2
147 #define		BTC_RF_D					0x3
148 
149 #define		BTC_SMSP				SINGLEMAC_SINGLEPHY
150 #define		BTC_DMDP				DUALMAC_DUALPHY
151 #define		BTC_DMSP				DUALMAC_SINGLEPHY
152 #define		BTC_MP_UNKNOWN		0xff
153 
154 #define		BT_COEX_ANT_TYPE_PG			0
155 #define		BT_COEX_ANT_TYPE_ANTDIV		1
156 #define		BT_COEX_ANT_TYPE_DETECTED	2
157 
158 #define		BTC_MIMO_PS_STATIC			0	/* 1ss */
159 #define		BTC_MIMO_PS_DYNAMIC			1	/* 2ss */
160 
161 #define		BTC_RATE_DISABLE			0
162 #define		BTC_RATE_ENABLE				1
163 
164 /* single Antenna definition */
165 #define		BTC_ANT_PATH_WIFI			0
166 #define		BTC_ANT_PATH_BT				1
167 #define		BTC_ANT_PATH_PTA			2
168 #define		BTC_ANT_PATH_WIFI5G			3
169 #define		BTC_ANT_PATH_AUTO			4
170 /* dual Antenna definition */
171 #define		BTC_ANT_WIFI_AT_MAIN		0
172 #define		BTC_ANT_WIFI_AT_AUX			1
173 #define		BTC_ANT_WIFI_AT_DIVERSITY	2
174 /* coupler Antenna definition */
175 #define		BTC_ANT_WIFI_AT_CPL_MAIN	0
176 #define		BTC_ANT_WIFI_AT_CPL_AUX		1
177 
178 /* for common code request */
179 #define REG_LTE_IDR_COEX_CTRL	0x0038
180 #define REG_SYS_SDIO_CTRL		0x0070
181 #define REG_SYS_SDIO_CTRL3		0x0073
182 /* #define REG_RETRY_LIMIT		0x042a */
183 /* #define REG_DARFRC			0x0430 */
184 #define REG_DARFRCH				0x0434
185 #define REG_CCK_CHECK			0x0454
186 #define REG_AMPDU_MAX_TIME_V1	0x0455
187 #define REG_TX_HANG_CTRL		0x045E
188 #define REG_LIFETIME_EN			0x0426
189 #define REG_BT_COEX_TABLE0		0x06C0
190 #define REG_BT_COEX_TABLE1		0x06C4
191 #define REG_BT_COEX_BRK_TABLE	0x06C8
192 #define REG_BT_COEX_TABLE_H		0x06CC
193 #define REG_BT_ACT_STATISTICS	0x0770
194 #define REG_BT_ACT_STATISTICS_1	0x0774
195 #define REG_BT_STAT_CTRL		0x0778
196 
197 #define BIT_EN_GNT_BT_AWAKE	BIT(3)
198 #define BIT_EN_BCN_FUNCTION	BIT(3)
199 #define BIT_EN_BCN_PKT_REL	BIT(6)
200 #define BIT_FEN_BB_GLB_RST	BIT(1)
201 #define BIT_FEN_BB_RSTB		BIT(0)
202 
203 #define TDMA_4SLOT			BIT(8)
204 
205 /* for 2T2R -> 2T1R coex MIMO-PS mechanism tranlation */
206 #define BTC_2GTDD_MAX_TRY		3	/* the max retry count for 1R->2R */
207 #define BTC_2GFDD_MAX_STAY	300	/* the max stay time at 1R if 2R try-able (unit: 2s) */
208 
209 typedef enum _BTC_POWERSAVE_TYPE {
210 	BTC_PS_WIFI_NATIVE			= 0,	/* wifi original power save behavior */
211 	BTC_PS_LPS_ON				= 1,
212 	BTC_PS_LPS_OFF				= 2,
213 	BTC_PS_MAX
214 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE;
215 
216 typedef enum _BTC_BT_REG_TYPE {
217 	BTC_BT_REG_RF						= 0,
218 	BTC_BT_REG_MODEM					= 1,
219 	BTC_BT_REG_BLUEWIZE					= 2,
220 	BTC_BT_REG_VENDOR					= 3,
221 	BTC_BT_REG_LE						= 4,
222 	BTC_BT_REG_MAX
223 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE;
224 
225 typedef enum _BTC_CHIP_INTERFACE {
226 	BTC_INTF_UNKNOWN	= 0,
227 	BTC_INTF_PCI			= 1,
228 	BTC_INTF_USB			= 2,
229 	BTC_INTF_SDIO		= 3,
230 	BTC_INTF_MAX
231 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE;
232 
233 typedef enum _BTC_CHIP_TYPE {
234 	BTC_CHIP_UNDEF		= 0,
235 	BTC_CHIP_CSR_BC4		= 1,
236 	BTC_CHIP_CSR_BC8		= 2,
237 	BTC_CHIP_RTL8723A		= 3,
238 	BTC_CHIP_RTL8821		= 4,
239 	BTC_CHIP_RTL8723B		= 5,
240 	BTC_CHIP_RTL8822B 		= 6,
241 	BTC_CHIP_RTL8822C 		= 7,
242 	BTC_CHIP_RTL8821C 		= 8,
243 	BTC_CHIP_RTL8821A 		= 9,
244 	BTC_CHIP_RTL8723D 		= 10,
245 	BTC_CHIP_RTL8703B 		= 11,
246 	BTC_CHIP_RTL8725A 		= 12,
247 	BTC_CHIP_RTL8723F 		= 13,
248 	BTC_CHIP_MAX
249 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE;
250 
251 /* following is for wifi link status */
252 #define		WIFI_STA_CONNECTED				BIT0
253 #define		WIFI_AP_CONNECTED				BIT1
254 #define		WIFI_HS_CONNECTED				BIT2
255 #define		WIFI_P2P_GO_CONNECTED			BIT3
256 #define		WIFI_P2P_GC_CONNECTED			BIT4
257 
258 /* following is for command line utility */
259 #define	CL_SPRINTF	rsprintf
260 #define	CL_PRINTF	DCMD_Printf
261 #define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size)
262 
263 static const char *const glbt_info_src[] = {
264 	"BT Info[wifi fw]",
265 	"BT Info[bt rsp]",
266 	"BT Info[bt auto report]",
267 };
268 
269 #define BTC_INFO_FTP		BIT(7)
270 #define BTC_INFO_A2DP		BIT(6)
271 #define BTC_INFO_HID		BIT(5)
272 #define BTC_INFO_SCO_BUSY		BIT(4)
273 #define BTC_INFO_ACL_BUSY		BIT(3)
274 #define BTC_INFO_INQ_PAGE		BIT(2)
275 #define BTC_INFO_SCO_ESCO		BIT(1)
276 #define BTC_INFO_CONNECTION	BIT(0)
277 
278 #define BTC_BTINFO_LENGTH_MAX 10
279 
280 enum btc_gnt_setup_state {
281 	BTC_GNT_SET_SW_LOW	= 0x0,
282 	BTC_GNT_SET_SW_HIGH	= 0x1,
283 	BTC_GNT_SET_HW_PTA	= 0x2,
284 	BTC_GNT_SET_MAX
285 };
286 
287 enum btc_gnt_setup_state_2 {
288 	BTC_GNT_HW_PTA		= 0x0,
289 	BTC_GNT_SW_LOW		= 0x1,
290 	BTC_GNT_SW_HIGH		= 0x3,
291 	BTC_GNT_MAX
292 };
293 
294 enum btc_path_ctrl_owner {
295 	BTC_OWNER_BT		= 0x0,
296 	BTC_OWNER_WL		= 0x1,
297 	BTC_OWNER_MAX
298 };
299 
300 enum btc_gnt_ctrl_type {
301 	BTC_GNT_CTRL_BY_PTA	= 0x0,
302 	BTC_GNT_CTRL_BY_SW	= 0x1,
303 	BTC_GNT_CTRL_MAX
304 };
305 
306 enum btc_gnt_ctrl_block {
307 	BTC_GNT_BLOCK_RFC_BB	= 0x0,
308 	BTC_GNT_BLOCK_RFC	= 0x1,
309 	BTC_GNT_BLOCK_BB	= 0x2,
310 	BTC_GNT_BLOCK_MAX
311 };
312 
313 enum btc_lte_coex_table_type {
314 	BTC_CTT_WL_VS_LTE	= 0x0,
315 	BTC_CTT_BT_VS_LTE	= 0x1,
316 	BTC_CTT_MAX
317 };
318 
319 enum btc_lte_break_table_type {
320 	BTC_LBTT_WL_BREAK_LTE	= 0x0,
321 	BTC_LBTT_BT_BREAK_LTE	= 0x1,
322 	BTC_LBTT_LTE_BREAK_WL	= 0x2,
323 	BTC_LBTT_LTE_BREAK_BT	= 0x3,
324 	BTC_LBTT_MAX
325 };
326 
327 enum btc_btinfo_src {
328 	BTC_BTINFO_SRC_WL_FW	= 0x0,
329 	BTC_BTINFO_SRC_BT_RSP	= 0x1,
330 	BTC_BTINFO_SRC_BT_ACT	= 0x2,
331 	BTC_BTINFO_SRC_BT_IQK	= 0x3,
332 	BTC_BTINFO_SRC_BT_SCBD	= 0x4,
333 	BTC_BTINFO_SRC_H2C60	= 0x5,
334 	BTC_BTINFO_SRC_MAX
335 };
336 
337 enum btc_bt_profile {
338 	BTC_BTPROFILE_NONE		= 0,
339 	BTC_BTPROFILE_HFP		= BIT(0),
340 	BTC_BTPROFILE_HID		= BIT(1),
341 	BTC_BTPROFILE_A2DP		= BIT(2),
342 	BTC_BTPROFILE_PAN		= BIT(3),
343 	BTC_BTPROFILE_MAX		= 0xf
344 };
345 
346 static const char *const bt_profile_string[] = {
347 	"None",
348 	"HFP",
349 	"HID",
350 	"HID + HFP",
351 	"A2DP",
352 	"A2DP + HFP",
353 	"A2DP + HID",
354 	"PAN + HID + HFP",
355 	"PAN",
356 	"PAN + HFP",
357 	"PAN + HID",
358 	"PAN + HID + HFP",
359 	"PAN + A2DP",
360 	"PAN + A2DP + HFP",
361 	"PAN + A2DP + HID",
362 	"PAN + A2DP + HID + HFP"
363 };
364 
365 enum btc_bt_status {
366 	BTC_BTSTATUS_NCON_IDLE		= 0x0,
367 	BTC_BTSTATUS_CON_IDLE		= 0x1,
368 	BTC_BTSTATUS_INQ_PAGE		= 0x2,
369 	BTC_BTSTATUS_ACL_BUSY		= 0x3,
370 	BTC_BTSTATUS_SCO_BUSY		= 0x4,
371 	BTC_BTSTATUS_ACL_SCO_BUSY	= 0x5,
372 	BTC_BTSTATUS_MAX
373 };
374 
375 static const char *const bt_status_string[] = {
376 	"BT Non-Connected-idle",
377 	"BT Connected-idle",
378 	"BT Inq-page",
379 	"BT ACL-busy",
380 	"BT SCO-busy",
381 	"BT ACL-SCO-busy",
382 	"BT Non-Defined-state"
383 };
384 
385 enum btc_coex_algo {
386 	BTC_COEX_NOPROFILE		= 0x0,
387 	BTC_COEX_HFP			= 0x1,
388 	BTC_COEX_HID			= 0x2,
389 	BTC_COEX_A2DP			= 0x3,
390 	BTC_COEX_PAN			= 0x4,
391 	BTC_COEX_A2DP_HID		= 0x5,
392 	BTC_COEX_A2DP_PAN		= 0x6,
393 	BTC_COEX_PAN_HID		= 0x7,
394 	BTC_COEX_A2DP_PAN_HID		= 0x8,
395 	BTC_COEX_MAX
396 };
397 
398 static const char *const coex_algo_string[] = {
399 	"No Profile",
400 	"HFP",
401 	"HID",
402 	"A2DP",
403 	"PAN",
404 	"A2DP + HID",
405 	"A2DP + PAN",
406 	"PAN + HID",
407 	"A2DP + PAN + HID"
408 };
409 
410 enum btc_ext_ant_switch_type {
411 	BTC_SWITCH_NONE	= 0x0,
412 	BTC_SWITCH_SPDT	= 0x1,
413 	BTC_SWITCH_SP3T	= 0x2,
414 	BTC_SWITCH_DPDT = 0x3,
415 	BTC_SWITCH_ANTMAX
416 };
417 
418 enum btc_ext_ant_switch_ctrl_type {
419 	BTC_SWITCH_CTRL_BY_BBSW		= 0x0,
420 	BTC_SWITCH_CTRL_BY_PTA		= 0x1,
421 	BTC_SWITCH_CTRL_BY_ANTDIV	= 0x2,
422 	BTC_SWITCH_CTRL_BY_MAC		= 0x3,
423 	BTC_SWITCH_CTRL_BY_BT		= 0x4,
424 	BTC_SWITCH_CTRL_BY_FW		= 0x5,
425 	BTC_SWITCH_CTRL_MAX
426 };
427 
428 enum btc_ext_ant_switch_pos_type {
429 	BTC_SWITCH_TO_BT		= 0x0,
430 	BTC_SWITCH_TO_WLG		= 0x1,
431 	BTC_SWITCH_TO_WLA		= 0x2,
432 	BTC_SWITCH_TO_NOCARE		= 0x3,
433 	BTC_SWITCH_TO_WLG_BT		= 0x4,
434 	BTC_SWITCH_TO_MAX
435 };
436 
437 enum btx_set_ant_phase {
438 	BTC_ANT_INIT			= 0x0,
439 	BTC_ANT_WONLY			= 0x1,
440 	BTC_ANT_WOFF			= 0x2,
441 	BTC_ANT_2G			= 0x3,
442 	BTC_ANT_5G			= 0x4,
443 	BTC_ANT_BTMP			= 0x5,
444 	BTC_ANT_POWERON			= 0x6,
445 	BTC_ANT_2G_WL			= 0x7,
446 	BTC_ANT_2G_BT			= 0x8,
447 	BTC_ANT_MCC			= 0x9,
448 	BTC_ANT_2G_WLBT			= 0xa,
449 	BTC_ANT_2G_FREERUN		= 0xb,
450 	BTC_ANT_MAX
451 };
452 
453 /*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
454 enum btc_wl2bt_scoreboard {
455 	BTC_SCBD_ACTIVE		= BIT(0),
456 	BTC_SCBD_ON			= BIT(1),
457 	BTC_SCBD_SCAN		= BIT(2),
458 	BTC_SCBD_UNDERTEST	= BIT(3),
459 	BTC_SCBD_RXGAIN		= BIT(4),
460 	BTC_SCBD_WLBUSY		= BIT(7),
461 	BTC_SCBD_EXTFEM		= BIT(8),
462 	BTC_SCBD_TDMA		= BIT(9),
463 	BTC_SCBD_FIX2M		= BIT(10),
464 	BTC_SCBD_MAILBOX_DBG	= BIT(14),
465 	BTC_SCBD_ALL		= 0xffffffff
466 };
467 
468 enum btc_bt2wl_scoreboard {
469 	BTC_SCBD_BT_ONOFF	= BIT(1),
470 	BTC_SCBD_BT_LPS		= BIT(7)
471 };
472 enum btc_scoreboard_bit_num {
473 	BTC_SCBD_16_BIT		= BIT(0),
474 	BTC_SCBD_32_BIT		= BIT(1)
475 };
476 
477 enum btc_runreason {
478 	BTC_RSN_2GSCANSTART	= 0x0,
479 	BTC_RSN_5GSCANSTART	= 0x1,
480 	BTC_RSN_SCANFINISH	= 0x2,
481 	BTC_RSN_2GSWITCHBAND	= 0x3,
482 	BTC_RSN_5GSWITCHBAND	= 0x4,
483 	BTC_RSN_2GCONSTART	= 0x5,
484 	BTC_RSN_5GCONSTART	= 0x6,
485 	BTC_RSN_2GCONFINISH	= 0x7,
486 	BTC_RSN_5GCONFINISH	= 0x8,
487 	BTC_RSN_2GMEDIA		= 0x9,
488 	BTC_RSN_5GMEDIA		= 0xa,
489 	BTC_RSN_MEDIADISCON	= 0xb,
490 	BTC_RSN_2GSPECIALPKT	= 0xc,
491 	BTC_RSN_5GSPECIALPKT	= 0xd,
492 	BTC_RSN_BTINFO		= 0xe,
493 	BTC_RSN_PERIODICAL	= 0xf,
494 	BTC_RSN_PNP		= 0x10,
495 	BTC_RSN_LPS		= 0x11,
496 	BTC_RSN_TIMERUP		= 0x12,
497 	BTC_RSN_WLSTATUS	= 0x13,
498 	BTC_RSN_BTCNT		= 0x14,
499 	BTC_RSN_RFK		= 0x15,
500 	BTC_RSN_MAX
501 };
502 
503 static const char *const run_reason_string[] = {
504 	"2G_SCAN_START",
505 	"5G_SCAN_START",
506 	"SCAN_FINISH",
507 	"2G_SWITCH_BAND",
508 	"5G_SWITCH_BAND",
509 	"2G_CONNECT_START",
510 	"5G_CONNECT_START",
511 	"2G_CONNECT_FINISH",
512 	"5G_CONNECT_FINISH",
513 	"2G_MEDIA_STATUS",
514 	"5G_MEDIA_STATUS",
515 	"MEDIA_DISCONNECT",
516 	"2G_SPECIALPKT",
517 	"5G_SPECIALPKT",
518 	"BTINFO",
519 	"PERIODICAL",
520 	"PNPNotify",
521 	"LPSNotify",
522 	"TimerUp",
523 	"WL_STATUS_CHANGE",
524 	"BT_CNT_CHANGE",
525 	"WL_RFK",
526 	"Reason Max"
527 };
528 
529 enum btc_wl_link_mode {
530 	BTC_WLINK_2G1PORT	= 0x0,
531 	BTC_WLINK_2GMPORT	= 0x1,
532 	BTC_WLINK_25GMPORT	= 0x2,
533 	BTC_WLINK_5G		= 0x3,
534 	BTC_WLINK_2GGO		= 0x4,
535 	BTC_WLINK_2GGC		= 0x5,
536 	BTC_WLINK_BTMR		= 0x6,
537 	BTC_WLINK_2GFREE	= 0x7,
538 	BTC_WLINK_MAX
539 };
540 
541 static const char *const coex_mode_string[] = {
542 	"2G-SP",
543 	"2G-MP",
544 	"25G-MP",
545 	"5G",
546 	"2G-P2P-GO",
547 	"2G-P2P-GC",
548 	"BT-MR"
549 };
550 
551 enum btc_bt_state_cnt {
552 	BTC_CNT_BT_RETRY	= 0x0,
553 	BTC_CNT_BT_REINIT	= 0x1,
554 	BTC_CNT_BT_POPEVENT	= 0x2,
555 	BTC_CNT_BT_SETUPLINK	= 0x3,
556 	BTC_CNT_BT_IGNWLANACT	= 0x4,
557 	BTC_CNT_BT_INQ		= 0x5,
558 	BTC_CNT_BT_PAGE		= 0x6,
559 	BTC_CNT_BT_ROLESWITCH	= 0x7,
560 	BTC_CNT_BT_AFHUPDATE	= 0x8,
561 	BTC_CNT_BT_DISABLE	= 0x9,
562 	BTC_CNT_BT_INFOUPDATE	= 0xa,
563 	BTC_CNT_BT_IQK		= 0xb,
564 	BTC_CNT_BT_IQKFAIL	= 0xc,
565 	BTC_CNT_BT_TRX		= 0xd,
566 	BTC_CNT_BT_MAX
567 };
568 
569 enum btc_wl_state_cnt {
570 	BTC_CNT_WL_SCANAP		= 0x0,
571 	BTC_CNT_WL_ARP			= 0x1,
572 	BTC_CNT_WL_GNTERR		= 0x2,
573 	BTC_CNT_WL_PSFAIL		= 0x3,
574 	BTC_CNT_WL_COEXRUN		= 0x4,
575 	BTC_CNT_WL_COEXINFO1		= 0x5,
576 	BTC_CNT_WL_COEXINFO2		= 0x6,
577 	BTC_CNT_WL_AUTOSLOT_HANG	= 0x7,
578 	BTC_CNT_WL_NOISY0		= 0x8,
579 	BTC_CNT_WL_NOISY1		= 0x9,
580 	BTC_CNT_WL_NOISY2		= 0xa,
581 	BTC_CNT_WL_ACTIVEPORT		= 0xb,
582 	BTC_CNT_WL_LEAKAP_NORX		= 0xc,
583 	BTC_CNT_WL_FW_NOTIFY		= 0xd,
584 	BTC_CNT_WL_2G_TDDTRY		= 0xe,
585 	BTC_CNT_WL_2G_FDDSTAY		= 0xf,
586 	BTC_CNT_WL_MAX
587 };
588 
589 enum btc_wl_crc_cnt {
590 	BTC_WLCRC_11BOK		= 0x0,
591 	BTC_WLCRC_11GOK		= 0x1,
592 	BTC_WLCRC_11NOK		= 0x2,
593 	BTC_WLCRC_11VHTOK	= 0x3,
594 	BTC_WLCRC_11BERR	= 0x4,
595 	BTC_WLCRC_11GERR	= 0x5,
596 	BTC_WLCRC_11NERR	= 0x6,
597 	BTC_WLCRC_11VHTERR	= 0x7,
598 	BTC_WLCRC_MAX
599 };
600 
601 enum btc_timer_cnt {
602 	BTC_TIMER_WL_STAYBUSY	= 0x0,
603 	BTC_TIMER_WL_COEXFREEZE	= 0x1,
604 	BTC_TIMER_WL_SPECPKT	= 0x2,
605 	BTC_TIMER_WL_CONNPKT	= 0x3,
606 	BTC_TIMER_WL_PNPWAKEUP	= 0x4,
607 	BTC_TIMER_WL_CCKLOCK	= 0x5,
608 	BTC_TIMER_WL_FWDBG	= 0x6,
609 	BTC_TIMER_BT_RELINK	= 0x7,
610 	BTC_TIMER_BT_REENABLE	= 0x8,
611 	BTC_TIMER_BT_MULTILINK	= 0x9,
612 	BTC_TIMER_BT_INQPAGE	= 0xa,
613 	BTC_TIMER_BT_A2DP_ACT	= 0xb,
614 	BTC_TIMER_MAX
615 };
616 
617 enum btc_wl_status_change {
618 	BTC_WLSTATUS_CHANGE_TOIDLE	= 0x0,
619 	BTC_WLSTATUS_CHANGE_TOBUSY	= 0x1,
620 	BTC_WLSTATUS_CHANGE_RSSI	= 0x2,
621 	BTC_WLSTATUS_CHANGE_LINKINFO	= 0x3,
622 	BTC_WLSTATUS_CHANGE_DIR	= 0x4,
623 	BTC_WLSTATUS_CHANGE_NOISY	= 0x5,
624 	BTC_WLSTATUS_CHANGE_BTCNT	= 0x6,
625 	BTC_WLSTATUS_CHANGE_LOCKTRY	= 0x7,
626 	BTC_WLSTATUS_CHANGE_MAX
627 };
628 
629 enum btc_commom_chip_setup {
630 	BTC_CSETUP_INIT_HW		= 0x0,
631 	BTC_CSETUP_ANT_SWITCH	= 0x1,
632 	BTC_CSETUP_GNT_FIX		= 0x2,
633 	BTC_CSETUP_GNT_DEBUG	= 0x3,
634 	BTC_CSETUP_RFE_TYPE		= 0x4,
635 	BTC_CSETUP_COEXINFO_HW	= 0x5,
636 	BTC_CSETUP_WL_TX_POWER	= 0x6,
637 	BTC_CSETUP_WL_RX_GAIN	= 0x7,
638 	BTC_CSETUP_WLAN_ACT_IPS = 0x8,
639 	BTC_CSETUP_BT_CTRL_ACT	= 0x9,
640 	BTC_CSETUP_MAX
641 };
642 
643 enum btc_indirect_reg_type {
644 	BTC_INDIRECT_1700	= 0x0,
645 	BTC_INDIRECT_7C0	= 0x1,
646 	BTC_INDIRECT_MAX
647 };
648 
649 enum btc_pstdma_type {
650 	BTC_PSTDMA_FORCE_LPSOFF	= 0x0,
651 	BTC_PSTDMA_FORCE_LPSON	= 0x1,
652 	BTC_PSTDMA_MAX
653 };
654 
655 enum btc_btrssi_type {
656 	BTC_BTRSSI_RATIO	= 0x0,
657 	BTC_BTRSSI_DBM		= 0x1,
658 	BTC_BTRSSI_MAX
659 };
660 
661 enum btc_wl_priority_mask {
662 	BTC_WLPRI_RX_RSP	= 2,
663 	BTC_WLPRI_TX_RSP	= 3,
664 	BTC_WLPRI_TX_BEACON	= 4,
665 	BTC_WLPRI_TX_OFDM	= 11,
666 	BTC_WLPRI_TX_CCK	= 12,
667 	BTC_WLPRI_TX_BEACONQ	= 27,
668 	BTC_WLPRI_RX_CCK	= 28,
669 	BTC_WLPRI_RX_OFDM	= 29,
670 	BTC_WLPRI_MAX
671 };
672 
673 enum btc_ext_chip_id{
674         BTC_EXT_CHIP_NONE,
675         BTC_EXT_CHIP_RF4CE,
676         BTC_EXT_CHIP_MAX
677 };
678 
679 enum btc_ext_chip_mode{
680         BTC_EXTMODE_NORMAL,
681         BTC_EXTMODE_VOICE,
682         BTC_EXTMODE_MAX
683 };
684 
685 enum btc_wl_rfk_type {
686 	BTC_PWR_TRK = 0,
687 	BTC_IQK = 1,
688 	BTC_LCK = 2,
689 	BTC_DPK = 3,
690 	BTC_TXGAPK = 4,
691 	BTC_RFK_TYPE_MAX
692 };
693 
694 enum btc_wl_rfk_state {
695 	BTC_RFK_START = 0,
696 	BTC_RFK_END = 1,
697 	BTC_RFK_STATE_MAX
698 };
699 
700 struct btc_board_info {
701 	/* The following is some board information */
702 	u8				bt_chip_type;
703 	u8				pg_ant_num;	/* pg ant number */
704 	u8				btdm_ant_num;	/* ant number for btdm */
705 	u8				btdm_ant_num_by_ant_det;	/* ant number for btdm after antenna detection */
706 	u8				btdm_ant_pos;		/* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1)  (DPDT+1Ant case) */
707 	u8				single_ant_path;	/* current used for 8723b only, 1=>s0,  0=>s1 */
708 	boolean			tfbga_package;    /* for Antenna detect threshold */
709 	boolean			btdm_ant_det_finish;
710 	boolean			btdm_ant_det_already_init_phydm;
711 	u8				ant_type;
712 	u8				rfe_type;
713 	u8				ant_div_cfg;
714 	boolean			btdm_ant_det_complete_fail;
715 	u8				ant_det_result;
716 	boolean			ant_det_result_five_complete;
717 	u32				antdetval;
718 	u8				customerID;
719 	u8				customer_id;
720 	u8				ant_distance;	/* WL-BT antenna space for non-shared antenna  */
721 	u8				ext_chip_id;
722 };
723 
724 struct btc_coex_dm {
725 	boolean cur_ignore_wlan_act;
726 	boolean cur_ps_tdma_on;
727 	boolean cur_low_penalty_ra;
728 	boolean cur_wl_rx_low_gain_en;
729 
730 	u8	bt_rssi_state[4];
731 	u8	wl_rssi_state[4];
732 	u8	cur_ps_tdma;
733 	u8	ps_tdma_para[5];
734 	u8	fw_tdma_para[5];
735 	u8	cur_lps;
736 	u8	cur_rpwm;
737 	u8	cur_bt_pwr_lvl;
738 	u8	cur_bt_lna_lvl;
739 	u8	cur_wl_pwr_lvl;
740 	u8	cur_algorithm;
741 	u8	bt_status;
742 	u8	wl_chnl_info[3];
743 	u8	cur_toggle_para[6];
744 	u32	cur_ant_pos_type;
745 	u32	cur_switch_status;
746 	u32	setting_tdma;
747 };
748 
749 struct btc_coex_sta {
750 	boolean coex_freeze;
751 	boolean coex_freerun;
752 	boolean rf4ce_en;
753 	boolean force_freerun;
754 	boolean force_tdd;
755 
756 	boolean bt_disabled;
757 	boolean bt_disabled_pre;
758 	boolean bt_link_exist;
759 	boolean bt_whck_test;
760 	boolean bt_inq_page;
761 	boolean bt_inq_page_pre;
762 	boolean bt_inq_page_remain;
763 	boolean bt_inq;
764 	boolean bt_page;
765 	boolean bt_ble_voice;
766 	boolean bt_ble_exist;
767 	boolean bt_hfp_exist;
768 	boolean bt_a2dp_exist;
769 	boolean bt_hid_exist;
770 	boolean bt_pan_exist; // PAN or OPP
771 	boolean bt_opp_exist; //OPP only
772 	boolean bt_msft_mr_exist;
773 	boolean bt_acl_busy;
774 	boolean bt_fix_2M;
775 	boolean bt_setup_link;
776 	boolean bt_multi_link;
777 	boolean bt_multi_link_pre;
778 	boolean bt_multi_link_remain;
779 	boolean bt_a2dp_sink;
780 	boolean bt_reenable;
781 	boolean bt_ble_scan_en;
782 	boolean bt_slave;
783 	boolean bt_a2dp_active;
784 	boolean bt_a2dp_active_pre;
785 	boolean bt_a2dp_active_remain;
786 	boolean bt_slave_latency;
787 	boolean bt_init_scan;
788 	boolean bt_418_hid_exist;
789 	boolean bt_ble_hid_exist;
790 	boolean bt_mesh;
791 	boolean bt_ctr_ok;
792 
793 	boolean wl_under_lps;
794 	boolean wl_under_ips;
795 	boolean wl_under_4way;
796 	boolean	wl_hi_pri_task1;
797 	boolean	wl_hi_pri_task2;
798 	boolean wl_cck_lock;
799 	boolean wl_cck_lock_pre;
800 	boolean wl_cck_lock_ever;
801 	boolean wl_force_lps_ctrl;
802 	boolean wl_busy_pre;
803 	boolean wl_gl_busy;
804 	boolean wl_gl_busy_pre;
805 	boolean wl_linkscan_proc;
806 	boolean wl_mimo_ps;
807 	boolean wl_cck_dead_lock_ap;
808 	boolean wl_tx_limit_en;
809 	boolean wl_ampdu_limit_en;
810 	boolean wl_rxagg_limit_en;
811 	boolean wl_connecting;
812 	boolean wl_pnp_wakeup;
813 	boolean wl_slot_toggle;
814 	boolean wl_slot_toggle_change; /* if toggle to no-toggle */
815 	boolean wl_leak_ap; /* !is_no_wl_5ms_extend  */
816 	boolean wl_blacklist_ap;
817 	boolean wl_rfk;
818 
819 	u8	coex_table_type;
820 	u8 	coex_run_reason;
821 	u8	tdma_byte4_modify_pre;
822 	u8	kt_ver;
823 	u8	gnt_workaround_state;
824 	u8	tdma_timer_base;
825 	u8	bt_rssi;
826 	u8	bt_profile_num;
827 	u8	bt_profile_num_pre;
828 	u8	bt_info_c2h[BTC_BTINFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX];
829 	u8	bt_info_lb2;
830 	u8	bt_info_lb3;
831 	u8	bt_info_hb0;
832 	u8	bt_info_hb1;
833 	u8	bt_info_hb2;
834 	u8	bt_info_hb3;
835 	u8	bt_ble_scan_type;
836 	u8	bt_afh_map[10];
837 	u8	bt_a2dp_vendor_id;
838 	u8	bt_hid_pair_num;
839 	u8	bt_hid_slot;
840 	u8	bt_a2dp_bitpool;
841 	u8	bt_iqk_state;
842 	u8	bt_sut_pwr_lvl[4];
843 	u8	bt_golden_rx_shift[4];
844 	u8	bt_ext_autoslot_thres;
845 	u8	ext_chip_mode;
846 
847 	u8	wl_pnp_state_pre;
848 	u8	wl_noisy_level;
849 	u8	wl_fw_dbg_info[10];
850 	u8	wl_fw_dbg_info_pre[10];
851 	u8	wl_rx_rate;
852 	u8	wl_tx_rate;
853 	u8	wl_rts_rx_rate;
854 	u8	wl_center_ch;
855 	u8	wl_tx_macid;
856 	u8	wl_tx_retry_ratio;
857 	u8	wl_coex_mode;
858 	u8	wl_iot_peer;
859 	u8	wl_ra_thres;
860 	u8	wl_ampdulen;
861 	u8	wl_rxagg_size;
862 	u8	wl_toggle_para[6];
863 	u8	wl_toggle_interval;
864 
865 	u16	score_board_BW;
866 	u32	score_board_WB;
867 	u16	bt_reg_vendor_ac;
868 	u16	bt_reg_vendor_ae;
869 	u32	bt_reg_vendor_dac;
870 	u16	bt_reg_modem_a;
871 	u16	bt_reg_rf_2;
872 	u16	bt_reg_rf_9;
873 	u16	wl_txlimit;
874 
875 	u32	hi_pri_tx;
876 	u32	hi_pri_rx;
877 	u32	lo_pri_tx;
878 	u32	lo_pri_rx;
879 	u32	bt_supported_feature;
880 	u32	bt_supported_version;
881 	u32	bt_ble_scan_para[3];
882 	u32	bt_a2dp_device_name;
883 	u32	bt_a2dp_flush_time;
884 	u32	wl_arfb1;
885 	u32	wl_arfb2;
886 	u32	wl_traffic_dir;
887 	u32	wl_bw;
888 	u32	cnt_bt_info_c2h[BTC_BTINFO_SRC_MAX];
889 	u32	cnt_bt[BTC_CNT_BT_MAX];
890 	u32	cnt_wl[BTC_CNT_WL_MAX];
891 	u32	cnt_timer[BTC_TIMER_MAX];
892 };
893 
894 struct btc_rfe_type {
895 	boolean ant_switch_exist;
896 	boolean ant_switch_diversity; /* If diversity on */
897 	boolean ant_switch_with_bt; /* If WL_2G/BT use ext-switch at shared-ant */
898 	u8	rfe_module_type;
899 	u8	ant_switch_type;
900 	u8	ant_switch_polarity;
901 
902 	boolean band_switch_exist;
903 	u8	band_switch_type; /* 0:DPDT, 1:SPDT */
904 	u8	band_switch_polarity;
905 
906 	/*  If TRUE:  WLG at BTG, If FALSE: WLG at WLAG */
907 	boolean wlg_at_btg;
908 };
909 
910 
911 struct btc_wifi_link_info_ext {
912 	boolean is_all_under_5g;
913 	boolean is_mcc_25g;
914 	boolean is_p2p_connected;
915 	boolean is_ap_mode;
916 	boolean is_scan;
917 	boolean is_link;
918 	boolean is_roam;
919 	boolean is_4way;
920 	boolean is_32k;
921 	boolean is_connected;
922 	u8	num_of_active_port;
923 	u32	port_connect_status;
924 	u32	traffic_dir;
925 	u32	wifi_bw;
926 };
927 
928 struct btc_coex_table_para {
929 	u32 bt;	//0x6c0
930 	u32 wl;	//0x6c4
931 };
932 
933 struct btc_tdma_para {
934 	u8 para[5];
935 };
936 
937 struct btc_reg_byte_modify {
938 	u32 addr;
939 	u8 bitmask;
940 	u8 val;
941 };
942 
943 struct btc_5g_afh_map {
944 	u32 wl_5g_ch;
945 	u8 bt_skip_ch;
946 	u8 bt_skip_span;
947 };
948 
949 struct btc_rf_para {
950 	u8 wl_pwr_dec_lvl;
951 	u8 bt_pwr_dec_lvl;
952 	boolean wl_low_gain_en;
953 	u8 bt_lna_lvl;
954 };
955 
956 typedef enum _BTC_DBG_OPCODE {
957 	BTC_DBG_SET_COEX_NORMAL				= 0x0,
958 	BTC_DBG_SET_COEX_WIFI_ONLY				= 0x1,
959 	BTC_DBG_SET_COEX_BT_ONLY				= 0x2,
960 	BTC_DBG_SET_COEX_DEC_BT_PWR				= 0x3,
961 	BTC_DBG_SET_COEX_BT_AFH_MAP				= 0x4,
962 	BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT		= 0x5,
963 	BTC_DBG_SET_COEX_MANUAL_CTRL				= 0x6,
964 	BTC_DBG_MAX
965 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE;
966 
967 typedef enum _BTC_RSSI_STATE {
968 	BTC_RSSI_STATE_HIGH						= 0x0,
969 	BTC_RSSI_STATE_MEDIUM					= 0x1,
970 	BTC_RSSI_STATE_LOW						= 0x2,
971 	BTC_RSSI_STATE_STAY_HIGH					= 0x3,
972 	BTC_RSSI_STATE_STAY_MEDIUM				= 0x4,
973 	BTC_RSSI_STATE_STAY_LOW					= 0x5,
974 	BTC_RSSI_MAX
975 } BTC_RSSI_STATE, *PBTC_RSSI_STATE;
976 #define	BTC_RSSI_HIGH(_rssi_)	((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE)
977 #define	BTC_RSSI_MEDIUM(_rssi_)	((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE)
978 #define	BTC_RSSI_LOW(_rssi_)	((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE)
979 
980 typedef enum _BTC_WIFI_ROLE {
981 	BTC_ROLE_STATION						= 0x0,
982 	BTC_ROLE_AP								= 0x1,
983 	BTC_ROLE_IBSS							= 0x2,
984 	BTC_ROLE_HS_MODE						= 0x3,
985 	BTC_ROLE_MAX
986 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE;
987 
988 typedef enum _BTC_WIRELESS_FREQ {
989 	BTC_FREQ_2_4G					= 0x0,
990 	BTC_FREQ_5G						= 0x1,
991 	BTC_FREQ_25G					= 0x2,
992 	BTC_FREQ_MAX
993 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ;
994 
995 typedef enum _BTC_WIFI_BW_MODE {
996 	BTC_WIFI_BW_LEGACY					= 0x0,
997 	BTC_WIFI_BW_HT20					= 0x1,
998 	BTC_WIFI_BW_HT40					= 0x2,
999 	BTC_WIFI_BW_HT80					= 0x3,
1000 	BTC_WIFI_BW_HT160					= 0x4,
1001 	BTC_WIFI_BW_MAX
1002 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE;
1003 
1004 typedef enum _BTC_WIFI_TRAFFIC_DIR {
1005 	BTC_WIFI_TRAFFIC_TX					= 0x0,
1006 	BTC_WIFI_TRAFFIC_RX					= 0x1,
1007 	BTC_WIFI_TRAFFIC_MAX
1008 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR;
1009 
1010 typedef enum _BTC_WIFI_PNP {
1011 	BTC_WIFI_PNP_WAKE_UP					= 0x0,
1012 	BTC_WIFI_PNP_SLEEP						= 0x1,
1013 	BTC_WIFI_PNP_SLEEP_KEEP_ANT				= 0x2,
1014 	BTC_WIFI_PNP_WOWLAN					= 0x3,
1015 	BTC_WIFI_PNP_MAX
1016 } BTC_WIFI_PNP, *PBTC_WIFI_PNP;
1017 
1018 typedef enum _BTC_IOT_PEER {
1019 	BTC_IOT_PEER_UNKNOWN = 0,
1020 	BTC_IOT_PEER_REALTEK = 1,
1021 	BTC_IOT_PEER_REALTEK_92SE = 2,
1022 	BTC_IOT_PEER_BROADCOM = 3,
1023 	BTC_IOT_PEER_RALINK = 4,
1024 	BTC_IOT_PEER_ATHEROS = 5,
1025 	BTC_IOT_PEER_CISCO = 6,
1026 	BTC_IOT_PEER_MERU = 7,
1027 	BTC_IOT_PEER_MARVELL = 8,
1028 	BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */
1029 	BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
1030 	BTC_IOT_PEER_AIRGO = 11,
1031 	BTC_IOT_PEER_INTEL				= 12,
1032 	BTC_IOT_PEER_RTK_APCLIENT		= 13,
1033 	BTC_IOT_PEER_REALTEK_81XX		= 14,
1034 	BTC_IOT_PEER_REALTEK_WOW		= 15,
1035 	BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16,
1036 	BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17,
1037 	BTC_IOT_PEER_MAX,
1038 } BTC_IOT_PEER, *PBTC_IOT_PEER;
1039 
1040 /* for 8723b-d cut large current issue */
1041 typedef enum _BTC_WIFI_COEX_STATE {
1042 	BTC_WIFI_STAT_INIT,
1043 	BTC_WIFI_STAT_IQK,
1044 	BTC_WIFI_STAT_NORMAL_OFF,
1045 	BTC_WIFI_STAT_MP_OFF,
1046 	BTC_WIFI_STAT_NORMAL,
1047 	BTC_WIFI_STAT_ANT_DIV,
1048 	BTC_WIFI_STAT_MAX
1049 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE;
1050 
1051 typedef enum _BTC_ANT_TYPE {
1052 	BTC_ANT_TYPE_0,
1053 	BTC_ANT_TYPE_1,
1054 	BTC_ANT_TYPE_2,
1055 	BTC_ANT_TYPE_3,
1056 	BTC_ANT_TYPE_4,
1057 	BTC_ANT_TYPE_MAX
1058 } BTC_ANT_TYPE, *PBTC_ANT_TYPE;
1059 
1060 typedef enum _BTC_VENDOR {
1061 	BTC_VENDOR_LENOVO,
1062 	BTC_VENDOR_ASUS,
1063 	BTC_VENDOR_OTHER
1064 } BTC_VENDOR, *PBTC_VENDOR;
1065 
1066 
1067 /* defined for BFP_BTC_GET */
1068 typedef enum _BTC_GET_TYPE {
1069 	/* type BOOLEAN */
1070 	BTC_GET_BL_HS_OPERATION,
1071 	BTC_GET_BL_HS_CONNECTING,
1072 	BTC_GET_BL_WIFI_FW_READY,
1073 	BTC_GET_BL_WIFI_CONNECTED,
1074 	BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
1075 	BTC_GET_BL_WIFI_LINK_INFO,
1076 	BTC_GET_BL_WIFI_BUSY,
1077 	BTC_GET_BL_WIFI_SCAN,
1078 	BTC_GET_BL_WIFI_LINK,
1079 	BTC_GET_BL_WIFI_ROAM,
1080 	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
1081 	BTC_GET_BL_WIFI_UNDER_5G,
1082 	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1083 	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
1084 	BTC_GET_BL_WIFI_UNDER_B_MODE,
1085 	BTC_GET_BL_EXT_SWITCH,
1086 	BTC_GET_BL_WIFI_IS_IN_MP_MODE,
1087 	BTC_GET_BL_IS_ASUS_8723B,
1088 	BTC_GET_BL_RF4CE_CONNECTED,
1089 	BTC_GET_BL_WIFI_LW_PWR_STATE,
1090 
1091 	/* type s4Byte */
1092 	BTC_GET_S4_WIFI_RSSI,
1093 	BTC_GET_S4_HS_RSSI,
1094 
1095 	/* type u4Byte */
1096 	BTC_GET_U4_WIFI_BW,
1097 	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
1098 	BTC_GET_U4_WIFI_TRAFFIC_DIR,
1099 	BTC_GET_U4_WIFI_FW_VER,
1100 	BTC_GET_U4_WIFI_PHY_VER,
1101 	BTC_GET_U4_WIFI_LINK_STATUS,
1102 	BTC_GET_U4_BT_PATCH_VER,
1103 	BTC_GET_U4_VENDOR,
1104 	BTC_GET_U4_SUPPORTED_VERSION,
1105 	BTC_GET_U4_SUPPORTED_FEATURE,
1106 	BTC_GET_U4_BT_DEVICE_INFO,
1107 	BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
1108 	BTC_GET_U4_BT_A2DP_FLUSH_VAL,
1109 	BTC_GET_U4_WIFI_IQK_TOTAL,
1110 	BTC_GET_U4_WIFI_IQK_OK,
1111 	BTC_GET_U4_WIFI_IQK_FAIL,
1112 
1113 	/* type u1Byte */
1114 	BTC_GET_U1_WIFI_DOT11_CHNL,
1115 	BTC_GET_U1_WIFI_CENTRAL_CHNL,
1116 	BTC_GET_U1_WIFI_HS_CHNL,
1117 	BTC_GET_U1_WIFI_P2P_CHNL,
1118 	BTC_GET_U1_MAC_PHY_MODE,
1119 	BTC_GET_U1_AP_NUM,
1120 	BTC_GET_U1_ANT_TYPE,
1121 	BTC_GET_U1_IOT_PEER,
1122 	BTC_GET_BL_WIFI_BSSID,
1123 
1124 	/* type u2Byte */
1125 	BTC_GET_U2_BEACON_PERIOD,
1126 
1127 	/*===== for 1Ant ======*/
1128 	BTC_GET_U1_LPS_MODE,
1129 
1130 	BTC_GET_MAX
1131 } BTC_GET_TYPE, *PBTC_GET_TYPE;
1132 
1133 /* defined for BFP_BTC_SET */
1134 typedef enum _BTC_SET_TYPE {
1135 	/* type BOOLEAN */
1136 	BTC_SET_BL_BT_DISABLE,
1137 	BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
1138 	BTC_SET_BL_BT_TRAFFIC_BUSY,
1139 	BTC_SET_BL_BT_LIMITED_DIG,
1140 	BTC_SET_BL_FORCE_TO_ROAM,
1141 	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
1142 	BTC_SET_BL_BT_CTRL_AGG_SIZE,
1143 	BTC_SET_BL_INC_SCAN_DEV_NUM,
1144 	BTC_SET_BL_BT_TX_RX_MASK,
1145 	BTC_SET_BL_MIRACAST_PLUS_BT,
1146 	BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL,
1147 	BTC_SET_BL_BT_GOLDEN_RX_RANGE,
1148 
1149 	/* type u1Byte */
1150 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
1151 	BTC_SET_U1_AGG_BUF_SIZE,
1152 
1153 	/* type trigger some action */
1154 	BTC_SET_ACT_GET_BT_RSSI,
1155 	BTC_SET_ACT_AGGREGATE_CTRL,
1156 	BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
1157 
1158 	// for mimo ps mode setting
1159 	BTC_SET_MIMO_PS_MODE,
1160 	/*===== for 1Ant ======*/
1161 	/* type BOOLEAN */
1162 
1163 	/* type u1Byte */
1164 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
1165 	BTC_SET_U1_LPS_VAL,
1166 	BTC_SET_U1_RPWM_VAL,
1167 	/* type trigger some action */
1168 	BTC_SET_ACT_LEAVE_LPS,
1169 	BTC_SET_ACT_ENTER_LPS,
1170 	BTC_SET_ACT_NORMAL_LPS,
1171 	BTC_SET_ACT_PRE_NORMAL_LPS,
1172 	BTC_SET_ACT_POST_NORMAL_LPS,
1173 	BTC_SET_ACT_DISABLE_LOW_POWER,
1174 	BTC_SET_ACT_UPDATE_RAMASK,
1175 	BTC_SET_ACT_SEND_MIMO_PS,
1176 	/* BT Coex related */
1177 	BTC_SET_ACT_CTRL_BT_INFO,
1178 	BTC_SET_ACT_CTRL_BT_COEX,
1179 	BTC_SET_ACT_CTRL_8723B_ANT,
1180 	BTC_SET_RESET_COEX_VAR,
1181 	/*=================*/
1182 	BTC_SET_MAX
1183 } BTC_SET_TYPE, *PBTC_SET_TYPE;
1184 
1185 typedef enum _BTC_DBG_DISP_TYPE {
1186 	BTC_DBG_DISP_COEX_STATISTICS				= 0x0,
1187 	BTC_DBG_DISP_BT_LINK_INFO				= 0x1,
1188 	BTC_DBG_DISP_WIFI_STATUS				= 0x2,
1189 	BTC_DBG_DISP_MAX
1190 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE;
1191 
1192 typedef enum _BTC_NOTIFY_TYPE_IPS {
1193 	BTC_IPS_LEAVE							= 0x0,
1194 	BTC_IPS_ENTER							= 0x1,
1195 	BTC_IPS_MAX
1196 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS;
1197 typedef enum _BTC_NOTIFY_TYPE_LPS {
1198 	BTC_LPS_DISABLE							= 0x0,
1199 	BTC_LPS_ENABLE							= 0x1,
1200 	BTC_LPS_MAX
1201 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS;
1202 typedef enum _BTC_NOTIFY_TYPE_SCAN {
1203 	BTC_SCAN_FINISH							= 0x0,
1204 	BTC_SCAN_START							= 0x1,
1205 	BTC_SCAN_START_2G						= 0x2,
1206 	BTC_SCAN_START_5G						= 0x3,
1207 	BTC_SCAN_MAX
1208 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN;
1209 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND {
1210 	BTC_NOT_SWITCH							= 0x0,
1211 	BTC_SWITCH_TO_24G						= 0x1,
1212 	BTC_SWITCH_TO_5G						= 0x2,
1213 	BTC_SWITCH_TO_24G_NOFORSCAN				= 0x3,
1214 	BTC_SWITCH_MAX
1215 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND;
1216 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE {
1217 	BTC_ASSOCIATE_FINISH						= 0x0,
1218 	BTC_ASSOCIATE_START						= 0x1,
1219 	BTC_ASSOCIATE_5G_FINISH						= 0x2,
1220 	BTC_ASSOCIATE_5G_START						= 0x3,
1221 	BTC_ASSOCIATE_MAX
1222 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE;
1223 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS {
1224 	BTC_MEDIA_DISCONNECT					= 0x0,
1225 	BTC_MEDIA_CONNECT						= 0x1,
1226 	BTC_MEDIA_CONNECT_5G					= 0x02,
1227 	BTC_MEDIA_MAX
1228 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS;
1229 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET {
1230 	BTC_PACKET_UNKNOWN					= 0x0,
1231 	BTC_PACKET_DHCP							= 0x1,
1232 	BTC_PACKET_ARP							= 0x2,
1233 	BTC_PACKET_EAPOL						= 0x3,
1234 	BTC_PACKET_MAX
1235 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET;
1236 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION {
1237 	BTC_STACK_OP_NONE					= 0x0,
1238 	BTC_STACK_OP_INQ_PAGE_PAIR_START		= 0x1,
1239 	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH	= 0x2,
1240 	BTC_STACK_OP_MAX
1241 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION;
1242 
1243 typedef enum _BTC_LINK_CHANGE_TYPE{
1244 	BTC_LINK_CHANGE_TYPE_NONE			= 0x0,
1245 	BTC_LINK_CHANGE_TYPE_ECSA_START		= 0x1,
1246 	BTC_LINK_CHANGE_TYPE_ECSA_DONE		= 0x2,
1247 	BTC_LINK_CHANGE_TYPE_MAX
1248 }BTC_LINK_CHANGE_TYPE,*PBTC_LINK_CHANGE_TYPE;
1249 
1250 /* Bryant Add */
1251 typedef enum _BTC_ANTENNA_POS {
1252 	BTC_ANTENNA_AT_MAIN_PORT				= 0x1,
1253 	BTC_ANTENNA_AT_AUX_PORT				= 0x2,
1254 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS;
1255 
1256 /* Bryant Add */
1257 typedef enum _BTC_BT_OFFON {
1258 	BTC_BT_OFF				= 0x0,
1259 	BTC_BT_ON				= 0x1,
1260 } BTC_BTOFFON, *PBTC_BT_OFFON;
1261 
1262 #define BTC_5G_BAND 0x80
1263 
1264 /*==================================================
1265 For following block is for coex offload
1266 ==================================================*/
1267 typedef struct _COL_H2C {
1268 	u1Byte	opcode;
1269 	u1Byte	opcode_ver:4;
1270 	u1Byte	req_num:4;
1271 	u1Byte	buf[1];
1272 } COL_H2C, *PCOL_H2C;
1273 
1274 #define	COL_C2H_ACK_HDR_LEN	3
1275 typedef struct _COL_C2H_ACK {
1276 	u1Byte	status;
1277 	u1Byte	opcode_ver:4;
1278 	u1Byte	req_num:4;
1279 	u1Byte	ret_len;
1280 	u1Byte	buf[1];
1281 } COL_C2H_ACK, *PCOL_C2H_ACK;
1282 
1283 #define	COL_C2H_IND_HDR_LEN	3
1284 typedef struct _COL_C2H_IND {
1285 	u1Byte	type;
1286 	u1Byte	version;
1287 	u1Byte	length;
1288 	u1Byte	data[1];
1289 } COL_C2H_IND, *PCOL_C2H_IND;
1290 
1291 /*============================================
1292 NOTE: for debug message, the following define should match
1293 the strings in coexH2cResultString.
1294 ============================================*/
1295 typedef enum _COL_H2C_STATUS {
1296 	/* c2h status */
1297 	COL_STATUS_C2H_OK								= 0x00, /* Wifi received H2C request and check content ok. */
1298 	COL_STATUS_C2H_UNKNOWN							= 0x01,	/* Not handled routine */
1299 	COL_STATUS_C2H_UNKNOWN_OPCODE					= 0x02,	/* Invalid OP code, It means that wifi firmware received an undefiend OP code. */
1300 	COL_STATUS_C2H_OPCODE_VER_MISMATCH			= 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */
1301 	COL_STATUS_C2H_PARAMETER_ERROR				= 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */
1302 	COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE		= 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */
1303 	/* other COL status start from here */
1304 	COL_STATUS_C2H_REQ_NUM_MISMATCH			, /* c2h req_num mismatch, means this c2h is not we expected. */
1305 	COL_STATUS_H2C_HALMAC_FAIL					, /* HALMAC return fail. */
1306 	COL_STATUS_H2C_TIMTOUT						, /* not received the c2h response from fw */
1307 	COL_STATUS_INVALID_C2H_LEN					, /* invalid coex offload c2h ack length, must >= 3 */
1308 	COL_STATUS_COEX_DATA_OVERFLOW				, /* coex returned length over the c2h ack length. */
1309 	COL_STATUS_MAX
1310 } COL_H2C_STATUS, *PCOL_H2C_STATUS;
1311 
1312 #define	COL_MAX_H2C_REQ_NUM		16
1313 
1314 #define	COL_H2C_BUF_LEN			20
1315 typedef enum _COL_OPCODE {
1316 	COL_OP_WIFI_STATUS_NOTIFY					= 0x0,
1317 	COL_OP_WIFI_PROGRESS_NOTIFY					= 0x1,
1318 	COL_OP_WIFI_INFO_NOTIFY						= 0x2,
1319 	COL_OP_WIFI_POWER_STATE_NOTIFY				= 0x3,
1320 	COL_OP_SET_CONTROL							= 0x4,
1321 	COL_OP_GET_CONTROL							= 0x5,
1322 	COL_OP_WIFI_OPCODE_MAX
1323 } COL_OPCODE, *PCOL_OPCODE;
1324 
1325 typedef enum _COL_IND_TYPE {
1326 	COL_IND_BT_INFO								= 0x0,
1327 	COL_IND_PSTDMA								= 0x1,
1328 	COL_IND_LIMITED_TX_RX						= 0x2,
1329 	COL_IND_COEX_TABLE							= 0x3,
1330 	COL_IND_REQ									= 0x4,
1331 	COL_IND_MAX
1332 } COL_IND_TYPE, *PCOL_IND_TYPE;
1333 
1334 typedef struct _COL_SINGLE_H2C_RECORD {
1335 	u1Byte					h2c_buf[COL_H2C_BUF_LEN];	/* the latest sent h2c buffer */
1336 	u4Byte					h2c_len;
1337 	u1Byte					c2h_ack_buf[COL_H2C_BUF_LEN];	/* the latest received c2h buffer */
1338 	u4Byte					c2h_ack_len;
1339 	u4Byte					count;									/* the total number of the sent h2c command */
1340 	u4Byte					status[COL_STATUS_MAX];					/* the c2h status for the sent h2c command */
1341 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD;
1342 
1343 typedef struct _COL_SINGLE_C2H_IND_RECORD {
1344 	u1Byte					ind_buf[COL_H2C_BUF_LEN];	/* the latest received c2h indication buffer */
1345 	u4Byte					ind_len;
1346 	u4Byte					count;									/* the total number of the rcvd c2h indication */
1347 	u4Byte					status[COL_STATUS_MAX];					/* the c2h indication verified status */
1348 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD;
1349 
1350 typedef struct _BTC_OFFLOAD {
1351 	/* H2C command related */
1352 	u1Byte					h2c_req_num;
1353 	u4Byte					cnt_h2c_sent;
1354 	COL_SINGLE_H2C_RECORD	h2c_record[COL_OP_WIFI_OPCODE_MAX];
1355 
1356 	/* C2H Ack related */
1357 	u4Byte					cnt_c2h_ack;
1358 	u4Byte					status[COL_STATUS_MAX];
1359 	struct completion		c2h_event[COL_MAX_H2C_REQ_NUM];	/* for req_num = 1~COL_MAX_H2C_REQ_NUM */
1360 	u1Byte					c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN];
1361 	u1Byte					c2h_ack_len[COL_MAX_H2C_REQ_NUM];
1362 
1363 	/* C2H Indication related */
1364 	u4Byte						cnt_c2h_ind;
1365 	COL_SINGLE_C2H_IND_RECORD	c2h_ind_record[COL_IND_MAX];
1366 	u4Byte						c2h_ind_status[COL_STATUS_MAX];
1367 	u1Byte						c2h_ind_buf[COL_H2C_BUF_LEN];
1368 	u1Byte						c2h_ind_len;
1369 } BTC_OFFLOAD, *PBTC_OFFLOAD;
1370 extern BTC_OFFLOAD				gl_coex_offload;
1371 /*==================================================*/
1372 
1373 /* BTC_LINK_MODE same as WIFI_LINK_MODE */
1374 typedef enum _BTC_LINK_MODE{
1375 	BTC_LINK_NONE=0,
1376 	BTC_LINK_ONLY_GO,
1377 	BTC_LINK_ONLY_GC,
1378 	BTC_LINK_ONLY_STA,
1379 	BTC_LINK_ONLY_AP,
1380 	BTC_LINK_2G_MCC_GO_STA,
1381 	BTC_LINK_5G_MCC_GO_STA,
1382 	BTC_LINK_25G_MCC_GO_STA,
1383 	BTC_LINK_2G_MCC_GC_STA,
1384 	BTC_LINK_5G_MCC_GC_STA,
1385 	BTC_LINK_25G_MCC_GC_STA,
1386 	BTC_LINK_2G_SCC_GO_STA,
1387 	BTC_LINK_5G_SCC_GO_STA,
1388 	BTC_LINK_2G_SCC_GC_STA,
1389 	BTC_LINK_5G_SCC_GC_STA,
1390 	BTC_LINK_MAX=30
1391 }BTC_LINK_MODE, *PBTC_LINK_MODE;
1392 
1393 
1394 struct btc_wifi_link_info {
1395 	BTC_LINK_MODE link_mode; /* LinkMode */
1396 	u1Byte sta_center_channel; /* StaCenterChannel */
1397 	u1Byte p2p_center_channel; /* P2PCenterChannel	*/
1398 	BOOLEAN bany_client_join_go;
1399 	BOOLEAN benable_noa;
1400 	BOOLEAN bhotspot;
1401 };
1402 
1403 #if 0
1404 typedef enum _BTC_MULTI_PORT_TDMA_MODE {
1405 	BTC_MULTI_PORT_TDMA_MODE_NONE=0,
1406 	BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO,
1407 	BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO,
1408 	BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO
1409 } BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE;
1410 
1411 typedef struct btc_multi_port_tdma_info {
1412 	BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode;
1413 	u1Byte start_time_from_bcn;
1414 	u1Byte bt_time;
1415 } BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO;
1416 #endif
1417 
1418 typedef enum _btc_concurrent_mode {
1419 	btc_concurrent_mode_none = 0,
1420 	btc_concurrent_mode_2g_go_miracast,
1421 	btc_concurrent_mode_2g_go_hotspot,
1422 	btc_concurrent_mode_2g_scc_go_miracast_sta,
1423 	btc_concurrent_mode_2g_scc_go_hotspot_sta,
1424 	btc_concurrent_mode_2g_gc,
1425 } btc_concurrent_mode, *pbtc_concurrent_mode;
1426 
1427 struct btc_concurrent_setting {
1428 	btc_concurrent_mode btc_concurrent_mode;
1429 	u1Byte start_time_from_bcn;
1430 	u1Byte bt_time;
1431 };
1432 
1433 typedef u1Byte
1434 (*BFP_BTC_R1)(
1435 	IN	PVOID			pBtcContext,
1436 	IN	u4Byte			RegAddr
1437 	);
1438 typedef u2Byte
1439 (*BFP_BTC_R2)(
1440 	IN	PVOID			pBtcContext,
1441 	IN	u4Byte			RegAddr
1442 	);
1443 typedef u4Byte
1444 (*BFP_BTC_R4)(
1445 	IN	PVOID			pBtcContext,
1446 	IN	u4Byte			RegAddr
1447 	);
1448 typedef VOID
1449 (*BFP_BTC_W1)(
1450 	IN	PVOID			pBtcContext,
1451 	IN	u4Byte			RegAddr,
1452 	IN	u1Byte			Data
1453 	);
1454 typedef VOID
1455 (*BFP_BTC_W1_BIT_MASK)(
1456 	IN	PVOID			pBtcContext,
1457 	IN	u4Byte			regAddr,
1458 	IN	u1Byte			bitMask,
1459 	IN	u1Byte			data1b
1460 	);
1461 typedef VOID
1462 (*BFP_BTC_W2)(
1463 	IN	PVOID			pBtcContext,
1464 	IN	u4Byte			RegAddr,
1465 	IN	u2Byte			Data
1466 	);
1467 typedef VOID
1468 (*BFP_BTC_W4)(
1469 	IN	PVOID			pBtcContext,
1470 	IN	u4Byte			RegAddr,
1471 	IN	u4Byte			Data
1472 	);
1473 typedef VOID
1474 (*BFP_BTC_LOCAL_REG_W1)(
1475 	IN	PVOID			pBtcContext,
1476 	IN	u4Byte			RegAddr,
1477 	IN	u1Byte			Data
1478 	);
1479 typedef u4Byte
1480 (*BFP_BTC_R_LINDIRECT)(
1481 	IN 	PVOID			pBtcContext,
1482 	IN	u2Byte			reg_addr
1483 	);
1484 typedef u4Byte
1485 (*BFP_BTC_R_SCBD)(
1486 	IN 	PVOID			pBtcContext,
1487 	IN	pu4Byte			score_board_val
1488 	);
1489 typedef VOID
1490 (*BFP_BTC_W_SCBD)(
1491 	IN 	PVOID			pBtcContext,
1492 	IN	u4Byte			bitpos,
1493 	IN	BOOLEAN			state
1494 	);
1495 typedef VOID
1496 (*BFP_BTC_W_LINDIRECT)(
1497 	IN 	PVOID			pBtcContext,
1498 	IN	u2Byte			reg_addr,
1499 	IN	u4Byte			bit_mask,
1500 	IN	u4Byte 			reg_value
1501 	);
1502 typedef VOID
1503 (*BFP_BTC_SET_BB_REG)(
1504 	IN	PVOID			pBtcContext,
1505 	IN	u4Byte			RegAddr,
1506 	IN	u4Byte			BitMask,
1507 	IN	u4Byte			Data
1508 	);
1509 typedef u4Byte
1510 (*BFP_BTC_GET_BB_REG)(
1511 	IN	PVOID			pBtcContext,
1512 	IN	u4Byte			RegAddr,
1513 	IN	u4Byte			BitMask
1514 	);
1515 typedef VOID
1516 (*BFP_BTC_SET_RF_REG)(
1517 	IN	PVOID			pBtcContext,
1518 	IN	enum rf_path		eRFPath,
1519 	IN	u4Byte			RegAddr,
1520 	IN	u4Byte			BitMask,
1521 	IN	u4Byte			Data
1522 	);
1523 typedef u4Byte
1524 (*BFP_BTC_GET_RF_REG)(
1525 	IN	PVOID			pBtcContext,
1526 	IN	enum rf_path		eRFPath,
1527 	IN	u4Byte			RegAddr,
1528 	IN	u4Byte			BitMask
1529 	);
1530 typedef VOID
1531 (*BFP_BTC_FILL_H2C)(
1532 	IN	PVOID			pBtcContext,
1533 	IN	u1Byte			elementId,
1534 	IN	u4Byte			cmdLen,
1535 	IN	pu1Byte			pCmdBuffer
1536 	);
1537 
1538 typedef	BOOLEAN
1539 (*BFP_BTC_GET)(
1540 	IN	PVOID			pBtCoexist,
1541 	IN	u1Byte			getType,
1542 	OUT	PVOID			pOutBuf
1543 	);
1544 
1545 typedef	BOOLEAN
1546 (*BFP_BTC_SET)(
1547 	IN	PVOID			pBtCoexist,
1548 	IN	u1Byte			setType,
1549 	OUT	PVOID			pInBuf
1550 	);
1551 typedef u2Byte
1552 (*BFP_BTC_SET_BT_REG)(
1553 	IN	PVOID			pBtcContext,
1554 	IN	u1Byte			regType,
1555 	IN	u4Byte			offset,
1556 	IN	u4Byte			value
1557 	);
1558 typedef BOOLEAN
1559 (*BFP_BTC_SET_BT_ANT_DETECTION)(
1560 	IN	PVOID			pBtcContext,
1561 	IN	u1Byte			txTime,
1562 	IN	u1Byte			btChnl
1563 	);
1564 
1565 typedef BOOLEAN
1566 (*BFP_BTC_SET_BT_TRX_MASK)(
1567 	IN	PVOID			pBtcContext,
1568 	IN	u1Byte			bt_trx_mask
1569 	);
1570 
1571 typedef u4Byte
1572 (*BFP_BTC_GET_BT_REG)(
1573 	IN	PVOID			pBtcContext,
1574 	IN	u1Byte			regType,
1575 	IN	u4Byte			offset
1576 	);
1577 typedef VOID
1578 (*BFP_BTC_DISP_DBG_MSG)(
1579 	IN	PVOID			pBtCoexist,
1580 	IN	u1Byte			dispType
1581 	);
1582 
1583 typedef COL_H2C_STATUS
1584 (*BFP_BTC_COEX_H2C_PROCESS)(
1585 	IN	PVOID			pBtCoexist,
1586 	IN	u1Byte			opcode,
1587 	IN	u1Byte			opcode_ver,
1588 	IN	pu1Byte			ph2c_par,
1589 	IN	u1Byte			h2c_par_len
1590 	);
1591 
1592 typedef u4Byte
1593 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)(
1594 	IN	PVOID			pBtcContext
1595 	);
1596 
1597 typedef u4Byte
1598 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)(
1599 	IN	PVOID			pBtcContext
1600 	);
1601 
1602 typedef u4Byte
1603 (*BFP_BTC_GET_PHYDM_VERSION)(
1604 	IN	PVOID			pBtcContext
1605 	);
1606 
1607 typedef u1Byte
1608 (*BFP_BTC_SET_TIMER) 	(
1609 	IN	PVOID			pBtcContext,
1610 	IN	u4Byte 			type,
1611 	IN	u4Byte			val
1612 	);
1613 
1614 typedef u4Byte
1615 (*BFP_BTC_SET_ATOMIC) 	(
1616 	IN	PVOID			pBtcContext,
1617 	IN	pu4Byte 		target,
1618 	IN	u4Byte			val
1619 	);
1620 
1621 
1622 typedef VOID
1623 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)(
1624 	IN	PVOID		pDM_Odm,
1625 	IN	u1Byte		RA_offset_direction,
1626 	IN	u1Byte		RA_threshold_offset
1627 	);
1628 
1629 typedef u4Byte
1630 (*BTC_PHYDM_CMNINFOQUERY)(
1631 	IN		PVOID	pDM_Odm,
1632 	IN		u1Byte	info_type
1633 	);
1634 
1635 typedef VOID
1636 (*BTC_REDUCE_WL_TX_POWER)(
1637 	IN		PVOID		pDM_Odm,
1638 	IN		s1Byte		tx_power
1639 	);
1640 
1641 typedef VOID
1642 (*BTC_PHYDM_MODIFY_ANTDIV_HWSW)(
1643 	IN		PVOID	pDM_Odm,
1644 	IN		u1Byte	type
1645 	);
1646 
1647 typedef u1Byte
1648 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)(
1649 
1650 	IN	PVOID			pBtcContext
1651 	);
1652 
1653 typedef u1Byte
1654 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)(
1655 	IN	PVOID			pBtcContext
1656 	);
1657 
1658 typedef u4Byte
1659 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)(
1660 	IN	PVOID			pBtcContext,
1661 	IN  u1Byte			scanType
1662 	);
1663 
1664 typedef BOOLEAN
1665 (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)(
1666 	IN	PVOID			pBtcContext,
1667 	IN	u1Byte			mapType,
1668 	OUT	pu1Byte			afhMap
1669 	);
1670 
1671 struct  btc_bt_info {
1672 	boolean					bt_disabled;
1673 	boolean				bt_enable_disable_change;
1674 	u8					rssi_adjust_for_agc_table_on;
1675 	u8					rssi_adjust_for_1ant_coex_type;
1676 	boolean					pre_bt_ctrl_agg_buf_size;
1677 	boolean					bt_ctrl_agg_buf_size;
1678 	boolean					pre_reject_agg_pkt;
1679 	boolean					reject_agg_pkt;
1680 	boolean					increase_scan_dev_num;
1681 	boolean					bt_tx_rx_mask;
1682 	u8					pre_agg_buf_size;
1683 	u8					agg_buf_size;
1684 	boolean					bt_busy;
1685 	boolean					limited_dig;
1686 	u16					bt_hci_ver;
1687 	u32					bt_real_fw_ver;
1688 	u32					get_bt_fw_ver_cnt;
1689 	u32					bt_get_fw_ver;
1690 	boolean					miracast_plus_bt;
1691 
1692 	boolean					bt_disable_low_pwr;
1693 
1694 	boolean					bt_ctrl_lps;
1695 	boolean					bt_lps_on;
1696 	boolean					force_to_roam;	/* for 1Ant solution */
1697 	u8					lps_val;
1698 	u8					rpwm_val;
1699 	u32					ra_mask;
1700 };
1701 
1702 struct btc_stack_info {
1703 	boolean					profile_notified;
1704 	u16					hci_version;	/* stack hci version */
1705 	u8					num_of_link;
1706 	boolean					bt_link_exist;
1707 	boolean					sco_exist;
1708 	boolean					acl_exist;
1709 	boolean					a2dp_exist;
1710 	boolean					hid_exist;
1711 	u8					num_of_hid;
1712 	boolean					pan_exist;
1713 	boolean					unknown_acl_exist;
1714 	s8					min_bt_rssi;
1715 };
1716 
1717 struct btc_bt_link_info {
1718 	boolean					bt_link_exist;
1719 	boolean					bt_hi_pri_link_exist;
1720 	boolean					sco_exist;
1721 	boolean					sco_only;
1722 	boolean					a2dp_exist;
1723 	boolean					a2dp_only;
1724 	boolean					hid_exist;
1725 	boolean					hid_only;
1726 	boolean					pan_exist;
1727 	boolean					pan_only;
1728 	boolean					slave_role;
1729 	boolean					acl_busy;
1730 };
1731 
1732 #ifdef CONFIG_RF4CE_COEXIST
1733 struct btc_rf4ce_info {
1734 	u8					link_state;
1735 };
1736 #endif
1737 
1738 struct btc_statistics {
1739 	u32					cnt_bind;
1740 	u32					cnt_power_on;
1741 	u32					cnt_pre_load_firmware;
1742 	u32					cnt_init_hw_config;
1743 	u32					cnt_init_coex_dm;
1744 	u32					cnt_ips_notify;
1745 	u32					cnt_lps_notify;
1746 	u32					cnt_scan_notify;
1747 	u32					cnt_connect_notify;
1748 	u32					cnt_media_status_notify;
1749 	u32					cnt_specific_packet_notify;
1750 	u32					cnt_bt_info_notify;
1751 	u32					cnt_rf_status_notify;
1752 	u32					cnt_periodical;
1753 	u32					cnt_coex_dm_switch;
1754 	u32					cnt_stack_operation_notify;
1755 	u32					cnt_dbg_ctrl;
1756 	u32					cnt_rate_id_notify;
1757 	u32					cnt_halt_notify;
1758 	u32					cnt_pnp_notify;
1759 };
1760 
1761 struct btc_coexist {
1762 	BOOLEAN				bBinded;		/*make sure only one adapter can bind the data context*/
1763 	PVOID				Adapter;		/*default adapter*/
1764 	struct  btc_board_info		board_info;
1765 	struct  btc_bt_info			bt_info;		/*some bt info referenced by non-bt module*/
1766 	struct  btc_stack_info		stack_info;
1767 	struct  btc_bt_link_info		bt_link_info;
1768 	struct btc_wifi_link_info	wifi_link_info;
1769 	struct btc_wifi_link_info_ext		wifi_link_info_ext;
1770 	struct btc_coex_dm			coex_dm;
1771 	struct btc_coex_sta			coex_sta;
1772 	struct btc_rfe_type			rfe_type;
1773 	const struct btc_chip_para		*chip_para;
1774 	u8					wifi_black_bssid[6];
1775 	u8					wifi_bssid[6];
1776 
1777 #ifdef CONFIG_RF4CE_COEXIST
1778 	struct  btc_rf4ce_info		rf4ce_info;
1779 #endif
1780 	BTC_CHIP_INTERFACE		chip_interface;
1781 	PVOID					odm_priv;
1782 
1783 	BOOLEAN					initilized;
1784 	BOOLEAN					stop_coex_dm;
1785 	BOOLEAN					manual_control;
1786 	BOOLEAN					bdontenterLPS;
1787 	pu1Byte					cli_buf;
1788 	struct btc_statistics		statistics;
1789 	u1Byte				pwrModeVal[10];
1790 	BOOLEAN dbg_mode;
1791 	BOOLEAN auto_report;
1792 	u8	chip_type;
1793 	BOOLEAN wl_rf_state_off;
1794 
1795 	/* function pointers */
1796 	/* io related */
1797 	BFP_BTC_R1			btc_read_1byte;
1798 	BFP_BTC_W1			btc_write_1byte;
1799 	BFP_BTC_W1_BIT_MASK	btc_write_1byte_bitmask;
1800 	BFP_BTC_R2			btc_read_2byte;
1801 	BFP_BTC_W2			btc_write_2byte;
1802 	BFP_BTC_R4			btc_read_4byte;
1803 	BFP_BTC_W4			btc_write_4byte;
1804 	BFP_BTC_LOCAL_REG_W1	btc_write_local_reg_1byte;
1805 	BFP_BTC_R_LINDIRECT		btc_read_linderct;
1806 	BFP_BTC_W_LINDIRECT		btc_write_linderct;
1807 	BFP_BTC_R_SCBD			btc_read_scbd;
1808 	BFP_BTC_W_SCBD			btc_write_scbd;
1809 	/* read/write bb related */
1810 	BFP_BTC_SET_BB_REG	btc_set_bb_reg;
1811 	BFP_BTC_GET_BB_REG	btc_get_bb_reg;
1812 
1813 	/* read/write rf related */
1814 	BFP_BTC_SET_RF_REG	btc_set_rf_reg;
1815 	BFP_BTC_GET_RF_REG	btc_get_rf_reg;
1816 
1817 	/* fill h2c related */
1818 	BFP_BTC_FILL_H2C		btc_fill_h2c;
1819 	/* other */
1820 	BFP_BTC_DISP_DBG_MSG	btc_disp_dbg_msg;
1821 	/* normal get/set related */
1822 	BFP_BTC_GET			btc_get;
1823 	BFP_BTC_SET			btc_set;
1824 
1825 	BFP_BTC_GET_BT_REG	btc_get_bt_reg;
1826 	BFP_BTC_SET_BT_REG	btc_set_bt_reg;
1827 
1828 	BFP_BTC_SET_BT_ANT_DETECTION	btc_set_bt_ant_detection;
1829 
1830 	BFP_BTC_COEX_H2C_PROCESS	btc_coex_h2c_process;
1831 	BFP_BTC_SET_BT_TRX_MASK		btc_set_bt_trx_mask;
1832 	BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature;
1833 	BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version;
1834 	BFP_BTC_GET_PHYDM_VERSION		btc_get_bt_phydm_version;
1835 	BFP_BTC_SET_TIMER				btc_set_timer;
1836 	BFP_BTC_SET_ATOMIC			btc_set_atomic;
1837 	BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD	btc_phydm_modify_RA_PCR_threshold;
1838 	BTC_PHYDM_CMNINFOQUERY				btc_phydm_query_PHY_counter;
1839 	BTC_REDUCE_WL_TX_POWER				btc_reduce_wl_tx_power;
1840 	BTC_PHYDM_MODIFY_ANTDIV_HWSW		btc_phydm_modify_antdiv_hwsw;
1841 	BFP_BTC_GET_ANT_DET_VAL_FROM_BT		btc_get_ant_det_val_from_bt;
1842 	BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT	btc_get_ble_scan_type_from_bt;
1843 	BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT	btc_get_ble_scan_para_from_bt;
1844 	BFP_BTC_GET_BT_AFH_MAP_FROM_BT		btc_get_bt_afh_map_from_bt;
1845 
1846 	union {
1847 		#ifdef CONFIG_RTL8822B
1848 		struct coex_dm_8822b_1ant	coex_dm_8822b_1ant;
1849 		struct coex_dm_8822b_2ant	coex_dm_8822b_2ant;
1850 		#endif /* 8822B */
1851 		#ifdef CONFIG_RTL8821C
1852 		struct coex_dm_8821c_1ant	coex_dm_8821c_1ant;
1853 		struct coex_dm_8821c_2ant	coex_dm_8821c_2ant;
1854 		#endif /* 8821C */
1855         #ifdef CONFIG_RTL8723D
1856         struct coex_dm_8723d_1ant   coex_dm_8723d_1ant;
1857         struct coex_dm_8723d_2ant   coex_dm_8723d_2ant;
1858         #endif /* 8723D */
1859 	};
1860 
1861 	union {
1862 		#ifdef CONFIG_RTL8822B
1863 		struct coex_sta_8822b_1ant	coex_sta_8822b_1ant;
1864 		struct coex_sta_8822b_2ant	coex_sta_8822b_2ant;
1865 		#endif /* 8822B */
1866 		#ifdef CONFIG_RTL8821C
1867 		struct coex_sta_8821c_1ant	coex_sta_8821c_1ant;
1868 		struct coex_sta_8821c_2ant	coex_sta_8821c_2ant;
1869 		#endif /* 8821C */
1870         #ifdef CONFIG_RTL8723D
1871         struct coex_sta_8723d_1ant  coex_sta_8723d_1ant;
1872         struct coex_sta_8723d_2ant  coex_sta_8723d_2ant;
1873         #endif /* 8723D */
1874 	};
1875 
1876 	union {
1877 		#ifdef CONFIG_RTL8822B
1878 		struct rfe_type_8822b_1ant	rfe_type_8822b_1ant;
1879 		struct rfe_type_8822b_2ant	rfe_type_8822b_2ant;
1880 		#endif /* 8822B */
1881 		#ifdef CONFIG_RTL8821C
1882 		struct rfe_type_8821c_1ant	rfe_type_8821c_1ant;
1883 		struct rfe_type_8821c_2ant	rfe_type_8821c_2ant;
1884 		#endif /* 8821C */
1885 	};
1886 
1887 	union {
1888 		#ifdef CONFIG_RTL8822B
1889 		struct wifi_link_info_8822b_1ant	wifi_link_info_8822b_1ant;
1890 		struct wifi_link_info_8822b_2ant	wifi_link_info_8822b_2ant;
1891 		#endif /* 8822B */
1892 		#ifdef CONFIG_RTL8821C
1893 		struct wifi_link_info_8821c_1ant	wifi_link_info_8821c_1ant;
1894 		struct wifi_link_info_8821c_2ant	wifi_link_info_8821c_2ant;
1895 		#endif /* 8821C */
1896 	};
1897 
1898 };
1899 typedef struct btc_coexist *PBTC_COEXIST;
1900 
1901 extern struct btc_coexist	GLBtCoexist;
1902 
1903 typedef	void
1904 (*BFP_BTC_CHIP_SETUP)(
1905 	IN	PBTC_COEXIST	pBtCoexist,
1906 	IN	u1Byte			setType
1907 	);
1908 
1909 struct btc_chip_para {
1910 	const char				*chip_name;
1911 	u32				para_ver_date;
1912 	u32				para_ver;
1913 	u32				bt_desired_ver;
1914 	boolean			scbd_support;
1915 	u32				scbd_reg;
1916 	u8				scbd_bit_num;
1917 	boolean			mailbox_support;
1918 	boolean			lte_indirect_access;
1919 	boolean			new_scbd10_def; /* TRUE: 1:fix 2M(8822c) */
1920 	u8				indirect_type;	/* 0:17xx, 1:7cx */
1921 	u8				pstdma_type; /* 0: LPSoff, 1:LPSon */
1922 	u8				bt_rssi_type;
1923 	u8				ant_isolation;
1924 	u8				rssi_tolerance;
1925 	u8				rx_path_num;
1926 	u8				wl_rssi_step_num;
1927 	const u8				*wl_rssi_step;
1928 	u8				bt_rssi_step_num;
1929 	const u8				*bt_rssi_step;
1930 	u8				table_sant_num;
1931 	const struct btc_coex_table_para 	*table_sant;
1932 	u8				table_nsant_num;
1933 	const struct btc_coex_table_para 	*table_nsant;
1934 	u8				tdma_sant_num;
1935 	const struct btc_tdma_para 	*tdma_sant;
1936 	u8				tdma_nsant_num;
1937 	const struct btc_tdma_para 	*tdma_nsant;
1938 	u8				wl_rf_para_tx_num;
1939 	const struct btc_rf_para		*wl_rf_para_tx;
1940 	const struct btc_rf_para		*wl_rf_para_rx;
1941 	u8				bt_afh_span_bw20;
1942 	u8				bt_afh_span_bw40;
1943 	u8				afh_5g_num;
1944 	const struct btc_5g_afh_map	*afh_5g;
1945 	BFP_BTC_CHIP_SETUP		chip_setup;
1946 };
1947 
1948 BOOLEAN
1949 EXhalbtcoutsrc_InitlizeVariables(
1950 	IN	PVOID		Adapter
1951 	);
1952 VOID
1953 EXhalbtcoutsrc_PowerOnSetting(
1954 	IN	PBTC_COEXIST		pBtCoexist
1955 	);
1956 VOID
1957 EXhalbtcoutsrc_PreLoadFirmware(
1958 	IN	PBTC_COEXIST		pBtCoexist
1959 	);
1960 VOID
1961 EXhalbtcoutsrc_InitHwConfig(
1962 	IN	PBTC_COEXIST		pBtCoexist,
1963 	IN	BOOLEAN				bWifiOnly
1964 	);
1965 VOID
1966 EXhalbtcoutsrc_InitCoexDm(
1967 	IN	PBTC_COEXIST		pBtCoexist
1968 	);
1969 VOID
1970 EXhalbtcoutsrc_IpsNotify(
1971 	IN	PBTC_COEXIST		pBtCoexist,
1972 	IN	u1Byte			type
1973 	);
1974 VOID
1975 EXhalbtcoutsrc_LpsNotify(
1976 	IN	PBTC_COEXIST		pBtCoexist,
1977 	IN	u1Byte			type
1978 	);
1979 VOID
1980 EXhalbtcoutsrc_ScanNotify(
1981 	IN	PBTC_COEXIST		pBtCoexist,
1982 	IN	u1Byte			type
1983 	);
1984 VOID
1985 EXhalbtcoutsrc_SetAntennaPathNotify(
1986 	IN	PBTC_COEXIST	pBtCoexist,
1987 	IN	u1Byte			type
1988 	);
1989 VOID
1990 EXhalbtcoutsrc_ConnectNotify(
1991 	IN	PBTC_COEXIST		pBtCoexist,
1992 	IN	u1Byte			action
1993 	);
1994 VOID
1995 EXhalbtcoutsrc_MediaStatusNotify(
1996 	IN	PBTC_COEXIST		pBtCoexist,
1997 	IN	RT_MEDIA_STATUS	mediaStatus
1998 	);
1999 VOID
2000 EXhalbtcoutsrc_SpecificPacketNotify(
2001 	IN	PBTC_COEXIST		pBtCoexist,
2002 	IN	u1Byte			pktType
2003 	);
2004 VOID
2005 EXhalbtcoutsrc_BtInfoNotify(
2006 	IN	PBTC_COEXIST		pBtCoexist,
2007 	IN	pu1Byte			tmpBuf,
2008 	IN	u1Byte			length
2009 	);
2010 VOID
2011 EXhalbtcoutsrc_RfStatusNotify(
2012 	IN	PBTC_COEXIST		pBtCoexist,
2013 	IN	u1Byte				type
2014 	);
2015 u4Byte
2016 EXhalbtcoutsrc_CoexTimerCheck(
2017 	IN	PBTC_COEXIST		pBtCoexist
2018 	);
2019 u4Byte
2020 EXhalbtcoutsrc_WLStatusCheck(
2021 	IN	PBTC_COEXIST		pBtCoexist
2022 	);
2023 VOID
2024 EXhalbtcoutsrc_WlFwDbgInfoNotify(
2025 	IN	PBTC_COEXIST		pBtCoexist,
2026 	IN	pu1Byte			tmpBuf,
2027 	IN	u1Byte			length
2028 	);
2029 VOID
2030 EXhalbtcoutsrc_rx_rate_change_notify(
2031 	IN	PBTC_COEXIST	pBtCoexist,
2032 	IN 	BOOLEAN			is_data_frame,
2033 	IN	u1Byte			btc_rate_id
2034 	);
2035 VOID
2036 EXhalbtcoutsrc_StackOperationNotify(
2037 	IN	PBTC_COEXIST		pBtCoexist,
2038 	IN	u1Byte			type
2039 	);
2040 VOID
2041 EXhalbtcoutsrc_HaltNotify(
2042 	IN	PBTC_COEXIST		pBtCoexist
2043 	);
2044 VOID
2045 EXhalbtcoutsrc_PnpNotify(
2046 	IN	PBTC_COEXIST		pBtCoexist,
2047 	IN	u1Byte			pnpState
2048 	);
2049 VOID
2050 EXhalbtcoutsrc_TimerNotify(
2051 	IN	PBTC_COEXIST		pBtCoexist,
2052 	IN	u4Byte timer_type
2053 );
2054 VOID
2055 EXhalbtcoutsrc_WLStatusChangeNotify(
2056 	IN	PBTC_COEXIST		pBtCoexist,
2057 	IN	u4Byte change_type
2058 );
2059 VOID
2060 EXhalbtcoutsrc_WL_RFK_Notify(
2061 	IN	PBTC_COEXIST 		pBtCoexist,
2062 	IN	u1Byte			path,
2063 	IN	u1Byte			type,
2064 	IN	u1Byte			state
2065 	);
2066 VOID
2067 EXhalbtcoutsrc_CoexDmSwitch(
2068 	IN	PBTC_COEXIST		pBtCoexist
2069 	);
2070 VOID
2071 EXhalbtcoutsrc_Periodical(
2072 	IN	PBTC_COEXIST		pBtCoexist
2073 	);
2074 VOID
2075 EXhalbtcoutsrc_DbgControl(
2076 	IN	PBTC_COEXIST			pBtCoexist,
2077 	IN	u1Byte				opCode,
2078 	IN	u1Byte				opLen,
2079 	IN	pu1Byte				pData
2080 	);
2081 VOID
2082 EXhalbtcoutsrc_AntennaDetection(
2083 	IN	PBTC_COEXIST			pBtCoexist,
2084 	IN	u4Byte					centFreq,
2085 	IN	u4Byte					offset,
2086 	IN	u4Byte					span,
2087 	IN	u4Byte					seconds
2088 	);
2089 VOID
2090 EXhalbtcoutsrc_StackUpdateProfileInfo(
2091 	VOID
2092 	);
2093 VOID
2094 EXhalbtcoutsrc_SetHciVersion(
2095 	IN	u2Byte	hciVersion
2096 	);
2097 VOID
2098 EXhalbtcoutsrc_SetBtPatchVersion(
2099 	IN	u2Byte	btHciVersion,
2100 	IN	u2Byte	btPatchVersion
2101 	);
2102 VOID
2103 EXhalbtcoutsrc_UpdateMinBtRssi(
2104 	IN	s1Byte	btRssi
2105 	);
2106 #if 0
2107 VOID
2108 EXhalbtcoutsrc_SetBtExist(
2109 	IN	BOOLEAN		bBtExist
2110 	);
2111 #endif
2112 VOID
2113 EXhalbtcoutsrc_SetChipType(
2114 	IN	u1Byte		chipType
2115 	);
2116 VOID
2117 EXhalbtcoutsrc_SetAntNum(
2118 	IN	u1Byte		type,
2119 	IN	u1Byte		antNum
2120 	);
2121 VOID
2122 EXhalbtcoutsrc_SetSingleAntPath(
2123 	IN	u1Byte		singleAntPath
2124 	);
2125 VOID
2126 EXhalbtcoutsrc_DisplayBtCoexInfo(
2127 	IN	PBTC_COEXIST		pBtCoexist
2128 	);
2129 VOID
2130 EXhalbtcoutsrc_DisplayAntDetection(
2131 	IN	PBTC_COEXIST		pBtCoexist
2132 	);
2133 
2134 #define	MASKBYTE0		0xff
2135 #define	MASKBYTE1		0xff00
2136 #define	MASKBYTE2		0xff0000
2137 #define	MASKBYTE3		0xff000000
2138 #define	MASKHWORD	0xffff0000
2139 #define	MASKLWORD		0x0000ffff
2140 #define	MASKDWORD	0xffffffff
2141 #define	MASK12BITS		0xfff
2142 #define	MASKH4BITS		0xf0000000
2143 #define	MASKOFDM_D	0xffc00000
2144 #define	MASKCCK		0x3f3f3f3f
2145 
2146 #endif
2147