1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2017 Realtek Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 *****************************************************************************/ 16 #ifndef __HAL_DM_H__ 17 #define __HAL_DM_H__ 18 19 #define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv)) 20 #define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj)) 21 #ifdef CONFIG_TDMADIG 22 void rtw_phydm_tdmadig(_adapter *adapter, u8 state); 23 #endif 24 void rtw_phydm_priv_init(_adapter *adapter); 25 void Init_ODM_ComInfo(_adapter *adapter); 26 void rtw_phydm_init(_adapter *adapter); 27 28 void rtw_hal_turbo_edca(_adapter *adapter); 29 u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter); 30 31 void GetHalODMVar( 32 PADAPTER Adapter, 33 HAL_ODM_VARIABLE eVariable, 34 void *pValue1, 35 void *pValue2); 36 void SetHalODMVar( 37 PADAPTER Adapter, 38 HAL_ODM_VARIABLE eVariable, 39 void *pValue1, 40 BOOLEAN bSet); 41 42 void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta); 43 44 #ifdef CONFIG_DYNAMIC_SOML 45 void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size); 46 void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl, 47 u8 period, u8 delay); 48 void rtw_dyn_soml_config(_adapter *adapter); 49 #endif 50 void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr); 51 void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr); 52 void rtw_phydm_watchdog(_adapter *adapter, bool in_lps); 53 54 void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter); 55 void dump_sta_info(void *sel, struct sta_info *psta); 56 void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta); 57 58 #ifdef CONFIG_DBG_RF_CAL 59 void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment); 60 void rtw_hal_lck_test(_adapter *adapter); 61 #endif 62 63 s8 rtw_dm_get_min_rssi(_adapter *adapter); 64 s8 rtw_phydm_get_min_rssi(_adapter *adapter); 65 u8 rtw_phydm_get_cur_igi(_adapter *adapter); 66 bool rtw_phydm_get_edcca_flag(_adapter *adapter); 67 68 69 #ifdef CONFIG_LPS_LCLK_WD_TIMER 70 extern void phydm_rssi_monitor_check(void *p_dm_void); 71 72 void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter); 73 void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter); 74 #endif 75 #ifdef CONFIG_TDMADIG 76 enum rtw_tdmadig_state{ 77 TDMADIG_INIT, 78 TDMADIG_NON_INIT, 79 }; 80 #endif 81 enum phy_cnt { 82 FA_OFDM, 83 FA_CCK, 84 FA_TOTAL, 85 CCA_OFDM, 86 CCA_CCK, 87 CCA_ALL, 88 CRC32_OK_VHT, 89 CRC32_OK_HT, 90 CRC32_OK_LEGACY, 91 CRC32_OK_CCK, 92 CRC32_ERROR_VHT, 93 CRC32_ERROR_HT, 94 CRC32_ERROR_LEGACY, 95 CRC32_ERROR_CCK, 96 }; 97 u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt); 98 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) 99 void rtw_phydm_iqk_trigger(_adapter *adapter); 100 #endif 101 void rtw_phydm_read_efuse(_adapter *adapter); 102 bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap); 103 104 #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR 105 void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id); 106 #endif 107 108 #ifdef CONFIG_LPS_PG 109 void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg); 110 #endif 111 #ifdef CONFIG_LPS_PWR_TRACKING 112 void rtw_phydm_pwr_tracking_directly(_adapter *adapter); 113 #endif 114 115 #ifdef CONFIG_CTRL_TXSS_BY_TP 116 void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss); 117 #endif 118 119 #endif /* __HAL_DM_H__ */ 120