1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21 //============================================================
22 // include files
23 //============================================================
24
25 #include "mp_precomp.h"
26 #include "phydm_precomp.h"
27
28 const u2Byte dB_Invert_Table[12][8] = {
29 { 1, 1, 1, 2, 2, 2, 2, 3},
30 { 3, 3, 4, 4, 4, 5, 6, 6},
31 { 7, 8, 9, 10, 11, 13, 14, 16},
32 { 18, 20, 22, 25, 28, 32, 35, 40},
33 { 45, 50, 56, 63, 71, 79, 89, 100},
34 { 112, 126, 141, 158, 178, 200, 224, 251},
35 { 282, 316, 355, 398, 447, 501, 562, 631},
36 { 708, 794, 891, 1000, 1122, 1259, 1413, 1585},
37 { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
38 { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000},
39 { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119},
40 { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}
41 };
42
43
44 //============================================================
45 // Local Function predefine.
46 //============================================================
47
48 /* START------------COMMON INFO RELATED--------------- */
49
50 VOID
51 odm_GlobalAdapterCheck(
52 IN VOID
53 );
54
55 //move to odm_PowerTacking.h by YuChen
56
57
58
59 VOID
60 odm_UpdatePowerTrainingState(
61 IN PDM_ODM_T pDM_Odm
62 );
63
64 //============================================================
65 //3 Export Interface
66 //============================================================
67
68 /*Y = 10*log(X)*/
69 s4Byte
ODM_PWdB_Conversion(IN s4Byte X,IN u4Byte TotalBit,IN u4Byte DecimalBit)70 ODM_PWdB_Conversion(
71 IN s4Byte X,
72 IN u4Byte TotalBit,
73 IN u4Byte DecimalBit
74 )
75 {
76 s4Byte Y, integer = 0, decimal = 0;
77 u4Byte i;
78
79 if(X == 0)
80 X = 1; // log2(x), x can't be 0
81
82 for(i = (TotalBit-1); i > 0; i--)
83 {
84 if(X & BIT(i))
85 {
86 integer = i;
87 if(i > 0)
88 decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB
89 break;
90 }
91 }
92
93 Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x),
94
95 return Y;
96 }
97
98 s4Byte
ODM_SignConversion(IN s4Byte value,IN u4Byte TotalBit)99 ODM_SignConversion(
100 IN s4Byte value,
101 IN u4Byte TotalBit
102 )
103 {
104 if(value&BIT(TotalBit-1))
105 value -= BIT(TotalBit);
106 return value;
107 }
108
109 VOID
ODM_InitMpDriverStatus(IN PDM_ODM_T pDM_Odm)110 ODM_InitMpDriverStatus(
111 IN PDM_ODM_T pDM_Odm
112 )
113 {
114 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
115
116 // Decide when compile time
117 #if(MP_DRIVER == 1)
118 pDM_Odm->mp_mode = TRUE;
119 #else
120 pDM_Odm->mp_mode = FALSE;
121 #endif
122
123 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
124
125 PADAPTER Adapter = pDM_Odm->Adapter;
126
127 // Update information every period
128 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
129
130 #else
131
132 // MP mode is always false at AP side
133 pDM_Odm->mp_mode = FALSE;
134
135 #endif
136 }
137
138 VOID
ODM_UpdateMpDriverStatus(IN PDM_ODM_T pDM_Odm)139 ODM_UpdateMpDriverStatus(
140 IN PDM_ODM_T pDM_Odm
141 )
142 {
143 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
144
145 // Do nothing.
146
147 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
148 PADAPTER Adapter = pDM_Odm->Adapter;
149
150 // Update information erery period
151 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
152
153 #else
154
155 // Do nothing.
156
157 #endif
158 }
159
160 VOID
PHYDM_InitTRXAntennaSetting(IN PDM_ODM_T pDM_Odm)161 PHYDM_InitTRXAntennaSetting(
162 IN PDM_ODM_T pDM_Odm
163 )
164 {
165 #if (RTL8814A_SUPPORT == 1)
166
167 if (pDM_Odm->SupportICType & (ODM_RTL8814A)) {
168 u1Byte RxAnt = 0, TxAnt = 0;
169
170 RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm));
171 TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm));
172 pDM_Odm->TXAntStatus = (TxAnt & 0xf);
173 pDM_Odm->RXAntStatus = (RxAnt & 0xf);
174 }
175 #endif
176 }
177
178 VOID
phydm_Init_cck_setting(IN PDM_ODM_T pDM_Odm)179 phydm_Init_cck_setting(
180 IN PDM_ODM_T pDM_Odm
181 )
182 {
183 u4Byte value_824,value_82c;
184
185 pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
186
187 #if (RTL8192E_SUPPORT == 1)
188 if(pDM_Odm->SupportICType & (ODM_RTL8192E))
189 {
190 /* 0x824[9] = 0x82C[9] = 0xA80[7] these regiaters settinh should be equal or CCK RSSI report may inaccurate */
191 value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9);
192 value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9);
193
194 if(value_824 != value_82c)
195 {
196 ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824);
197 }
198 ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824);
199 pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824;
200 }
201 #endif
202
203 #if (RTL8703B_SUPPORT == 1)
204 if (pDM_Odm->SupportICType & (ODM_RTL8703B)) {
205
206 pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */
207
208 if (pDM_Odm->cck_agc_report_type != 1) {
209 DbgPrint("[Warning] 8703B CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
210 /**/
211 }
212 }
213 #endif
214
215 }
216
217 u1Byte DummyHubUsbMode = 1;/* USB 2.0 */
phydm_hook_dummy_member(IN PDM_ODM_T pDM_Odm)218 void phydm_hook_dummy_member(
219 IN PDM_ODM_T pDM_Odm
220 )
221 {
222 if (pDM_Odm->HubUsbMode == NULL)
223 pDM_Odm->HubUsbMode = &DummyHubUsbMode;
224 }
225
226
227 VOID
odm_CommonInfoSelfInit(IN PDM_ODM_T pDM_Odm)228 odm_CommonInfoSelfInit(
229 IN PDM_ODM_T pDM_Odm
230 )
231 {
232 phydm_Init_cck_setting(pDM_Odm);
233 pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
234 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
235 pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
236 #endif
237
238 PHYDM_InitDebugSetting(pDM_Odm);
239 ODM_InitMpDriverStatus(pDM_Odm);
240 PHYDM_InitTRXAntennaSetting(pDM_Odm);
241
242 pDM_Odm->TxRate = 0xFF;
243
244 pDM_Odm->number_linked_client = 0;
245 pDM_Odm->pre_number_linked_client = 0;
246 pDM_Odm->number_active_client = 0;
247 pDM_Odm->pre_number_active_client = 0;
248 phydm_hook_dummy_member(pDM_Odm);
249
250 }
251
252 VOID
odm_CommonInfoSelfUpdate(IN PDM_ODM_T pDM_Odm)253 odm_CommonInfoSelfUpdate(
254 IN PDM_ODM_T pDM_Odm
255 )
256 {
257 u1Byte EntryCnt = 0, num_active_client = 0;
258 u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0;
259 PSTA_INFO_T pEntry;
260
261 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
262
263 PADAPTER Adapter = pDM_Odm->Adapter;
264 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
265
266 pEntry = pDM_Odm->pODM_StaInfo[0];
267 if(pMgntInfo->mAssoc)
268 {
269 pEntry->bUsed=TRUE;
270 for (i=0; i<6; i++)
271 pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
272 }
273 else
274 {
275 pEntry->bUsed=FALSE;
276 for (i=0; i<6; i++)
277 pEntry->MacAddr[i] = 0;
278 }
279
280 //STA mode is linked to AP
281 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter))
282 pDM_Odm->bsta_state = TRUE;
283 else
284 pDM_Odm->bsta_state = FALSE;
285 #endif
286
287 /* THis variable cannot be used because it is wrong*/
288 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
289 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
290 {
291 if (*(pDM_Odm->pSecChOffset) == 1)
292 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
293 else if (*(pDM_Odm->pSecChOffset) == 2)
294 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
295 } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) {
296 if (*(pDM_Odm->pSecChOffset) == 1)
297 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6;
298 else if (*(pDM_Odm->pSecChOffset) == 2)
299 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6;
300 } else
301 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
302 #else
303 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
304 if (*(pDM_Odm->pSecChOffset) == 1)
305 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
306 else if (*(pDM_Odm->pSecChOffset) == 2)
307 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
308 } else
309 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
310 #endif
311
312 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
313 {
314 pEntry = pDM_Odm->pODM_StaInfo[i];
315 if(IS_STA_VALID(pEntry))
316 {
317 EntryCnt++;
318 if(EntryCnt==1)
319 {
320 OneEntry_MACID=i;
321 }
322
323 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
324 ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/
325
326 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp));
327
328 if (ma_rx_tp > ACTIVE_TP_THRESHOLD)
329 num_active_client++;
330 #endif
331 }
332 }
333
334 if(EntryCnt == 1)
335 {
336 pDM_Odm->bOneEntryOnly = TRUE;
337 pDM_Odm->OneEntry_MACID=OneEntry_MACID;
338 }
339 else
340 pDM_Odm->bOneEntryOnly = FALSE;
341
342 pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client;
343 pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client;
344
345 pDM_Odm->number_linked_client = EntryCnt;
346 pDM_Odm->number_active_client = num_active_client;
347
348 /* Update MP driver status*/
349 ODM_UpdateMpDriverStatus(pDM_Odm);
350 }
351
352 VOID
odm_CommonInfoSelfReset(IN PDM_ODM_T pDM_Odm)353 odm_CommonInfoSelfReset(
354 IN PDM_ODM_T pDM_Odm
355 )
356 {
357 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
358 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
359 #endif
360 }
361
362 PVOID
PhyDM_Get_Structure(IN PDM_ODM_T pDM_Odm,IN u1Byte Structure_Type)363 PhyDM_Get_Structure(
364 IN PDM_ODM_T pDM_Odm,
365 IN u1Byte Structure_Type
366 )
367
368 {
369 PVOID pStruct = NULL;
370 #if RTL8195A_SUPPORT
371 switch (Structure_Type){
372 case PHYDM_FALSEALMCNT:
373 pStruct = &FalseAlmCnt;
374 break;
375
376 case PHYDM_CFOTRACK:
377 pStruct = &DM_CfoTrack;
378 break;
379
380 case PHYDM_ADAPTIVITY:
381 pStruct = &(pDM_Odm->Adaptivity);
382 break;
383
384 default:
385 break;
386 }
387
388 #else
389 switch (Structure_Type){
390 case PHYDM_FALSEALMCNT:
391 pStruct = &(pDM_Odm->FalseAlmCnt);
392 break;
393
394 case PHYDM_CFOTRACK:
395 pStruct = &(pDM_Odm->DM_CfoTrack);
396 break;
397
398 case PHYDM_ADAPTIVITY:
399 pStruct = &(pDM_Odm->Adaptivity);
400 break;
401
402 default:
403 break;
404 }
405
406 #endif
407 return pStruct;
408 }
409
410 VOID
odm_HWSetting(IN PDM_ODM_T pDM_Odm)411 odm_HWSetting(
412 IN PDM_ODM_T pDM_Odm
413 )
414 {
415 #if (RTL8821A_SUPPORT == 1)
416 if(pDM_Odm->SupportICType & ODM_RTL8821)
417 odm_HWSetting_8821A(pDM_Odm);
418 #endif
419
420 }
421
422 //
423 // 2011/09/21 MH Add to describe different team necessary resource allocate??
424 //
425 VOID
ODM_DMInit(IN PDM_ODM_T pDM_Odm)426 ODM_DMInit(
427 IN PDM_ODM_T pDM_Odm
428 )
429 {
430 odm_CommonInfoSelfInit(pDM_Odm);
431 odm_DIGInit(pDM_Odm);
432 Phydm_NHMCounterStatisticsInit(pDM_Odm);
433 Phydm_AdaptivityInit(pDM_Odm);
434 phydm_ra_info_init(pDM_Odm);
435 odm_RateAdaptiveMaskInit(pDM_Odm);
436 odm_RA_ParaAdjust_init(pDM_Odm);
437 ODM_CfoTrackingInit(pDM_Odm);
438 ODM_EdcaTurboInit(pDM_Odm);
439 odm_RSSIMonitorInit(pDM_Odm);
440 phydm_rf_init(pDM_Odm);
441 odm_TXPowerTrackingInit(pDM_Odm);
442 odm_AntennaDiversityInit(pDM_Odm);
443 odm_AutoChannelSelectInit(pDM_Odm);
444 odm_PathDiversityInit(pDM_Odm);
445 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
446 phydm_Beamforming_Init(pDM_Odm);
447 #endif
448
449 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
450 {
451 odm_DynamicBBPowerSavingInit(pDM_Odm);
452 odm_DynamicTxPowerInit(pDM_Odm);
453
454 #if (RTL8188E_SUPPORT == 1)
455 if(pDM_Odm->SupportICType==ODM_RTL8188E)
456 {
457 odm_PrimaryCCA_Init(pDM_Odm);
458 ODM_RAInfo_Init_all(pDM_Odm);
459 }
460 #endif
461
462 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
463
464 #if (RTL8723B_SUPPORT == 1)
465 if(pDM_Odm->SupportICType == ODM_RTL8723B)
466 odm_SwAntDetectInit(pDM_Odm);
467 #endif
468
469 #if (RTL8192E_SUPPORT == 1)
470 if(pDM_Odm->SupportICType==ODM_RTL8192E)
471 odm_PrimaryCCA_Check_Init(pDM_Odm);
472 #endif
473
474 #endif
475
476 }
477
478 }
479
480 VOID
ODM_DMReset(IN PDM_ODM_T pDM_Odm)481 ODM_DMReset(
482 IN PDM_ODM_T pDM_Odm
483 )
484 {
485 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
486
487 ODM_AntDivReset(pDM_Odm);
488 phydm_setEDCCAThresholdAPI(pDM_Odm, pDM_DigTable->CurIGValue);
489 }
490
491
492 VOID
phydm_support_ablity_debug(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)493 phydm_support_ablity_debug(
494 IN PVOID pDM_VOID,
495 IN u4Byte *const dm_value,
496 IN u4Byte *_used,
497 OUT char *output,
498 IN u4Byte *_out_len
499 )
500 {
501 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
502 u4Byte pre_support_ability;
503 u4Byte used = *_used;
504 u4Byte out_len = *_out_len;
505
506 pre_support_ability = pDM_Odm->SupportAbility ;
507 PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================"));
508 if(dm_value[0] == 100)
509 {
510 PHYDM_SNPRINTF((output+used, out_len-used, "[Supportablity] PhyDM Selection\n"));
511 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
512 PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG \n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):(".")) ));
513 PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK \n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):(".")) ));
514 PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR \n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):(".")) ));
515 PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):(".")) ));
516 PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR \n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):(".")) ));
517 PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD \n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):(".")) ));
518 PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):(".")) ));
519 PHYDM_SNPRINTF((output+used, out_len-used, "07. (( %s ))PWR_SAVE \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)?("V"):(".")) ));
520 PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):(".")) ));
521 PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE \n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):(".")) ));
522 PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):("."))));
523 PHYDM_SNPRINTF((output+used, out_len-used, "11. (( %s ))PSD \n", ((pDM_Odm->SupportAbility & ODM_BB_PSD)?("V"):(".")) ));
524 PHYDM_SNPRINTF((output+used, out_len-used, "12. (( %s ))RXHP \n", ((pDM_Odm->SupportAbility & ODM_BB_RXHP)?("V"):(".")) ));
525 PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY \n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):(".")) ));
526 PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING \n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):(".")) ));
527 PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):(".")) ));
528 PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA \n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):(".")) ));
529 PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO \n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):(".")) ));
530 PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE \n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):(".")) ));
531 PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):(".")) ));
532 PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):(".")) ));
533 PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION \n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):(".")) ));
534 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
535 }
536 /*
537 else if(dm_value[0] == 101)
538 {
539 pDM_Odm->SupportAbility = 0 ;
540 DbgPrint("Disable all SupportAbility components \n");
541 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components"));
542 }
543 */
544 else
545 {
546
547 if(dm_value[1] == 1) //enable
548 {
549 pDM_Odm->SupportAbility |= BIT(dm_value[0]) ;
550 if(BIT(dm_value[0]) & ODM_BB_PATH_DIV)
551 {
552 odm_PathDiversityInit(pDM_Odm);
553 }
554 }
555 else if(dm_value[1] == 2) //disable
556 {
557 pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ;
558 }
559 else
560 {
561 //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n");
562 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable"));
563 }
564 }
565 PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability ));
566 PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility ));
567 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
568 }
569
570 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
571 //
572 //tmp modify for LC Only
573 //
574 VOID
ODM_DMWatchdog_LPS(IN PDM_ODM_T pDM_Odm)575 ODM_DMWatchdog_LPS(
576 IN PDM_ODM_T pDM_Odm
577 )
578 {
579 odm_CommonInfoSelfUpdate(pDM_Odm);
580 odm_FalseAlarmCounterStatistics(pDM_Odm);
581 odm_RSSIMonitorCheck(pDM_Odm);
582 odm_DIGbyRSSI_LPS(pDM_Odm);
583 odm_CCKPacketDetectionThresh(pDM_Odm);
584 odm_CommonInfoSelfReset(pDM_Odm);
585
586 if(*(pDM_Odm->pbPowerSaving)==TRUE)
587 return;
588 }
589 #endif
590 //
591 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
592 // You can not add any dummy function here, be care, you can only use DM structure
593 // to perform any new ODM_DM.
594 //
595 VOID
ODM_DMWatchdog(IN PDM_ODM_T pDM_Odm)596 ODM_DMWatchdog(
597 IN PDM_ODM_T pDM_Odm
598 )
599 {
600 odm_CommonInfoSelfUpdate(pDM_Odm);
601 phydm_BasicDbgMessage(pDM_Odm);
602 odm_HWSetting(pDM_Odm);
603
604 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
605 {
606 prtl8192cd_priv priv = pDM_Odm->priv;
607 if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read
608 return;
609 }
610 #endif
611 odm_FalseAlarmCounterStatistics(pDM_Odm);
612 phydm_NoisyDetection(pDM_Odm);
613
614 odm_RSSIMonitorCheck(pDM_Odm);
615
616 if(*(pDM_Odm->pbPowerSaving) == TRUE)
617 {
618 odm_DIGbyRSSI_LPS(pDM_Odm);
619 {
620 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
621 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
622 }
623 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n"));
624 return;
625 }
626
627 Phydm_CheckAdaptivity(pDM_Odm);
628 odm_UpdatePowerTrainingState(pDM_Odm);
629 odm_DIG(pDM_Odm);
630 {
631 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
632 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
633 }
634 odm_CCKPacketDetectionThresh(pDM_Odm);
635 phydm_ra_dynamic_retry_limit(pDM_Odm);
636 phydm_ra_dynamic_retry_count(pDM_Odm);
637 odm_RefreshRateAdaptiveMask(pDM_Odm);
638 odm_RefreshBasicRateMask(pDM_Odm);
639 odm_DynamicBBPowerSaving(pDM_Odm);
640 odm_EdcaTurboCheck(pDM_Odm);
641 odm_PathDiversity(pDM_Odm);
642 ODM_CfoTracking(pDM_Odm);
643 odm_DynamicTxPower(pDM_Odm);
644 odm_AntennaDiversity(pDM_Odm);
645 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
646 phydm_Beamforming_Watchdog(pDM_Odm);
647 #endif
648
649 phydm_rf_watchdog(pDM_Odm);
650
651 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
652 {
653
654 #if (RTL8188E_SUPPORT == 1)
655 if(pDM_Odm->SupportICType==ODM_RTL8188E)
656 odm_DynamicPrimaryCCA(pDM_Odm);
657 #endif
658
659 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
660
661 #if (RTL8192E_SUPPORT == 1)
662 if(pDM_Odm->SupportICType==ODM_RTL8192E)
663 odm_DynamicPrimaryCCA_Check(pDM_Odm);
664 #endif
665 #endif
666 }
667
668 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
669 odm_dtc(pDM_Odm);
670 #endif
671
672 odm_CommonInfoSelfReset(pDM_Odm);
673
674 }
675
676
677 //
678 // Init /.. Fixed HW value. Only init time.
679 //
680 VOID
ODM_CmnInfoInit(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u4Byte Value)681 ODM_CmnInfoInit(
682 IN PDM_ODM_T pDM_Odm,
683 IN ODM_CMNINFO_E CmnInfo,
684 IN u4Byte Value
685 )
686 {
687 //
688 // This section is used for init value
689 //
690 switch (CmnInfo)
691 {
692 //
693 // Fixed ODM value.
694 //
695 case ODM_CMNINFO_ABILITY:
696 pDM_Odm->SupportAbility = (u4Byte)Value;
697 break;
698
699 case ODM_CMNINFO_RF_TYPE:
700 pDM_Odm->RFType = (u1Byte)Value;
701 break;
702
703 case ODM_CMNINFO_PLATFORM:
704 pDM_Odm->SupportPlatform = (u1Byte)Value;
705 break;
706
707 case ODM_CMNINFO_INTERFACE:
708 pDM_Odm->SupportInterface = (u1Byte)Value;
709 break;
710
711 case ODM_CMNINFO_MP_TEST_CHIP:
712 pDM_Odm->bIsMPChip= (u1Byte)Value;
713 break;
714
715 case ODM_CMNINFO_IC_TYPE:
716 pDM_Odm->SupportICType = Value;
717 break;
718
719 case ODM_CMNINFO_CUT_VER:
720 pDM_Odm->CutVersion = (u1Byte)Value;
721 break;
722
723 case ODM_CMNINFO_FAB_VER:
724 pDM_Odm->FabVersion = (u1Byte)Value;
725 break;
726
727 case ODM_CMNINFO_RFE_TYPE:
728 pDM_Odm->RFEType = (u1Byte)Value;
729 break;
730
731 case ODM_CMNINFO_RF_ANTENNA_TYPE:
732 pDM_Odm->AntDivType= (u1Byte)Value;
733 break;
734
735 case ODM_CMNINFO_BOARD_TYPE:
736 pDM_Odm->BoardType = (u1Byte)Value;
737 break;
738
739 case ODM_CMNINFO_PACKAGE_TYPE:
740 pDM_Odm->PackageType = (u1Byte)Value;
741 break;
742
743 case ODM_CMNINFO_EXT_LNA:
744 pDM_Odm->ExtLNA = (u1Byte)Value;
745 break;
746
747 case ODM_CMNINFO_5G_EXT_LNA:
748 pDM_Odm->ExtLNA5G = (u1Byte)Value;
749 break;
750
751 case ODM_CMNINFO_EXT_PA:
752 pDM_Odm->ExtPA = (u1Byte)Value;
753 break;
754
755 case ODM_CMNINFO_5G_EXT_PA:
756 pDM_Odm->ExtPA5G = (u1Byte)Value;
757 break;
758
759 case ODM_CMNINFO_GPA:
760 pDM_Odm->TypeGPA = (u2Byte)Value;
761 break;
762 case ODM_CMNINFO_APA:
763 pDM_Odm->TypeAPA = (u2Byte)Value;
764 break;
765 case ODM_CMNINFO_GLNA:
766 pDM_Odm->TypeGLNA = (u2Byte)Value;
767 break;
768 case ODM_CMNINFO_ALNA:
769 pDM_Odm->TypeALNA = (u2Byte)Value;
770 break;
771
772 case ODM_CMNINFO_EXT_TRSW:
773 pDM_Odm->ExtTRSW = (u1Byte)Value;
774 break;
775 case ODM_CMNINFO_EXT_LNA_GAIN:
776 pDM_Odm->ExtLNAGain = (u1Byte)Value;
777 break;
778 case ODM_CMNINFO_PATCH_ID:
779 pDM_Odm->PatchID = (u1Byte)Value;
780 break;
781 case ODM_CMNINFO_BINHCT_TEST:
782 pDM_Odm->bInHctTest = (BOOLEAN)Value;
783 break;
784 case ODM_CMNINFO_BWIFI_TEST:
785 pDM_Odm->bWIFITest = (BOOLEAN)Value;
786 break;
787 case ODM_CMNINFO_SMART_CONCURRENT:
788 pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
789 break;
790 case ODM_CMNINFO_DOMAIN_CODE_2G:
791 pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
792 break;
793 case ODM_CMNINFO_DOMAIN_CODE_5G:
794 pDM_Odm->odm_Regulation5G = (u1Byte)Value;
795 break;
796 case ODM_CMNINFO_CONFIG_BB_RF:
797 pDM_Odm->ConfigBBRF = (BOOLEAN)Value;
798 break;
799 case ODM_CMNINFO_IQKFWOFFLOAD:
800 pDM_Odm->IQKFWOffload = (u1Byte)Value;
801 break;
802 //To remove the compiler warning, must add an empty default statement to handle the other values.
803 default:
804 //do nothing
805 break;
806
807 }
808
809 }
810
811
812 VOID
ODM_CmnInfoHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN PVOID pValue)813 ODM_CmnInfoHook(
814 IN PDM_ODM_T pDM_Odm,
815 IN ODM_CMNINFO_E CmnInfo,
816 IN PVOID pValue
817 )
818 {
819 //
820 // Hook call by reference pointer.
821 //
822 switch (CmnInfo)
823 {
824 //
825 // Dynamic call by reference pointer.
826 //
827 case ODM_CMNINFO_MAC_PHY_MODE:
828 pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
829 break;
830
831 case ODM_CMNINFO_TX_UNI:
832 pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
833 break;
834
835 case ODM_CMNINFO_RX_UNI:
836 pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
837 break;
838
839 case ODM_CMNINFO_WM_MODE:
840 pDM_Odm->pWirelessMode = (u1Byte *)pValue;
841 break;
842
843 case ODM_CMNINFO_BAND:
844 pDM_Odm->pBandType = (u1Byte *)pValue;
845 break;
846
847 case ODM_CMNINFO_SEC_CHNL_OFFSET:
848 pDM_Odm->pSecChOffset = (u1Byte *)pValue;
849 break;
850
851 case ODM_CMNINFO_SEC_MODE:
852 pDM_Odm->pSecurity = (u1Byte *)pValue;
853 break;
854
855 case ODM_CMNINFO_BW:
856 pDM_Odm->pBandWidth = (u1Byte *)pValue;
857 break;
858
859 case ODM_CMNINFO_CHNL:
860 pDM_Odm->pChannel = (u1Byte *)pValue;
861 break;
862
863 case ODM_CMNINFO_DMSP_GET_VALUE:
864 pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
865 break;
866
867 case ODM_CMNINFO_BUDDY_ADAPTOR:
868 pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
869 break;
870
871 case ODM_CMNINFO_DMSP_IS_MASTER:
872 pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
873 break;
874
875 case ODM_CMNINFO_SCAN:
876 pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
877 break;
878
879 case ODM_CMNINFO_POWER_SAVING:
880 pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
881 break;
882
883 case ODM_CMNINFO_ONE_PATH_CCA:
884 pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
885 break;
886
887 case ODM_CMNINFO_DRV_STOP:
888 pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue;
889 break;
890
891 case ODM_CMNINFO_PNP_IN:
892 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue;
893 break;
894
895 case ODM_CMNINFO_INIT_ON:
896 pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue;
897 break;
898
899 case ODM_CMNINFO_ANT_TEST:
900 pDM_Odm->pAntennaTest = (u1Byte *)pValue;
901 break;
902
903 case ODM_CMNINFO_NET_CLOSED:
904 pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
905 break;
906
907 case ODM_CMNINFO_FORCED_RATE:
908 pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
909 break;
910
911 case ODM_CMNINFO_FORCED_IGI_LB:
912 pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
913 break;
914
915 case ODM_CMNINFO_P2P_LINK:
916 pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue;
917 break;
918
919 case ODM_CMNINFO_IS1ANTENNA:
920 pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue;
921 break;
922
923 case ODM_CMNINFO_RFDEFAULTPATH:
924 pDM_Odm->pRFDefaultPath= (u1Byte *)pValue;
925 break;
926
927 case ODM_CMNINFO_FCS_MODE:
928 pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue;
929 break;
930 /*add by YuChen for beamforming PhyDM*/
931 case ODM_CMNINFO_HUBUSBMODE:
932 pDM_Odm->HubUsbMode = (u1Byte *)pValue;
933 break;
934 case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS:
935 pDM_Odm->pbFwDwRsvdPageInProgress = (BOOLEAN *)pValue;
936 break;
937 case ODM_CMNINFO_TX_TP:
938 pDM_Odm->pCurrentTxTP = (u4Byte *)pValue;
939 break;
940 case ODM_CMNINFO_RX_TP:
941 pDM_Odm->pCurrentRxTP = (u4Byte *)pValue;
942 break;
943 case ODM_CMNINFO_SOUNDING_SEQ:
944 pDM_Odm->pSoundingSeq = (u1Byte *)pValue;
945 break;
946 //case ODM_CMNINFO_RTSTA_AID:
947 // pDM_Odm->pAidMap = (u1Byte *)pValue;
948 // break;
949
950 //case ODM_CMNINFO_BT_COEXIST:
951 // pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
952
953 //case ODM_CMNINFO_STA_STATUS:
954 //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
955 //break;
956
957 //case ODM_CMNINFO_PHY_STATUS:
958 // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
959 // break;
960
961 //case ODM_CMNINFO_MAC_STATUS:
962 // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
963 // break;
964 //To remove the compiler warning, must add an empty default statement to handle the other values.
965 default:
966 //do nothing
967 break;
968
969 }
970
971 }
972
973
974 VOID
ODM_CmnInfoPtrArrayHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u2Byte Index,IN PVOID pValue)975 ODM_CmnInfoPtrArrayHook(
976 IN PDM_ODM_T pDM_Odm,
977 IN ODM_CMNINFO_E CmnInfo,
978 IN u2Byte Index,
979 IN PVOID pValue
980 )
981 {
982 //
983 // Hook call by reference pointer.
984 //
985 switch (CmnInfo)
986 {
987 //
988 // Dynamic call by reference pointer.
989 //
990 case ODM_CMNINFO_STA_STATUS:
991 pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
992
993 if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index]))
994 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
995 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/
996 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
997 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index;
998 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
999 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index;
1000 #endif
1001
1002 break;
1003 //To remove the compiler warning, must add an empty default statement to handle the other values.
1004 default:
1005 //do nothing
1006 break;
1007 }
1008
1009 }
1010
1011
1012 //
1013 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
1014 //
1015 VOID
ODM_CmnInfoUpdate(IN PDM_ODM_T pDM_Odm,IN u4Byte CmnInfo,IN u8Byte Value)1016 ODM_CmnInfoUpdate(
1017 IN PDM_ODM_T pDM_Odm,
1018 IN u4Byte CmnInfo,
1019 IN u8Byte Value
1020 )
1021 {
1022 //
1023 // This init variable may be changed in run time.
1024 //
1025 switch (CmnInfo)
1026 {
1027 case ODM_CMNINFO_LINK_IN_PROGRESS:
1028 pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
1029 break;
1030
1031 case ODM_CMNINFO_ABILITY:
1032 pDM_Odm->SupportAbility = (u4Byte)Value;
1033 break;
1034
1035 case ODM_CMNINFO_RF_TYPE:
1036 pDM_Odm->RFType = (u1Byte)Value;
1037 break;
1038
1039 case ODM_CMNINFO_WIFI_DIRECT:
1040 pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
1041 break;
1042
1043 case ODM_CMNINFO_WIFI_DISPLAY:
1044 pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
1045 break;
1046
1047 case ODM_CMNINFO_LINK:
1048 pDM_Odm->bLinked = (BOOLEAN)Value;
1049 break;
1050
1051 case ODM_CMNINFO_STATION_STATE:
1052 pDM_Odm->bsta_state = (BOOLEAN)Value;
1053 break;
1054
1055 case ODM_CMNINFO_RSSI_MIN:
1056 pDM_Odm->RSSI_Min= (u1Byte)Value;
1057 break;
1058
1059 case ODM_CMNINFO_DBG_COMP:
1060 pDM_Odm->DebugComponents = Value;
1061 break;
1062
1063 case ODM_CMNINFO_DBG_LEVEL:
1064 pDM_Odm->DebugLevel = (u4Byte)Value;
1065 break;
1066 case ODM_CMNINFO_RA_THRESHOLD_HIGH:
1067 pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
1068 break;
1069
1070 case ODM_CMNINFO_RA_THRESHOLD_LOW:
1071 pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
1072 break;
1073 #if defined(BT_SUPPORT) && (BT_SUPPORT == 1)
1074 // The following is for BT HS mode and BT coexist mechanism.
1075 case ODM_CMNINFO_BT_ENABLED:
1076 pDM_Odm->bBtEnabled = (BOOLEAN)Value;
1077 break;
1078
1079 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
1080 pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
1081 break;
1082
1083 case ODM_CMNINFO_BT_HS_RSSI:
1084 pDM_Odm->btHsRssi = (u1Byte)Value;
1085 break;
1086
1087 case ODM_CMNINFO_BT_OPERATION:
1088 pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
1089 break;
1090
1091 case ODM_CMNINFO_BT_LIMITED_DIG:
1092 pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
1093 break;
1094
1095 case ODM_CMNINFO_BT_DIG:
1096 pDM_Odm->btHsDigVal = (u1Byte)Value;
1097 break;
1098
1099 case ODM_CMNINFO_BT_BUSY:
1100 pDM_Odm->bBtBusy = (BOOLEAN)Value;
1101 break;
1102
1103 case ODM_CMNINFO_BT_DISABLE_EDCA:
1104 pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
1105 break;
1106 #endif
1107
1108 #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23
1109 #ifdef UNIVERSAL_REPEATER
1110 case ODM_CMNINFO_VXD_LINK:
1111 pDM_Odm->VXD_bLinked= (BOOLEAN)Value;
1112 break;
1113 #endif
1114 #endif
1115
1116 case ODM_CMNINFO_AP_TOTAL_NUM:
1117 pDM_Odm->APTotalNum = (u1Byte)Value;
1118 break;
1119
1120 case ODM_CMNINFO_POWER_TRAINING:
1121 pDM_Odm->bDisablePowerTraining = (BOOLEAN)Value;
1122 break;
1123
1124 /*
1125 case ODM_CMNINFO_OP_MODE:
1126 pDM_Odm->OPMode = (u1Byte)Value;
1127 break;
1128
1129 case ODM_CMNINFO_WM_MODE:
1130 pDM_Odm->WirelessMode = (u1Byte)Value;
1131 break;
1132
1133 case ODM_CMNINFO_BAND:
1134 pDM_Odm->BandType = (u1Byte)Value;
1135 break;
1136
1137 case ODM_CMNINFO_SEC_CHNL_OFFSET:
1138 pDM_Odm->SecChOffset = (u1Byte)Value;
1139 break;
1140
1141 case ODM_CMNINFO_SEC_MODE:
1142 pDM_Odm->Security = (u1Byte)Value;
1143 break;
1144
1145 case ODM_CMNINFO_BW:
1146 pDM_Odm->BandWidth = (u1Byte)Value;
1147 break;
1148
1149 case ODM_CMNINFO_CHNL:
1150 pDM_Odm->Channel = (u1Byte)Value;
1151 break;
1152 */
1153 default:
1154 //do nothing
1155 break;
1156 }
1157
1158
1159 }
1160
1161
1162 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1163 VOID
ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm)1164 ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm )
1165 {
1166
1167 PADAPTER pAdapter = pDM_Odm->Adapter;
1168 #if USE_WORKITEM
1169 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
1170 ODM_InitializeWorkItem( pDM_Odm,
1171 &pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem,
1172 (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
1173 (PVOID)pAdapter,
1174 "AntennaSwitchWorkitem");
1175 #endif
1176 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
1177 ODM_InitializeWorkItem(pDM_Odm,
1178 &pDM_Odm->dm_sat_table.hl_smart_antenna_workitem,
1179 (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback,
1180 (PVOID)pAdapter,
1181 "hl_smart_ant_workitem");
1182
1183 ODM_InitializeWorkItem(pDM_Odm,
1184 &pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem,
1185 (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback,
1186 (PVOID)pAdapter,
1187 "hl_smart_ant_decision_workitem");
1188 #endif
1189
1190 ODM_InitializeWorkItem(
1191 pDM_Odm,
1192 &(pDM_Odm->PathDivSwitchWorkitem),
1193 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
1194 (PVOID)pAdapter,
1195 "SWAS_WorkItem");
1196
1197 ODM_InitializeWorkItem(
1198 pDM_Odm,
1199 &(pDM_Odm->CCKPathDiversityWorkitem),
1200 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
1201 (PVOID)pAdapter,
1202 "CCKTXPathDiversityWorkItem");
1203
1204 ODM_InitializeWorkItem(
1205 pDM_Odm,
1206 &(pDM_Odm->MPT_DIGWorkitem),
1207 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
1208 (PVOID)pAdapter,
1209 "MPT_DIGWorkitem");
1210
1211 ODM_InitializeWorkItem(
1212 pDM_Odm,
1213 &(pDM_Odm->RaRptWorkitem),
1214 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
1215 (PVOID)pAdapter,
1216 "RaRptWorkitem");
1217
1218 #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
1219 ODM_InitializeWorkItem(
1220 pDM_Odm,
1221 &(pDM_Odm->FastAntTrainingWorkitem),
1222 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
1223 (PVOID)pAdapter,
1224 "FastAntTrainingWorkitem");
1225 #endif
1226 ODM_InitializeWorkItem(
1227 pDM_Odm,
1228 &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem),
1229 (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback,
1230 (PVOID)pAdapter,
1231 "PSDRXHP_WorkItem");
1232
1233 #endif /*#if USE_WORKITEM*/
1234
1235 #if (BEAMFORMING_SUPPORT == 1)
1236 ODM_InitializeWorkItem(
1237 pDM_Odm,
1238 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem),
1239 (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback,
1240 (PVOID)pAdapter,
1241 "Txbf_EnterWorkItem");
1242
1243 ODM_InitializeWorkItem(
1244 pDM_Odm,
1245 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem),
1246 (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback,
1247 (PVOID)pAdapter,
1248 "Txbf_LeaveWorkItem");
1249
1250 ODM_InitializeWorkItem(
1251 pDM_Odm,
1252 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem),
1253 (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback,
1254 (PVOID)pAdapter,
1255 "Txbf_FwNdpaWorkItem");
1256
1257 ODM_InitializeWorkItem(
1258 pDM_Odm,
1259 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem),
1260 (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback,
1261 (PVOID)pAdapter,
1262 "Txbf_ClkWorkItem");
1263
1264 ODM_InitializeWorkItem(
1265 pDM_Odm,
1266 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem),
1267 (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback,
1268 (PVOID)pAdapter,
1269 "Txbf_RateWorkItem");
1270
1271 ODM_InitializeWorkItem(
1272 pDM_Odm,
1273 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem),
1274 (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback,
1275 (PVOID)pAdapter,
1276 "Txbf_StatusWorkItem");
1277
1278 ODM_InitializeWorkItem(
1279 pDM_Odm,
1280 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem),
1281 (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback,
1282 (PVOID)pAdapter,
1283 "Txbf_ResetTxPathWorkItem");
1284
1285 ODM_InitializeWorkItem(
1286 pDM_Odm,
1287 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem),
1288 (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback,
1289 (PVOID)pAdapter,
1290 "Txbf_GetTxRateWorkItem");
1291 #endif
1292 }
1293
1294 VOID
ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm)1295 ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm )
1296 {
1297 #if USE_WORKITEM
1298
1299 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
1300 ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem));
1301 #endif
1302
1303 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
1304 ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_workitem));
1305 ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem));
1306 #endif
1307
1308 ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
1309 ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
1310 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
1311 ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
1312 #endif
1313 ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
1314 ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
1315 ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem));
1316 /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/
1317 #endif
1318
1319 #if (BEAMFORMING_SUPPORT == 1)
1320 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem));
1321 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem));
1322 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem));
1323 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem));
1324 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem));
1325 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem));
1326 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem));
1327 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem));
1328 #endif
1329
1330 }
1331 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
1332
1333 /*
1334 VOID
1335 odm_FindMinimumRSSI(
1336 IN PDM_ODM_T pDM_Odm
1337 )
1338 {
1339 u4Byte i;
1340 u1Byte RSSI_Min = 0xFF;
1341
1342 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1343 {
1344 // if(pDM_Odm->pODM_StaInfo[i] != NULL)
1345 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1346 {
1347 if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1348 {
1349 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1350 }
1351 }
1352 }
1353
1354 pDM_Odm->RSSI_Min = RSSI_Min;
1355
1356 }
1357
1358 VOID
1359 odm_IsLinked(
1360 IN PDM_ODM_T pDM_Odm
1361 )
1362 {
1363 u4Byte i;
1364 BOOLEAN Linked = FALSE;
1365
1366 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1367 {
1368 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1369 {
1370 Linked = TRUE;
1371 break;
1372 }
1373
1374 }
1375
1376 pDM_Odm->bLinked = Linked;
1377 }
1378 */
1379
1380 VOID
ODM_InitAllTimers(IN PDM_ODM_T pDM_Odm)1381 ODM_InitAllTimers(
1382 IN PDM_ODM_T pDM_Odm
1383 )
1384 {
1385 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1386 ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER);
1387 #endif
1388
1389 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1390 #ifdef MP_TEST
1391 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1392 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1393 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1394 #endif
1395 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1396 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1397 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1398 #endif
1399
1400 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1401 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer,
1402 (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer");
1403 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1404 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1405 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1406 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1407 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer,
1408 (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer");
1409 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer,
1410 (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer");
1411 #if (BEAMFORMING_SUPPORT == 1)
1412 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer,
1413 (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer");
1414 #endif
1415 #endif
1416
1417 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1418 #if (BEAMFORMING_SUPPORT == 1)
1419 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer,
1420 (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer");
1421 #endif
1422 #endif
1423 }
1424
1425 VOID
ODM_CancelAllTimers(IN PDM_ODM_T pDM_Odm)1426 ODM_CancelAllTimers(
1427 IN PDM_ODM_T pDM_Odm
1428 )
1429 {
1430 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1431 //
1432 // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1433 // win7 platform.
1434 //
1435 HAL_ADAPTER_STS_CHK(pDM_Odm)
1436 #endif
1437
1438 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1439 ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER);
1440 #endif
1441
1442 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1443 #ifdef MP_TEST
1444 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1445 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1446 #endif
1447 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1448 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1449 #endif
1450
1451 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1452 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1453 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1454 ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1455 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1456 ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1457 ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1458 #if (BEAMFORMING_SUPPORT == 1)
1459 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1460 #endif
1461 #endif
1462
1463 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1464 #if (BEAMFORMING_SUPPORT == 1)
1465 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1466 #endif
1467 #endif
1468
1469 }
1470
1471
1472 VOID
ODM_ReleaseAllTimers(IN PDM_ODM_T pDM_Odm)1473 ODM_ReleaseAllTimers(
1474 IN PDM_ODM_T pDM_Odm
1475 )
1476 {
1477 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1478 ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER);
1479 #endif
1480
1481 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1482 #ifdef MP_TEST
1483 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1484 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1485 #endif
1486 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1487 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1488 #endif
1489
1490 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1491 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1492 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1493 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1494 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1495 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1496 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1497 #if (BEAMFORMING_SUPPORT == 1)
1498 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1499 #endif
1500 #endif
1501
1502 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1503 #if (BEAMFORMING_SUPPORT == 1)
1504 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1505 #endif
1506 #endif
1507 }
1508
1509
1510 //3============================================================
1511 //3 Tx Power Tracking
1512 //3============================================================
1513
1514
1515
1516
1517 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1518 VOID
ODM_InitAllThreads(IN PDM_ODM_T pDM_Odm)1519 ODM_InitAllThreads(
1520 IN PDM_ODM_T pDM_Odm
1521 )
1522 {
1523 #ifdef TPT_THREAD
1524 kTPT_task_init(pDM_Odm->priv);
1525 #endif
1526 }
1527
1528 VOID
ODM_StopAllThreads(IN PDM_ODM_T pDM_Odm)1529 ODM_StopAllThreads(
1530 IN PDM_ODM_T pDM_Odm
1531 )
1532 {
1533 #ifdef TPT_THREAD
1534 kTPT_task_stop(pDM_Odm->priv);
1535 #endif
1536 }
1537 #endif
1538
1539
1540 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1541 //
1542 // 2011/07/26 MH Add an API for testing IQK fail case.
1543 //
1544 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1545 ODM_CheckPowerStatus(
1546 IN PADAPTER Adapter)
1547 {
1548
1549 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1550 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1551 RT_RF_POWER_STATE rtState;
1552 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1553
1554 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1555 if (pMgntInfo->init_adpt_in_progress == TRUE)
1556 {
1557 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n"));
1558 return TRUE;
1559 }
1560
1561 //
1562 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1563 //
1564 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1565 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1566 {
1567 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1568 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1569 return FALSE;
1570 }
1571 return TRUE;
1572 }
1573 #elif( DM_ODM_SUPPORT_TYPE == ODM_AP)
1574 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1575 ODM_CheckPowerStatus(
1576 IN PADAPTER Adapter)
1577 {
1578 /*
1579 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1580 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1581 RT_RF_POWER_STATE rtState;
1582 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1583
1584 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1585 if (pMgntInfo->init_adpt_in_progress == TRUE)
1586 {
1587 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
1588 return TRUE;
1589 }
1590
1591 //
1592 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1593 //
1594 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1595 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1596 {
1597 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1598 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1599 return FALSE;
1600 }
1601 */
1602 return TRUE;
1603 }
1604 #endif
1605
1606 // need to ODM CE Platform
1607 //move to here for ANT detection mechanism using
1608
1609 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
1610 u4Byte
GetPSDData(IN PDM_ODM_T pDM_Odm,unsigned int point,u1Byte initial_gain_psd)1611 GetPSDData(
1612 IN PDM_ODM_T pDM_Odm,
1613 unsigned int point,
1614 u1Byte initial_gain_psd)
1615 {
1616 //unsigned int val, rfval;
1617 //int psd_report;
1618 u4Byte psd_report;
1619
1620 //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1621 //Debug Message
1622 //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
1623 //DbgPrint("Reg908 = 0x%x\n",val);
1624 //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
1625 //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1626 //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
1627 //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
1628 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
1629
1630 //Set DCO frequency index, offset=(40MHz/SamplePts)*point
1631 ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
1632
1633 //Start PSD calculation, Reg808[22]=0->1
1634 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
1635 //Need to wait for HW PSD report
1636 ODM_StallExecution(1000);
1637 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
1638 //Read PSD report, Reg8B4[15:0]
1639 psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
1640
1641 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
1642 psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
1643 #else
1644 psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
1645 #endif
1646
1647 return psd_report;
1648
1649 }
1650 #endif
1651
1652 u4Byte
odm_ConvertTo_dB(u4Byte Value)1653 odm_ConvertTo_dB(
1654 u4Byte Value)
1655 {
1656 u1Byte i;
1657 u1Byte j;
1658 u4Byte dB;
1659
1660 Value = Value & 0xFFFF;
1661
1662 for (i = 0; i < 12; i++)
1663 {
1664 if (Value <= dB_Invert_Table[i][7])
1665 {
1666 break;
1667 }
1668 }
1669
1670 if (i >= 12)
1671 {
1672 return (96); // maximum 96 dB
1673 }
1674
1675 for (j = 0; j < 8; j++)
1676 {
1677 if (Value <= dB_Invert_Table[i][j])
1678 {
1679 break;
1680 }
1681 }
1682
1683 dB = (i << 3) + j + 1;
1684
1685 return (dB);
1686 }
1687
1688 u4Byte
odm_ConvertTo_linear(u4Byte Value)1689 odm_ConvertTo_linear(
1690 u4Byte Value)
1691 {
1692 u1Byte i;
1693 u1Byte j;
1694 u4Byte linear;
1695
1696 /* 1dB~96dB */
1697
1698 Value = Value & 0xFF;
1699
1700 i = (u1Byte)((Value - 1) >> 3);
1701 j = (u1Byte)(Value - 1) - (i << 3);
1702
1703 linear = dB_Invert_Table[i][j];
1704
1705 return (linear);
1706 }
1707
1708 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1709 VOID
ODM_UpdateInitRateWorkItemCallback(IN PVOID pContext)1710 ODM_UpdateInitRateWorkItemCallback(
1711 IN PVOID pContext
1712 )
1713 {
1714 PADAPTER Adapter = (PADAPTER)pContext;
1715 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1716 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1717
1718 u1Byte p = 0;
1719
1720 if(pDM_Odm->SupportICType == ODM_RTL8821)
1721 {
1722 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1723 }
1724 else if(pDM_Odm->SupportICType == ODM_RTL8812)
1725 {
1726 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c
1727 {
1728 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
1729 }
1730 }
1731 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1732 {
1733 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1734 }
1735 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
1736 {
1737 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c
1738 {
1739 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
1740 }
1741 }
1742 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
1743 {
1744 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1745 }
1746 }
1747 #endif
1748
1749 //
1750 // ODM multi-port consideration, added by Roger, 2013.10.01.
1751 //
1752 VOID
ODM_AsocEntry_Init(IN PDM_ODM_T pDM_Odm)1753 ODM_AsocEntry_Init(
1754 IN PDM_ODM_T pDM_Odm
1755 )
1756 {
1757 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1758 PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter);
1759 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter);
1760 PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc;
1761 u1Byte TotalAssocEntryNum = 0;
1762 u1Byte index = 0;
1763
1764
1765 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]);
1766 pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum;
1767
1768 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1769 TotalAssocEntryNum +=1;
1770
1771 while(pLoopAdapter)
1772 {
1773 for (index = 0; index <ASSOCIATE_ENTRY_NUM; index++)
1774 {
1775 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, TotalAssocEntryNum+index, &pLoopAdapter->MgntInfo.AsocEntry[index]);
1776 pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index;
1777 }
1778
1779 TotalAssocEntryNum+= index;
1780 if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter)))
1781 pLoopAdapter->RASupport = TRUE;
1782 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1783 }
1784 #endif
1785 }
1786
1787 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1788 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
odm_dtc(PDM_ODM_T pDM_Odm)1789 void odm_dtc(PDM_ODM_T pDM_Odm)
1790 {
1791 #ifdef CONFIG_DM_RESP_TXAGC
1792 #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */
1793 #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
1794
1795 /* RSSI vs TX power step mapping: decade TX power */
1796 static const u8 dtc_table_down[]={
1797 DTC_BASE,
1798 (DTC_BASE+5),
1799 (DTC_BASE+10),
1800 (DTC_BASE+15),
1801 (DTC_BASE+20),
1802 (DTC_BASE+25)
1803 };
1804
1805 /* RSSI vs TX power step mapping: increase TX power */
1806 static const u8 dtc_table_up[]={
1807 DTC_DWN_BASE,
1808 (DTC_DWN_BASE-5),
1809 (DTC_DWN_BASE-10),
1810 (DTC_DWN_BASE-15),
1811 (DTC_DWN_BASE-15),
1812 (DTC_DWN_BASE-20),
1813 (DTC_DWN_BASE-20),
1814 (DTC_DWN_BASE-25),
1815 (DTC_DWN_BASE-25),
1816 (DTC_DWN_BASE-30),
1817 (DTC_DWN_BASE-35)
1818 };
1819
1820 u8 i;
1821 u8 dtc_steps=0;
1822 u8 sign;
1823 u8 resp_txagc=0;
1824
1825 #if 0
1826 /* As DIG is disabled, DTC is also disable */
1827 if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
1828 return;
1829 #endif
1830
1831 if (DTC_BASE < pDM_Odm->RSSI_Min) {
1832 /* need to decade the CTS TX power */
1833 sign = 1;
1834 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
1835 {
1836 if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
1837 break;
1838 else
1839 dtc_steps++;
1840 }
1841 }
1842 #if 0
1843 else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
1844 {
1845 /* needs to increase the CTS TX power */
1846 sign = 0;
1847 dtc_steps = 1;
1848 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
1849 {
1850 if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
1851 break;
1852 else
1853 dtc_steps++;
1854 }
1855 }
1856 #endif
1857 else
1858 {
1859 sign = 0;
1860 dtc_steps = 0;
1861 }
1862
1863 resp_txagc = dtc_steps | (sign << 4);
1864 resp_txagc = resp_txagc | (resp_txagc << 5);
1865 ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
1866
1867 DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
1868 __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps);
1869 #endif /* CONFIG_RESP_TXAGC_ADJUST */
1870 }
1871
1872 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
1873
1874 VOID
odm_UpdatePowerTrainingState(IN PDM_ODM_T pDM_Odm)1875 odm_UpdatePowerTrainingState(
1876 IN PDM_ODM_T pDM_Odm
1877 )
1878 {
1879 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1880 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
1881 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1882 u4Byte score = 0;
1883
1884 if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN))
1885 return;
1886
1887 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n"));
1888 pDM_Odm->bChangeState = FALSE;
1889
1890 // Debug command
1891 if(pDM_Odm->ForcePowerTrainingState)
1892 {
1893 if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining)
1894 {
1895 pDM_Odm->bChangeState = TRUE;
1896 pDM_Odm->bDisablePowerTraining = TRUE;
1897 }
1898 else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining)
1899 {
1900 pDM_Odm->bChangeState = TRUE;
1901 pDM_Odm->bDisablePowerTraining = FALSE;
1902 }
1903
1904 pDM_Odm->PT_score = 0;
1905 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1906 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1907 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n",
1908 pDM_Odm->ForcePowerTrainingState));
1909 return;
1910 }
1911
1912 if(!pDM_Odm->bLinked)
1913 return;
1914
1915 // First connect
1916 if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE))
1917 {
1918 pDM_Odm->PT_score = 0;
1919 pDM_Odm->bChangeState = TRUE;
1920 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1921 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1922 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n"));
1923 return;
1924 }
1925
1926 // Compute score
1927 if(pDM_Odm->NHM_cnt_0 >= 215)
1928 score = 2;
1929 else if(pDM_Odm->NHM_cnt_0 >= 190)
1930 score = 1; // unknow state
1931 else
1932 {
1933 u4Byte RX_Pkt_Cnt;
1934
1935 RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK);
1936
1937 if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt))
1938 {
1939 if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all)
1940 score = 0;
1941 else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all)
1942 score = 1;
1943 else
1944 score = 2;
1945 }
1946 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n",
1947 RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all));
1948 }
1949 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n",
1950 (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK)));
1951 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n",
1952 pDM_Odm->NHM_cnt_0, score));
1953
1954 // smoothing
1955 pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2);
1956 score = (pDM_Odm->PT_score + 32) >> 6;
1957 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n",
1958 pDM_Odm->PT_score, score));
1959
1960 // Mode decision
1961 if(score == 2)
1962 {
1963 if(pDM_Odm->bDisablePowerTraining)
1964 {
1965 pDM_Odm->bChangeState = TRUE;
1966 pDM_Odm->bDisablePowerTraining = FALSE;
1967 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
1968 }
1969 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n"));
1970 }
1971 else if(score == 0)
1972 {
1973 if(!pDM_Odm->bDisablePowerTraining)
1974 {
1975 pDM_Odm->bChangeState = TRUE;
1976 pDM_Odm->bDisablePowerTraining = TRUE;
1977 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
1978 }
1979 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n"));
1980 }
1981
1982 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1983 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1984 #endif
1985 }
1986
1987
1988
1989 /*===========================================================*/
1990 /* The following is for compile only*/
1991 /*===========================================================*/
1992 /*#define TARGET_CHNL_NUM_2G_5G 59*/
1993 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1994
GetRightChnlPlaceforIQK(u1Byte chnl)1995 u1Byte GetRightChnlPlaceforIQK(u1Byte chnl)
1996 {
1997 u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100,
1998 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165};
1999 u1Byte place = chnl;
2000
2001
2002 if (chnl > 14) {
2003 for (place = 14; place < sizeof(channel_all); place++) {
2004 if (channel_all[place] == chnl)
2005 return place-13;
2006 }
2007 }
2008
2009 return 0;
2010 }
2011
2012 VOID
FillH2CCmd92C(IN PADAPTER Adapter,IN u1Byte ElementID,IN u4Byte CmdLen,IN pu1Byte pCmdBuffer)2013 FillH2CCmd92C(
2014 IN PADAPTER Adapter,
2015 IN u1Byte ElementID,
2016 IN u4Byte CmdLen,
2017 IN pu1Byte pCmdBuffer
2018 )
2019 {}
2020 VOID
PHY_SetTxPowerLevel8192C(IN PADAPTER Adapter,IN u1Byte channel)2021 PHY_SetTxPowerLevel8192C(
2022 IN PADAPTER Adapter,
2023 IN u1Byte channel
2024 )
2025 {
2026 }
2027 #endif
2028 /*===========================================================*/
2029
2030 VOID
phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm)2031 phydm_NoisyDetection(
2032 IN PDM_ODM_T pDM_Odm
2033 )
2034 {
2035 u4Byte Total_FA_Cnt, Total_CCA_Cnt;
2036 u4Byte Score = 0, i, Score_Smooth;
2037
2038 Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all;
2039 Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all;
2040
2041 /*
2042 if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5
2043
2044 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75
2045
2046 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25
2047
2048 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50
2049
2050 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75
2051
2052 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5
2053
2054 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25%
2055
2056 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25%
2057
2058 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75%
2059
2060 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5%
2061
2062 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25%
2063 */
2064 for(i=0;i<=16;i++)
2065 {
2066 if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) )
2067 {
2068 Score = 16-i;
2069 break;
2070 }
2071 }
2072
2073 // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1;
2074 pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2);
2075
2076 // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1
2077 Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0;
2078
2079 pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0;
2080 /*
2081 switch(Score_Smooth)
2082 {
2083 case 0:
2084 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2085 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n"));
2086 break;
2087 case 1:
2088 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2089 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n"));
2090 break;
2091 case 2:
2092 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2093 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n"));
2094 break;
2095 case 3:
2096 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2097 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n"));
2098 break;
2099 case 4:
2100 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2101 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n"));
2102 break;
2103 case 5:
2104 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2105 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n"));
2106 break;
2107 case 6:
2108 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2109 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n"));
2110 break;
2111 case 7:
2112 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2113 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n"));
2114 break;
2115 case 8:
2116 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2117 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n"));
2118 break;
2119 case 9:
2120 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2121 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n"));
2122 break;
2123 case 10:
2124 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2125 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n"));
2126 break;
2127 case 11:
2128 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2129 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n"));
2130 break;
2131 case 12:
2132 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2133 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n"));
2134 break;
2135 case 13:
2136 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2137 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n"));
2138 break;
2139 case 14:
2140 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2141 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n"));
2142 break;
2143 case 15:
2144 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2145 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n"));
2146 break;
2147 case 16:
2148 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2149 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n"));
2150 break;
2151 default:
2152 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2153 ("[NoisyDetection] Unknown Value!! Need Check!!\n"));
2154 }
2155 */
2156 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD,
2157 ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n",
2158 Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision));
2159
2160 }
2161
2162
2163