1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20 #define _HAL_COM_C_
21
22 #include <drv_types.h>
23 #include "hal_com_h2c.h"
24
25 #include "hal_data.h"
26
27 //#define CONFIG_GTK_OL_DBG
28
29 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
30 char rtw_phy_para_file_path[PATH_LENGTH_MAX];
31 #endif
32
dump_chip_info(HAL_VERSION ChipVersion)33 void dump_chip_info(HAL_VERSION ChipVersion)
34 {
35 int cnt = 0;
36 u8 buf[128]={0};
37
38 if (IS_8188E(ChipVersion))
39 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
40 else if (IS_8188F(ChipVersion))
41 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188F_");
42 else if (IS_8812_SERIES(ChipVersion))
43 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_");
44 else if (IS_8192E(ChipVersion))
45 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_");
46 else if (IS_8821_SERIES(ChipVersion))
47 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_");
48 else if (IS_8723B_SERIES(ChipVersion))
49 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_");
50 else if (IS_8703B_SERIES(ChipVersion))
51 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8703B_");
52 else if (IS_8814A_SERIES(ChipVersion))
53 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8814A_");
54 else
55 cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_UNKNOWN_");
56
57 cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
58 if(IS_CHIP_VENDOR_TSMC(ChipVersion))
59 cnt += sprintf((buf+cnt), "%s_","TSMC");
60 else if(IS_CHIP_VENDOR_UMC(ChipVersion))
61 cnt += sprintf((buf+cnt), "%s_","UMC");
62 else if(IS_CHIP_VENDOR_SMIC(ChipVersion))
63 cnt += sprintf((buf+cnt), "%s_","SMIC");
64
65 if (IS_A_CUT(ChipVersion))
66 cnt += sprintf((buf+cnt), "A_CUT_");
67 else if (IS_B_CUT(ChipVersion))
68 cnt += sprintf((buf+cnt), "B_CUT_");
69 else if (IS_C_CUT(ChipVersion))
70 cnt += sprintf((buf+cnt), "C_CUT_");
71 else if (IS_D_CUT(ChipVersion))
72 cnt += sprintf((buf+cnt), "D_CUT_");
73 else if (IS_E_CUT(ChipVersion))
74 cnt += sprintf((buf+cnt), "E_CUT_");
75 else if (IS_F_CUT(ChipVersion))
76 cnt += sprintf((buf+cnt), "F_CUT_");
77 else if (IS_I_CUT(ChipVersion))
78 cnt += sprintf((buf+cnt), "I_CUT_");
79 else if (IS_J_CUT(ChipVersion))
80 cnt += sprintf((buf+cnt), "J_CUT_");
81 else if (IS_K_CUT(ChipVersion))
82 cnt += sprintf((buf+cnt), "K_CUT_");
83 else
84 cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
85
86 if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
87 else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
88 else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
89 else if(IS_3T3R(ChipVersion)) cnt += sprintf((buf+cnt), "3T3R_");
90 else if(IS_3T4R(ChipVersion)) cnt += sprintf((buf+cnt), "3T4R_");
91 else if(IS_4T4R(ChipVersion)) cnt += sprintf((buf+cnt), "4T4R_");
92 else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
93
94 cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
95
96 DBG_871X("%s", buf);
97 }
rtw_hal_config_rftype(PADAPTER padapter)98 void rtw_hal_config_rftype(PADAPTER padapter)
99 {
100 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
101
102 if (IS_1T1R(pHalData->VersionID)) {
103 pHalData->rf_type = RF_1T1R;
104 pHalData->NumTotalRFPath = 1;
105 }
106 else if (IS_2T2R(pHalData->VersionID)) {
107 pHalData->rf_type = RF_2T2R;
108 pHalData->NumTotalRFPath = 2;
109 }
110 else if (IS_1T2R(pHalData->VersionID)) {
111 pHalData->rf_type = RF_1T2R;
112 pHalData->NumTotalRFPath = 2;
113 }
114 else if(IS_3T3R(pHalData->VersionID)) {
115 pHalData->rf_type = RF_3T3R;
116 pHalData->NumTotalRFPath = 3;
117 }
118 else if(IS_4T4R(pHalData->VersionID)) {
119 pHalData->rf_type = RF_4T4R;
120 pHalData->NumTotalRFPath = 4;
121 }
122 else {
123 pHalData->rf_type = RF_1T1R;
124 pHalData->NumTotalRFPath = 1;
125 }
126
127 DBG_871X("%s RF_Type is %d TotalTxPath is %d \n", __FUNCTION__, pHalData->rf_type, pHalData->NumTotalRFPath);
128 }
129
130 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
131
132 /*
133 * Description:
134 * Use hardware(efuse), driver parameter(registry) and default channel plan
135 * to decide which one should be used.
136 *
137 * Parameters:
138 * padapter pointer of adapter
139 * hw_alpha2 country code from HW (efuse/eeprom/mapfile)
140 * hw_chplan channel plan from HW (efuse/eeprom/mapfile)
141 * BIT[7] software configure mode; 0:Enable, 1:disable
142 * BIT[6:0] Channel Plan
143 * sw_alpha2 country code from HW (registry/module param)
144 * sw_chplan channel plan from SW (registry/module param)
145 * def_chplan channel plan used when HW/SW both invalid
146 * AutoLoadFail efuse autoload fail or not
147 *
148 * Return:
149 * Final channel plan decision
150 *
151 */
hal_com_config_channel_plan(IN PADAPTER padapter,IN char * hw_alpha2,IN u8 hw_chplan,IN char * sw_alpha2,IN u8 sw_chplan,IN u8 def_chplan,IN BOOLEAN AutoLoadFail)152 u8 hal_com_config_channel_plan(
153 IN PADAPTER padapter,
154 IN char *hw_alpha2,
155 IN u8 hw_chplan,
156 IN char *sw_alpha2,
157 IN u8 sw_chplan,
158 IN u8 def_chplan,
159 IN BOOLEAN AutoLoadFail
160 )
161 {
162 PHAL_DATA_TYPE pHalData;
163 u8 force_hw_chplan = _FALSE;
164 int chplan = -1;
165 const struct country_chplan *country_ent = NULL, *ent;
166
167 pHalData = GET_HAL_DATA(padapter);
168
169 /* treat 0xFF as invalid value, bypass hw_chplan & force_hw_chplan parsing */
170 if (hw_chplan == 0xFF)
171 goto chk_hw_country_code;
172
173 if (AutoLoadFail == _TRUE)
174 goto chk_sw_config;
175
176 #ifndef CONFIG_FORCE_SW_CHANNEL_PLAN
177 if (hw_chplan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
178 force_hw_chplan = _TRUE;
179 #endif
180
181 hw_chplan &= (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
182
183 chk_hw_country_code:
184 if (hw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(hw_alpha2)) {
185 ent = rtw_get_chplan_from_country(hw_alpha2);
186 if (ent) {
187 /* get chplan from hw country code, by pass hw chplan setting */
188 country_ent = ent;
189 chplan = ent->chplan;
190 goto chk_sw_config;
191 } else
192 DBG_871X_LEVEL(_drv_always_, "%s unsupported hw_alpha2:\"%c%c\"\n", __func__, hw_alpha2[0], hw_alpha2[1]);
193 }
194
195 if (rtw_is_channel_plan_valid(hw_chplan))
196 chplan = hw_chplan;
197 else if (force_hw_chplan == _TRUE) {
198 DBG_871X_LEVEL(_drv_always_, "%s unsupported hw_chplan:0x%02X\n", __func__, hw_chplan);
199 /* hw infomaton invalid, refer to sw information */
200 force_hw_chplan = _FALSE;
201 }
202
203 chk_sw_config:
204 if (force_hw_chplan == _TRUE)
205 goto done;
206
207 if (sw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(sw_alpha2)) {
208 ent = rtw_get_chplan_from_country(sw_alpha2);
209 if (ent) {
210 /* get chplan from sw country code, by pass sw chplan setting */
211 country_ent = ent;
212 chplan = ent->chplan;
213 goto done;
214 } else
215 DBG_871X_LEVEL(_drv_always_, "%s unsupported sw_alpha2:\"%c%c\"\n", __func__, sw_alpha2[0], sw_alpha2[1]);
216 }
217
218 if (rtw_is_channel_plan_valid(sw_chplan)) {
219 /* cancel hw_alpha2 because chplan is specified by sw_chplan*/
220 country_ent = NULL;
221 chplan = sw_chplan;
222 } else if (sw_chplan != RTW_CHPLAN_MAX)
223 DBG_871X_LEVEL(_drv_always_, "%s unsupported sw_chplan:0x%02X\n", __func__, sw_chplan);
224
225 done:
226 if (chplan == -1) {
227 DBG_871X_LEVEL(_drv_always_, "%s use def_chplan:0x%02X\n", __func__, def_chplan);
228 chplan = def_chplan;
229 } else if (country_ent) {
230 DBG_871X_LEVEL(_drv_always_, "%s country code:\"%c%c\" with chplan:0x%02X\n", __func__
231 , country_ent->alpha2[0], country_ent->alpha2[1], country_ent->chplan);
232 } else
233 DBG_871X_LEVEL(_drv_always_, "%s chplan:0x%02X\n", __func__, chplan);
234
235 padapter->mlmepriv.country_ent = country_ent;
236 pHalData->bDisableSWChannelPlan = force_hw_chplan;
237
238 return chplan;
239 }
240
241 BOOLEAN
HAL_IsLegalChannel(IN PADAPTER Adapter,IN u32 Channel)242 HAL_IsLegalChannel(
243 IN PADAPTER Adapter,
244 IN u32 Channel
245 )
246 {
247 BOOLEAN bLegalChannel = _TRUE;
248
249 if (Channel > 14) {
250 if(IsSupported5G(Adapter->registrypriv.wireless_mode) == _FALSE) {
251 bLegalChannel = _FALSE;
252 DBG_871X("Channel > 14 but wireless_mode do not support 5G\n");
253 }
254 } else if ((Channel <= 14) && (Channel >=1)){
255 if(IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) {
256 bLegalChannel = _FALSE;
257 DBG_871X("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n");
258 }
259 } else {
260 bLegalChannel = _FALSE;
261 DBG_871X("Channel is Invalid !!!\n");
262 }
263
264 return bLegalChannel;
265 }
266
MRateToHwRate(u8 rate)267 u8 MRateToHwRate(u8 rate)
268 {
269 u8 ret = DESC_RATE1M;
270
271 switch(rate)
272 {
273 case MGN_1M: ret = DESC_RATE1M; break;
274 case MGN_2M: ret = DESC_RATE2M; break;
275 case MGN_5_5M: ret = DESC_RATE5_5M; break;
276 case MGN_11M: ret = DESC_RATE11M; break;
277 case MGN_6M: ret = DESC_RATE6M; break;
278 case MGN_9M: ret = DESC_RATE9M; break;
279 case MGN_12M: ret = DESC_RATE12M; break;
280 case MGN_18M: ret = DESC_RATE18M; break;
281 case MGN_24M: ret = DESC_RATE24M; break;
282 case MGN_36M: ret = DESC_RATE36M; break;
283 case MGN_48M: ret = DESC_RATE48M; break;
284 case MGN_54M: ret = DESC_RATE54M; break;
285
286 case MGN_MCS0: ret = DESC_RATEMCS0; break;
287 case MGN_MCS1: ret = DESC_RATEMCS1; break;
288 case MGN_MCS2: ret = DESC_RATEMCS2; break;
289 case MGN_MCS3: ret = DESC_RATEMCS3; break;
290 case MGN_MCS4: ret = DESC_RATEMCS4; break;
291 case MGN_MCS5: ret = DESC_RATEMCS5; break;
292 case MGN_MCS6: ret = DESC_RATEMCS6; break;
293 case MGN_MCS7: ret = DESC_RATEMCS7; break;
294 case MGN_MCS8: ret = DESC_RATEMCS8; break;
295 case MGN_MCS9: ret = DESC_RATEMCS9; break;
296 case MGN_MCS10: ret = DESC_RATEMCS10; break;
297 case MGN_MCS11: ret = DESC_RATEMCS11; break;
298 case MGN_MCS12: ret = DESC_RATEMCS12; break;
299 case MGN_MCS13: ret = DESC_RATEMCS13; break;
300 case MGN_MCS14: ret = DESC_RATEMCS14; break;
301 case MGN_MCS15: ret = DESC_RATEMCS15; break;
302 case MGN_MCS16: ret = DESC_RATEMCS16; break;
303 case MGN_MCS17: ret = DESC_RATEMCS17; break;
304 case MGN_MCS18: ret = DESC_RATEMCS18; break;
305 case MGN_MCS19: ret = DESC_RATEMCS19; break;
306 case MGN_MCS20: ret = DESC_RATEMCS20; break;
307 case MGN_MCS21: ret = DESC_RATEMCS21; break;
308 case MGN_MCS22: ret = DESC_RATEMCS22; break;
309 case MGN_MCS23: ret = DESC_RATEMCS23; break;
310 case MGN_MCS24: ret = DESC_RATEMCS24; break;
311 case MGN_MCS25: ret = DESC_RATEMCS25; break;
312 case MGN_MCS26: ret = DESC_RATEMCS26; break;
313 case MGN_MCS27: ret = DESC_RATEMCS27; break;
314 case MGN_MCS28: ret = DESC_RATEMCS28; break;
315 case MGN_MCS29: ret = DESC_RATEMCS29; break;
316 case MGN_MCS30: ret = DESC_RATEMCS30; break;
317 case MGN_MCS31: ret = DESC_RATEMCS31; break;
318
319 case MGN_VHT1SS_MCS0: ret = DESC_RATEVHTSS1MCS0; break;
320 case MGN_VHT1SS_MCS1: ret = DESC_RATEVHTSS1MCS1; break;
321 case MGN_VHT1SS_MCS2: ret = DESC_RATEVHTSS1MCS2; break;
322 case MGN_VHT1SS_MCS3: ret = DESC_RATEVHTSS1MCS3; break;
323 case MGN_VHT1SS_MCS4: ret = DESC_RATEVHTSS1MCS4; break;
324 case MGN_VHT1SS_MCS5: ret = DESC_RATEVHTSS1MCS5; break;
325 case MGN_VHT1SS_MCS6: ret = DESC_RATEVHTSS1MCS6; break;
326 case MGN_VHT1SS_MCS7: ret = DESC_RATEVHTSS1MCS7; break;
327 case MGN_VHT1SS_MCS8: ret = DESC_RATEVHTSS1MCS8; break;
328 case MGN_VHT1SS_MCS9: ret = DESC_RATEVHTSS1MCS9; break;
329 case MGN_VHT2SS_MCS0: ret = DESC_RATEVHTSS2MCS0; break;
330 case MGN_VHT2SS_MCS1: ret = DESC_RATEVHTSS2MCS1; break;
331 case MGN_VHT2SS_MCS2: ret = DESC_RATEVHTSS2MCS2; break;
332 case MGN_VHT2SS_MCS3: ret = DESC_RATEVHTSS2MCS3; break;
333 case MGN_VHT2SS_MCS4: ret = DESC_RATEVHTSS2MCS4; break;
334 case MGN_VHT2SS_MCS5: ret = DESC_RATEVHTSS2MCS5; break;
335 case MGN_VHT2SS_MCS6: ret = DESC_RATEVHTSS2MCS6; break;
336 case MGN_VHT2SS_MCS7: ret = DESC_RATEVHTSS2MCS7; break;
337 case MGN_VHT2SS_MCS8: ret = DESC_RATEVHTSS2MCS8; break;
338 case MGN_VHT2SS_MCS9: ret = DESC_RATEVHTSS2MCS9; break;
339 case MGN_VHT3SS_MCS0: ret = DESC_RATEVHTSS3MCS0; break;
340 case MGN_VHT3SS_MCS1: ret = DESC_RATEVHTSS3MCS1; break;
341 case MGN_VHT3SS_MCS2: ret = DESC_RATEVHTSS3MCS2; break;
342 case MGN_VHT3SS_MCS3: ret = DESC_RATEVHTSS3MCS3; break;
343 case MGN_VHT3SS_MCS4: ret = DESC_RATEVHTSS3MCS4; break;
344 case MGN_VHT3SS_MCS5: ret = DESC_RATEVHTSS3MCS5; break;
345 case MGN_VHT3SS_MCS6: ret = DESC_RATEVHTSS3MCS6; break;
346 case MGN_VHT3SS_MCS7: ret = DESC_RATEVHTSS3MCS7; break;
347 case MGN_VHT3SS_MCS8: ret = DESC_RATEVHTSS3MCS8; break;
348 case MGN_VHT3SS_MCS9: ret = DESC_RATEVHTSS3MCS9; break;
349 case MGN_VHT4SS_MCS0: ret = DESC_RATEVHTSS4MCS0; break;
350 case MGN_VHT4SS_MCS1: ret = DESC_RATEVHTSS4MCS1; break;
351 case MGN_VHT4SS_MCS2: ret = DESC_RATEVHTSS4MCS2; break;
352 case MGN_VHT4SS_MCS3: ret = DESC_RATEVHTSS4MCS3; break;
353 case MGN_VHT4SS_MCS4: ret = DESC_RATEVHTSS4MCS4; break;
354 case MGN_VHT4SS_MCS5: ret = DESC_RATEVHTSS4MCS5; break;
355 case MGN_VHT4SS_MCS6: ret = DESC_RATEVHTSS4MCS6; break;
356 case MGN_VHT4SS_MCS7: ret = DESC_RATEVHTSS4MCS7; break;
357 case MGN_VHT4SS_MCS8: ret = DESC_RATEVHTSS4MCS8; break;
358 case MGN_VHT4SS_MCS9: ret = DESC_RATEVHTSS4MCS9; break;
359 default: break;
360 }
361
362 return ret;
363 }
364
HwRateToMRate(u8 rate)365 u8 HwRateToMRate(u8 rate)
366 {
367 u8 ret_rate = MGN_1M;
368
369 switch(rate)
370 {
371
372 case DESC_RATE1M: ret_rate = MGN_1M; break;
373 case DESC_RATE2M: ret_rate = MGN_2M; break;
374 case DESC_RATE5_5M: ret_rate = MGN_5_5M; break;
375 case DESC_RATE11M: ret_rate = MGN_11M; break;
376 case DESC_RATE6M: ret_rate = MGN_6M; break;
377 case DESC_RATE9M: ret_rate = MGN_9M; break;
378 case DESC_RATE12M: ret_rate = MGN_12M; break;
379 case DESC_RATE18M: ret_rate = MGN_18M; break;
380 case DESC_RATE24M: ret_rate = MGN_24M; break;
381 case DESC_RATE36M: ret_rate = MGN_36M; break;
382 case DESC_RATE48M: ret_rate = MGN_48M; break;
383 case DESC_RATE54M: ret_rate = MGN_54M; break;
384 case DESC_RATEMCS0: ret_rate = MGN_MCS0; break;
385 case DESC_RATEMCS1: ret_rate = MGN_MCS1; break;
386 case DESC_RATEMCS2: ret_rate = MGN_MCS2; break;
387 case DESC_RATEMCS3: ret_rate = MGN_MCS3; break;
388 case DESC_RATEMCS4: ret_rate = MGN_MCS4; break;
389 case DESC_RATEMCS5: ret_rate = MGN_MCS5; break;
390 case DESC_RATEMCS6: ret_rate = MGN_MCS6; break;
391 case DESC_RATEMCS7: ret_rate = MGN_MCS7; break;
392 case DESC_RATEMCS8: ret_rate = MGN_MCS8; break;
393 case DESC_RATEMCS9: ret_rate = MGN_MCS9; break;
394 case DESC_RATEMCS10: ret_rate = MGN_MCS10; break;
395 case DESC_RATEMCS11: ret_rate = MGN_MCS11; break;
396 case DESC_RATEMCS12: ret_rate = MGN_MCS12; break;
397 case DESC_RATEMCS13: ret_rate = MGN_MCS13; break;
398 case DESC_RATEMCS14: ret_rate = MGN_MCS14; break;
399 case DESC_RATEMCS15: ret_rate = MGN_MCS15; break;
400 case DESC_RATEMCS16: ret_rate = MGN_MCS16; break;
401 case DESC_RATEMCS17: ret_rate = MGN_MCS17; break;
402 case DESC_RATEMCS18: ret_rate = MGN_MCS18; break;
403 case DESC_RATEMCS19: ret_rate = MGN_MCS19; break;
404 case DESC_RATEMCS20: ret_rate = MGN_MCS20; break;
405 case DESC_RATEMCS21: ret_rate = MGN_MCS21; break;
406 case DESC_RATEMCS22: ret_rate = MGN_MCS22; break;
407 case DESC_RATEMCS23: ret_rate = MGN_MCS23; break;
408 case DESC_RATEMCS24: ret_rate = MGN_MCS24; break;
409 case DESC_RATEMCS25: ret_rate = MGN_MCS25; break;
410 case DESC_RATEMCS26: ret_rate = MGN_MCS26; break;
411 case DESC_RATEMCS27: ret_rate = MGN_MCS27; break;
412 case DESC_RATEMCS28: ret_rate = MGN_MCS28; break;
413 case DESC_RATEMCS29: ret_rate = MGN_MCS29; break;
414 case DESC_RATEMCS30: ret_rate = MGN_MCS30; break;
415 case DESC_RATEMCS31: ret_rate = MGN_MCS31; break;
416 case DESC_RATEVHTSS1MCS0: ret_rate = MGN_VHT1SS_MCS0; break;
417 case DESC_RATEVHTSS1MCS1: ret_rate = MGN_VHT1SS_MCS1; break;
418 case DESC_RATEVHTSS1MCS2: ret_rate = MGN_VHT1SS_MCS2; break;
419 case DESC_RATEVHTSS1MCS3: ret_rate = MGN_VHT1SS_MCS3; break;
420 case DESC_RATEVHTSS1MCS4: ret_rate = MGN_VHT1SS_MCS4; break;
421 case DESC_RATEVHTSS1MCS5: ret_rate = MGN_VHT1SS_MCS5; break;
422 case DESC_RATEVHTSS1MCS6: ret_rate = MGN_VHT1SS_MCS6; break;
423 case DESC_RATEVHTSS1MCS7: ret_rate = MGN_VHT1SS_MCS7; break;
424 case DESC_RATEVHTSS1MCS8: ret_rate = MGN_VHT1SS_MCS8; break;
425 case DESC_RATEVHTSS1MCS9: ret_rate = MGN_VHT1SS_MCS9; break;
426 case DESC_RATEVHTSS2MCS0: ret_rate = MGN_VHT2SS_MCS0; break;
427 case DESC_RATEVHTSS2MCS1: ret_rate = MGN_VHT2SS_MCS1; break;
428 case DESC_RATEVHTSS2MCS2: ret_rate = MGN_VHT2SS_MCS2; break;
429 case DESC_RATEVHTSS2MCS3: ret_rate = MGN_VHT2SS_MCS3; break;
430 case DESC_RATEVHTSS2MCS4: ret_rate = MGN_VHT2SS_MCS4; break;
431 case DESC_RATEVHTSS2MCS5: ret_rate = MGN_VHT2SS_MCS5; break;
432 case DESC_RATEVHTSS2MCS6: ret_rate = MGN_VHT2SS_MCS6; break;
433 case DESC_RATEVHTSS2MCS7: ret_rate = MGN_VHT2SS_MCS7; break;
434 case DESC_RATEVHTSS2MCS8: ret_rate = MGN_VHT2SS_MCS8; break;
435 case DESC_RATEVHTSS2MCS9: ret_rate = MGN_VHT2SS_MCS9; break;
436 case DESC_RATEVHTSS3MCS0: ret_rate = MGN_VHT3SS_MCS0; break;
437 case DESC_RATEVHTSS3MCS1: ret_rate = MGN_VHT3SS_MCS1; break;
438 case DESC_RATEVHTSS3MCS2: ret_rate = MGN_VHT3SS_MCS2; break;
439 case DESC_RATEVHTSS3MCS3: ret_rate = MGN_VHT3SS_MCS3; break;
440 case DESC_RATEVHTSS3MCS4: ret_rate = MGN_VHT3SS_MCS4; break;
441 case DESC_RATEVHTSS3MCS5: ret_rate = MGN_VHT3SS_MCS5; break;
442 case DESC_RATEVHTSS3MCS6: ret_rate = MGN_VHT3SS_MCS6; break;
443 case DESC_RATEVHTSS3MCS7: ret_rate = MGN_VHT3SS_MCS7; break;
444 case DESC_RATEVHTSS3MCS8: ret_rate = MGN_VHT3SS_MCS8; break;
445 case DESC_RATEVHTSS3MCS9: ret_rate = MGN_VHT3SS_MCS9; break;
446 case DESC_RATEVHTSS4MCS0: ret_rate = MGN_VHT4SS_MCS0; break;
447 case DESC_RATEVHTSS4MCS1: ret_rate = MGN_VHT4SS_MCS1; break;
448 case DESC_RATEVHTSS4MCS2: ret_rate = MGN_VHT4SS_MCS2; break;
449 case DESC_RATEVHTSS4MCS3: ret_rate = MGN_VHT4SS_MCS3; break;
450 case DESC_RATEVHTSS4MCS4: ret_rate = MGN_VHT4SS_MCS4; break;
451 case DESC_RATEVHTSS4MCS5: ret_rate = MGN_VHT4SS_MCS5; break;
452 case DESC_RATEVHTSS4MCS6: ret_rate = MGN_VHT4SS_MCS6; break;
453 case DESC_RATEVHTSS4MCS7: ret_rate = MGN_VHT4SS_MCS7; break;
454 case DESC_RATEVHTSS4MCS8: ret_rate = MGN_VHT4SS_MCS8; break;
455 case DESC_RATEVHTSS4MCS9: ret_rate = MGN_VHT4SS_MCS9; break;
456
457 default:
458 DBG_871X("HwRateToMRate(): Non supported Rate [%x]!!!\n",rate );
459 break;
460 }
461
462 return ret_rate;
463 }
464
HalSetBrateCfg(IN PADAPTER Adapter,IN u8 * mBratesOS,OUT u16 * pBrateCfg)465 void HalSetBrateCfg(
466 IN PADAPTER Adapter,
467 IN u8 *mBratesOS,
468 OUT u16 *pBrateCfg)
469 {
470 u8 i, is_brate, brate;
471
472 for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
473 {
474 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
475 brate = mBratesOS[i] & 0x7f;
476
477 if( is_brate )
478 {
479 switch(brate)
480 {
481 case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
482 case IEEE80211_CCK_RATE_2MB: *pBrateCfg |= RATE_2M; break;
483 case IEEE80211_CCK_RATE_5MB: *pBrateCfg |= RATE_5_5M;break;
484 case IEEE80211_CCK_RATE_11MB: *pBrateCfg |= RATE_11M; break;
485 case IEEE80211_OFDM_RATE_6MB: *pBrateCfg |= RATE_6M; break;
486 case IEEE80211_OFDM_RATE_9MB: *pBrateCfg |= RATE_9M; break;
487 case IEEE80211_OFDM_RATE_12MB: *pBrateCfg |= RATE_12M; break;
488 case IEEE80211_OFDM_RATE_18MB: *pBrateCfg |= RATE_18M; break;
489 case IEEE80211_OFDM_RATE_24MB: *pBrateCfg |= RATE_24M; break;
490 case IEEE80211_OFDM_RATE_36MB: *pBrateCfg |= RATE_36M; break;
491 case IEEE80211_OFDM_RATE_48MB: *pBrateCfg |= RATE_48M; break;
492 case IEEE80211_OFDM_RATE_54MB: *pBrateCfg |= RATE_54M; break;
493 }
494 }
495 }
496 }
497
498 static VOID
_OneOutPipeMapping(IN PADAPTER pAdapter)499 _OneOutPipeMapping(
500 IN PADAPTER pAdapter
501 )
502 {
503 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
504
505 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
506 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
507 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE
508 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
509
510 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
511 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
512 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
513 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
514 }
515
516 static VOID
_TwoOutPipeMapping(IN PADAPTER pAdapter,IN BOOLEAN bWIFICfg)517 _TwoOutPipeMapping(
518 IN PADAPTER pAdapter,
519 IN BOOLEAN bWIFICfg
520 )
521 {
522 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
523
524 if(bWIFICfg){ //WMM
525
526 // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
527 //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
528 //0:ep_0 num, 1:ep_1 num
529
530 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO
531 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
532 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
533 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
534
535 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
536 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
537 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
538 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
539
540 }
541 else{//typical setting
542
543
544 //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
545 //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 };
546 //0:ep_0 num, 1:ep_1 num
547
548 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
549 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
550 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
551 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
552
553 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
554 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
555 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
556 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
557
558 }
559
560 }
561
_ThreeOutPipeMapping(IN PADAPTER pAdapter,IN BOOLEAN bWIFICfg)562 static VOID _ThreeOutPipeMapping(
563 IN PADAPTER pAdapter,
564 IN BOOLEAN bWIFICfg
565 )
566 {
567 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
568
569 if(bWIFICfg){//for WMM
570
571 // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
572 //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
573 //0:H, 1:N, 2:L
574
575 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
576 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
577 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
578 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
579
580 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
581 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
582 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
583 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
584
585 }
586 else{//typical setting
587
588
589 // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
590 //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
591 //0:H, 1:N, 2:L
592
593 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
594 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
595 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
596 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
597
598 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
599 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
600 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
601 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
602 }
603
604 }
_FourOutPipeMapping(IN PADAPTER pAdapter,IN BOOLEAN bWIFICfg)605 static VOID _FourOutPipeMapping(
606 IN PADAPTER pAdapter,
607 IN BOOLEAN bWIFICfg
608 )
609 {
610 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
611
612 if(bWIFICfg){//for WMM
613
614 // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
615 //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
616 //0:H, 1:N, 2:L ,3:E
617
618 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
619 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
620 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
621 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
622
623 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
624 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
625 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
626 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
627
628 }
629 else{//typical setting
630
631
632 // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
633 //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
634 //0:H, 1:N, 2:L
635
636 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
637 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
638 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
639 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
640
641 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
642 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
643 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
644 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
645 }
646
647 }
648 BOOLEAN
Hal_MappingOutPipe(IN PADAPTER pAdapter,IN u8 NumOutPipe)649 Hal_MappingOutPipe(
650 IN PADAPTER pAdapter,
651 IN u8 NumOutPipe
652 )
653 {
654 struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
655
656 BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
657
658 BOOLEAN result = _TRUE;
659
660 switch(NumOutPipe)
661 {
662 case 2:
663 _TwoOutPipeMapping(pAdapter, bWIFICfg);
664 break;
665 case 3:
666 case 4:
667 _ThreeOutPipeMapping(pAdapter, bWIFICfg);
668 break;
669 case 1:
670 _OneOutPipeMapping(pAdapter);
671 break;
672 default:
673 result = _FALSE;
674 break;
675 }
676
677 return result;
678
679 }
680
hal_init_macaddr(_adapter * adapter)681 void hal_init_macaddr(_adapter *adapter)
682 {
683 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
684 #ifdef CONFIG_CONCURRENT_MODE
685 if (adapter->pbuddy_adapter)
686 rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter->pbuddy_adapter));
687 #endif
688 }
689
rtw_init_hal_com_default_value(PADAPTER Adapter)690 void rtw_init_hal_com_default_value(PADAPTER Adapter)
691 {
692 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
693
694 pHalData->AntDetection = 1;
695 }
696
697 /*
698 * C2H event format:
699 * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
700 * BITS [127:120] [119:16] [15:8] [7:4] [3:0]
701 */
702
c2h_evt_clear(_adapter * adapter)703 void c2h_evt_clear(_adapter *adapter)
704 {
705 rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
706 }
707
c2h_evt_read(_adapter * adapter,u8 * buf)708 s32 c2h_evt_read(_adapter *adapter, u8 *buf)
709 {
710 s32 ret = _FAIL;
711 struct c2h_evt_hdr *c2h_evt;
712 int i;
713 u8 trigger;
714
715 if (buf == NULL)
716 goto exit;
717
718 #if defined (CONFIG_RTL8188E)
719
720 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
721
722 if (trigger == C2H_EVT_HOST_CLOSE) {
723 goto exit; /* Not ready */
724 } else if (trigger != C2H_EVT_FW_CLOSE) {
725 goto clear_evt; /* Not a valid value */
726 }
727
728 c2h_evt = (struct c2h_evt_hdr *)buf;
729
730 _rtw_memset(c2h_evt, 0, 16);
731
732 *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
733 *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
734
735 RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
736 &c2h_evt , sizeof(c2h_evt));
737
738 if (0) {
739 DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
740 , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
741 }
742
743 /* Read the content */
744 for (i = 0; i < c2h_evt->plen; i++)
745 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
746
747 RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
748 c2h_evt->payload, c2h_evt->plen);
749
750 ret = _SUCCESS;
751
752 clear_evt:
753 /*
754 * Clear event to notify FW we have read the command.
755 * If this field isn't clear, the FW won't update the next command message.
756 */
757 c2h_evt_clear(adapter);
758 #endif
759 exit:
760 return ret;
761 }
762
763 /*
764 * C2H event format:
765 * Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
766 * BITS [127:120] [119:112] [111:16] [15:8] [7:0]
767 */
c2h_evt_read_88xx(_adapter * adapter,u8 * buf)768 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf)
769 {
770 s32 ret = _FAIL;
771 struct c2h_evt_hdr_88xx *c2h_evt;
772 int i;
773 u8 trigger;
774
775 if (buf == NULL)
776 goto exit;
777
778 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B)
779
780 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
781
782 if (trigger == C2H_EVT_HOST_CLOSE) {
783 goto exit; /* Not ready */
784 } else if (trigger != C2H_EVT_FW_CLOSE) {
785 goto clear_evt; /* Not a valid value */
786 }
787
788 c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
789
790 _rtw_memset(c2h_evt, 0, 16);
791
792 c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
793 c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
794 c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
795
796 RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
797 &c2h_evt , sizeof(c2h_evt));
798
799 if (0) {
800 DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
801 , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
802 }
803
804 /* Read the content */
805 for (i = 0; i < c2h_evt->plen; i++)
806 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
807
808 RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
809 c2h_evt->payload, c2h_evt->plen);
810
811 ret = _SUCCESS;
812
813 clear_evt:
814 /*
815 * Clear event to notify FW we have read the command.
816 * If this field isn't clear, the FW won't update the next command message.
817 */
818 c2h_evt_clear(adapter);
819 #endif
820 exit:
821 return ret;
822 }
823
824 #define GET_C2H_MAC_HIDDEN_RPT_UUID_X(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 8)
825 #define GET_C2H_MAC_HIDDEN_RPT_UUID_Y(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8)
826 #define GET_C2H_MAC_HIDDEN_RPT_UUID_Z(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 5)
827 #define GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(_data) LE_BITS_TO_2BYTE(((u8 *)(_data)) + 2, 5, 11)
828 #define GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 0, 4)
829 #define GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 4, 4)
830 #define GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 4)
831 #define GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 4, 4)
832 #define GET_C2H_MAC_HIDDEN_RPT_BW(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 3)
833 #define GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 5, 3)
834 #define GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 2, 2)
835 #define GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 6, 2)
836
837 #ifndef DBG_C2H_MAC_HIDDEN_RPT_HANDLE
838 #define DBG_C2H_MAC_HIDDEN_RPT_HANDLE 0
839 #endif
840
c2h_mac_hidden_rpt_hdl(_adapter * adapter,u8 * data,u8 len)841 int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
842 {
843 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
844 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
845 int ret = _FAIL;
846
847 u32 uuid;
848 u8 uuid_x;
849 u8 uuid_y;
850 u8 uuid_z;
851 u16 uuid_crc;
852
853 u8 hci_type;
854 u8 package_type;
855 u8 wl_func;
856 u8 hw_stype;
857 u8 bw;
858 u8 ant_num;
859 u8 protocol;
860 u8 nic;
861
862 int i;
863
864 if (len < MAC_HIDDEN_RPT_LEN) {
865 DBG_871X_LEVEL(_drv_warning_, "%s len(%u) < %d\n", __func__, len, MAC_HIDDEN_RPT_LEN);
866 goto exit;
867 }
868
869 uuid_x = GET_C2H_MAC_HIDDEN_RPT_UUID_X(data);
870 uuid_y = GET_C2H_MAC_HIDDEN_RPT_UUID_Y(data);
871 uuid_z = GET_C2H_MAC_HIDDEN_RPT_UUID_Z(data);
872 uuid_crc = GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(data);
873
874 hci_type = GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(data);
875 package_type = GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(data);
876
877 wl_func = GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(data);
878 hw_stype = GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(data);
879
880 bw = GET_C2H_MAC_HIDDEN_RPT_BW(data);
881 ant_num = GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(data);
882
883 protocol = GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(data);
884 nic = GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(data);
885
886 if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) {
887 for (i = 0; i < len; i++)
888 DBG_871X("%s: 0x%02X\n", __func__, *(data + i));
889
890 DBG_871X("uuid x:0x%02x y:0x%02x z:0x%x crc:0x%x\n", uuid_x, uuid_y, uuid_z, uuid_crc);
891 DBG_871X("hci_type:0x%x\n", hci_type);
892 DBG_871X("package_type:0x%x\n", package_type);
893 DBG_871X("wl_func:0x%x\n", wl_func);
894 DBG_871X("hw_stype:0x%x\n", hw_stype);
895 DBG_871X("bw:0x%x\n", bw);
896 DBG_871X("ant_num:0x%x\n", ant_num);
897 DBG_871X("protocol:0x%x\n", protocol);
898 DBG_871X("nic:0x%x\n", nic);
899 }
900
901 hal_data->PackageType = package_type;
902 hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func);
903 hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw);
904 hal_spec->nss_num = rtw_min(hal_spec->nss_num, ant_num);
905 hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol);
906
907 ret = _SUCCESS;
908
909 exit:
910 return ret;
911 }
912
hal_read_mac_hidden_rpt(_adapter * adapter)913 int hal_read_mac_hidden_rpt(_adapter *adapter)
914 {
915 int ret = _FAIL;
916 int ret_fwdl;
917 u8 mac_hidden_rpt[MAC_HIDDEN_RPT_LEN] = {0};
918 u32 start = rtw_get_current_time();
919 u32 cnt = 0;
920 u32 timeout_ms = 800;
921 u32 min_cnt = 10;
922 u8 id = C2H_MAC_HIDDEN_RPT + 1;
923 int i;
924
925 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
926 u8 hci_type = rtw_get_intf_type(adapter);
927
928 if ((hci_type == RTW_USB || hci_type == RTW_PCIE)
929 && !rtw_is_hw_init_completed(adapter))
930 rtw_hal_power_on(adapter);
931 #endif
932
933 /* clear data ready */
934 rtw_write8(adapter, REG_C2HEVT_MSG_NORMAL, id);
935
936 /* download FW */
937 ret_fwdl = rtw_hal_fw_dl(adapter, _FALSE);
938 if (ret_fwdl != _SUCCESS)
939 goto mac_hidden_rpt_hdl;
940
941 /* polling for data ready */
942 start = rtw_get_current_time();
943 do {
944 cnt++;
945 id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
946 if (id == C2H_MAC_HIDDEN_RPT || RTW_CANNOT_IO(adapter))
947 break;
948 rtw_msleep_os(10);
949 } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt);
950
951 if (id == C2H_MAC_HIDDEN_RPT) {
952 /* read data */
953 for (i = 0; i < MAC_HIDDEN_RPT_LEN; i++)
954 mac_hidden_rpt[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
955 }
956
957 mac_hidden_rpt_hdl:
958 c2h_mac_hidden_rpt_hdl(adapter, mac_hidden_rpt, MAC_HIDDEN_RPT_LEN);
959
960 if (ret_fwdl == _SUCCESS && id == C2H_MAC_HIDDEN_RPT)
961 ret = _SUCCESS;
962
963 exit:
964
965 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
966 if ((hci_type == RTW_USB || hci_type == RTW_PCIE)
967 && !rtw_is_hw_init_completed(adapter))
968 rtw_hal_power_off(adapter);
969 #endif
970
971 DBG_871X("%s %s! (%u, %dms), fwdl:%d, id:0x%02x\n", __func__
972 , (ret == _SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), ret_fwdl, id);
973
974 return ret;
975 }
976
rtw_hal_networktype_to_raid(_adapter * adapter,struct sta_info * psta)977 u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta)
978 {
979 if(IS_NEW_GENERATION_IC(adapter)){
980 return networktype_to_raid_ex(adapter,psta);
981 }
982 else{
983 return networktype_to_raid(adapter,psta);
984 }
985
986 }
rtw_get_mgntframe_raid(_adapter * adapter,unsigned char network_type)987 u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type)
988 {
989
990 u8 raid;
991 if(IS_NEW_GENERATION_IC(adapter)){
992
993 raid = (network_type & WIRELESS_11B) ?RATEID_IDX_B
994 :RATEID_IDX_G;
995 }
996 else{
997 raid = (network_type & WIRELESS_11B) ?RATR_INX_WIRELESS_B
998 :RATR_INX_WIRELESS_G;
999 }
1000 return raid;
1001 }
1002
rtw_hal_update_sta_rate_mask(PADAPTER padapter,struct sta_info * psta)1003 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
1004 {
1005 u8 i, rf_type, limit;
1006 u64 tx_ra_bitmap;
1007
1008 if(psta == NULL)
1009 {
1010 return;
1011 }
1012
1013 tx_ra_bitmap = 0;
1014
1015 //b/g mode ra_bitmap
1016 for (i=0; i<sizeof(psta->bssrateset); i++)
1017 {
1018 if (psta->bssrateset[i])
1019 tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
1020 }
1021
1022 #ifdef CONFIG_80211N_HT
1023 #ifdef CONFIG_80211AC_VHT
1024 //AC mode ra_bitmap
1025 if(psta->vhtpriv.vht_option)
1026 {
1027 tx_ra_bitmap |= (rtw_vht_rate_to_bitmap(psta->vhtpriv.vht_mcs_map) << 12);
1028 }
1029 else
1030 #endif //CONFIG_80211AC_VHT
1031 {
1032 //n mode ra_bitmap
1033 if(psta->htpriv.ht_option)
1034 {
1035 rf_type = RF_1T1R;
1036 rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
1037 if(rf_type == RF_2T2R)
1038 limit=16;// 2R
1039 else if(rf_type == RF_3T3R)
1040 limit=24;// 3R
1041 else
1042 limit=8;// 1R
1043
1044
1045 /* Handling SMPS mode for AP MODE only*/
1046 if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
1047 /*0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
1048 if (psta->htpriv.smps_cap == 0 || psta->htpriv.smps_cap == 1) {
1049 /*operate with only one active receive chain // 11n-MCS rate <= MSC7*/
1050 limit = 8;/* 1R*/
1051 }
1052 }
1053
1054 for (i=0; i<limit; i++) {
1055 if (psta->htpriv.ht_cap.supp_mcs_set[i/8] & BIT(i%8))
1056 tx_ra_bitmap |= BIT(i+12);
1057 }
1058 }
1059 }
1060 #endif //CONFIG_80211N_HT
1061 DBG_871X("supp_mcs_set = %02x, %02x, %02x, rf_type=%d, tx_ra_bitmap=%016llx\n"
1062 , psta->htpriv.ht_cap.supp_mcs_set[0], psta->htpriv.ht_cap.supp_mcs_set[1], psta->htpriv.ht_cap.supp_mcs_set[2], rf_type, tx_ra_bitmap);
1063 psta->ra_mask = tx_ra_bitmap;
1064 psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
1065 }
1066
1067 #ifndef SEC_CAM_ACCESS_TIMEOUT_MS
1068 #define SEC_CAM_ACCESS_TIMEOUT_MS 200
1069 #endif
1070
1071 #ifndef DBG_SEC_CAM_ACCESS
1072 #define DBG_SEC_CAM_ACCESS 0
1073 #endif
1074
rtw_sec_read_cam(_adapter * adapter,u8 addr)1075 u32 rtw_sec_read_cam(_adapter *adapter, u8 addr)
1076 {
1077 _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex;
1078 u32 rdata;
1079 u32 cnt = 0;
1080 u32 start = 0, end = 0;
1081 u8 timeout = 0;
1082 u8 sr = 0;
1083
1084 _enter_critical_mutex(mutex, NULL);
1085
1086 rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | addr);
1087
1088 start = rtw_get_current_time();
1089 while (1) {
1090 if (rtw_is_surprise_removed(adapter)) {
1091 sr = 1;
1092 break;
1093 }
1094
1095 cnt++;
1096 if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG))
1097 break;
1098
1099 if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) {
1100 timeout = 1;
1101 break;
1102 }
1103 }
1104 end = rtw_get_current_time();
1105
1106 rdata = rtw_read32(adapter, REG_CAMREAD);
1107
1108 _exit_critical_mutex(mutex, NULL);
1109
1110 if (DBG_SEC_CAM_ACCESS || timeout) {
1111 DBG_871X(FUNC_ADPT_FMT" addr:0x%02x, rdata:0x%08x, to:%u, polling:%u, %d ms\n"
1112 , FUNC_ADPT_ARG(adapter), addr, rdata, timeout, cnt, rtw_get_time_interval_ms(start, end));
1113 }
1114
1115 return rdata;
1116 }
1117
rtw_sec_write_cam(_adapter * adapter,u8 addr,u32 wdata)1118 void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata)
1119 {
1120 _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex;
1121 u32 cnt = 0;
1122 u32 start = 0, end = 0;
1123 u8 timeout = 0;
1124 u8 sr = 0;
1125
1126 _enter_critical_mutex(mutex, NULL);
1127
1128 rtw_write32(adapter, REG_CAMWRITE, wdata);
1129 rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | CAM_WRITE | addr);
1130
1131 start = rtw_get_current_time();
1132 while (1) {
1133 if (rtw_is_surprise_removed(adapter)) {
1134 sr = 1;
1135 break;
1136 }
1137
1138 cnt++;
1139 if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG))
1140 break;
1141
1142 if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) {
1143 timeout = 1;
1144 break;
1145 }
1146 }
1147 end = rtw_get_current_time();
1148
1149 _exit_critical_mutex(mutex, NULL);
1150
1151 if (DBG_SEC_CAM_ACCESS || timeout) {
1152 DBG_871X(FUNC_ADPT_FMT" addr:0x%02x, wdata:0x%08x, to:%u, polling:%u, %d ms\n"
1153 , FUNC_ADPT_ARG(adapter), addr, wdata, timeout, cnt, rtw_get_time_interval_ms(start, end));
1154 }
1155 }
1156
rtw_sec_read_cam_ent(_adapter * adapter,u8 id,u8 * ctrl,u8 * mac,u8 * key)1157 void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key)
1158 {
1159 unsigned int val, addr;
1160 u8 i;
1161 u32 rdata;
1162 u8 begin = 0;
1163 u8 end = 5; /* TODO: consider other key length accordingly */
1164
1165 if (!ctrl && !mac && !key) {
1166 rtw_warn_on(1);
1167 goto exit;
1168 }
1169
1170 /* TODO: check id range */
1171
1172 if (!ctrl && !mac)
1173 begin = 2; /* read from key */
1174
1175 if (!key && !mac)
1176 end = 0; /* read to ctrl */
1177 else if (!key)
1178 end = 2; /* read to mac */
1179
1180 for (i = begin; i <= end; i++) {
1181 rdata = rtw_sec_read_cam(adapter, (id << 3) | i);
1182
1183 switch (i) {
1184 case 0:
1185 if (ctrl)
1186 _rtw_memcpy(ctrl, (u8 *)(&rdata), 2);
1187 if (mac)
1188 _rtw_memcpy(mac, ((u8 *)(&rdata)) + 2, 2);
1189 break;
1190 case 1:
1191 if (mac)
1192 _rtw_memcpy(mac + 2, (u8 *)(&rdata), 4);
1193 break;
1194 default:
1195 if (key)
1196 _rtw_memcpy(key + (i - 2) * 4, (u8 *)(&rdata), 4);
1197 break;
1198 }
1199 }
1200
1201 exit:
1202 return;
1203 }
1204
1205
rtw_sec_write_cam_ent(_adapter * adapter,u8 id,u16 ctrl,u8 * mac,u8 * key)1206 void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key)
1207 {
1208 unsigned int i;
1209 int j;
1210 u8 addr;
1211 u32 wdata;
1212
1213 /* TODO: consider other key length accordingly */
1214 #if 0
1215 switch ((ctrl & 0x1c) >> 2) {
1216 case _WEP40_:
1217 case _TKIP_
1218 case _AES_
1219 case _WEP104_
1220
1221 }
1222 #else
1223 j = 5;
1224 #endif
1225
1226 for (; j >= 0; j--) {
1227 switch (j) {
1228 case 0:
1229 wdata = (ctrl | (mac[0] << 16) | (mac[1] << 24));
1230 break;
1231 case 1:
1232 wdata = (mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24));
1233 break;
1234 default:
1235 i = (j - 2) << 2;
1236 wdata = (key[i] | (key[i + 1] << 8) | (key[i + 2] << 16) | (key[i + 3] << 24));
1237 break;
1238 }
1239
1240 addr = (id << 3) + j;
1241
1242 rtw_sec_write_cam(adapter, addr, wdata);
1243 }
1244 }
1245
rtw_sec_read_cam_is_gk(_adapter * adapter,u8 id)1246 bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id)
1247 {
1248 bool res;
1249 u16 ctrl;
1250
1251 rtw_sec_read_cam_ent(adapter, id, (u8 *)&ctrl, NULL, NULL);
1252
1253 res = (ctrl & BIT6) ? _TRUE : _FALSE;
1254 return res;
1255 }
1256
hw_var_port_switch(_adapter * adapter)1257 void hw_var_port_switch(_adapter *adapter)
1258 {
1259 #ifdef CONFIG_CONCURRENT_MODE
1260 #ifdef CONFIG_RUNTIME_PORT_SWITCH
1261 /*
1262 0x102: MSR
1263 0x550: REG_BCN_CTRL
1264 0x551: REG_BCN_CTRL_1
1265 0x55A: REG_ATIMWND
1266 0x560: REG_TSFTR
1267 0x568: REG_TSFTR1
1268 0x570: REG_ATIMWND_1
1269 0x610: REG_MACID
1270 0x618: REG_BSSID
1271 0x700: REG_MACID1
1272 0x708: REG_BSSID1
1273 */
1274
1275 int i;
1276 u8 msr;
1277 u8 bcn_ctrl;
1278 u8 bcn_ctrl_1;
1279 u8 atimwnd[2];
1280 u8 atimwnd_1[2];
1281 u8 tsftr[8];
1282 u8 tsftr_1[8];
1283 u8 macid[6];
1284 u8 bssid[6];
1285 u8 macid_1[6];
1286 u8 bssid_1[6];
1287
1288 u8 iface_type;
1289
1290 msr = rtw_read8(adapter, MSR);
1291 bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
1292 bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
1293
1294 for (i=0; i<2; i++)
1295 atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i);
1296 for (i=0; i<2; i++)
1297 atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i);
1298
1299 for (i=0; i<8; i++)
1300 tsftr[i] = rtw_read8(adapter, REG_TSFTR+i);
1301 for (i=0; i<8; i++)
1302 tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i);
1303
1304 for (i=0; i<6; i++)
1305 macid[i] = rtw_read8(adapter, REG_MACID+i);
1306
1307 for (i=0; i<6; i++)
1308 bssid[i] = rtw_read8(adapter, REG_BSSID+i);
1309
1310 for (i=0; i<6; i++)
1311 macid_1[i] = rtw_read8(adapter, REG_MACID1+i);
1312
1313 for (i=0; i<6; i++)
1314 bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i);
1315
1316 #ifdef DBG_RUNTIME_PORT_SWITCH
1317 DBG_871X(FUNC_ADPT_FMT" before switch\n"
1318 "msr:0x%02x\n"
1319 "bcn_ctrl:0x%02x\n"
1320 "bcn_ctrl_1:0x%02x\n"
1321 "atimwnd:0x%04x\n"
1322 "atimwnd_1:0x%04x\n"
1323 "tsftr:%llu\n"
1324 "tsftr1:%llu\n"
1325 "macid:"MAC_FMT"\n"
1326 "bssid:"MAC_FMT"\n"
1327 "macid_1:"MAC_FMT"\n"
1328 "bssid_1:"MAC_FMT"\n"
1329 , FUNC_ADPT_ARG(adapter)
1330 , msr
1331 , bcn_ctrl
1332 , bcn_ctrl_1
1333 , *((u16*)atimwnd)
1334 , *((u16*)atimwnd_1)
1335 , *((u64*)tsftr)
1336 , *((u64*)tsftr_1)
1337 , MAC_ARG(macid)
1338 , MAC_ARG(bssid)
1339 , MAC_ARG(macid_1)
1340 , MAC_ARG(bssid_1)
1341 );
1342 #endif /* DBG_RUNTIME_PORT_SWITCH */
1343
1344 /* disable bcn function, disable update TSF */
1345 rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
1346 rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
1347
1348 /* switch msr */
1349 msr = (msr&0xf0) |((msr&0x03) << 2) | ((msr&0x0c) >> 2);
1350 rtw_write8(adapter, MSR, msr);
1351
1352 /* write port0 */
1353 rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1 & ~EN_BCN_FUNCTION);
1354 for (i=0; i<2; i++)
1355 rtw_write8(adapter, REG_ATIMWND+i, atimwnd_1[i]);
1356 for (i=0; i<8; i++)
1357 rtw_write8(adapter, REG_TSFTR+i, tsftr_1[i]);
1358 for (i=0; i<6; i++)
1359 rtw_write8(adapter, REG_MACID+i, macid_1[i]);
1360 for (i=0; i<6; i++)
1361 rtw_write8(adapter, REG_BSSID+i, bssid_1[i]);
1362
1363 /* write port1 */
1364 rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl & ~EN_BCN_FUNCTION);
1365 for (i=0; i<2; i++)
1366 rtw_write8(adapter, REG_ATIMWND_1+1, atimwnd[i]);
1367 for (i=0; i<8; i++)
1368 rtw_write8(adapter, REG_TSFTR1+i, tsftr[i]);
1369 for (i=0; i<6; i++)
1370 rtw_write8(adapter, REG_MACID1+i, macid[i]);
1371 for (i=0; i<6; i++)
1372 rtw_write8(adapter, REG_BSSID1+i, bssid[i]);
1373
1374 /* write bcn ctl */
1375 #ifdef CONFIG_BT_COEXIST
1376 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B)
1377 // always enable port0 beacon function for PSTDMA
1378 bcn_ctrl_1 |= EN_BCN_FUNCTION;
1379 // always disable port1 beacon function for PSTDMA
1380 bcn_ctrl &= ~EN_BCN_FUNCTION;
1381 #endif
1382 #endif
1383 rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1);
1384 rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl);
1385
1386 if (adapter->iface_type == IFACE_PORT0) {
1387 adapter->iface_type = IFACE_PORT1;
1388 adapter->pbuddy_adapter->iface_type = IFACE_PORT0;
1389 DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n",
1390 ADPT_ARG(adapter->pbuddy_adapter), ADPT_ARG(adapter));
1391 } else {
1392 adapter->iface_type = IFACE_PORT0;
1393 adapter->pbuddy_adapter->iface_type = IFACE_PORT1;
1394 DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n",
1395 ADPT_ARG(adapter), ADPT_ARG(adapter->pbuddy_adapter));
1396 }
1397
1398 #ifdef DBG_RUNTIME_PORT_SWITCH
1399 msr = rtw_read8(adapter, MSR);
1400 bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
1401 bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
1402
1403 for (i=0; i<2; i++)
1404 atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i);
1405 for (i=0; i<2; i++)
1406 atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i);
1407
1408 for (i=0; i<8; i++)
1409 tsftr[i] = rtw_read8(adapter, REG_TSFTR+i);
1410 for (i=0; i<8; i++)
1411 tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i);
1412
1413 for (i=0; i<6; i++)
1414 macid[i] = rtw_read8(adapter, REG_MACID+i);
1415
1416 for (i=0; i<6; i++)
1417 bssid[i] = rtw_read8(adapter, REG_BSSID+i);
1418
1419 for (i=0; i<6; i++)
1420 macid_1[i] = rtw_read8(adapter, REG_MACID1+i);
1421
1422 for (i=0; i<6; i++)
1423 bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i);
1424
1425 DBG_871X(FUNC_ADPT_FMT" after switch\n"
1426 "msr:0x%02x\n"
1427 "bcn_ctrl:0x%02x\n"
1428 "bcn_ctrl_1:0x%02x\n"
1429 "atimwnd:%u\n"
1430 "atimwnd_1:%u\n"
1431 "tsftr:%llu\n"
1432 "tsftr1:%llu\n"
1433 "macid:"MAC_FMT"\n"
1434 "bssid:"MAC_FMT"\n"
1435 "macid_1:"MAC_FMT"\n"
1436 "bssid_1:"MAC_FMT"\n"
1437 , FUNC_ADPT_ARG(adapter)
1438 , msr
1439 , bcn_ctrl
1440 , bcn_ctrl_1
1441 , *((u16*)atimwnd)
1442 , *((u16*)atimwnd_1)
1443 , *((u64*)tsftr)
1444 , *((u64*)tsftr_1)
1445 , MAC_ARG(macid)
1446 , MAC_ARG(bssid)
1447 , MAC_ARG(macid_1)
1448 , MAC_ARG(bssid_1)
1449 );
1450 #endif /* DBG_RUNTIME_PORT_SWITCH */
1451
1452 #endif /* CONFIG_RUNTIME_PORT_SWITCH */
1453 #endif /* CONFIG_CONCURRENT_MODE */
1454 }
1455
1456 const char * const _h2c_msr_role_str[] = {
1457 "RSVD",
1458 "STA",
1459 "AP",
1460 "GC",
1461 "GO",
1462 "TDLS",
1463 "ADHOC",
1464 "INVALID",
1465 };
1466
1467 /*
1468 * rtw_hal_set_FwMediaStatusRpt_cmd -
1469 *
1470 * @adapter:
1471 * @opmode: 0:disconnect, 1:connect
1472 * @miracast: 0:it's not in miracast scenario. 1:it's in miracast scenario
1473 * @miracast_sink: 0:source. 1:sink
1474 * @role: The role of this macid. 0:rsvd. 1:STA. 2:AP. 3:GC. 4:GO. 5:TDLS
1475 * @macid:
1476 * @macid_ind: 0:update Media Status to macid. 1:update Media Status from macid to macid_end
1477 * @macid_end:
1478 */
rtw_hal_set_FwMediaStatusRpt_cmd(_adapter * adapter,bool opmode,bool miracast,bool miracast_sink,u8 role,u8 macid,bool macid_ind,u8 macid_end)1479 s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end)
1480 {
1481 struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
1482 u8 parm[H2C_MEDIA_STATUS_RPT_LEN] = {0};
1483 int i;
1484 s32 ret;
1485
1486 SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, opmode);
1487 SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, macid_ind);
1488 SET_H2CCMD_MSRRPT_PARM_MIRACAST(parm, miracast);
1489 SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(parm, miracast_sink);
1490 SET_H2CCMD_MSRRPT_PARM_ROLE(parm, role);
1491 SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid);
1492 SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end);
1493
1494 RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN);
1495
1496 ret = rtw_hal_fill_h2c_cmd(adapter, H2C_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, parm);
1497 if (ret != _SUCCESS)
1498 goto exit;
1499
1500 #if defined(CONFIG_RTL8188E)
1501 if (rtw_get_chip_type(adapter) == RTL8188E) {
1502 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1503
1504 /* 8188E FW doesn't set macid no link, driver does it by self */
1505 if (opmode)
1506 rtw_hal_set_hwreg(adapter, HW_VAR_MACID_LINK, &macid);
1507 else
1508 rtw_hal_set_hwreg(adapter, HW_VAR_MACID_NOLINK, &macid);
1509
1510 /* for 8188E RA */
1511 #if (RATE_ADAPTIVE_SUPPORT == 1)
1512 if (hal_data->fw_ractrl == _FALSE) {
1513 u8 max_macid;
1514
1515 max_macid = rtw_search_max_mac_id(adapter);
1516 rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, &max_macid);
1517 }
1518 #endif
1519 }
1520 #endif
1521
1522 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
1523 /* TODO: this should move to IOT issue area */
1524 if (rtw_get_chip_type(adapter) == RTL8812
1525 || rtw_get_chip_type(adapter) == RTL8821
1526 ) {
1527 if (MLME_IS_STA(adapter))
1528 Hal_PatchwithJaguar_8812(adapter, opmode);
1529 }
1530 #endif
1531
1532 SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0);
1533 if (macid_ind == 0)
1534 macid_end = macid;
1535
1536 for (i = macid; macid <= macid_end; macid++)
1537 rtw_macid_ctl_set_h2c_msr(macid_ctl, macid, parm[0]);
1538
1539 exit:
1540 return ret;
1541 }
1542
rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter * adapter,bool opmode,bool miracast,bool miracast_sink,u8 role,u8 macid)1543 inline s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid)
1544 {
1545 return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 0, 0);
1546 }
1547
rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter * adapter,bool opmode,bool miracast,bool miracast_sink,u8 role,u8 macid,u8 macid_end)1548 inline s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end)
1549 {
1550 return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 1, macid_end);
1551 }
1552
rtw_hal_set_FwRsvdPage_cmd(PADAPTER padapter,PRSVDPAGE_LOC rsvdpageloc)1553 void rtw_hal_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
1554 {
1555 struct hal_ops *pHalFunc = &padapter->HalFunc;
1556 u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN]={0};
1557 u8 ret = 0;
1558
1559 DBG_871X("RsvdPageLoc: ProbeRsp=%d PsPoll=%d Null=%d QoSNull=%d BTNull=%d\n",
1560 rsvdpageloc->LocProbeRsp, rsvdpageloc->LocPsPoll,
1561 rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull,
1562 rsvdpageloc->LocBTQosNull);
1563
1564 SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1H2CRsvdPageParm, rsvdpageloc->LocProbeRsp);
1565 SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll);
1566 SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData);
1567 SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull);
1568 SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull);
1569
1570 ret = rtw_hal_fill_h2c_cmd(padapter,
1571 H2C_RSVD_PAGE,
1572 H2C_RSVDPAGE_LOC_LEN,
1573 u1H2CRsvdPageParm);
1574
1575 }
1576
1577 #ifdef CONFIG_GPIO_WAKEUP
rtw_hal_switch_gpio_wl_ctrl(_adapter * padapter,u8 index,u8 enable)1578 void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable)
1579 {
1580 /*
1581 * Switch GPIO_13, GPIO_14 to wlan control, or pull GPIO_13,14 MUST fail.
1582 * It happended at 8723B/8192E/8821A. New IC will check multi function GPIO,
1583 * and implement HAL function.
1584 * TODO: GPIO_8 multi function?
1585 */
1586 if (index == 13 || index == 14)
1587 rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable));
1588 }
1589
rtw_hal_set_output_gpio(_adapter * padapter,u8 index,u8 outputval)1590 void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval)
1591 {
1592 if ( index <= 7 ) {
1593 /* config GPIO mode */
1594 rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3,
1595 rtw_read8(padapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(index) );
1596
1597 /* config GPIO Sel */
1598 /* 0: input */
1599 /* 1: output */
1600 rtw_write8(padapter, REG_GPIO_PIN_CTRL + 2,
1601 rtw_read8(padapter, REG_GPIO_PIN_CTRL + 2) | BIT(index));
1602
1603 /* set output value */
1604 if ( outputval ) {
1605 rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1,
1606 rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) | BIT(index));
1607 } else {
1608 rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1,
1609 rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(index));
1610 }
1611 } else if (index <= 15){
1612 /* 88C Series: */
1613 /* index: 11~8 transform to 3~0 */
1614 /* 8723 Series: */
1615 /* index: 12~8 transform to 4~0 */
1616
1617 index -= 8;
1618
1619 /* config GPIO mode */
1620 rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 3,
1621 rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 3) & ~BIT(index) );
1622
1623 /* config GPIO Sel */
1624 /* 0: input */
1625 /* 1: output */
1626 rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 2,
1627 rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) | BIT(index));
1628
1629 /* set output value */
1630 if ( outputval ) {
1631 rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1,
1632 rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) | BIT(index));
1633 } else {
1634 rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1,
1635 rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) & ~BIT(index));
1636 }
1637 } else {
1638 DBG_871X("%s: invalid GPIO%d=%d\n",
1639 __FUNCTION__, index, outputval);
1640 }
1641 }
1642 #endif
1643
rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter,PRSVDPAGE_LOC rsvdpageloc)1644 void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
1645 {
1646 struct hal_ops *pHalFunc = &padapter->HalFunc;
1647 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
1648 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
1649 u8 res = 0, count = 0, ret = 0;
1650 #ifdef CONFIG_WOWLAN
1651 u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0};
1652
1653 DBG_871X("AOACRsvdPageLoc: RWC=%d ArpRsp=%d NbrAdv=%d GtkRsp=%d GtkInfo=%d ProbeReq=%d NetworkList=%d\n",
1654 rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp,
1655 rsvdpageloc->LocNbrAdv, rsvdpageloc->LocGTKRsp,
1656 rsvdpageloc->LocGTKInfo, rsvdpageloc->LocProbeReq,
1657 rsvdpageloc->LocNetList);
1658
1659 if (check_fwstate(pmlmepriv, _FW_LINKED)) {
1660 SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo);
1661 SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp);
1662 //SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, rsvdpageloc->LocNbrAdv);
1663 SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp);
1664 SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo);
1665 #ifdef CONFIG_GTK_OL
1666 SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM);
1667 #endif // CONFIG_GTK_OL
1668 ret = rtw_hal_fill_h2c_cmd(padapter,
1669 H2C_AOAC_RSVD_PAGE,
1670 H2C_AOAC_RSVDPAGE_LOC_LEN,
1671 u1H2CAoacRsvdPageParm);
1672 }
1673 #ifdef CONFIG_PNO_SUPPORT
1674 else
1675 {
1676
1677 if(!pwrpriv->pno_in_resume) {
1678 DBG_871X("NLO_INFO=%d\n", rsvdpageloc->LocPNOInfo);
1679 _rtw_memset(&u1H2CAoacRsvdPageParm, 0,
1680 sizeof(u1H2CAoacRsvdPageParm));
1681 SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm,
1682 rsvdpageloc->LocPNOInfo);
1683 ret = rtw_hal_fill_h2c_cmd(padapter,
1684 H2C_AOAC_RSVDPAGE3,
1685 H2C_AOAC_RSVDPAGE_LOC_LEN,
1686 u1H2CAoacRsvdPageParm);
1687 }
1688 }
1689 #endif //CONFIG_PNO_SUPPORT
1690 #endif // CONFIG_WOWLAN
1691 }
1692
1693 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
rtw_hal_force_enable_rxdma(_adapter * adapter)1694 static void rtw_hal_force_enable_rxdma(_adapter *adapter)
1695 {
1696 DBG_871X("%s: Set 0x690=0x00\n", __func__);
1697 rtw_write8(adapter, REG_WOW_CTRL,
1698 (rtw_read8(adapter, REG_WOW_CTRL)&0xf0));
1699 DBG_871X_LEVEL(_drv_always_, "%s: Release RXDMA\n", __func__);
1700 rtw_write32(adapter, REG_RXPKT_NUM,
1701 (rtw_read32(adapter,REG_RXPKT_NUM)&(~RW_RELEASE_EN)));
1702 }
1703
rtw_hal_disable_tx_report(_adapter * adapter)1704 static void rtw_hal_disable_tx_report(_adapter *adapter)
1705 {
1706 rtw_write8(adapter, REG_TX_RPT_CTRL,
1707 ((rtw_read8(adapter, REG_TX_RPT_CTRL)&~BIT(1)))&~BIT(5));
1708 DBG_871X("disable TXRPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL));
1709 }
1710
rtw_hal_enable_tx_report(_adapter * adapter)1711 static void rtw_hal_enable_tx_report(_adapter *adapter)
1712 {
1713 rtw_write8(adapter, REG_TX_RPT_CTRL,
1714 ((rtw_read8(adapter, REG_TX_RPT_CTRL)|BIT(1)))|BIT(5));
1715 DBG_871X("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL));
1716 }
1717
rtw_hal_release_rx_dma(_adapter * adapter)1718 static void rtw_hal_release_rx_dma(_adapter *adapter)
1719 {
1720 u32 val32 = 0;
1721
1722 val32 = rtw_read32(adapter, REG_RXPKT_NUM);
1723
1724 rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
1725
1726 DBG_871X("%s, [0x%04x]: 0x%08x\n",
1727 __func__, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
1728 }
1729
rtw_hal_pause_rx_dma(_adapter * adapter)1730 static u8 rtw_hal_pause_rx_dma(_adapter *adapter)
1731 {
1732 u8 ret = 0;
1733 s8 trycnt = 100;
1734 u16 len = 0;
1735 u32 tmp = 0;
1736 int res = 0;
1737 //RX DMA stop
1738 DBG_871X_LEVEL(_drv_always_, "Pause DMA\n");
1739 rtw_write32(adapter, REG_RXPKT_NUM,
1740 (rtw_read32(adapter,REG_RXPKT_NUM)|RW_RELEASE_EN));
1741 do{
1742 if((rtw_read32(adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) {
1743 DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n");
1744 ret = _SUCCESS;
1745 break;
1746 }
1747 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
1748 else {
1749 // If RX_DMA is not idle, receive one pkt from DMA
1750 res = sdio_local_read(adapter,
1751 SDIO_REG_RX0_REQ_LEN, 4, (u8*)&tmp);
1752 len = le16_to_cpu(tmp);
1753 DBG_871X_LEVEL(_drv_always_, "RX len:%d\n", len);
1754
1755 if (len > 0)
1756 res = RecvOnePkt(adapter, len);
1757 else
1758 DBG_871X_LEVEL(_drv_always_, "read length fail %d\n", len);
1759
1760 DBG_871X_LEVEL(_drv_always_,
1761 "RecvOnePkt Result: %d\n", res);
1762 }
1763 #endif //CONFIG_SDIO_HCI || CONFIG_GSPI_HCI
1764 #ifdef CONFIG_USB_HCI
1765 else {
1766 if (adapter->intf_start)
1767 adapter->intf_start(adapter);
1768 tmp = rtw_read32(adapter, REG_RXPKT_NUM) & RXDMA_IDLE;
1769 if (tmp) {
1770 if (adapter->intf_stop)
1771 adapter->intf_stop(adapter);
1772 RTW_ENABLE_FUNC(adapter, DF_RX_BIT);
1773 RTW_ENABLE_FUNC(adapter, DF_TX_BIT);
1774 }
1775 }
1776 #endif
1777 }while(trycnt--);
1778
1779 if (trycnt < 0) {
1780 tmp = rtw_read16(adapter, REG_RXPKT_NUM + 3);
1781
1782 DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed......\n");
1783 DBG_871X_LEVEL(_drv_always_, "%s, RXPKT_NUM: 0x%04x\n",
1784 __func__, tmp);
1785 tmp = rtw_read16(adapter, REG_RXPKT_NUM + 2);
1786 if (tmp & BIT(3))
1787 DBG_871X_LEVEL(_drv_always_, "%s, RX DMA has req\n",
1788 __func__);
1789 else
1790 DBG_871X_LEVEL(_drv_always_, "%s, RX DMA no req\n",
1791 __func__);
1792 ret = _FAIL;
1793 }
1794
1795 return ret;
1796 }
1797
1798 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_hal_enable_cpwm2(_adapter * adapter)1799 static u8 rtw_hal_enable_cpwm2(_adapter* adapter)
1800 {
1801 u8 ret = 0;
1802 int res = 0;
1803 u32 tmp = 0;
1804
1805 DBG_871X_LEVEL(_drv_always_, "%s\n", __func__);
1806
1807 res = sdio_local_read(adapter, SDIO_REG_HIMR, 4, (u8*)&tmp);
1808 if (!res)
1809 DBG_871X_LEVEL(_drv_info_, "read SDIO_REG_HIMR: 0x%08x\n", tmp);
1810 else
1811 DBG_871X_LEVEL(_drv_info_, "sdio_local_read fail\n");
1812
1813 tmp = SDIO_HIMR_CPWM2_MSK;
1814
1815 res = sdio_local_write(adapter, SDIO_REG_HIMR, 4, (u8*)&tmp);
1816
1817 if (!res){
1818 res = sdio_local_read(adapter, SDIO_REG_HIMR, 4, (u8*)&tmp);
1819 DBG_871X_LEVEL(_drv_info_, "read again SDIO_REG_HIMR: 0x%08x\n", tmp);
1820 ret = _SUCCESS;
1821 }else {
1822 DBG_871X_LEVEL(_drv_info_, "sdio_local_write fail\n");
1823 ret = _FAIL;
1824 }
1825
1826 return ret;
1827 }
1828 #endif /* CONFIG_SDIO_HCI, CONFIG_GSPI_HCI */
1829 #endif /* CONFIG_WOWLAN || CONFIG_AP_WOWLAN */
1830
1831 #ifdef CONFIG_WOWLAN
1832 /*
1833 * rtw_hal_check_wow_ctrl
1834 * chk_type: _TRUE means to check enable, if 0x690 & bit1, WOW enable successful
1835 * _FALSE means to check disable, if 0x690 & bit1, WOW disable fail
1836 */
rtw_hal_check_wow_ctrl(_adapter * adapter,u8 chk_type)1837 static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
1838 {
1839 u8 mstatus = 0;
1840 u8 trycnt = 25;
1841 u8 res = _FALSE;
1842
1843 mstatus = rtw_read8(adapter, REG_WOW_CTRL);
1844 DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus);
1845
1846 if (chk_type) {
1847 while (!(mstatus&BIT1) && trycnt > 1) {
1848 mstatus = rtw_read8(adapter, REG_WOW_CTRL);
1849 DBG_871X_LEVEL(_drv_always_,
1850 "Loop index: %d :0x%02x\n",
1851 trycnt, mstatus);
1852 trycnt--;
1853 rtw_msleep_os(20);
1854 }
1855 if (mstatus & BIT1)
1856 res = _TRUE;
1857 else
1858 res = _FALSE;
1859 } else {
1860 while (mstatus&BIT1 && trycnt > 1) {
1861 mstatus = rtw_read8(adapter, REG_WOW_CTRL);
1862 DBG_871X_LEVEL(_drv_always_,
1863 "Loop index: %d :0x%02x\n",
1864 trycnt, mstatus);
1865 trycnt--;
1866 rtw_msleep_os(20);
1867 }
1868
1869 if (mstatus & BIT1)
1870 res = _FALSE;
1871 else
1872 res = _TRUE;
1873 }
1874 DBG_871X_LEVEL(_drv_always_, "%s check_type: %d res: %d trycnt: %d\n",
1875 __func__, chk_type, res, (25 - trycnt));
1876 return res;
1877 }
1878
1879 #ifdef CONFIG_PNO_SUPPORT
rtw_hal_check_pno_enabled(_adapter * adapter)1880 static u8 rtw_hal_check_pno_enabled(_adapter *adapter)
1881 {
1882 struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
1883 u8 res = 0, count = 0;
1884 u8 ret = _FALSE;
1885
1886 if (ppwrpriv->wowlan_pno_enable && ppwrpriv->pno_in_resume == _FALSE) {
1887 res = rtw_read8(adapter, REG_PNO_STATUS);
1888 while (!(res&BIT(7)) && count < 25) {
1889 DBG_871X("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n",
1890 count, res);
1891 res = rtw_read8(adapter, REG_PNO_STATUS);
1892 count++;
1893 rtw_msleep_os(2);
1894 }
1895 if (res & BIT(7))
1896 ret = _TRUE;
1897 else
1898 ret = _FALSE;
1899 DBG_871X("cmd: 0x81 REG_PNO_STATUS: ret(%d)\n", ret);
1900 }
1901 return ret;
1902 }
1903 #endif
1904
rtw_hal_backup_rate(_adapter * adapter)1905 static void rtw_hal_backup_rate(_adapter *adapter)
1906 {
1907 DBG_871X("%s\n", __func__);
1908 /* backup data rate to register 0x8b for wowlan FW */
1909 rtw_write8(adapter, 0x8d, 1);
1910 rtw_write8(adapter, 0x8c, 0);
1911 rtw_write8(adapter, 0x8f, 0x40);
1912 rtw_write8(adapter, 0x8b, rtw_read8(adapter, 0x2f0));
1913 }
1914
1915 #ifdef CONFIG_GTK_OL
rtw_hal_fw_sync_cam_id(_adapter * adapter)1916 static void rtw_hal_fw_sync_cam_id(_adapter *adapter)
1917 {
1918 struct security_priv *psecuritypriv = &adapter->securitypriv;
1919 u8 null_addr[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
1920 int cam_id;
1921 u32 algorithm = 0;
1922 u16 ctrl = 0;
1923 u8 *addr;
1924 u8 index = 0;
1925 u8 get_key[16];
1926
1927 addr = get_bssid(&adapter->mlmepriv);
1928
1929 if (addr == NULL) {
1930 DBG_871X("%s: get bssid MAC addr fail!!\n", __func__);
1931 return;
1932 }
1933
1934 do{
1935 cam_id = rtw_camid_search(adapter, addr, index, -1);
1936 if (cam_id == -1) {
1937 DBG_871X("%s: cam_id: %d, key_id:%d\n",
1938 __func__, cam_id, index);
1939 } else if (rtw_camid_is_gk(adapter, cam_id) != _TRUE) {
1940 DBG_871X("%s: cam_id: %d key_id(%d) is not GK\n",
1941 __func__, cam_id, index);
1942 } else {
1943 rtw_sec_read_cam_ent(adapter, cam_id, NULL, NULL, get_key);
1944 algorithm = psecuritypriv->dot11PrivacyAlgrthm;
1945 ctrl = BIT(15) | BIT6 |(algorithm << 2) | index;
1946 write_cam(adapter, index, ctrl, addr, get_key);
1947 ctrl = 0;
1948 write_cam(adapter, cam_id, ctrl, null_addr, get_key);
1949 }
1950 index++;
1951 }while(index < 4);
1952
1953 rtw_write8(adapter, REG_SECCFG, 0xcc);
1954 }
1955
rtw_hal_update_gtk_offload_info(_adapter * adapter)1956 static void rtw_hal_update_gtk_offload_info(_adapter *adapter)
1957 {
1958 struct security_priv *psecuritypriv = &adapter->securitypriv;
1959 u8 default_cam_id = 0;
1960 u8 cam_id=5;
1961 u8 *addr;
1962 u8 null_addr[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
1963 u8 gtk_keyindex=0;
1964 u8 get_key[16];
1965 u8 index = 1;
1966 u16 ctrl = 0;
1967 u32 algorithm = 0;
1968
1969 addr = get_bssid(&adapter->mlmepriv);
1970
1971 if (addr == NULL) {
1972 DBG_871X("%s: get bssid MAC addr fail!!\n", __func__);
1973 return;
1974 }
1975
1976 _rtw_memset(get_key, 0, sizeof(get_key));
1977
1978 algorithm = psecuritypriv->dot11PrivacyAlgrthm;
1979
1980 if(psecuritypriv->binstallKCK_KEK == _TRUE) {
1981
1982 //read gtk key index
1983 gtk_keyindex = rtw_read8(adapter, 0x48c);
1984 do{
1985 /* chech if GK */
1986 if (rtw_sec_read_cam_is_gk(adapter, default_cam_id) == _TRUE) {
1987 rtw_sec_read_cam_ent(adapter, default_cam_id, NULL, NULL, get_key);
1988 algorithm = psecuritypriv->dot11PrivacyAlgrthm;
1989 /* in default cam entry, cam id = key id */
1990 ctrl = BIT(15) | BIT6 | (algorithm << 2) | default_cam_id;
1991 write_cam(adapter, cam_id, ctrl, addr, get_key);
1992 cam_id++;
1993 ctrl = 0;
1994 write_cam(adapter, default_cam_id, ctrl, null_addr, get_key);
1995 }
1996
1997 if (gtk_keyindex < 4 && (default_cam_id == gtk_keyindex)) {
1998 psecuritypriv->dot118021XGrpKeyid = gtk_keyindex;
1999 _rtw_memcpy(psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey,
2000 get_key, 16);
2001
2002 DBG_871X_LEVEL(_drv_always_, "GTK (%d) = 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
2003 gtk_keyindex,
2004 psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[0],
2005 psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[1],
2006 psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[2],
2007 psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].lkey[3]);
2008 }
2009 default_cam_id++;
2010 } while (default_cam_id < 4);
2011
2012 rtw_write8(adapter, REG_SECCFG, 0x0c);
2013 #ifdef CONFIG_GTK_OL_DBG
2014 //if (gtk_keyindex != 5)
2015 dump_sec_cam(RTW_DBGDUMP, adapter);
2016 #endif
2017 }
2018 }
2019 #endif
2020
rtw_hal_update_tx_iv(_adapter * adapter)2021 static void rtw_hal_update_tx_iv(_adapter *adapter)
2022 {
2023 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
2024 u64 iv_low = 0, iv_high = 0;
2025
2026 // 3.1 read fw iv
2027 iv_low = rtw_read32(adapter, REG_TXPKTBUF_IV_LOW);
2028 //only low two bytes is PN, check AES_IV macro for detail
2029 iv_low &= 0xffff;
2030 iv_high = rtw_read32(adapter, REG_TXPKTBUF_IV_HIGH);
2031 //get the real packet number
2032 pwrctl->wowlan_fw_iv = iv_high << 16 | iv_low;
2033 DBG_871X_LEVEL(_drv_always_,
2034 "fw_iv: 0x%016llx\n", pwrctl->wowlan_fw_iv);
2035 //Update TX iv data.
2036 rtw_set_sec_pn(adapter);
2037 }
2038
rtw_hal_set_keep_alive_cmd(_adapter * adapter,u8 enable,u8 pkt_type)2039 static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type)
2040 {
2041 struct hal_ops *pHalFunc = &adapter->HalFunc;
2042
2043 u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN]={0};
2044 u8 adopt = 1, check_period = 5;
2045 u8 ret = _FAIL;
2046
2047 DBG_871X("%s(): enable = %d\n", __func__, enable);
2048 SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, enable);
2049 SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt);
2050 SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type);
2051 SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period);
2052
2053 ret = rtw_hal_fill_h2c_cmd(adapter,
2054 H2C_KEEP_ALIVE,
2055 H2C_KEEP_ALIVE_CTRL_LEN,
2056 u1H2CKeepAliveParm);
2057
2058 return ret;
2059 }
2060
rtw_hal_set_disconnect_decision_cmd(_adapter * adapter,u8 enable)2061 static u8 rtw_hal_set_disconnect_decision_cmd(_adapter *adapter, u8 enable)
2062 {
2063 struct hal_ops *pHalFunc = &adapter->HalFunc;
2064 u8 u1H2CDisconDecisionParm[H2C_DISCON_DECISION_LEN]={0};
2065 u8 adopt = 1, check_period = 10, trypkt_num = 0;
2066 u8 ret = _FAIL;
2067
2068 DBG_871X("%s(): enable = %d\n", __func__, enable);
2069 SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, enable);
2070 SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt);
2071 SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period);
2072 SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num);
2073
2074 ret = rtw_hal_fill_h2c_cmd(adapter,
2075 H2C_DISCON_DECISION,
2076 H2C_DISCON_DECISION_LEN,
2077 u1H2CDisconDecisionParm);
2078 return ret;
2079 }
2080
rtw_hal_set_wowlan_ctrl_cmd(_adapter * adapter,u8 enable,u8 change_unit)2081 static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_unit)
2082 {
2083 struct security_priv *psecpriv = &adapter->securitypriv;
2084 struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
2085 struct hal_ops *pHalFunc = &adapter->HalFunc;
2086
2087 u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN]={0};
2088 u8 discont_wake = 1, gpionum = 0, gpio_dur = 0;
2089 u8 hw_unicast = 0, gpio_pulse_cnt = 0, gpio_pulse_en = 0;
2090 u8 sdio_wakeup_enable = 1;
2091 u8 gpio_high_active = 0;
2092 u8 pattern_en = 0;
2093 u8 magic_pkt = 0;
2094 u8 gpio_unit = 0; /*0: 64ns, 1: 8ms*/
2095 u8 ret = _FAIL;
2096
2097 #ifdef CONFIG_GPIO_WAKEUP
2098 gpio_high_active = ppwrpriv->is_high_active;
2099 gpionum = WAKEUP_GPIO_IDX;
2100 sdio_wakeup_enable = 0;
2101 #endif //CONFIG_GPIO_WAKEUP
2102
2103 if (!ppwrpriv->wowlan_pno_enable)
2104 magic_pkt = enable;
2105
2106 if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_)
2107 hw_unicast = 1;
2108 else
2109 hw_unicast = 0;
2110
2111 if (ppwrpriv->wowlan_pattern) {
2112 if (enable)
2113 pattern_en = 1;
2114 else
2115 pattern_en = 0;
2116 }
2117
2118 DBG_871X("%s(): enable=%d change_unit=%d\n", __func__,
2119 enable, change_unit);
2120
2121 /* time = (gpio_dur/2) * gpio_unit, default:256 ms */
2122 if (enable && change_unit) {
2123 gpio_dur = 0x40;
2124 gpio_unit = 1;
2125 gpio_pulse_en = 1;
2126 }
2127
2128 #ifdef CONFIG_PLATFORM_ARM_RK3188
2129 if (enable) {
2130 gpio_pulse_en = 1;
2131 gpio_pulse_cnt = 0x04;
2132 }
2133 #endif
2134
2135 SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, enable);
2136 SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, pattern_en);
2137 SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt);
2138 SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast);
2139 SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0);
2140 SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active);
2141
2142 #ifdef CONFIG_GTK_OL
2143 if (enable == _TRUE) {
2144 /* GTK rekey only for AES, if GTK rekey is TKIP, then wake up*/
2145 if (psecpriv->dot118021XGrpPrivacy == _AES_)
2146 SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 0);
2147 else if (psecpriv->dot118021XGrpPrivacy == _TKIP_)
2148 SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1);
2149 }
2150 #else
2151 SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, enable);
2152 #endif
2153 SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(u1H2CWoWlanCtrlParm, discont_wake);
2154 SET_H2CCMD_WOWLAN_GPIONUM(u1H2CWoWlanCtrlParm, gpionum);
2155 SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(u1H2CWoWlanCtrlParm, sdio_wakeup_enable);
2156
2157 SET_H2CCMD_WOWLAN_GPIO_DURATION(u1H2CWoWlanCtrlParm, gpio_dur);
2158 SET_H2CCMD_WOWLAN_CHANGE_UNIT(u1H2CWoWlanCtrlParm, gpio_unit);
2159
2160 SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(u1H2CWoWlanCtrlParm, gpio_pulse_en);
2161 SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(u1H2CWoWlanCtrlParm, gpio_pulse_cnt);
2162
2163 ret = rtw_hal_fill_h2c_cmd(adapter,
2164 H2C_WOWLAN,
2165 H2C_WOWLAN_LEN,
2166 u1H2CWoWlanCtrlParm);
2167 return ret;
2168 }
2169
rtw_hal_set_remote_wake_ctrl_cmd(_adapter * adapter,u8 enable)2170 static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable)
2171 {
2172 struct hal_ops *pHalFunc = &adapter->HalFunc;
2173 struct security_priv* psecuritypriv=&(adapter->securitypriv);
2174 struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
2175 u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN]={0};
2176 u8 ret = _FAIL, count = 0;
2177
2178 DBG_871X("%s(): enable=%d\n", __func__, enable);
2179
2180 if (!ppwrpriv->wowlan_pno_enable) {
2181 SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
2182 u1H2CRemoteWakeCtrlParm, enable);
2183 SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(
2184 u1H2CRemoteWakeCtrlParm, 1);
2185 #ifdef CONFIG_GTK_OL
2186 if (psecuritypriv->binstallKCK_KEK == _TRUE &&
2187 psecuritypriv->dot11PrivacyAlgrthm == _AES_) {
2188 SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
2189 u1H2CRemoteWakeCtrlParm, 1);
2190 } else {
2191 DBG_871X("no kck or security is not AES\n");
2192 SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
2193 u1H2CRemoteWakeCtrlParm, 0);
2194 }
2195 #endif //CONFIG_GTK_OL
2196
2197 SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(
2198 u1H2CRemoteWakeCtrlParm,
2199 !ppwrpriv->wowlan_pattern);
2200
2201 /*
2202 * filter NetBios name service pkt to avoid being waked-up
2203 * by this kind of unicast pkt this exceptional modification
2204 * is used for match competitor's behavior
2205 */
2206 SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(
2207 u1H2CRemoteWakeCtrlParm, !ppwrpriv->wowlan_pattern);
2208
2209 if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) ||
2210 (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) {
2211 SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
2212 u1H2CRemoteWakeCtrlParm, 0);
2213 } else {
2214 SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
2215 u1H2CRemoteWakeCtrlParm, 1);
2216 }
2217
2218 SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(
2219 u1H2CRemoteWakeCtrlParm, 1);
2220 }
2221 #ifdef CONFIG_PNO_SUPPORT
2222 else {
2223 SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
2224 u1H2CRemoteWakeCtrlParm, enable);
2225 SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(
2226 u1H2CRemoteWakeCtrlParm, enable);
2227 }
2228 #endif
2229
2230 #ifdef CONFIG_P2P_WOWLAN
2231 if (_TRUE == ppwrpriv->wowlan_p2p_mode)
2232 {
2233 DBG_871X("P2P OFFLOAD ENABLE\n");
2234 SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm,1);
2235 }
2236 else
2237 {
2238 DBG_871X("P2P OFFLOAD DISABLE\n");
2239 SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm,0);
2240 }
2241 #endif //CONFIG_P2P_WOWLAN
2242
2243
2244 ret = rtw_hal_fill_h2c_cmd(adapter,
2245 H2C_REMOTE_WAKE_CTRL,
2246 H2C_REMOTE_WAKE_CTRL_LEN,
2247 u1H2CRemoteWakeCtrlParm);
2248 return ret;
2249 }
2250
rtw_hal_set_global_info_cmd(_adapter * adapter,u8 group_alg,u8 pairwise_alg)2251 static u8 rtw_hal_set_global_info_cmd(_adapter* adapter, u8 group_alg, u8 pairwise_alg)
2252 {
2253 struct hal_ops *pHalFunc = &adapter->HalFunc;
2254 u8 ret = _FAIL;
2255 u8 u1H2CAOACGlobalInfoParm[H2C_AOAC_GLOBAL_INFO_LEN]={0};
2256
2257 DBG_871X("%s(): group_alg=%d pairwise_alg=%d\n",
2258 __func__, group_alg, pairwise_alg);
2259 SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(u1H2CAOACGlobalInfoParm,
2260 pairwise_alg);
2261 SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(u1H2CAOACGlobalInfoParm,
2262 group_alg);
2263
2264 ret = rtw_hal_fill_h2c_cmd(adapter,
2265 H2C_AOAC_GLOBAL_INFO,
2266 H2C_AOAC_GLOBAL_INFO_LEN,
2267 u1H2CAOACGlobalInfoParm);
2268
2269 return ret;
2270 }
2271
2272 #ifdef CONFIG_PNO_SUPPORT
rtw_hal_set_scan_offload_info_cmd(_adapter * adapter,PRSVDPAGE_LOC rsvdpageloc,u8 enable)2273 static u8 rtw_hal_set_scan_offload_info_cmd(_adapter* adapter,
2274 PRSVDPAGE_LOC rsvdpageloc, u8 enable)
2275 {
2276 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
2277 struct hal_ops *pHalFunc = &adapter->HalFunc;
2278
2279 u8 u1H2CScanOffloadInfoParm[H2C_SCAN_OFFLOAD_CTRL_LEN]={0};
2280 u8 res = 0, count = 0, ret = _FAIL;
2281
2282 DBG_871X("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n",
2283 __func__, rsvdpageloc->LocProbePacket,
2284 rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo);
2285
2286 SET_H2CCMD_AOAC_NLO_FUN_EN(u1H2CScanOffloadInfoParm, enable);
2287 SET_H2CCMD_AOAC_NLO_IPS_EN(u1H2CScanOffloadInfoParm, enable);
2288 SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(u1H2CScanOffloadInfoParm,
2289 rsvdpageloc->LocScanInfo);
2290 SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(u1H2CScanOffloadInfoParm,
2291 rsvdpageloc->LocProbePacket);
2292 SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(u1H2CScanOffloadInfoParm,
2293 rsvdpageloc->LocSSIDInfo);
2294
2295 ret = rtw_hal_fill_h2c_cmd(adapter,
2296 H2C_D0_SCAN_OFFLOAD_INFO,
2297 H2C_SCAN_OFFLOAD_CTRL_LEN,
2298 u1H2CScanOffloadInfoParm);
2299 return ret;
2300 }
2301 #endif //CONFIG_PNO_SUPPORT
2302
rtw_hal_set_fw_wow_related_cmd(_adapter * padapter,u8 enable)2303 void rtw_hal_set_fw_wow_related_cmd(_adapter* padapter, u8 enable)
2304 {
2305 struct security_priv *psecpriv = &padapter->securitypriv;
2306 struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter);
2307 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
2308 struct sta_info *psta = NULL;
2309 u16 media_status_rpt;
2310 u8 pkt_type = 0;
2311 u8 ret = _SUCCESS;
2312
2313 DBG_871X_LEVEL(_drv_always_, "+%s()+: enable=%d\n", __func__, enable);
2314 _func_enter_;
2315
2316 rtw_hal_set_wowlan_ctrl_cmd(padapter, enable, _FALSE);
2317
2318 if (enable) {
2319 rtw_hal_set_global_info_cmd(padapter,
2320 psecpriv->dot118021XGrpPrivacy,
2321 psecpriv->dot11PrivacyAlgrthm);
2322
2323 if (!(ppwrpriv->wowlan_pno_enable)) {
2324 rtw_hal_set_disconnect_decision_cmd(padapter, enable);
2325 #ifdef CONFIG_ARP_KEEP_ALIVE
2326 if ((psecpriv->dot11PrivacyAlgrthm == _WEP40_) ||
2327 (psecpriv->dot11PrivacyAlgrthm == _WEP104_))
2328 pkt_type = 0;
2329 else
2330 pkt_type = 1;
2331 #else
2332 pkt_type = 0;
2333 #endif //CONFIG_ARP_KEEP_ALIVE
2334 rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type);
2335 }
2336 rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable);
2337 #ifdef CONFIG_PNO_SUPPORT
2338 rtw_hal_check_pno_enabled(padapter);
2339 #endif //CONFIG_PNO_SUPPORT
2340 } else {
2341 #if 0
2342 {
2343 u32 PageSize = 0;
2344 rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize);
2345 dump_TX_FIFO(padapter, 4, PageSize);
2346 }
2347 #endif
2348
2349 rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable);
2350 }
2351 _func_exit_;
2352 DBG_871X_LEVEL(_drv_always_, "-%s()-\n", __func__);
2353 }
2354 #endif //CONFIG_WOWLAN
2355
2356 #ifdef CONFIG_AP_WOWLAN
rtw_hal_set_ap_wowlan_ctrl_cmd(_adapter * adapter,u8 enable)2357 static u8 rtw_hal_set_ap_wowlan_ctrl_cmd(_adapter *adapter, u8 enable)
2358 {
2359 struct security_priv *psecpriv = &adapter->securitypriv;
2360 struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
2361 struct hal_ops *pHalFunc = &adapter->HalFunc;
2362
2363 u8 u1H2CAPWoWlanCtrlParm[H2C_AP_WOW_GPIO_CTRL_LEN] = {0};
2364 u8 gpionum = 0, gpio_dur = 0;
2365 u8 gpio_pulse = enable;
2366 u8 sdio_wakeup_enable = 1;
2367 u8 gpio_high_active = 0;
2368 u8 ret = _FAIL;
2369
2370 #ifdef CONFIG_GPIO_WAKEUP
2371 gpio_high_active = ppwrpriv->is_high_active;
2372 gpionum = WAKEUP_GPIO_IDX;
2373 sdio_wakeup_enable = 0;
2374 #endif /*CONFIG_GPIO_WAKEUP*/
2375
2376 DBG_871X("%s(): enable=%d\n", __func__, enable);
2377
2378 SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(u1H2CAPWoWlanCtrlParm,
2379 gpionum);
2380 SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(u1H2CAPWoWlanCtrlParm,
2381 gpio_pulse);
2382 SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(u1H2CAPWoWlanCtrlParm,
2383 gpio_high_active);
2384 SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(u1H2CAPWoWlanCtrlParm,
2385 enable);
2386 SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(u1H2CAPWoWlanCtrlParm,
2387 gpio_dur);
2388
2389 ret = rtw_hal_fill_h2c_cmd(adapter,
2390 H2C_AP_WOW_GPIO_CTRL,
2391 H2C_AP_WOW_GPIO_CTRL_LEN,
2392 u1H2CAPWoWlanCtrlParm);
2393
2394 return ret;
2395 }
2396
rtw_hal_set_ap_offload_ctrl_cmd(_adapter * adapter,u8 enable)2397 static u8 rtw_hal_set_ap_offload_ctrl_cmd(_adapter *adapter, u8 enable)
2398 {
2399 struct hal_ops *pHalFunc = &adapter->HalFunc;
2400 u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN] = {0};
2401 u8 ret = _FAIL;
2402
2403 DBG_871X("%s(): bFuncEn=%d\n", __func__, enable);
2404
2405 SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, enable);
2406
2407 ret = rtw_hal_fill_h2c_cmd(adapter,
2408 H2C_AP_OFFLOAD,
2409 H2C_AP_OFFLOAD_LEN,
2410 u1H2CAPOffloadCtrlParm);
2411
2412 return ret;
2413 }
2414
rtw_hal_set_ap_ps_cmd(_adapter * adapter,u8 enable)2415 static u8 rtw_hal_set_ap_ps_cmd(_adapter *adapter, u8 enable)
2416 {
2417 struct hal_ops *pHalFunc = &adapter->HalFunc;
2418 u8 ap_ps_parm[H2C_AP_PS_LEN] = {0};
2419 u8 ret = _FAIL;
2420
2421 DBG_871X("%s(): enable=%d\n" , __func__ , enable);
2422
2423 SET_H2CCMD_AP_WOW_PS_EN(ap_ps_parm, enable);
2424 #ifndef CONFIG_USB_HCI
2425 SET_H2CCMD_AP_WOW_PS_32K_EN(ap_ps_parm, enable);
2426 #endif /*CONFIG_USB_HCI*/
2427 SET_H2CCMD_AP_WOW_PS_RF(ap_ps_parm, enable);
2428
2429 if (enable)
2430 SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x32);
2431 else
2432 SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x0);
2433
2434 ret = rtw_hal_fill_h2c_cmd(adapter, H2C_SAP_PS_,
2435 H2C_AP_PS_LEN, ap_ps_parm);
2436
2437 return ret;
2438 }
2439
rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter,PRSVDPAGE_LOC rsvdpageloc)2440 static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter,
2441 PRSVDPAGE_LOC rsvdpageloc)
2442 {
2443 struct hal_ops *pHalFunc = &padapter->HalFunc;
2444 u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0};
2445 u8 ret = _FAIL, header = 0;
2446
2447 if (pHalFunc->fill_h2c_cmd == NULL) {
2448 DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__);
2449 return;
2450 }
2451
2452 header = rtw_read8(padapter, REG_BCNQ_BDNY);
2453
2454 DBG_871X("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__,
2455 rsvdpageloc->LocApOffloadBCN,
2456 rsvdpageloc->LocProbeRsp,
2457 header);
2458
2459 SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm,
2460 rsvdpageloc->LocApOffloadBCN + header);
2461
2462 ret = rtw_hal_fill_h2c_cmd(padapter, H2C_BCN_RSVDPAGE,
2463 H2C_BCN_RSVDPAGE_LEN, rsvdparm);
2464
2465 if (ret == _FAIL)
2466 DBG_871X("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__);
2467
2468 rtw_msleep_os(10);
2469
2470 _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm));
2471
2472 SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(rsvdparm,
2473 rsvdpageloc->LocProbeRsp + header);
2474
2475 ret = rtw_hal_fill_h2c_cmd(padapter, H2C_PROBERSP_RSVDPAGE,
2476 H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm);
2477
2478 if (ret == _FAIL)
2479 DBG_871X("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__);
2480
2481 rtw_msleep_os(10);
2482 }
2483
rtw_hal_set_fw_ap_wow_related_cmd(_adapter * padapter,u8 enable)2484 static void rtw_hal_set_fw_ap_wow_related_cmd(_adapter *padapter, u8 enable)
2485 {
2486 rtw_hal_set_ap_offload_ctrl_cmd(padapter, enable);
2487 rtw_hal_set_ap_wowlan_ctrl_cmd(padapter, enable);
2488 rtw_hal_set_ap_ps_cmd(padapter, enable);
2489 }
2490
rtw_hal_ap_wow_enable(_adapter * padapter)2491 static void rtw_hal_ap_wow_enable(_adapter *padapter)
2492 {
2493 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
2494 struct security_priv *psecuritypriv = &padapter->securitypriv;
2495 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
2496 struct hal_ops *pHalFunc = &padapter->HalFunc;
2497 struct sta_info *psta = NULL;
2498 #ifdef DBG_CHECK_FW_PS_STATE
2499 struct dvobj_priv *psdpriv = padapter->dvobj;
2500 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
2501 #endif /*DBG_CHECK_FW_PS_STATE*/
2502 int res;
2503 u16 media_status_rpt;
2504
2505 DBG_871X("%s, WOWLAN_AP_ENABLE\n", __func__);
2506 #ifdef DBG_CHECK_FW_PS_STATE
2507 if (rtw_fw_ps_state(padapter) == _FAIL) {
2508 pdbgpriv->dbg_enwow_dload_fw_fail_cnt++;
2509 DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n");
2510 }
2511 #endif /*DBG_CHECK_FW_PS_STATE*/
2512
2513 /* 1. Download WOWLAN FW*/
2514 rtw_hal_fw_dl(padapter, _TRUE);
2515
2516 media_status_rpt = RT_MEDIA_CONNECT;
2517 rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT,
2518 (u8 *)&media_status_rpt);
2519
2520 issue_beacon(padapter, 0);
2521
2522 rtw_msleep_os(2);
2523
2524 if (IS_HARDWARE_TYPE_8188E(padapter))
2525 rtw_hal_disable_tx_report(padapter);
2526
2527 /* RX DMA stop */
2528 res = rtw_hal_pause_rx_dma(padapter);
2529 if (res == _FAIL)
2530 DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n");
2531
2532 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
2533 /* Enable CPWM2 only. */
2534 res = rtw_hal_enable_cpwm2(padapter);
2535 if (res == _FAIL)
2536 DBG_871X_LEVEL(_drv_always_, "[WARNING] enable cpwm2 fail\n");
2537 #endif
2538
2539 #ifdef CONFIG_GPIO_WAKEUP
2540 rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
2541 #endif
2542 /* 5. Set Enable WOWLAN H2C command. */
2543 DBG_871X_LEVEL(_drv_always_, "Set Enable AP WOWLan cmd\n");
2544 rtw_hal_set_fw_ap_wow_related_cmd(padapter, 1);
2545
2546 rtw_write8(padapter, REG_MCUTST_WOWLAN, 0);
2547 #ifdef CONFIG_USB_HCI
2548 if (padapter->intf_stop)
2549 padapter->intf_stop(padapter);
2550 #ifdef CONFIG_CONCURRENT_MODE
2551 if (rtw_buddy_adapter_up(padapter))/*free buddy adapter's resource*/
2552 padapter->pbuddy_adapter->intf_stop(padapter->pbuddy_adapter);
2553 #endif /*CONFIG_CONCURRENT_MODE*/
2554 /* Invoid SE0 reset signal during suspending*/
2555 rtw_write8(padapter, REG_RSV_CTRL, 0x20);
2556 rtw_write8(padapter, REG_RSV_CTRL, 0x60);
2557 #endif /*CONFIG_USB_HCI*/
2558 }
2559
rtw_hal_ap_wow_disable(_adapter * padapter)2560 static void rtw_hal_ap_wow_disable(_adapter *padapter)
2561 {
2562 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
2563 struct hal_ops *pHalFunc = &padapter->HalFunc;
2564 #ifdef DBG_CHECK_FW_PS_STATE
2565 struct dvobj_priv *psdpriv = padapter->dvobj;
2566 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
2567 #endif /*DBG_CHECK_FW_PS_STATE*/
2568 u16 media_status_rpt;
2569 u8 val8;
2570
2571 DBG_871X("%s, WOWLAN_AP_DISABLE\n", __func__);
2572 /* 1. Read wakeup reason*/
2573 pwrctl->wowlan_wake_reason = rtw_read8(padapter, REG_MCUTST_WOWLAN);
2574
2575 DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n",
2576 pwrctl->wowlan_wake_reason);
2577
2578 rtw_hal_set_fw_ap_wow_related_cmd(padapter, 0);
2579
2580 rtw_msleep_os(2);
2581 #ifdef DBG_CHECK_FW_PS_STATE
2582 if (rtw_fw_ps_state(padapter) == _FAIL) {
2583 pdbgpriv->dbg_diswow_dload_fw_fail_cnt++;
2584 DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n");
2585 }
2586 #endif /*DBG_CHECK_FW_PS_STATE*/
2587
2588 if (IS_HARDWARE_TYPE_8188E(padapter))
2589 rtw_hal_enable_tx_report(padapter);
2590
2591 rtw_hal_force_enable_rxdma(padapter);
2592
2593 rtw_hal_fw_dl(padapter, _FALSE);
2594
2595 #ifdef CONFIG_GPIO_WAKEUP
2596 val8 = (pwrctl->is_high_active == 0) ? 1 : 0;
2597 DBG_871X_LEVEL(_drv_always_, "Set Wake GPIO to default(%d).\n", val8);
2598 rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8);
2599 #endif
2600 media_status_rpt = RT_MEDIA_CONNECT;
2601
2602 rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT,
2603 (u8 *)&media_status_rpt);
2604
2605 issue_beacon(padapter, 0);
2606 }
2607 #endif /*CONFIG_AP_WOWLAN*/
2608
2609 #ifdef CONFIG_P2P_WOWLAN
update_hidden_ssid(u8 * ies,u32 ies_len,u8 hidden_ssid_mode)2610 static int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode)
2611 {
2612 u8 *ssid_ie;
2613 sint ssid_len_ori;
2614 int len_diff = 0;
2615
2616 ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len);
2617
2618 //DBG_871X("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori);
2619
2620 if(ssid_ie && ssid_len_ori>0)
2621 {
2622 switch(hidden_ssid_mode)
2623 {
2624 case 1:
2625 {
2626 u8 *next_ie = ssid_ie + 2 + ssid_len_ori;
2627 u32 remain_len = 0;
2628
2629 remain_len = ies_len -(next_ie-ies);
2630
2631 ssid_ie[1] = 0;
2632 _rtw_memcpy(ssid_ie+2, next_ie, remain_len);
2633 len_diff -= ssid_len_ori;
2634
2635 break;
2636 }
2637 case 2:
2638 _rtw_memset(&ssid_ie[2], 0, ssid_len_ori);
2639 break;
2640 default:
2641 break;
2642 }
2643 }
2644
2645 return len_diff;
2646 }
2647
rtw_hal_construct_P2PBeacon(_adapter * padapter,u8 * pframe,u32 * pLength)2648 static void rtw_hal_construct_P2PBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
2649 {
2650 //struct xmit_frame *pmgntframe;
2651 //struct pkt_attrib *pattrib;
2652 //unsigned char *pframe;
2653 struct rtw_ieee80211_hdr *pwlanhdr;
2654 unsigned short *fctrl;
2655 unsigned int rate_len;
2656 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
2657 u32 pktlen;
2658 //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2659 // _irqL irqL;
2660 // struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
2661 //#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2662 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
2663 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
2664 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2665 WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
2666 u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
2667 #ifdef CONFIG_P2P
2668 struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
2669 #endif //CONFIG_P2P
2670
2671 //for debug
2672 u8 *dbgbuf = pframe;
2673 u8 dbgbufLen = 0, index = 0;
2674
2675 DBG_871X("%s\n", __FUNCTION__);
2676 //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2677 // _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
2678 //#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2679
2680 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
2681
2682
2683 fctrl = &(pwlanhdr->frame_ctl);
2684 *(fctrl) = 0;
2685
2686 _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
2687 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
2688 _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
2689
2690 SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
2691 //pmlmeext->mgnt_seq++;
2692 SetFrameSubType(pframe, WIFI_BEACON);
2693
2694 pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
2695 pktlen = sizeof (struct rtw_ieee80211_hdr_3addr);
2696
2697 if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
2698 {
2699 //DBG_871X("ie len=%d\n", cur_network->IELength);
2700 #ifdef CONFIG_P2P
2701 // for P2P : Primary Device Type & Device Name
2702 u32 wpsielen=0, insert_len=0;
2703 u8 *wpsie=NULL;
2704 wpsie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen);
2705
2706 if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen>0)
2707 {
2708 uint wps_offset, remainder_ielen;
2709 u8 *premainder_ie, *pframe_wscie;
2710
2711 wps_offset = (uint)(wpsie - cur_network->IEs);
2712
2713 premainder_ie = wpsie + wpsielen;
2714
2715 remainder_ielen = cur_network->IELength - wps_offset - wpsielen;
2716
2717 #ifdef CONFIG_IOCTL_CFG80211
2718 if(pwdinfo->driver_interface == DRIVER_CFG80211 )
2719 {
2720 if(pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len>0)
2721 {
2722 _rtw_memcpy(pframe, cur_network->IEs, wps_offset);
2723 pframe += wps_offset;
2724 pktlen += wps_offset;
2725
2726 _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len);
2727 pframe += pmlmepriv->wps_beacon_ie_len;
2728 pktlen += pmlmepriv->wps_beacon_ie_len;
2729
2730 //copy remainder_ie to pframe
2731 _rtw_memcpy(pframe, premainder_ie, remainder_ielen);
2732 pframe += remainder_ielen;
2733 pktlen += remainder_ielen;
2734 }
2735 else
2736 {
2737 _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
2738 pframe += cur_network->IELength;
2739 pktlen += cur_network->IELength;
2740 }
2741 }
2742 else
2743 #endif //CONFIG_IOCTL_CFG80211
2744 {
2745 pframe_wscie = pframe + wps_offset;
2746 _rtw_memcpy(pframe, cur_network->IEs, wps_offset+wpsielen);
2747 pframe += (wps_offset + wpsielen);
2748 pktlen += (wps_offset + wpsielen);
2749
2750 //now pframe is end of wsc ie, insert Primary Device Type & Device Name
2751 // Primary Device Type
2752 // Type:
2753 *(u16*) ( pframe + insert_len) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE );
2754 insert_len += 2;
2755
2756 // Length:
2757 *(u16*) ( pframe + insert_len ) = cpu_to_be16( 0x0008 );
2758 insert_len += 2;
2759
2760 // Value:
2761 // Category ID
2762 *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA );
2763 insert_len += 2;
2764
2765 // OUI
2766 *(u32*) ( pframe + insert_len ) = cpu_to_be32( WPSOUI );
2767 insert_len += 4;
2768
2769 // Sub Category ID
2770 *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER );
2771 insert_len += 2;
2772
2773
2774 // Device Name
2775 // Type:
2776 *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
2777 insert_len += 2;
2778
2779 // Length:
2780 *(u16*) ( pframe + insert_len ) = cpu_to_be16( pwdinfo->device_name_len );
2781 insert_len += 2;
2782
2783 // Value:
2784 _rtw_memcpy( pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len );
2785 insert_len += pwdinfo->device_name_len;
2786
2787
2788 //update wsc ie length
2789 *(pframe_wscie+1) = (wpsielen -2) + insert_len;
2790
2791 //pframe move to end
2792 pframe+=insert_len;
2793 pktlen += insert_len;
2794
2795 //copy remainder_ie to pframe
2796 _rtw_memcpy(pframe, premainder_ie, remainder_ielen);
2797 pframe += remainder_ielen;
2798 pktlen += remainder_ielen;
2799 }
2800 }
2801 else
2802 #endif //CONFIG_P2P
2803 {
2804 int len_diff;
2805 _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
2806 len_diff = update_hidden_ssid(
2807 pframe+_BEACON_IE_OFFSET_
2808 , cur_network->IELength-_BEACON_IE_OFFSET_
2809 , pmlmeinfo->hidden_ssid_mode
2810 );
2811 pframe += (cur_network->IELength+len_diff);
2812 pktlen += (cur_network->IELength+len_diff);
2813 }
2814 #if 0
2815 {
2816 u8 *wps_ie;
2817 uint wps_ielen;
2818 u8 sr = 0;
2819 wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr+TXDESC_OFFSET+sizeof (struct rtw_ieee80211_hdr_3addr)+_BEACON_IE_OFFSET_,
2820 pattrib->pktlen-sizeof (struct rtw_ieee80211_hdr_3addr)-_BEACON_IE_OFFSET_, NULL, &wps_ielen);
2821 if (wps_ie && wps_ielen>0) {
2822 rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL);
2823 }
2824 if (sr != 0)
2825 set_fwstate(pmlmepriv, WIFI_UNDER_WPS);
2826 else
2827 _clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS);
2828 }
2829 #endif
2830 #ifdef CONFIG_P2P
2831 if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO))
2832 {
2833 u32 len;
2834 #ifdef CONFIG_IOCTL_CFG80211
2835 if(pwdinfo->driver_interface == DRIVER_CFG80211 )
2836 {
2837 len = pmlmepriv->p2p_beacon_ie_len;
2838 if(pmlmepriv->p2p_beacon_ie && len>0)
2839 _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len);
2840 }
2841 else
2842 #endif //CONFIG_IOCTL_CFG80211
2843 {
2844 len = build_beacon_p2p_ie(pwdinfo, pframe);
2845 }
2846
2847 pframe += len;
2848 pktlen += len;
2849
2850 #ifdef CONFIG_WFD
2851 len = rtw_append_beacon_wfd_ie(padapter, pframe);
2852 pframe += len;
2853 pktlen += len;
2854 #endif
2855
2856 }
2857 #endif //CONFIG_P2P
2858
2859 goto _issue_bcn;
2860
2861 }
2862
2863 //below for ad-hoc mode
2864
2865 //timestamp will be inserted by hardware
2866 pframe += 8;
2867 pktlen += 8;
2868
2869 // beacon interval: 2 bytes
2870
2871 _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2);
2872
2873 pframe += 2;
2874 pktlen += 2;
2875
2876 // capability info: 2 bytes
2877
2878 _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
2879
2880 pframe += 2;
2881 pktlen += 2;
2882
2883 // SSID
2884 pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
2885
2886 // supported rates...
2887 rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
2888 pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen);
2889
2890 // DS parameter set
2891 pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
2892
2893 //if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
2894 {
2895 u8 erpinfo=0;
2896 u32 ATIMWindow;
2897 // IBSS Parameter Set...
2898 //ATIMWindow = cur->Configuration.ATIMWindow;
2899 ATIMWindow = 0;
2900 pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
2901
2902 //ERP IE
2903 pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pktlen);
2904 }
2905
2906
2907 // EXTERNDED SUPPORTED RATE
2908 if (rate_len > 8)
2909 {
2910 pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
2911 }
2912
2913
2914 //todo:HT for adhoc
2915
2916 _issue_bcn:
2917
2918 //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2919 // pmlmepriv->update_bcn = _FALSE;
2920 //
2921 // _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
2922 //#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
2923
2924 *pLength = pktlen;
2925 #if 0
2926 // printf dbg msg
2927 dbgbufLen = pktlen;
2928 DBG_871X("======> DBG MSG FOR CONSTRAUCT P2P BEACON\n");
2929
2930 for(index=0;index<dbgbufLen;index++)
2931 printk("%x ",*(dbgbuf+index));
2932
2933 printk("\n");
2934 DBG_871X("<====== DBG MSG FOR CONSTRAUCT P2P BEACON\n");
2935
2936 #endif
2937 }
2938
get_reg_classes_full_count(struct p2p_channels channel_list)2939 static int get_reg_classes_full_count(struct p2p_channels channel_list) {
2940 int cnt = 0;
2941 int i;
2942
2943 for (i = 0; i < channel_list.reg_classes; i++) {
2944 cnt += channel_list.reg_class[i].channels;
2945 }
2946
2947 return cnt;
2948 }
2949
rtw_hal_construct_P2PProbeRsp(_adapter * padapter,u8 * pframe,u32 * pLength)2950 static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
2951 {
2952 //struct xmit_frame *pmgntframe;
2953 //struct pkt_attrib *pattrib;
2954 //unsigned char *pframe;
2955 struct rtw_ieee80211_hdr *pwlanhdr;
2956 unsigned short *fctrl;
2957 unsigned char *mac;
2958 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
2959 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
2960 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2961 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
2962 //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
2963 u16 beacon_interval = 100;
2964 u16 capInfo = 0;
2965 struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
2966 u8 wpsie[255] = { 0x00 };
2967 u32 wpsielen = 0, p2pielen = 0;
2968 u32 pktlen;
2969 #ifdef CONFIG_WFD
2970 u32 wfdielen = 0;
2971 #endif
2972 #ifdef CONFIG_INTEL_WIDI
2973 u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 };
2974 #endif //CONFIG_INTEL_WIDI
2975
2976 //for debug
2977 u8 *dbgbuf = pframe;
2978 u8 dbgbufLen = 0, index = 0;
2979
2980 DBG_871X("%s\n", __FUNCTION__);
2981 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
2982
2983 mac = adapter_mac_addr(padapter);
2984
2985 fctrl = &(pwlanhdr->frame_ctl);
2986 *(fctrl) = 0;
2987
2988 //DA filled by FW
2989 _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN);
2990 _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
2991
2992 // Use the device address for BSSID field.
2993 _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN);
2994
2995 SetSeqNum(pwlanhdr, 0);
2996 SetFrameSubType(fctrl, WIFI_PROBERSP);
2997
2998 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
2999 pframe += pktlen;
3000
3001
3002 //timestamp will be inserted by hardware
3003 pframe += 8;
3004 pktlen += 8;
3005
3006 // beacon interval: 2 bytes
3007 _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2);
3008 pframe += 2;
3009 pktlen += 2;
3010
3011 // capability info: 2 bytes
3012 // ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec)
3013 capInfo |= cap_ShortPremble;
3014 capInfo |= cap_ShortSlot;
3015
3016 _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2);
3017 pframe += 2;
3018 pktlen += 2;
3019
3020
3021 // SSID
3022 pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pktlen);
3023
3024 // supported rates...
3025 // Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 )
3026 pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pktlen);
3027
3028 // DS parameter set
3029 pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pktlen);
3030
3031 #ifdef CONFIG_IOCTL_CFG80211
3032 if(pwdinfo->driver_interface == DRIVER_CFG80211 )
3033 {
3034 if( pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL )
3035 {
3036 //WPS IE
3037 _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len);
3038 pktlen += pmlmepriv->wps_probe_resp_ie_len;
3039 pframe += pmlmepriv->wps_probe_resp_ie_len;
3040
3041 //P2P IE
3042 _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len);
3043 pktlen += pmlmepriv->p2p_probe_resp_ie_len;
3044 pframe += pmlmepriv->p2p_probe_resp_ie_len;
3045 }
3046 }
3047 else
3048 #endif //CONFIG_IOCTL_CFG80211
3049 {
3050
3051 // Todo: WPS IE
3052 // Noted by Albert 20100907
3053 // According to the WPS specification, all the WPS attribute is presented by Big Endian.
3054
3055 wpsielen = 0;
3056 // WPS OUI
3057 *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
3058 wpsielen += 4;
3059
3060 // WPS version
3061 // Type:
3062 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
3063 wpsielen += 2;
3064
3065 // Length:
3066 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
3067 wpsielen += 2;
3068
3069 // Value:
3070 wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0
3071
3072 #ifdef CONFIG_INTEL_WIDI
3073 // Commented by Kurt
3074 // Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext.
3075 if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE
3076 || pmlmepriv->num_p2p_sdt != 0 )
3077 {
3078 //Sec dev type
3079 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SEC_DEV_TYPE_LIST );
3080 wpsielen += 2;
3081
3082 // Length:
3083 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 );
3084 wpsielen += 2;
3085
3086 // Value:
3087 // Category ID
3088 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_DISPLAYS );
3089 wpsielen += 2;
3090
3091 // OUI
3092 *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( INTEL_DEV_TYPE_OUI );
3093 wpsielen += 4;
3094
3095 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_WIDI_CONSUMER_SINK );
3096 wpsielen += 2;
3097
3098 if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE )
3099 {
3100 // Vendor Extension
3101 _rtw_memcpy( wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN );
3102 wpsielen += L2SDTA_SERVICE_VE_LEN;
3103 }
3104 }
3105 #endif //CONFIG_INTEL_WIDI
3106
3107 // WiFi Simple Config State
3108 // Type:
3109 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SIMPLE_CONF_STATE );
3110 wpsielen += 2;
3111
3112 // Length:
3113 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
3114 wpsielen += 2;
3115
3116 // Value:
3117 wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; // Not Configured.
3118
3119 // Response Type
3120 // Type:
3121 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_RESP_TYPE );
3122 wpsielen += 2;
3123
3124 // Length:
3125 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
3126 wpsielen += 2;
3127
3128 // Value:
3129 wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X;
3130
3131 // UUID-E
3132 // Type:
3133 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E );
3134 wpsielen += 2;
3135
3136 // Length:
3137 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 );
3138 wpsielen += 2;
3139
3140 // Value:
3141 if (pwdinfo->external_uuid == 0) {
3142 _rtw_memset( wpsie + wpsielen, 0x0, 16 );
3143 _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN);
3144 } else {
3145 _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 );
3146 }
3147 wpsielen += 0x10;
3148
3149 // Manufacturer
3150 // Type:
3151 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MANUFACTURER );
3152 wpsielen += 2;
3153
3154 // Length:
3155 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0007 );
3156 wpsielen += 2;
3157
3158 // Value:
3159 _rtw_memcpy( wpsie + wpsielen, "Realtek", 7 );
3160 wpsielen += 7;
3161
3162 // Model Name
3163 // Type:
3164 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NAME );
3165 wpsielen += 2;
3166
3167 // Length:
3168 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0006 );
3169 wpsielen += 2;
3170
3171 // Value:
3172 _rtw_memcpy( wpsie + wpsielen, "8192CU", 6 );
3173 wpsielen += 6;
3174
3175 // Model Number
3176 // Type:
3177 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NUMBER );
3178 wpsielen += 2;
3179
3180 // Length:
3181 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
3182 wpsielen += 2;
3183
3184 // Value:
3185 wpsie[ wpsielen++ ] = 0x31; // character 1
3186
3187 // Serial Number
3188 // Type:
3189 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SERIAL_NUMBER );
3190 wpsielen += 2;
3191
3192 // Length:
3193 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( ETH_ALEN );
3194 wpsielen += 2;
3195
3196 // Value:
3197 _rtw_memcpy( wpsie + wpsielen, "123456" , ETH_ALEN );
3198 wpsielen += ETH_ALEN;
3199
3200 // Primary Device Type
3201 // Type:
3202 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE );
3203 wpsielen += 2;
3204
3205 // Length:
3206 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 );
3207 wpsielen += 2;
3208
3209 // Value:
3210 // Category ID
3211 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA );
3212 wpsielen += 2;
3213
3214 // OUI
3215 *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI );
3216 wpsielen += 4;
3217
3218 // Sub Category ID
3219 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER );
3220 wpsielen += 2;
3221
3222 // Device Name
3223 // Type:
3224 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
3225 wpsielen += 2;
3226
3227 // Length:
3228 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len );
3229 wpsielen += 2;
3230
3231 // Value:
3232 _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len );
3233 wpsielen += pwdinfo->device_name_len;
3234
3235 // Config Method
3236 // Type:
3237 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD );
3238 wpsielen += 2;
3239
3240 // Length:
3241 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
3242 wpsielen += 2;
3243
3244 // Value:
3245 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
3246 wpsielen += 2;
3247
3248
3249 pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen );
3250
3251
3252 p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe);
3253 pframe += p2pielen;
3254 pktlen += p2pielen;
3255 }
3256
3257 #ifdef CONFIG_WFD
3258 wfdielen = rtw_append_probe_resp_wfd_ie(padapter, pframe);
3259 pframe += wfdielen;
3260 pktlen += wfdielen;
3261 #endif
3262
3263 *pLength = pktlen;
3264
3265 #if 0
3266 // printf dbg msg
3267 dbgbufLen = pktlen;
3268 DBG_871X("======> DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n");
3269
3270 for(index=0;index<dbgbufLen;index++)
3271 printk("%x ",*(dbgbuf+index));
3272
3273 printk("\n");
3274 DBG_871X("<====== DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n");
3275 #endif
3276 }
rtw_hal_construct_P2PNegoRsp(_adapter * padapter,u8 * pframe,u32 * pLength)3277 static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
3278 {
3279 unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
3280 u8 action = P2P_PUB_ACTION_ACTION;
3281 u32 p2poui = cpu_to_be32(P2POUI);
3282 u8 oui_subtype = P2P_GO_NEGO_RESP;
3283 u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 };
3284 u8 p2pielen = 0, i;
3285 uint wpsielen = 0;
3286 u16 wps_devicepassword_id = 0x0000;
3287 uint wps_devicepassword_id_len = 0;
3288 u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh;
3289 u16 len_channellist_attr = 0;
3290 u32 pktlen;
3291 u8 dialogToken = 0;
3292
3293 //struct xmit_frame *pmgntframe;
3294 //struct pkt_attrib *pattrib;
3295 //unsigned char *pframe;
3296 struct rtw_ieee80211_hdr *pwlanhdr;
3297 unsigned short *fctrl;
3298 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
3299 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
3300 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
3301 struct wifidirect_info *pwdinfo = &( padapter->wdinfo);
3302 //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
3303
3304 #ifdef CONFIG_WFD
3305 u32 wfdielen = 0;
3306 #endif
3307
3308 //for debug
3309 u8 *dbgbuf = pframe;
3310 u8 dbgbufLen = 0, index = 0;
3311
3312 DBG_871X( "%s\n", __FUNCTION__);
3313 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
3314
3315 fctrl = &(pwlanhdr->frame_ctl);
3316 *(fctrl) = 0;
3317
3318 //RA, filled by FW
3319 _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN);
3320 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
3321 _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN);
3322
3323 SetSeqNum(pwlanhdr, 0);
3324 SetFrameSubType(pframe, WIFI_ACTION);
3325
3326 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
3327 pframe += pktlen;
3328
3329 pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen));
3330 pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen));
3331 pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen));
3332 pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen));
3333
3334 //dialog token, filled by FW
3335 pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen));
3336
3337 _rtw_memset( wpsie, 0x00, 255 );
3338 wpsielen = 0;
3339
3340 // WPS Section
3341 wpsielen = 0;
3342 // WPS OUI
3343 *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
3344 wpsielen += 4;
3345
3346 // WPS version
3347 // Type:
3348 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
3349 wpsielen += 2;
3350
3351 // Length:
3352 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
3353 wpsielen += 2;
3354
3355 // Value:
3356 wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0
3357
3358 // Device Password ID
3359 // Type:
3360 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID );
3361 wpsielen += 2;
3362
3363 // Length:
3364 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
3365 wpsielen += 2;
3366
3367 // Value:
3368 if ( wps_devicepassword_id == WPS_DPID_USER_SPEC )
3369 {
3370 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC );
3371 }
3372 else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC )
3373 {
3374 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC );
3375 }
3376 else
3377 {
3378 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC );
3379 }
3380 wpsielen += 2;
3381
3382 pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen );
3383
3384
3385 // P2P IE Section.
3386
3387 // P2P OUI
3388 p2pielen = 0;
3389 p2pie[ p2pielen++ ] = 0x50;
3390 p2pie[ p2pielen++ ] = 0x6F;
3391 p2pie[ p2pielen++ ] = 0x9A;
3392 p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0
3393
3394 // Commented by Albert 20100908
3395 // According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes
3396 // 1. Status
3397 // 2. P2P Capability
3398 // 3. Group Owner Intent
3399 // 4. Configuration Timeout
3400 // 5. Operating Channel
3401 // 6. Intended P2P Interface Address
3402 // 7. Channel List
3403 // 8. Device Info
3404 // 9. Group ID ( Only GO )
3405
3406
3407 // ToDo:
3408
3409 // P2P Status
3410 // Type:
3411 p2pie[ p2pielen++ ] = P2P_ATTR_STATUS;
3412
3413 // Length:
3414 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
3415 p2pielen += 2;
3416
3417 // Value, filled by FW
3418 p2pie[ p2pielen++ ] = 1;
3419
3420 // P2P Capability
3421 // Type:
3422 p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
3423
3424 // Length:
3425 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
3426 p2pielen += 2;
3427
3428 // Value:
3429 // Device Capability Bitmap, 1 byte
3430
3431 if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) )
3432 {
3433 // Commented by Albert 2011/03/08
3434 // According to the P2P specification
3435 // if the sending device will be client, the P2P Capability should be reserved of group negotation response frame
3436 p2pie[ p2pielen++ ] = 0;
3437 }
3438 else
3439 {
3440 // Be group owner or meet the error case
3441 p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT;
3442 }
3443
3444 // Group Capability Bitmap, 1 byte
3445 if ( pwdinfo->persistent_supported )
3446 {
3447 p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP;
3448 }
3449 else
3450 {
3451 p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN;
3452 }
3453
3454 // Group Owner Intent
3455 // Type:
3456 p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT;
3457
3458 // Length:
3459 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
3460 p2pielen += 2;
3461
3462 // Value:
3463 if ( pwdinfo->peer_intent & 0x01 )
3464 {
3465 // Peer's tie breaker bit is 1, our tie breaker bit should be 0
3466 p2pie[ p2pielen++ ] = ( pwdinfo->intent << 1 );
3467 }
3468 else
3469 {
3470 // Peer's tie breaker bit is 0, our tie breaker bit should be 1
3471 p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) );
3472 }
3473
3474
3475 // Configuration Timeout
3476 // Type:
3477 p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
3478
3479 // Length:
3480 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
3481 p2pielen += 2;
3482
3483 // Value:
3484 p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO
3485 p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client
3486
3487 // Operating Channel
3488 // Type:
3489 p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
3490
3491 // Length:
3492 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
3493 p2pielen += 2;
3494
3495 // Value:
3496 // Country String
3497 p2pie[ p2pielen++ ] = 'X';
3498 p2pie[ p2pielen++ ] = 'X';
3499
3500 // The third byte should be set to 0x04.
3501 // Described in the "Operating Channel Attribute" section.
3502 p2pie[ p2pielen++ ] = 0x04;
3503
3504 // Operating Class
3505 if ( pwdinfo->operating_channel <= 14 )
3506 {
3507 // Operating Class
3508 p2pie[ p2pielen++ ] = 0x51;
3509 }
3510 else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) )
3511 {
3512 // Operating Class
3513 p2pie[ p2pielen++ ] = 0x73;
3514 }
3515 else
3516 {
3517 // Operating Class
3518 p2pie[ p2pielen++ ] = 0x7c;
3519 }
3520
3521 // Channel Number
3522 p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number
3523
3524 // Intended P2P Interface Address
3525 // Type:
3526 p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR;
3527
3528 // Length:
3529 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN );
3530 p2pielen += 2;
3531
3532 // Value:
3533 _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN);
3534 p2pielen += ETH_ALEN;
3535
3536 // Channel List
3537 // Type:
3538 p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
3539
3540 // Country String(3)
3541 // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?)
3542 // + number of channels in all classes
3543 len_channellist_attr = 3
3544 + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
3545 + get_reg_classes_full_count(pmlmeext->channel_list);
3546
3547 #ifdef CONFIG_CONCURRENT_MODE
3548 if ( check_buddy_fwstate(padapter, _FW_LINKED ) )
3549 {
3550 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 );
3551 }
3552 else
3553 {
3554 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr );
3555 }
3556 #else
3557
3558 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr );
3559
3560 #endif
3561 p2pielen += 2;
3562
3563 // Value:
3564 // Country String
3565 p2pie[ p2pielen++ ] = 'X';
3566 p2pie[ p2pielen++ ] = 'X';
3567
3568 // The third byte should be set to 0x04.
3569 // Described in the "Operating Channel Attribute" section.
3570 p2pie[ p2pielen++ ] = 0x04;
3571
3572 // Channel Entry List
3573
3574 #ifdef CONFIG_CONCURRENT_MODE
3575 if ( check_buddy_fwstate(padapter, _FW_LINKED ) )
3576 {
3577 _adapter *pbuddy_adapter = padapter->pbuddy_adapter;
3578 struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
3579
3580 // Operating Class
3581 if ( pbuddy_mlmeext->cur_channel > 14 )
3582 {
3583 if ( pbuddy_mlmeext->cur_channel >= 149 )
3584 {
3585 p2pie[ p2pielen++ ] = 0x7c;
3586 }
3587 else
3588 {
3589 p2pie[ p2pielen++ ] = 0x73;
3590 }
3591 }
3592 else
3593 {
3594 p2pie[ p2pielen++ ] = 0x51;
3595 }
3596
3597 // Number of Channels
3598 // Just support 1 channel and this channel is AP's channel
3599 p2pie[ p2pielen++ ] = 1;
3600
3601 // Channel List
3602 p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel;
3603 }
3604 else
3605 {
3606 int i, j;
3607 for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
3608 // Operating Class
3609 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
3610
3611 // Number of Channels
3612 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
3613
3614 // Channel List
3615 for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) {
3616 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
3617 }
3618 }
3619 }
3620 #else // CONFIG_CONCURRENT_MODE
3621 {
3622 int i, j;
3623 for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
3624 // Operating Class
3625 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
3626
3627 // Number of Channels
3628 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
3629
3630 // Channel List
3631 for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) {
3632 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
3633 }
3634 }
3635 }
3636 #endif // CONFIG_CONCURRENT_MODE
3637
3638
3639 // Device Info
3640 // Type:
3641 p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
3642
3643 // Length:
3644 // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes)
3645 // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
3646 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
3647 p2pielen += 2;
3648
3649 // Value:
3650 // P2P Device Address
3651 _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN);
3652 p2pielen += ETH_ALEN;
3653
3654 // Config Method
3655 // This field should be big endian. Noted by P2P specification.
3656
3657 *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
3658
3659 p2pielen += 2;
3660
3661 // Primary Device Type
3662 // Category ID
3663 *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA );
3664 p2pielen += 2;
3665
3666 // OUI
3667 *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
3668 p2pielen += 4;
3669
3670 // Sub Category ID
3671 *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER );
3672 p2pielen += 2;
3673
3674 // Number of Secondary Device Types
3675 p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List
3676
3677 // Device Name
3678 // Type:
3679 *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
3680 p2pielen += 2;
3681
3682 // Length:
3683 *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
3684 p2pielen += 2;
3685
3686 // Value:
3687 _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len );
3688 p2pielen += pwdinfo->device_name_len;
3689
3690 if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) )
3691 {
3692 // Group ID Attribute
3693 // Type:
3694 p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID;
3695
3696 // Length:
3697 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen );
3698 p2pielen += 2;
3699
3700 // Value:
3701 // p2P Device Address
3702 _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN );
3703 p2pielen += ETH_ALEN;
3704
3705 // SSID
3706 _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen );
3707 p2pielen += pwdinfo->nego_ssidlen;
3708
3709 }
3710
3711 pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pktlen );
3712
3713 #ifdef CONFIG_WFD
3714 wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe);
3715 pframe += wfdielen;
3716 pktlen += wfdielen;
3717 #endif
3718
3719 *pLength = pktlen;
3720 #if 0
3721 // printf dbg msg
3722 dbgbufLen = pktlen;
3723 DBG_871X("======> DBG MSG FOR CONSTRAUCT Nego Rsp\n");
3724
3725 for(index=0;index<dbgbufLen;index++)
3726 printk("%x ",*(dbgbuf+index));
3727
3728 printk("\n");
3729 DBG_871X("<====== DBG MSG FOR CONSTRAUCT Nego Rsp\n");
3730 #endif
3731 }
3732
rtw_hal_construct_P2PInviteRsp(_adapter * padapter,u8 * pframe,u32 * pLength)3733 static void rtw_hal_construct_P2PInviteRsp(_adapter * padapter, u8 * pframe, u32 * pLength)
3734 {
3735 unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
3736 u8 action = P2P_PUB_ACTION_ACTION;
3737 u32 p2poui = cpu_to_be32(P2POUI);
3738 u8 oui_subtype = P2P_INVIT_RESP;
3739 u8 p2pie[ 255 ] = { 0x00 };
3740 u8 p2pielen = 0, i;
3741 u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0;
3742 u16 len_channellist_attr = 0;
3743 u32 pktlen;
3744 u8 dialogToken = 0;
3745 #ifdef CONFIG_CONCURRENT_MODE
3746 _adapter *pbuddy_adapter = padapter->pbuddy_adapter;
3747 struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo;
3748 struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv;
3749 struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
3750 #endif
3751 #ifdef CONFIG_WFD
3752 u32 wfdielen = 0;
3753 #endif
3754
3755 //struct xmit_frame *pmgntframe;
3756 //struct pkt_attrib *pattrib;
3757 //unsigned char *pframe;
3758 struct rtw_ieee80211_hdr *pwlanhdr;
3759 unsigned short *fctrl;
3760 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
3761 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
3762 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
3763 struct wifidirect_info *pwdinfo = &( padapter->wdinfo);
3764
3765 //for debug
3766 u8 *dbgbuf = pframe;
3767 u8 dbgbufLen = 0, index = 0;
3768
3769
3770 DBG_871X( "%s\n", __FUNCTION__);
3771 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
3772
3773 fctrl = &(pwlanhdr->frame_ctl);
3774 *(fctrl) = 0;
3775
3776 //RA fill by FW
3777 _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN);
3778 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
3779
3780 //BSSID fill by FW
3781 _rtw_memset(pwlanhdr->addr3, 0, ETH_ALEN);
3782
3783 SetSeqNum(pwlanhdr, 0);
3784 SetFrameSubType(pframe, WIFI_ACTION);
3785
3786 pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
3787 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
3788
3789 pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen));
3790 pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen));
3791 pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen));
3792 pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen));
3793
3794 //dialog token, filled by FW
3795 pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen));
3796
3797 // P2P IE Section.
3798
3799 // P2P OUI
3800 p2pielen = 0;
3801 p2pie[ p2pielen++ ] = 0x50;
3802 p2pie[ p2pielen++ ] = 0x6F;
3803 p2pie[ p2pielen++ ] = 0x9A;
3804 p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0
3805
3806 // Commented by Albert 20101005
3807 // According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes
3808 // 1. Status
3809 // 2. Configuration Timeout
3810 // 3. Operating Channel ( Only GO )
3811 // 4. P2P Group BSSID ( Only GO )
3812 // 5. Channel List
3813
3814 // P2P Status
3815 // Type:
3816 p2pie[ p2pielen++ ] = P2P_ATTR_STATUS;
3817
3818 // Length:
3819 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
3820 p2pielen += 2;
3821
3822 // Value: filled by FW, defult value is FAIL INFO UNAVAILABLE
3823 p2pie[ p2pielen++ ] = P2P_STATUS_FAIL_INFO_UNAVAILABLE;
3824
3825 // Configuration Timeout
3826 // Type:
3827 p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
3828
3829 // Length:
3830 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
3831 p2pielen += 2;
3832
3833 // Value:
3834 p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO
3835 p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client
3836
3837 // due to defult value is FAIL INFO UNAVAILABLE, so the following IE is not needed
3838 #if 0
3839 if( status_code == P2P_STATUS_SUCCESS )
3840 {
3841 if( rtw_p2p_chk_role( pwdinfo, P2P_ROLE_GO ) )
3842 {
3843 // The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO
3844 // In this case, the P2P Invitation response frame should carry the two more P2P attributes.
3845 // First one is operating channel attribute.
3846 // Second one is P2P Group BSSID attribute.
3847
3848 // Operating Channel
3849 // Type:
3850 p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
3851
3852 // Length:
3853 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
3854 p2pielen += 2;
3855
3856 // Value:
3857 // Country String
3858 p2pie[ p2pielen++ ] = 'X';
3859 p2pie[ p2pielen++ ] = 'X';
3860
3861 // The third byte should be set to 0x04.
3862 // Described in the "Operating Channel Attribute" section.
3863 p2pie[ p2pielen++ ] = 0x04;
3864
3865 // Operating Class
3866 p2pie[ p2pielen++ ] = 0x51; // Copy from SD7
3867
3868 // Channel Number
3869 p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number
3870
3871
3872 // P2P Group BSSID
3873 // Type:
3874 p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_BSSID;
3875
3876 // Length:
3877 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN );
3878 p2pielen += 2;
3879
3880 // Value:
3881 // P2P Device Address for GO
3882 _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN);
3883 p2pielen += ETH_ALEN;
3884
3885 }
3886
3887 // Channel List
3888 // Type:
3889 p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
3890
3891 // Length:
3892 // Country String(3)
3893 // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?)
3894 // + number of channels in all classes
3895 len_channellist_attr = 3
3896 + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
3897 + get_reg_classes_full_count(pmlmeext->channel_list);
3898
3899 #ifdef CONFIG_CONCURRENT_MODE
3900 if ( check_buddy_fwstate(padapter, _FW_LINKED ) )
3901 {
3902 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 );
3903 }
3904 else
3905 {
3906 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr );
3907 }
3908 #else
3909
3910 *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr );
3911
3912 #endif
3913 p2pielen += 2;
3914
3915 // Value:
3916 // Country String
3917 p2pie[ p2pielen++ ] = 'X';
3918 p2pie[ p2pielen++ ] = 'X';
3919
3920 // The third byte should be set to 0x04.
3921 // Described in the "Operating Channel Attribute" section.
3922 p2pie[ p2pielen++ ] = 0x04;
3923
3924 // Channel Entry List
3925 #ifdef CONFIG_CONCURRENT_MODE
3926 if ( check_buddy_fwstate(padapter, _FW_LINKED ) )
3927 {
3928 _adapter *pbuddy_adapter = padapter->pbuddy_adapter;
3929 struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
3930
3931 // Operating Class
3932 if ( pbuddy_mlmeext->cur_channel > 14 )
3933 {
3934 if ( pbuddy_mlmeext->cur_channel >= 149 )
3935 {
3936 p2pie[ p2pielen++ ] = 0x7c;
3937 }
3938 else
3939 {
3940 p2pie[ p2pielen++ ] = 0x73;
3941 }
3942 }
3943 else
3944 {
3945 p2pie[ p2pielen++ ] = 0x51;
3946 }
3947
3948 // Number of Channels
3949 // Just support 1 channel and this channel is AP's channel
3950 p2pie[ p2pielen++ ] = 1;
3951
3952 // Channel List
3953 p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel;
3954 }
3955 else
3956 {
3957 int i, j;
3958 for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
3959 // Operating Class
3960 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
3961
3962 // Number of Channels
3963 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
3964
3965 // Channel List
3966 for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) {
3967 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
3968 }
3969 }
3970 }
3971 #else // CONFIG_CONCURRENT_MODE
3972 {
3973 int i, j;
3974 for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
3975 // Operating Class
3976 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
3977
3978 // Number of Channels
3979 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
3980
3981 // Channel List
3982 for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) {
3983 p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
3984 }
3985 }
3986 }
3987 #endif // CONFIG_CONCURRENT_MODE
3988 }
3989 #endif
3990
3991 pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pktlen );
3992
3993 #ifdef CONFIG_WFD
3994 wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe);
3995 pframe += wfdielen;
3996 pktlen += wfdielen;
3997 #endif
3998
3999 *pLength = pktlen;
4000
4001 #if 0
4002 // printf dbg msg
4003 dbgbufLen = pktlen;
4004 DBG_871X("======> DBG MSG FOR CONSTRAUCT Invite Rsp\n");
4005
4006 for(index=0;index<dbgbufLen;index++)
4007 printk("%x ",*(dbgbuf+index));
4008
4009 printk("\n");
4010 DBG_871X("<====== DBG MSG FOR CONSTRAUCT Invite Rsp\n");
4011 #endif
4012 }
4013
4014
rtw_hal_construct_P2PProvisionDisRsp(_adapter * padapter,u8 * pframe,u32 * pLength)4015 static void rtw_hal_construct_P2PProvisionDisRsp(_adapter * padapter, u8 * pframe, u32 * pLength)
4016 {
4017 unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
4018 u8 action = P2P_PUB_ACTION_ACTION;
4019 u8 dialogToken = 0;
4020 u32 p2poui = cpu_to_be32(P2POUI);
4021 u8 oui_subtype = P2P_PROVISION_DISC_RESP;
4022 u8 wpsie[ 100 ] = { 0x00 };
4023 u8 wpsielen = 0;
4024 u32 pktlen;
4025 #ifdef CONFIG_WFD
4026 u32 wfdielen = 0;
4027 #endif
4028
4029 //struct xmit_frame *pmgntframe;
4030 //struct pkt_attrib *pattrib;
4031 //unsigned char *pframe;
4032 struct rtw_ieee80211_hdr *pwlanhdr;
4033 unsigned short *fctrl;
4034 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
4035 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4036 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4037 struct wifidirect_info *pwdinfo = &( padapter->wdinfo);
4038
4039 //for debug
4040 u8 *dbgbuf = pframe;
4041 u8 dbgbufLen = 0, index = 0;
4042
4043 DBG_871X( "%s\n", __FUNCTION__);
4044
4045 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
4046
4047 fctrl = &(pwlanhdr->frame_ctl);
4048 *(fctrl) = 0;
4049
4050 //RA filled by FW
4051 _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN);
4052 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4053 _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN);
4054
4055 SetSeqNum(pwlanhdr,0);
4056 SetFrameSubType(pframe, WIFI_ACTION);
4057
4058 pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
4059 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
4060
4061 pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen));
4062 pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen));
4063 pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen));
4064 pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen));
4065 //dialog token, filled by FW
4066 pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen));
4067
4068 wpsielen = 0;
4069 // WPS OUI
4070 //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
4071 RTW_PUT_BE32(wpsie, WPSOUI);
4072 wpsielen += 4;
4073
4074 #if 0
4075 // WPS version
4076 // Type:
4077 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
4078 wpsielen += 2;
4079
4080 // Length:
4081 *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
4082 wpsielen += 2;
4083
4084 // Value:
4085 wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0
4086 #endif
4087
4088 // Config Method
4089 // Type:
4090 //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD );
4091 RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD);
4092 wpsielen += 2;
4093
4094 // Length:
4095 //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
4096 RTW_PUT_BE16(wpsie + wpsielen, 0x0002);
4097 wpsielen += 2;
4098
4099 // Value: filled by FW, default value is PBC
4100 //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method );
4101 RTW_PUT_BE16(wpsie + wpsielen, WPS_CM_PUSH_BUTTON);
4102 wpsielen += 2;
4103
4104 pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen );
4105
4106 #ifdef CONFIG_WFD
4107 wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe);
4108 pframe += wfdielen;
4109 pktlen += wfdielen;
4110 #endif
4111
4112 *pLength = pktlen;
4113
4114 // printf dbg msg
4115 #if 0
4116 dbgbufLen = pktlen;
4117 DBG_871X("======> DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n");
4118
4119 for(index=0;index<dbgbufLen;index++)
4120 printk("%x ",*(dbgbuf+index));
4121
4122 printk("\n");
4123 DBG_871X("<====== DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n");
4124 #endif
4125 }
4126
rtw_hal_set_FwP2PRsvdPage_cmd(_adapter * adapter,PRSVDPAGE_LOC rsvdpageloc)4127 u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter* adapter, PRSVDPAGE_LOC rsvdpageloc)
4128 {
4129 u8 u1H2CP2PRsvdPageParm[H2C_P2PRSVDPAGE_LOC_LEN]={0};
4130 struct hal_ops *pHalFunc = &adapter->HalFunc;
4131 u8 ret = _FAIL;
4132
4133 DBG_871X("P2PRsvdPageLoc: P2PBeacon=%d P2PProbeRsp=%d NegoRsp=%d InviteRsp=%d PDRsp=%d\n",
4134 rsvdpageloc->LocP2PBeacon, rsvdpageloc->LocP2PProbeRsp,
4135 rsvdpageloc->LocNegoRsp, rsvdpageloc->LocInviteRsp,
4136 rsvdpageloc->LocPDRsp);
4137
4138 SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(u1H2CP2PRsvdPageParm, rsvdpageloc->LocProbeRsp);
4139 SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocPsPoll);
4140 SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocNullData);
4141 SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocQosNull);
4142 SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocBTQosNull);
4143
4144 //FillH2CCmd8723B(padapter, H2C_8723B_P2P_OFFLOAD_RSVD_PAGE, H2C_P2PRSVDPAGE_LOC_LEN, u1H2CP2PRsvdPageParm);
4145 ret = rtw_hal_fill_h2c_cmd(adapter,
4146 H2C_P2P_OFFLOAD_RSVD_PAGE,
4147 H2C_P2PRSVDPAGE_LOC_LEN,
4148 u1H2CP2PRsvdPageParm);
4149
4150 return ret;
4151 }
4152
rtw_hal_set_p2p_wowlan_offload_cmd(_adapter * adapter)4153 u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter* adapter)
4154 {
4155
4156 u8 offload_cmd[H2C_P2P_OFFLOAD_LEN] = {0};
4157 struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
4158 struct P2P_WoWlan_Offload_t *p2p_wowlan_offload = (struct P2P_WoWlan_Offload_t *)offload_cmd;
4159 struct hal_ops *pHalFunc = &adapter->HalFunc;
4160 u8 ret = _FAIL;
4161
4162 _rtw_memset(p2p_wowlan_offload,0 ,sizeof(struct P2P_WoWlan_Offload_t));
4163 DBG_871X("%s\n",__func__);
4164 switch(pwdinfo->role)
4165 {
4166 case P2P_ROLE_DEVICE:
4167 DBG_871X("P2P_ROLE_DEVICE\n");
4168 p2p_wowlan_offload->role = 0;
4169 break;
4170 case P2P_ROLE_CLIENT:
4171 DBG_871X("P2P_ROLE_CLIENT\n");
4172 p2p_wowlan_offload->role = 1;
4173 break;
4174 case P2P_ROLE_GO:
4175 DBG_871X("P2P_ROLE_GO\n");
4176 p2p_wowlan_offload->role = 2;
4177 break;
4178 default:
4179 DBG_871X("P2P_ROLE_DISABLE\n");
4180 break;
4181 }
4182 p2p_wowlan_offload->Wps_Config[0] = pwdinfo->supported_wps_cm>>8;
4183 p2p_wowlan_offload->Wps_Config[1] = pwdinfo->supported_wps_cm;
4184 offload_cmd = (u8*)p2p_wowlan_offload;
4185 DBG_871X("p2p_wowlan_offload: %x:%x:%x\n",offload_cmd[0],offload_cmd[1],offload_cmd[2]);
4186
4187 ret = rtw_hal_fill_h2c_cmd(adapter,
4188 H2C_P2P_OFFLOAD,
4189 H2C_P2P_OFFLOAD_LEN,
4190 offload_cmd);
4191 return ret;
4192
4193 //FillH2CCmd8723B(adapter, H2C_8723B_P2P_OFFLOAD, sizeof(struct P2P_WoWlan_Offload_t), (u8 *)p2p_wowlan_offload);
4194 }
4195 #endif //CONFIG_P2P_WOWLAN
4196
rtw_hal_construct_beacon(_adapter * padapter,u8 * pframe,u32 * pLength)4197 static void rtw_hal_construct_beacon(_adapter *padapter,
4198 u8 *pframe, u32 *pLength)
4199 {
4200 struct rtw_ieee80211_hdr *pwlanhdr;
4201 u16 *fctrl;
4202 u32 rate_len, pktlen;
4203 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4204 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4205 WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
4206 u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
4207
4208
4209 //DBG_871X("%s\n", __FUNCTION__);
4210
4211 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
4212
4213 fctrl = &(pwlanhdr->frame_ctl);
4214 *(fctrl) = 0;
4215
4216 _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
4217 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4218 _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
4219
4220 SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
4221 //pmlmeext->mgnt_seq++;
4222 SetFrameSubType(pframe, WIFI_BEACON);
4223
4224 pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
4225 pktlen = sizeof (struct rtw_ieee80211_hdr_3addr);
4226
4227 //timestamp will be inserted by hardware
4228 pframe += 8;
4229 pktlen += 8;
4230
4231 // beacon interval: 2 bytes
4232 _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2);
4233
4234 pframe += 2;
4235 pktlen += 2;
4236
4237 // capability info: 2 bytes
4238 _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
4239
4240 pframe += 2;
4241 pktlen += 2;
4242
4243 if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
4244 {
4245 //DBG_871X("ie len=%d\n", cur_network->IELength);
4246 pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
4247 _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen);
4248
4249 goto _ConstructBeacon;
4250 }
4251
4252 //below for ad-hoc mode
4253
4254 // SSID
4255 pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
4256
4257 // supported rates...
4258 rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
4259 pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen);
4260
4261 // DS parameter set
4262 pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
4263
4264 if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
4265 {
4266 u32 ATIMWindow;
4267 // IBSS Parameter Set...
4268 //ATIMWindow = cur->Configuration.ATIMWindow;
4269 ATIMWindow = 0;
4270 pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
4271 }
4272
4273
4274 //todo: ERP IE
4275
4276
4277 // EXTERNDED SUPPORTED RATE
4278 if (rate_len > 8)
4279 {
4280 pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
4281 }
4282
4283
4284 //todo:HT for adhoc
4285
4286 _ConstructBeacon:
4287
4288 if ((pktlen + TXDESC_SIZE) > 512)
4289 {
4290 DBG_871X("beacon frame too large\n");
4291 return;
4292 }
4293
4294 *pLength = pktlen;
4295
4296 //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen);
4297
4298 }
4299
rtw_hal_construct_PSPoll(_adapter * padapter,u8 * pframe,u32 * pLength)4300 static void rtw_hal_construct_PSPoll(_adapter *padapter,
4301 u8 *pframe, u32 *pLength)
4302 {
4303 struct rtw_ieee80211_hdr *pwlanhdr;
4304 u16 *fctrl;
4305 u32 pktlen;
4306 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4307 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4308
4309 //DBG_871X("%s\n", __FUNCTION__);
4310
4311 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
4312
4313 // Frame control.
4314 fctrl = &(pwlanhdr->frame_ctl);
4315 *(fctrl) = 0;
4316 SetPwrMgt(fctrl);
4317 SetFrameSubType(pframe, WIFI_PSPOLL);
4318
4319 // AID.
4320 SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
4321
4322 // BSSID.
4323 _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4324
4325 // TA.
4326 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4327
4328 *pLength = 16;
4329 }
4330
rtw_hal_construct_NullFunctionData(PADAPTER padapter,u8 * pframe,u32 * pLength,u8 * StaAddr,u8 bQoS,u8 AC,u8 bEosp,u8 bForcePowerSave)4331 static void rtw_hal_construct_NullFunctionData(
4332 PADAPTER padapter,
4333 u8 *pframe,
4334 u32 *pLength,
4335 u8 *StaAddr,
4336 u8 bQoS,
4337 u8 AC,
4338 u8 bEosp,
4339 u8 bForcePowerSave)
4340 {
4341 struct rtw_ieee80211_hdr *pwlanhdr;
4342 u16 *fctrl;
4343 u32 pktlen;
4344 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
4345 struct wlan_network *cur_network = &pmlmepriv->cur_network;
4346 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4347 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4348
4349
4350 //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
4351
4352 pwlanhdr = (struct rtw_ieee80211_hdr*)pframe;
4353
4354 fctrl = &pwlanhdr->frame_ctl;
4355 *(fctrl) = 0;
4356 if (bForcePowerSave)
4357 {
4358 SetPwrMgt(fctrl);
4359 }
4360
4361 switch(cur_network->network.InfrastructureMode)
4362 {
4363 case Ndis802_11Infrastructure:
4364 SetToDs(fctrl);
4365 _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4366 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4367 _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
4368 break;
4369 case Ndis802_11APMode:
4370 SetFrDs(fctrl);
4371 _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
4372 _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4373 _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN);
4374 break;
4375 case Ndis802_11IBSS:
4376 default:
4377 _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
4378 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4379 _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4380 break;
4381 }
4382
4383 SetSeqNum(pwlanhdr, 0);
4384
4385 if (bQoS == _TRUE) {
4386 struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr;
4387
4388 SetFrameSubType(pframe, WIFI_QOS_DATA_NULL);
4389
4390 pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe;
4391 SetPriority(&pwlanqoshdr->qc, AC);
4392 SetEOSP(&pwlanqoshdr->qc, bEosp);
4393
4394 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos);
4395 } else {
4396 SetFrameSubType(pframe, WIFI_DATA_NULL);
4397
4398 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
4399 }
4400
4401 *pLength = pktlen;
4402 }
4403
rtw_hal_construct_ProbeRsp(_adapter * padapter,u8 * pframe,u32 * pLength,u8 * StaAddr,BOOLEAN bHideSSID)4404 void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength,
4405 u8 *StaAddr, BOOLEAN bHideSSID)
4406 {
4407 struct rtw_ieee80211_hdr *pwlanhdr;
4408 u16 *fctrl;
4409 u8 *mac, *bssid;
4410 u32 pktlen;
4411 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4412 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4413 WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
4414
4415 /*DBG_871X("%s\n", __FUNCTION__);*/
4416
4417 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
4418
4419 mac = adapter_mac_addr(padapter);
4420 bssid = cur_network->MacAddress;
4421
4422 fctrl = &(pwlanhdr->frame_ctl);
4423 *(fctrl) = 0;
4424 _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
4425 _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
4426 _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
4427
4428 SetSeqNum(pwlanhdr, 0);
4429 SetFrameSubType(fctrl, WIFI_PROBERSP);
4430
4431 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
4432 pframe += pktlen;
4433
4434 if (cur_network->IELength > MAX_IE_SZ)
4435 return;
4436
4437 _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
4438 pframe += cur_network->IELength;
4439 pktlen += cur_network->IELength;
4440
4441 *pLength = pktlen;
4442 }
4443
4444 #ifdef CONFIG_WOWLAN
4445 //
4446 // Description:
4447 // Construct the ARP response packet to support ARP offload.
4448 //
rtw_hal_construct_ARPRsp(PADAPTER padapter,u8 * pframe,u32 * pLength,u8 * pIPAddress)4449 static void rtw_hal_construct_ARPRsp(
4450 PADAPTER padapter,
4451 u8 *pframe,
4452 u32 *pLength,
4453 u8 *pIPAddress
4454 )
4455 {
4456 struct rtw_ieee80211_hdr *pwlanhdr;
4457 u16 *fctrl;
4458 u32 pktlen;
4459 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
4460 struct wlan_network *cur_network = &pmlmepriv->cur_network;
4461 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4462 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4463 struct security_priv *psecuritypriv = &padapter->securitypriv;
4464 static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06};
4465 u8 *pARPRspPkt = pframe;
4466 //for TKIP Cal MIC
4467 u8 *payload = pframe;
4468 u8 EncryptionHeadOverhead = 0;
4469 //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
4470
4471 pwlanhdr = (struct rtw_ieee80211_hdr*)pframe;
4472
4473 fctrl = &pwlanhdr->frame_ctl;
4474 *(fctrl) = 0;
4475
4476 //-------------------------------------------------------------------------
4477 // MAC Header.
4478 //-------------------------------------------------------------------------
4479 SetFrameType(fctrl, WIFI_DATA);
4480 //SetFrameSubType(fctrl, 0);
4481 SetToDs(fctrl);
4482 _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4483 _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
4484 _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4485
4486 SetSeqNum(pwlanhdr, 0);
4487 SetDuration(pwlanhdr, 0);
4488 //SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0);
4489 //SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data);
4490 //SET_80211_HDR_TO_DS(pARPRspPkt, 1);
4491 //SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid);
4492 //SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress);
4493 //SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid);
4494
4495 //SET_80211_HDR_DURATION(pARPRspPkt, 0);
4496 //SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0);
4497 #ifdef CONFIG_WAPI_SUPPORT
4498 *pLength = sMacHdrLng;
4499 #else
4500 *pLength = 24;
4501 #endif
4502 switch (psecuritypriv->dot11PrivacyAlgrthm) {
4503 case _WEP40_:
4504 case _WEP104_:
4505 EncryptionHeadOverhead = 4;
4506 break;
4507 case _TKIP_:
4508 EncryptionHeadOverhead = 8;
4509 break;
4510 case _AES_:
4511 EncryptionHeadOverhead = 8;
4512 break;
4513 #ifdef CONFIG_WAPI_SUPPORT
4514 case _SMS4_:
4515 EncryptionHeadOverhead = 18;
4516 break;
4517 #endif
4518 default:
4519 EncryptionHeadOverhead = 0;
4520 }
4521
4522 if(EncryptionHeadOverhead > 0) {
4523 _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead);
4524 *pLength += EncryptionHeadOverhead;
4525 //SET_80211_HDR_WEP(pARPRspPkt, 1); //Suggested by CCW.
4526 SetPrivacy(fctrl);
4527 }
4528
4529 //-------------------------------------------------------------------------
4530 // Frame Body.
4531 //-------------------------------------------------------------------------
4532 pARPRspPkt = (u8*)(pframe+ *pLength);
4533 payload = pARPRspPkt; //Get Payload pointer
4534 // LLC header
4535 _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8);
4536 *pLength += 8;
4537
4538 // ARP element
4539 pARPRspPkt += 8;
4540 SET_ARP_PKT_HW(pARPRspPkt, 0x0100);
4541 SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); // IP protocol
4542 SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6);
4543 SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4);
4544 SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response
4545 SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter));
4546 SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress);
4547 #ifdef CONFIG_ARP_KEEP_ALIVE
4548 if (!is_zero_mac_addr(pmlmepriv->gw_mac_addr)) {
4549 SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr);
4550 SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip);
4551 }
4552 else
4553 #endif
4554 {
4555 SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt,
4556 get_my_bssid(&(pmlmeinfo->network)));
4557 SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt,
4558 pIPAddress);
4559 DBG_871X("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__,
4560 MAC_ARG(get_my_bssid(&(pmlmeinfo->network))));
4561 DBG_871X("%s Target IP Addr" IP_FMT "\n", __FUNCTION__,
4562 IP_ARG(pIPAddress));
4563 }
4564
4565 *pLength += 28;
4566
4567 if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) {
4568 u8 mic[8];
4569 struct mic_data micdata;
4570 struct sta_info *psta = NULL;
4571 u8 priority[4]={0x0,0x0,0x0,0x0};
4572 u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
4573
4574 DBG_871X("%s(): Add MIC\n",__FUNCTION__);
4575
4576 psta = rtw_get_stainfo(&padapter->stapriv,
4577 get_my_bssid(&(pmlmeinfo->network)));
4578 if (psta != NULL) {
4579 if(_rtw_memcmp(&psta->dot11tkiptxmickey.skey[0],
4580 null_key, 16)==_TRUE) {
4581 DBG_871X("%s(): STA dot11tkiptxmickey==0\n",
4582 __func__);
4583 }
4584 //start to calculate the mic code
4585 rtw_secmicsetkey(&micdata,
4586 &psta->dot11tkiptxmickey.skey[0]);
4587 }
4588
4589 rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); //DA
4590
4591 rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); //SA
4592
4593 priority[0]=0;
4594
4595 rtw_secmicappend(&micdata, &priority[0], 4);
4596
4597 rtw_secmicappend(&micdata, payload, 36); //payload length = 8 + 28
4598
4599 rtw_secgetmic(&micdata,&(mic[0]));
4600
4601 pARPRspPkt += 28;
4602 _rtw_memcpy(pARPRspPkt, &(mic[0]),8);
4603
4604 *pLength += 8;
4605 }
4606 }
4607
4608 #ifdef CONFIG_PNO_SUPPORT
rtw_hal_construct_ProbeReq(_adapter * padapter,u8 * pframe,u32 * pLength,pno_ssid_t * ssid)4609 static void rtw_hal_construct_ProbeReq(_adapter *padapter, u8 *pframe,
4610 u32 *pLength, pno_ssid_t *ssid)
4611 {
4612 struct rtw_ieee80211_hdr *pwlanhdr;
4613 u16 *fctrl;
4614 u32 pktlen;
4615 unsigned char *mac;
4616 unsigned char bssrate[NumRates];
4617 struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
4618 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
4619 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4620 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4621 int bssrate_len = 0;
4622 u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
4623
4624 pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
4625 mac = adapter_mac_addr(padapter);
4626
4627 fctrl = &(pwlanhdr->frame_ctl);
4628 *(fctrl) = 0;
4629
4630 _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
4631 _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN);
4632
4633 _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
4634
4635 SetSeqNum(pwlanhdr, 0);
4636 SetFrameSubType(pframe, WIFI_PROBEREQ);
4637
4638 pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
4639 pframe += pktlen;
4640
4641 if (ssid == NULL) {
4642 pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &pktlen);
4643 } else {
4644 //DBG_871X("%s len:%d\n", ssid->SSID, ssid->SSID_len);
4645 pframe = rtw_set_ie(pframe, _SSID_IE_, ssid->SSID_len, ssid->SSID, &pktlen);
4646 }
4647
4648 get_rate_set(padapter, bssrate, &bssrate_len);
4649
4650 if (bssrate_len > 8)
4651 {
4652 pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &pktlen);
4653 pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &pktlen);
4654 }
4655 else
4656 {
4657 pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &pktlen);
4658 }
4659
4660 *pLength = pktlen;
4661 }
4662
rtw_hal_construct_PNO_info(_adapter * padapter,u8 * pframe,u32 * pLength)4663 static void rtw_hal_construct_PNO_info(_adapter *padapter,
4664 u8 *pframe, u32*pLength)
4665 {
4666 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
4667
4668 u8 *pPnoInfoPkt = pframe;
4669 pPnoInfoPkt = (u8*)(pframe+ *pLength);
4670 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_num, 1);
4671
4672 *pLength+=1;
4673 pPnoInfoPkt += 1;
4674 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->hidden_ssid_num, 1);
4675
4676 *pLength+=3;
4677 pPnoInfoPkt += 3;
4678 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_period, 1);
4679
4680 *pLength+=4;
4681 pPnoInfoPkt += 4;
4682 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_iterations, 4);
4683
4684 *pLength+=4;
4685 pPnoInfoPkt += 4;
4686 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->slow_scan_period, 4);
4687
4688 *pLength+=4;
4689 pPnoInfoPkt += 4;
4690 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_length,
4691 MAX_PNO_LIST_COUNT);
4692
4693 *pLength+=MAX_PNO_LIST_COUNT;
4694 pPnoInfoPkt += MAX_PNO_LIST_COUNT;
4695 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_cipher_info,
4696 MAX_PNO_LIST_COUNT);
4697
4698 *pLength+=MAX_PNO_LIST_COUNT;
4699 pPnoInfoPkt += MAX_PNO_LIST_COUNT;
4700 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_channel_info,
4701 MAX_PNO_LIST_COUNT);
4702
4703 *pLength+=MAX_PNO_LIST_COUNT;
4704 pPnoInfoPkt += MAX_PNO_LIST_COUNT;
4705 _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->loc_probe_req,
4706 MAX_HIDDEN_AP);
4707
4708 *pLength+=MAX_HIDDEN_AP;
4709 pPnoInfoPkt += MAX_HIDDEN_AP;
4710 }
4711
rtw_hal_construct_ssid_list(_adapter * padapter,u8 * pframe,u32 * pLength)4712 static void rtw_hal_construct_ssid_list(_adapter *padapter,
4713 u8 *pframe, u32 *pLength)
4714 {
4715 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
4716 u8 *pSSIDListPkt = pframe;
4717 int i;
4718
4719 pSSIDListPkt = (u8*)(pframe+ *pLength);
4720
4721 for(i = 0; i < pwrctl->pnlo_info->ssid_num ; i++) {
4722 _rtw_memcpy(pSSIDListPkt, &pwrctl->pno_ssid_list->node[i].SSID,
4723 pwrctl->pnlo_info->ssid_length[i]);
4724
4725 *pLength += WLAN_SSID_MAXLEN;
4726 pSSIDListPkt += WLAN_SSID_MAXLEN;
4727 }
4728 }
4729
rtw_hal_construct_scan_info(_adapter * padapter,u8 * pframe,u32 * pLength)4730 static void rtw_hal_construct_scan_info(_adapter *padapter,
4731 u8 *pframe, u32 *pLength)
4732 {
4733 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
4734 u8 *pScanInfoPkt = pframe;
4735 int i;
4736
4737 pScanInfoPkt = (u8*)(pframe+ *pLength);
4738
4739 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->channel_num, 1);
4740
4741 *pLength+=1;
4742 pScanInfoPkt += 1;
4743 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_ch, 1);
4744
4745
4746 *pLength+=1;
4747 pScanInfoPkt += 1;
4748 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_bw, 1);
4749
4750
4751 *pLength+=1;
4752 pScanInfoPkt += 1;
4753 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_40_offset, 1);
4754
4755 *pLength+=1;
4756 pScanInfoPkt += 1;
4757 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_80_offset, 1);
4758
4759 *pLength+=1;
4760 pScanInfoPkt += 1;
4761 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->periodScan, 1);
4762
4763 *pLength+=1;
4764 pScanInfoPkt += 1;
4765 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->period_scan_time, 1);
4766
4767 *pLength+=1;
4768 pScanInfoPkt += 1;
4769 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->enableRFE, 1);
4770
4771 *pLength+=1;
4772 pScanInfoPkt += 1;
4773 _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->rfe_type, 8);
4774
4775 *pLength+=8;
4776 pScanInfoPkt += 8;
4777
4778 for(i = 0 ; i < MAX_SCAN_LIST_COUNT ; i ++) {
4779 _rtw_memcpy(pScanInfoPkt,
4780 &pwrctl->pscan_info->ssid_channel_info[i], 4);
4781 *pLength+=4;
4782 pScanInfoPkt += 4;
4783 }
4784 }
4785 #endif //CONFIG_PNO_SUPPORT
4786
4787 #ifdef CONFIG_GTK_OL
rtw_hal_construct_GTKRsp(PADAPTER padapter,u8 * pframe,u32 * pLength)4788 static void rtw_hal_construct_GTKRsp(
4789 PADAPTER padapter,
4790 u8 *pframe,
4791 u32 *pLength
4792 )
4793 {
4794 struct rtw_ieee80211_hdr *pwlanhdr;
4795 u16 *fctrl;
4796 u32 pktlen;
4797 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
4798 struct wlan_network *cur_network = &pmlmepriv->cur_network;
4799 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
4800 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
4801 struct security_priv *psecuritypriv = &padapter->securitypriv;
4802 static u8 LLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88, 0x8E};
4803 static u8 GTKbody_a[11] ={0x01, 0x03, 0x00, 0x5F, 0x02, 0x03, 0x12, 0x00, 0x10, 0x42, 0x0B};
4804 u8 *pGTKRspPkt = pframe;
4805 u8 EncryptionHeadOverhead = 0;
4806 //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
4807
4808 pwlanhdr = (struct rtw_ieee80211_hdr*)pframe;
4809
4810 fctrl = &pwlanhdr->frame_ctl;
4811 *(fctrl) = 0;
4812
4813 //-------------------------------------------------------------------------
4814 // MAC Header.
4815 //-------------------------------------------------------------------------
4816 SetFrameType(fctrl, WIFI_DATA);
4817 //SetFrameSubType(fctrl, 0);
4818 SetToDs(fctrl);
4819
4820 _rtw_memcpy(pwlanhdr->addr1,
4821 get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4822
4823 _rtw_memcpy(pwlanhdr->addr2,
4824 adapter_mac_addr(padapter), ETH_ALEN);
4825
4826 _rtw_memcpy(pwlanhdr->addr3,
4827 get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
4828
4829 SetSeqNum(pwlanhdr, 0);
4830 SetDuration(pwlanhdr, 0);
4831
4832 #ifdef CONFIG_WAPI_SUPPORT
4833 *pLength = sMacHdrLng;
4834 #else
4835 *pLength = 24;
4836 #endif //CONFIG_WAPI_SUPPORT
4837
4838 //-------------------------------------------------------------------------
4839 // Security Header: leave space for it if necessary.
4840 //-------------------------------------------------------------------------
4841 switch (psecuritypriv->dot11PrivacyAlgrthm) {
4842 case _WEP40_:
4843 case _WEP104_:
4844 EncryptionHeadOverhead = 4;
4845 break;
4846 case _TKIP_:
4847 EncryptionHeadOverhead = 8;
4848 break;
4849 case _AES_:
4850 EncryptionHeadOverhead = 8;
4851 break;
4852 #ifdef CONFIG_WAPI_SUPPORT
4853 case _SMS4_:
4854 EncryptionHeadOverhead = 18;
4855 break;
4856 #endif //CONFIG_WAPI_SUPPORT
4857 default:
4858 EncryptionHeadOverhead = 0;
4859 }
4860
4861 if (EncryptionHeadOverhead > 0) {
4862 _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead);
4863 *pLength += EncryptionHeadOverhead;
4864 //SET_80211_HDR_WEP(pGTKRspPkt, 1); //Suggested by CCW.
4865 //GTK's privacy bit is done by FW
4866 //SetPrivacy(fctrl);
4867 }
4868 //-------------------------------------------------------------------------
4869 // Frame Body.
4870 //-------------------------------------------------------------------------
4871 pGTKRspPkt = (u8*)(pframe+ *pLength);
4872 // LLC header
4873 _rtw_memcpy(pGTKRspPkt, LLCHeader, 8);
4874 *pLength += 8;
4875
4876 // GTK element
4877 pGTKRspPkt += 8;
4878
4879 //GTK frame body after LLC, part 1
4880 _rtw_memcpy(pGTKRspPkt, GTKbody_a, 11);
4881 *pLength += 11;
4882 pGTKRspPkt += 11;
4883 //GTK frame body after LLC, part 2
4884 _rtw_memset(&(pframe[*pLength]), 0, 88);
4885 *pLength += 88;
4886 pGTKRspPkt += 88;
4887
4888 }
4889 #endif //CONFIG_GTK_OL
4890
rtw_hal_set_wow_fw_rsvd_page(_adapter * adapter,u8 * pframe,u16 index,u8 tx_desc,u32 page_size,u8 * page_num,u32 * total_pkt_len,RSVDPAGE_LOC * rsvd_page_loc)4891 void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
4892 u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
4893 RSVDPAGE_LOC *rsvd_page_loc)
4894 {
4895 struct security_priv *psecuritypriv = &adapter->securitypriv;
4896 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
4897 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
4898 struct mlme_ext_priv *pmlmeext;
4899 struct mlme_ext_info *pmlmeinfo;
4900 u32 ARPLegnth = 0, GTKLegnth = 0, PNOLength = 0, ScanInfoLength = 0;
4901 u32 SSIDLegnth = 0, ProbeReqLength = 0;
4902 u8 CurtPktPageNum = 0;
4903 u8 currentip[4];
4904 u8 cur_dot11txpn[8];
4905
4906 #ifdef CONFIG_GTK_OL
4907 struct sta_priv *pstapriv = &adapter->stapriv;
4908 struct sta_info * psta;
4909 u8 kek[RTW_KEK_LEN];
4910 u8 kck[RTW_KCK_LEN];
4911 #endif //CONFIG_GTK_OL
4912 #ifdef CONFIG_PNO_SUPPORT
4913 int pno_index;
4914 u8 ssid_num;
4915 #endif //CONFIG_PNO_SUPPORT
4916
4917 pmlmeext = &adapter->mlmeextpriv;
4918 pmlmeinfo = &pmlmeext->mlmext_info;
4919
4920 if (pwrctl->wowlan_pno_enable == _FALSE) {
4921 //ARP RSP * 1 page
4922 rtw_get_current_ip_address(adapter, currentip);
4923
4924 rsvd_page_loc->LocArpRsp = *page_num;
4925
4926 DBG_871X("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp);
4927
4928 rtw_hal_construct_ARPRsp( adapter, &pframe[index],
4929 &ARPLegnth, currentip);
4930
4931 rtw_hal_fill_fake_txdesc(adapter,
4932 &pframe[index-tx_desc],
4933 ARPLegnth, _FALSE, _FALSE, _TRUE);
4934
4935 CurtPktPageNum = (u8)PageNum(tx_desc + ARPLegnth, page_size);
4936
4937 *page_num += CurtPktPageNum;
4938
4939 index += (CurtPktPageNum * page_size);
4940
4941 //3 SEC IV * 1 page
4942 rtw_get_sec_iv(adapter, cur_dot11txpn,
4943 get_my_bssid(&pmlmeinfo->network));
4944
4945 rsvd_page_loc->LocRemoteCtrlInfo = *page_num;
4946
4947 DBG_871X("LocRemoteCtrlInfo: %d\n", rsvd_page_loc->LocRemoteCtrlInfo);
4948
4949 _rtw_memcpy(pframe+index-tx_desc, cur_dot11txpn, _AES_IV_LEN_);
4950
4951 CurtPktPageNum = (u8)PageNum(_AES_IV_LEN_, page_size);
4952
4953 *page_num += CurtPktPageNum;
4954
4955 *total_pkt_len = index + _AES_IV_LEN_;
4956 #ifdef CONFIG_GTK_OL
4957 index += (CurtPktPageNum * page_size);
4958
4959 //if the ap staion info. exists, get the kek, kck from staion info.
4960 psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
4961 if (psta == NULL) {
4962 _rtw_memset(kek, 0, RTW_KEK_LEN);
4963 _rtw_memset(kck, 0, RTW_KCK_LEN);
4964 DBG_8192C("%s, KEK, KCK download rsvd page all zero \n",
4965 __func__);
4966 } else {
4967 _rtw_memcpy(kek, psta->kek, RTW_KEK_LEN);
4968 _rtw_memcpy(kck, psta->kck, RTW_KCK_LEN);
4969 }
4970
4971 //3 KEK, KCK
4972 rsvd_page_loc->LocGTKInfo = *page_num;
4973 DBG_871X("LocGTKInfo: %d\n", rsvd_page_loc->LocGTKInfo);
4974
4975 if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter)) {
4976 struct security_priv *psecpriv = NULL;
4977
4978 psecpriv = &adapter->securitypriv;
4979 _rtw_memcpy(pframe+index-tx_desc,
4980 &psecpriv->dot11PrivacyAlgrthm, 1);
4981 _rtw_memcpy(pframe+index-tx_desc+1,
4982 &psecpriv->dot118021XGrpPrivacy, 1);
4983 _rtw_memcpy(pframe+index-tx_desc+2,
4984 kck, RTW_KCK_LEN);
4985 _rtw_memcpy(pframe+index-tx_desc+2+RTW_KCK_LEN,
4986 kek, RTW_KEK_LEN);
4987 CurtPktPageNum = (u8)PageNum(tx_desc + 2 + RTW_KCK_LEN + RTW_KEK_LEN, page_size);
4988 } else {
4989 _rtw_memcpy(pframe+index-tx_desc, kck, RTW_KCK_LEN);
4990 _rtw_memcpy(pframe+index-tx_desc+RTW_KCK_LEN, kek, RTW_KEK_LEN);
4991 CurtPktPageNum = (u8)PageNum(tx_desc + RTW_KCK_LEN + RTW_KEK_LEN, page_size);
4992 }
4993
4994
4995
4996 #if 0
4997 {
4998 int i;
4999 printk("\ntoFW KCK: ");
5000 for(i=0;i<16; i++)
5001 printk(" %02x ", kck[i]);
5002 printk("\ntoFW KEK: ");
5003 for(i=0;i<16; i++)
5004 printk(" %02x ", kek[i]);
5005 printk("\n");
5006 }
5007
5008 DBG_871X("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n",
5009 __FUNCTION__, &pframe[index-tx_desc],
5010 (tx_desc + RTW_KCK_LEN + RTW_KEK_LEN));
5011 #endif
5012
5013 *page_num += CurtPktPageNum;
5014
5015 index += (CurtPktPageNum * page_size);
5016
5017 //3 GTK Response
5018 rsvd_page_loc->LocGTKRsp= *page_num;
5019 DBG_871X("LocGTKRsp: %d\n", rsvd_page_loc->LocGTKRsp);
5020 rtw_hal_construct_GTKRsp(adapter, &pframe[index], >KLegnth);
5021
5022 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5023 GTKLegnth, _FALSE, _FALSE, _TRUE);
5024 #if 0
5025 {
5026 int gj;
5027 printk("123GTK pkt=> \n");
5028 for(gj=0; gj < GTKLegnth+tx_desc; gj++) {
5029 printk(" %02x ", pframe[index-tx_desc+gj]);
5030 if ((gj + 1)%16==0)
5031 printk("\n");
5032 }
5033 printk(" <=end\n");
5034 }
5035
5036 DBG_871X("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n",
5037 __FUNCTION__, &pframe[index-tx_desc],
5038 (tx_desc + GTKLegnth));
5039 #endif
5040
5041 CurtPktPageNum = (u8)PageNum(tx_desc + GTKLegnth, page_size);
5042
5043 *page_num += CurtPktPageNum;
5044
5045 index += (CurtPktPageNum * page_size);
5046
5047 //below page is empty for GTK extension memory
5048 //3(11) GTK EXT MEM
5049 rsvd_page_loc->LocGTKEXTMEM = *page_num;
5050
5051 CurtPktPageNum = 2;
5052
5053 if (page_size >= 256)
5054 CurtPktPageNum = 1;
5055
5056 *page_num += CurtPktPageNum;
5057 //extension memory for FW
5058 *total_pkt_len = index + (page_size * CurtPktPageNum);
5059
5060 #endif //CONFIG_GTK_OL
5061 } else {
5062 #ifdef CONFIG_PNO_SUPPORT
5063 if (pwrctl->pno_in_resume == _FALSE &&
5064 pwrctl->pno_inited == _TRUE) {
5065
5066 //Broadcast Probe Request
5067 rsvd_page_loc->LocProbePacket = *page_num;
5068
5069 DBG_871X("loc_probe_req: %d\n",
5070 rsvd_page_loc->LocProbePacket);
5071
5072 rtw_hal_construct_ProbeReq(
5073 adapter,
5074 &pframe[index],
5075 &ProbeReqLength,
5076 NULL);
5077
5078 rtw_hal_fill_fake_txdesc(adapter,
5079 &pframe[index-tx_desc],
5080 ProbeReqLength, _FALSE, _FALSE, _FALSE);
5081
5082 CurtPktPageNum =
5083 (u8)PageNum(tx_desc + ProbeReqLength, page_size);
5084
5085 *page_num += CurtPktPageNum;
5086
5087 index += (CurtPktPageNum * page_size);
5088
5089 //Hidden SSID Probe Request
5090 ssid_num = pwrctl->pnlo_info->hidden_ssid_num;
5091
5092 for (pno_index = 0 ; pno_index < ssid_num ; pno_index++) {
5093 pwrctl->pnlo_info->loc_probe_req[pno_index] =
5094 *page_num;
5095
5096 rtw_hal_construct_ProbeReq(
5097 adapter,
5098 &pframe[index],
5099 &ProbeReqLength,
5100 &pwrctl->pno_ssid_list->node[pno_index]);
5101
5102 rtw_hal_fill_fake_txdesc(adapter,
5103 &pframe[index - tx_desc],
5104 ProbeReqLength, _FALSE, _FALSE, _FALSE);
5105
5106 CurtPktPageNum =
5107 (u8)PageNum(tx_desc + ProbeReqLength, page_size);
5108
5109 *page_num += CurtPktPageNum;
5110
5111 index += (CurtPktPageNum * page_size);
5112 }
5113
5114 //PNO INFO Page
5115 rsvd_page_loc->LocPNOInfo = *page_num;
5116 DBG_871X("LocPNOInfo: %d\n", rsvd_page_loc->LocPNOInfo);
5117 rtw_hal_construct_PNO_info(adapter,
5118 &pframe[index - tx_desc],
5119 &PNOLength);
5120
5121 CurtPktPageNum = (u8)PageNum(PNOLength, page_size);
5122 *page_num += CurtPktPageNum;
5123 index += (CurtPktPageNum * page_size);
5124
5125 //SSID List Page
5126 rsvd_page_loc->LocSSIDInfo = *page_num;
5127 DBG_871X("LocSSIDInfo: %d\n", rsvd_page_loc->LocSSIDInfo);
5128 rtw_hal_construct_ssid_list(adapter,
5129 &pframe[index - tx_desc],
5130 &SSIDLegnth);
5131
5132 CurtPktPageNum = (u8)PageNum(SSIDLegnth, page_size);
5133 *page_num += CurtPktPageNum;
5134 index += (CurtPktPageNum * page_size);
5135
5136 //Scan Info Page
5137 rsvd_page_loc->LocScanInfo = *page_num;
5138 DBG_871X("LocScanInfo: %d\n", rsvd_page_loc->LocScanInfo);
5139 rtw_hal_construct_scan_info(adapter,
5140 &pframe[index - tx_desc],
5141 &ScanInfoLength);
5142
5143 CurtPktPageNum = (u8)PageNum(ScanInfoLength, page_size);
5144 *page_num += CurtPktPageNum;
5145 *total_pkt_len = index + ScanInfoLength;
5146 index += (CurtPktPageNum * page_size);
5147
5148 }
5149 #endif //CONFIG_PNO_SUPPORT
5150 }
5151 }
5152
rtw_hal_gate_bb(_adapter * adapter,bool stop)5153 static void rtw_hal_gate_bb(_adapter *adapter, bool stop)
5154 {
5155 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
5156 u8 val8 = 0;
5157 u16 val16 = 0;
5158
5159 if (stop) {
5160 /* Pause TX*/
5161 pwrpriv->wowlan_txpause_status = rtw_read8(adapter, REG_TXPAUSE);
5162 rtw_write8(adapter, REG_TXPAUSE, 0xff);
5163 val8 = rtw_read8(adapter, REG_SYS_FUNC_EN);
5164 val8 &= ~BIT(0);
5165 rtw_write8(adapter, REG_SYS_FUNC_EN, val8);
5166 DBG_871X("%s: BB gated: 0x%02x, store TXPAUSE: %02x\n",
5167 __func__,
5168 rtw_read8(adapter, REG_SYS_FUNC_EN),
5169 pwrpriv->wowlan_txpause_status);
5170 } else {
5171 val8 = rtw_read8(adapter, REG_SYS_FUNC_EN);
5172 val8 |= BIT(0);
5173 rtw_write8(adapter, REG_SYS_FUNC_EN, val8);
5174 DBG_871X("%s: BB release: 0x%02x, recover TXPAUSE:%02x\n",
5175 __func__, rtw_read8(adapter, REG_SYS_FUNC_EN),
5176 pwrpriv->wowlan_txpause_status);
5177 /* release TX*/
5178 rtw_write8(adapter, REG_TXPAUSE, pwrpriv->wowlan_txpause_status);
5179 }
5180 }
5181
rtw_hal_reset_mac_rx(_adapter * adapter)5182 static void rtw_hal_reset_mac_rx(_adapter *adapter)
5183 {
5184 u8 val8 = 0;
5185 /* Set REG_CR bit1, bit3, bit7 to 0*/
5186 val8 = rtw_read8(adapter, REG_CR);
5187 val8 &= 0x75;
5188 rtw_write8(adapter, REG_CR, val8);
5189 val8 = rtw_read8(adapter, REG_CR);
5190 /* Set REG_CR bit1, bit3, bit7 to 1*/
5191 val8 |= 0x8a;
5192 rtw_write8(adapter, REG_CR, val8);
5193 DBG_871X("0x%04x: %02x\n", REG_CR, rtw_read8(adapter, REG_CR));
5194 }
5195
rtw_hal_set_wow_rxff_boundary(_adapter * adapter,bool wow_mode)5196 static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode)
5197 {
5198 u8 val8 = 0;
5199 u16 rxff_bndy = 0;
5200 u32 rx_dma_buff_sz = 0;
5201
5202 val8 = rtw_read8(adapter, REG_FIFOPAGE + 3);
5203 if (val8 != 0)
5204 DBG_871X("%s:[%04x]some PKTs in TXPKTBUF\n",
5205 __func__, (REG_FIFOPAGE + 3));
5206
5207 rtw_hal_reset_mac_rx(adapter);
5208
5209 if (wow_mode) {
5210 rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW,
5211 (u8 *)&rx_dma_buff_sz);
5212 rxff_bndy = rx_dma_buff_sz - 1;
5213
5214 rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
5215 DBG_871X("%s: wow mode, 0x%04x: 0x%04x\n", __func__,
5216 REG_TRXFF_BNDY + 2,
5217 rtw_read16(adapter, (REG_TRXFF_BNDY+2)));
5218 } else {
5219 rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ,
5220 (u8 *)&rx_dma_buff_sz);
5221 rxff_bndy = rx_dma_buff_sz - 1;
5222 rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
5223 DBG_871X("%s: normal mode, 0x%04x: 0x%04x\n", __func__,
5224 REG_TRXFF_BNDY + 2,
5225 rtw_read16(adapter, (REG_TRXFF_BNDY+2)));
5226 }
5227 }
5228
rtw_hal_set_pattern(_adapter * adapter,u8 * pattern,u8 len,u8 * mask)5229 static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern,
5230 u8 len, u8 *mask)
5231 {
5232 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
5233 struct mlme_ext_priv *pmlmeext = NULL;
5234 struct mlme_ext_info *pmlmeinfo = NULL;
5235 struct rtl_wow_pattern wow_pattern;
5236 u8 mask_hw[MAX_WKFM_SIZE] = {0};
5237 u8 content[MAX_WKFM_PATTERN_SIZE] = {0};
5238 u8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5239 u8 multicast_addr1[2] = {0x33, 0x33};
5240 u8 multicast_addr2[3] = {0x01, 0x00, 0x5e};
5241 u8 res = _FALSE, index = 0, mask_len = 0;
5242 u8 mac_addr[ETH_ALEN] = {0};
5243 u16 count = 0;
5244 int i, j;
5245
5246 if (pwrctl->wowlan_pattern_idx > MAX_WKFM_NUM) {
5247 DBG_871X("%s pattern_idx is more than MAX_FMC_NUM: %d\n",
5248 __func__, MAX_WKFM_NUM);
5249 return _FALSE;
5250 }
5251
5252 pmlmeext = &adapter->mlmeextpriv;
5253 pmlmeinfo = &pmlmeext->mlmext_info;
5254 _rtw_memcpy(mac_addr, adapter_mac_addr(adapter), ETH_ALEN);
5255 _rtw_memset(&wow_pattern, 0, sizeof(struct rtl_wow_pattern));
5256
5257 mask_len = DIV_ROUND_UP(len, 8);
5258
5259 /* 1. setup A1 table */
5260 if (memcmp(pattern, broadcast_addr, ETH_ALEN) == 0)
5261 wow_pattern.type = PATTERN_BROADCAST;
5262 else if (memcmp(pattern, multicast_addr1, 2) == 0)
5263 wow_pattern.type = PATTERN_MULTICAST;
5264 else if (memcmp(pattern, multicast_addr2, 3) == 0)
5265 wow_pattern.type = PATTERN_MULTICAST;
5266 else if (memcmp(pattern, mac_addr, ETH_ALEN) == 0)
5267 wow_pattern.type = PATTERN_UNICAST;
5268 else
5269 wow_pattern.type = PATTERN_INVALID;
5270
5271 /* translate mask from os to mask for hw */
5272
5273 /******************************************************************************
5274 * pattern from OS uses 'ethenet frame', like this:
5275
5276 | 6 | 6 | 2 | 20 | Variable | 4 |
5277 |--------+--------+------+-----------+------------+-----|
5278 | 802.3 Mac Header | IP Header | TCP Packet | FCS |
5279 | DA | SA | Type |
5280
5281 * BUT, packet catched by our HW is in '802.11 frame', begin from LLC,
5282
5283 | 24 or 30 | 6 | 2 | 20 | Variable | 4 |
5284 |-------------------+--------+------+-----------+------------+-----|
5285 | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS |
5286 | Others | Tpye |
5287
5288 * Therefore, we need translate mask_from_OS to mask_to_hw.
5289 * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0,
5290 * because new mask[0~5] means 'SA', but our HW packet begins from LLC,
5291 * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match.
5292 ******************************************************************************/
5293 /* Shift 6 bits */
5294 for (i = 0; i < mask_len - 1; i++) {
5295 mask_hw[i] = mask[i] >> 6;
5296 mask_hw[i] |= (mask[i + 1] & 0x3F) << 2;
5297 }
5298
5299 mask_hw[i] = (mask[i] >> 6) & 0x3F;
5300 /* Set bit 0-5 to zero */
5301 mask_hw[0] &= 0xC0;
5302
5303 for (i = 0; i < (MAX_WKFM_SIZE/4); i++) {
5304 wow_pattern.mask[i] = mask_hw[i * 4];
5305 wow_pattern.mask[i] |= (mask_hw[i * 4 + 1] << 8);
5306 wow_pattern.mask[i] |= (mask_hw[i * 4 + 2] << 16);
5307 wow_pattern.mask[i] |= (mask_hw[i * 4 + 3] << 24);
5308 }
5309
5310 /* To get the wake up pattern from the mask.
5311 * We do not count first 12 bits which means
5312 * DA[6] and SA[6] in the pattern to match HW design. */
5313 count = 0;
5314 for (i = 12; i < len; i++) {
5315 if ((mask[i / 8] >> (i % 8)) & 0x01) {
5316 content[count] = pattern[i];
5317 count++;
5318 }
5319 }
5320
5321 wow_pattern.crc = rtw_calc_crc(content, count);
5322
5323 if (wow_pattern.crc != 0) {
5324 if (wow_pattern.type == PATTERN_INVALID)
5325 wow_pattern.type = PATTERN_VALID;
5326 }
5327
5328 index = rtw_read8(adapter, REG_WKFMCAM_NUM);
5329
5330 if (!pwrctl->bInSuspend)
5331 index += 2;
5332
5333 /* write pattern */
5334 res = rtw_write_to_frame_mask(adapter, index, &wow_pattern);
5335
5336 if (res == _TRUE) {
5337 pwrctl->wowlan_pattern_idx++;
5338 rtw_write8(adapter,
5339 REG_WKFMCAM_NUM,
5340 pwrctl->wowlan_pattern_idx);
5341 } else {
5342 DBG_871X("%s: ERROR write_to_frame_mask_cam fail\n", __func__);
5343 }
5344
5345 return res;
5346 }
5347
rtw_hal_dl_pattern(_adapter * adapter,u8 clean_all)5348 static void rtw_hal_dl_pattern(_adapter *adapter, u8 clean_all)
5349 {
5350 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
5351 int i = 0, total = 0;
5352
5353 total = pwrpriv->wowlan_pattern_idx;
5354
5355 rtw_clean_pattern(adapter);
5356
5357 if (!clean_all) {
5358 for (i = 0 ; i < total ; i++) {
5359 rtw_hal_set_pattern(adapter,
5360 pwrpriv->patterns[i].content,
5361 pwrpriv->patterns[i].len,
5362 pwrpriv->patterns[i].mask);
5363 }
5364 DBG_871X("pattern downloaded\n");
5365 } else {
5366 for (i = 0 ; i < MAX_WKFM_NUM ; i++) {
5367 _rtw_memset(pwrpriv->patterns[i].content, '\0',
5368 sizeof(pwrpriv->patterns[i].content));
5369 _rtw_memset(pwrpriv->patterns[i].mask, '\0',
5370 sizeof(pwrpriv->patterns[i].mask));
5371 pwrpriv->patterns[i].len = 0;
5372 }
5373 DBG_871X("clean all pattern\n");
5374 }
5375 }
5376
rtw_hal_wow_enable(_adapter * adapter)5377 static void rtw_hal_wow_enable(_adapter *adapter)
5378 {
5379 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
5380 struct security_priv *psecuritypriv = &adapter->securitypriv;
5381 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
5382 struct hal_ops *pHalFunc = &adapter->HalFunc;
5383 struct sta_info *psta = NULL;
5384 int res;
5385 u16 media_status_rpt;
5386
5387
5388 DBG_871X_LEVEL(_drv_always_, "%s, WOWLAN_ENABLE\n", __func__);
5389 rtw_hal_gate_bb(adapter, _TRUE);
5390 #ifdef CONFIG_GTK_OL
5391 if (psecuritypriv->dot11PrivacyAlgrthm == _AES_)
5392 rtw_hal_fw_sync_cam_id(adapter);
5393 #endif
5394 if (IS_HARDWARE_TYPE_8723B(adapter))
5395 rtw_hal_backup_rate(adapter);
5396
5397 /* RX DMA stop */
5398 if (IS_HARDWARE_TYPE_8188E(adapter))
5399 rtw_hal_disable_tx_report(adapter);
5400
5401 res = rtw_hal_pause_rx_dma(adapter);
5402 if (res == _FAIL)
5403 DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n");
5404
5405 /* Reconfig RX_FF Boundary */
5406 rtw_hal_set_wow_rxff_boundary(adapter, _TRUE);
5407
5408 /* redownload pattern match */
5409 if (pwrctl->wowlan_pattern)
5410 rtw_hal_dl_pattern(adapter, _FALSE);
5411
5412 rtw_hal_fw_dl(adapter, _TRUE);
5413 media_status_rpt = RT_MEDIA_CONNECT;
5414 rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
5415 (u8 *)&media_status_rpt);
5416
5417 if (!pwrctl->wowlan_pno_enable) {
5418 psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
5419 if (psta != NULL)
5420 rtw_sta_media_status_rpt(adapter, psta, 1);
5421 }
5422
5423 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
5424 /* Enable CPWM2 only. */
5425 res = rtw_hal_enable_cpwm2(adapter);
5426 if (res == _FAIL)
5427 DBG_871X_LEVEL(_drv_always_, "[WARNING] enable cpwm2 fail\n");
5428 #endif
5429 #ifdef CONFIG_GPIO_WAKEUP
5430 rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _TRUE);
5431 #endif
5432 /* Set WOWLAN H2C command. */
5433 DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n");
5434 rtw_hal_set_fw_wow_related_cmd(adapter, 1);
5435
5436 res = rtw_hal_check_wow_ctrl(adapter, _TRUE);
5437
5438 if (res == _FALSE)
5439 DBG_871X("[Error]%s: set wowlan CMD fail!!\n", __func__);
5440
5441 pwrctl->wowlan_wake_reason =
5442 rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
5443
5444 DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n",
5445 pwrctl->wowlan_wake_reason);
5446 #ifdef CONFIG_GTK_OL_DBG
5447 dump_sec_cam(RTW_DBGDUMP, adapter);
5448 #endif
5449 #ifdef CONFIG_USB_HCI
5450 if (adapter->intf_stop) /* free adapter's resource */
5451 adapter->intf_stop(adapter);
5452
5453 #ifdef CONFIG_CONCURRENT_MODE
5454 if (rtw_buddy_adapter_up(adapter)) /*free buddy adapter's resource*/
5455 adapter->pbuddy_adapter->intf_stop(adapter->pbuddy_adapter);
5456 #endif /*CONFIG_CONCURRENT_MODE*/
5457 /* Invoid SE0 reset signal during suspending*/
5458 rtw_write8(adapter, REG_RSV_CTRL, 0x20);
5459 rtw_write8(adapter, REG_RSV_CTRL, 0x60);
5460 #endif /*CONFIG_USB_HCI*/
5461
5462 rtw_hal_gate_bb(adapter, _FALSE);
5463 }
5464
rtw_hal_wow_disable(_adapter * adapter)5465 static void rtw_hal_wow_disable(_adapter *adapter)
5466 {
5467 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
5468 struct security_priv *psecuritypriv = &adapter->securitypriv;
5469 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
5470 struct hal_ops *pHalFunc = &adapter->HalFunc;
5471 struct sta_info *psta = NULL;
5472 int res;
5473 u16 media_status_rpt;
5474 u8 val8;
5475
5476 DBG_871X_LEVEL(_drv_always_, "%s, WOWLAN_DISABLE\n", __func__);
5477
5478 if (!pwrctl->wowlan_pno_enable) {
5479 psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
5480 if (psta != NULL)
5481 rtw_sta_media_status_rpt(adapter, psta, 0);
5482 else
5483 DBG_871X("%s: psta is null\n", __func__);
5484 }
5485
5486 if (0) {
5487 DBG_871X("0x630:0x%02x\n", rtw_read8(adapter, 0x630));
5488 DBG_871X("0x631:0x%02x\n", rtw_read8(adapter, 0x631));
5489 }
5490
5491 pwrctl->wowlan_wake_reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
5492
5493 DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n",
5494 pwrctl->wowlan_wake_reason);
5495
5496 rtw_hal_set_fw_wow_related_cmd(adapter, 0);
5497
5498 res = rtw_hal_check_wow_ctrl(adapter, _FALSE);
5499
5500 if (res == _FALSE) {
5501 DBG_871X("[Error]%s: disable WOW cmd fail\n!!", __func__);
5502 rtw_hal_force_enable_rxdma(adapter);
5503 }
5504
5505 rtw_hal_gate_bb(adapter, _TRUE);
5506
5507 res = rtw_hal_pause_rx_dma(adapter);
5508 if (res == _FAIL)
5509 DBG_871X_LEVEL(_drv_always_, "[WARNING] pause RX DMA fail\n");
5510
5511 /* clean pattern match */
5512 if (pwrctl->wowlan_pattern)
5513 rtw_hal_dl_pattern(adapter, _TRUE);
5514
5515 /* config RXFF boundary to original */
5516 rtw_hal_set_wow_rxff_boundary(adapter, _FALSE);
5517
5518 rtw_hal_release_rx_dma(adapter);
5519
5520 if (IS_HARDWARE_TYPE_8188E(adapter))
5521 rtw_hal_enable_tx_report(adapter);
5522
5523 rtw_hal_update_tx_iv(adapter);
5524
5525 #ifdef CONFIG_GTK_OL
5526 if (psecuritypriv->dot11PrivacyAlgrthm == _AES_)
5527 rtw_hal_update_gtk_offload_info(adapter);
5528 #endif /*CONFIG_GTK_OL*/
5529
5530 rtw_hal_fw_dl(adapter, _FALSE);
5531
5532 #ifdef CONFIG_GPIO_WAKEUP
5533 val8 = (pwrctl->is_high_active == 0) ? 1 : 0;
5534 DBG_871X_LEVEL(_drv_always_, "Set Wake GPIO to default(%d).\n", val8);
5535 rtw_hal_set_output_gpio(adapter, WAKEUP_GPIO_IDX, val8);
5536 #endif
5537
5538 if ((pwrctl->wowlan_wake_reason != FWDecisionDisconnect) &&
5539 (pwrctl->wowlan_wake_reason != Rx_Pairwisekey) &&
5540 (pwrctl->wowlan_wake_reason != Rx_DisAssoc) &&
5541 (pwrctl->wowlan_wake_reason != Rx_DeAuth)) {
5542
5543 media_status_rpt = RT_MEDIA_CONNECT;
5544 rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
5545 (u8 *)&media_status_rpt);
5546
5547 if (psta != NULL)
5548 rtw_sta_media_status_rpt(adapter, psta, 1);
5549 }
5550 rtw_hal_gate_bb(adapter, _FALSE);
5551 }
5552 #endif /*CONFIG_WOWLAN*/
5553
5554 #ifdef CONFIG_P2P_WOWLAN
rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter * adapter,u8 * pframe,u16 index,u8 tx_desc,u32 page_size,u8 * page_num,u32 * total_pkt_len,RSVDPAGE_LOC * rsvd_page_loc)5555 void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter* adapter, u8 *pframe, u16 index,
5556 u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
5557 RSVDPAGE_LOC* rsvd_page_loc)
5558 {
5559 u32 P2PNegoRspLength = 0, P2PInviteRspLength = 0;
5560 u32 P2PPDRspLength = 0, P2PProbeRspLength = 0, P2PBCNLength = 0;
5561 u8 CurtPktPageNum = 0;
5562
5563 /* P2P Beacon */
5564 rsvd_page_loc->LocP2PBeacon = *page_num;
5565 rtw_hal_construct_P2PBeacon(adapter, &pframe[index], &P2PBCNLength);
5566 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5567 P2PBCNLength, _FALSE, _FALSE, _FALSE);
5568
5569 #if 0
5570 DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n",
5571 __FUNCTION__, &pframe[index-tx_desc], (P2PBCNLength+tx_desc));
5572 #endif
5573
5574 CurtPktPageNum = (u8)PageNum(tx_desc + P2PBCNLength, page_size);
5575
5576 *page_num += CurtPktPageNum;
5577
5578 index += (CurtPktPageNum * page_size);
5579
5580 // P2P Probe rsp
5581 rsvd_page_loc->LocP2PProbeRsp = *page_num;
5582 rtw_hal_construct_P2PProbeRsp(adapter, &pframe[index],
5583 &P2PProbeRspLength);
5584 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5585 P2PProbeRspLength, _FALSE, _FALSE, _FALSE);
5586
5587 //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n",
5588 // __FUNCTION__, &pframe[index-tx_desc], (P2PProbeRspLength+tx_desc));
5589
5590 CurtPktPageNum = (u8)PageNum(tx_desc + P2PProbeRspLength, page_size);
5591
5592 *page_num += CurtPktPageNum;
5593
5594 index += (CurtPktPageNum * page_size);
5595
5596 //P2P nego rsp
5597 rsvd_page_loc->LocNegoRsp = *page_num;
5598 rtw_hal_construct_P2PNegoRsp(adapter, &pframe[index],
5599 &P2PNegoRspLength);
5600 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5601 P2PNegoRspLength, _FALSE, _FALSE, _FALSE);
5602
5603 //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n",
5604 // __FUNCTION__, &pframe[index-tx_desc], (NegoRspLength+tx_desc));
5605
5606 CurtPktPageNum = (u8)PageNum(tx_desc + P2PNegoRspLength, page_size);
5607
5608 *page_num += CurtPktPageNum;
5609
5610 index += (CurtPktPageNum * page_size);
5611
5612 //P2P invite rsp
5613 rsvd_page_loc->LocInviteRsp = *page_num;
5614 rtw_hal_construct_P2PInviteRsp(adapter, &pframe[index],
5615 &P2PInviteRspLength);
5616 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5617 P2PInviteRspLength, _FALSE, _FALSE, _FALSE);
5618
5619 //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n",
5620 //__FUNCTION__, &pframe[index-tx_desc], (InviteRspLength+tx_desc));
5621
5622 CurtPktPageNum = (u8)PageNum(tx_desc + P2PInviteRspLength, page_size);
5623
5624 *page_num += CurtPktPageNum;
5625
5626 index += (CurtPktPageNum * page_size);
5627
5628 //P2P provision discovery rsp
5629 rsvd_page_loc->LocPDRsp = *page_num;
5630 rtw_hal_construct_P2PProvisionDisRsp( adapter,
5631 &pframe[index], &P2PPDRspLength);
5632
5633 rtw_hal_fill_fake_txdesc(adapter, &pframe[index-tx_desc],
5634 P2PPDRspLength, _FALSE, _FALSE, _FALSE);
5635
5636 //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n",
5637 // __FUNCTION__, &pframe[index-tx_desc], (PDRspLength+tx_desc));
5638
5639 CurtPktPageNum = (u8)PageNum(tx_desc + P2PPDRspLength, page_size);
5640
5641 *page_num += CurtPktPageNum;
5642
5643 *total_pkt_len = index + P2PPDRspLength;
5644
5645 index += (CurtPktPageNum * page_size);
5646
5647
5648 }
5649 #endif //CONFIG_P2P_WOWLAN
5650
5651 /*
5652 * Description: Fill the reserved packets that FW will use to RSVD page.
5653 * Now we just send 4 types packet to rsvd page.
5654 * (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
5655 * Input:
5656 * finished - FALSE:At the first time we will send all the packets as a large packet to Hw,
5657 * so we need to set the packet length to total lengh.
5658 * TRUE: At the second time, we should send the first packet (default:beacon)
5659 * to Hw again and set the lengh in descriptor to the real beacon lengh.
5660 * 2009.10.15 by tynli.
5661 *
5662 * Page Size = 128: 8188e, 8723a/b, 8192c/d,
5663 * Page Size = 256: 8192e, 8821a
5664 * Page Size = 512: 8812a
5665 */
5666
rtw_hal_set_fw_rsvd_page(_adapter * adapter,bool finished)5667 void rtw_hal_set_fw_rsvd_page(_adapter* adapter, bool finished)
5668 {
5669 PHAL_DATA_TYPE pHalData;
5670 struct xmit_frame *pcmdframe;
5671 struct pkt_attrib *pattrib;
5672 struct xmit_priv *pxmitpriv;
5673 struct mlme_ext_priv *pmlmeext;
5674 struct mlme_ext_info *pmlmeinfo;
5675 struct pwrctrl_priv *pwrctl;
5676 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
5677 struct hal_ops *pHalFunc = &adapter->HalFunc;
5678 u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength = 0;
5679 u32 NullDataLength = 0, QosNullLength = 0, BTQosNullLength = 0;
5680 u32 ProbeReqLength = 0, NullFunctionDataLength = 0;
5681 u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET;
5682 u8 TotalPageNum = 0 , CurtPktPageNum = 0 , RsvdPageNum = 0;
5683 u8 *ReservedPagePacket;
5684 u16 BufIndex = 0;
5685 u32 TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0;
5686 RSVDPAGE_LOC RsvdPageLoc;
5687
5688 #ifdef DBG_CONFIG_ERROR_DETECT
5689 struct sreset_priv *psrtpriv;
5690 #endif /* DBG_CONFIG_ERROR_DETECT */
5691
5692
5693 pHalData = GET_HAL_DATA(adapter);
5694 #ifdef DBG_CONFIG_ERROR_DETECT
5695 psrtpriv = &pHalData->srestpriv;
5696 #endif
5697 pxmitpriv = &adapter->xmitpriv;
5698 pmlmeext = &adapter->mlmeextpriv;
5699 pmlmeinfo = &pmlmeext->mlmext_info;
5700 pwrctl = adapter_to_pwrctl(adapter);
5701
5702 rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize);
5703
5704 if (PageSize == 0) {
5705 DBG_871X("[Error]: %s, PageSize is zero!!\n", __func__);
5706 return;
5707 }
5708
5709 if (pwrctl->wowlan_mode == _TRUE || pwrctl->wowlan_ap_mode == _TRUE)
5710 RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE);
5711 else
5712 RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE);
5713
5714 DBG_871X("%s PageSize: %d, RsvdPageNUm: %d\n",__func__, PageSize, RsvdPageNum);
5715
5716 MaxRsvdPageBufSize = RsvdPageNum*PageSize;
5717
5718 if (MaxRsvdPageBufSize > MAX_CMDBUF_SZ) {
5719 DBG_871X("%s MaxRsvdPageBufSize(%d) is larger than MAX_CMDBUF_SZ(%d)",
5720 __func__, MaxRsvdPageBufSize, MAX_CMDBUF_SZ);
5721 rtw_warn_on(1);
5722 return;
5723 }
5724
5725 pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv);
5726
5727 if (pcmdframe == NULL) {
5728 DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__);
5729 return;
5730 }
5731
5732 ReservedPagePacket = pcmdframe->buf_addr;
5733 _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC));
5734
5735 /* beacon * 2 pages */
5736 BufIndex = TxDescOffset;
5737 rtw_hal_construct_beacon(adapter,
5738 &ReservedPagePacket[BufIndex], &BeaconLength);
5739
5740 /*
5741 * When we count the first page size, we need to reserve description size for the RSVD
5742 * packet, it will be filled in front of the packet in TXPKTBUF.
5743 */
5744 CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize);
5745 /* If we don't add 1 more page, ARP offload function will fail at 8723bs.*/
5746 if (CurtPktPageNum == 1)
5747 CurtPktPageNum += 1;
5748
5749 TotalPageNum += CurtPktPageNum;
5750
5751 BufIndex += (CurtPktPageNum*PageSize);
5752
5753 if (pwrctl->wowlan_ap_mode == _TRUE) {
5754 /* (4) probe response*/
5755 RsvdPageLoc.LocProbeRsp = TotalPageNum;
5756 rtw_hal_construct_ProbeRsp(
5757 adapter, &ReservedPagePacket[BufIndex],
5758 &ProbeRspLength,
5759 get_my_bssid(&pmlmeinfo->network), _FALSE);
5760 rtw_hal_fill_fake_txdesc(adapter,
5761 &ReservedPagePacket[BufIndex-TxDescLen],
5762 ProbeRspLength, _FALSE, _FALSE, _FALSE);
5763
5764 CurtPktPageNum = (u8)PageNum(TxDescLen + ProbeRspLength, PageSize);
5765 TotalPageNum += CurtPktPageNum;
5766 TotalPacketLen = BufIndex + ProbeRspLength;
5767 BufIndex += (CurtPktPageNum*PageSize);
5768 goto download_page;
5769 }
5770
5771 /* ps-poll * 1 page */
5772 RsvdPageLoc.LocPsPoll = TotalPageNum;
5773 DBG_871X("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll);
5774 rtw_hal_construct_PSPoll(adapter,
5775 &ReservedPagePacket[BufIndex], &PSPollLength);
5776 rtw_hal_fill_fake_txdesc(adapter,
5777 &ReservedPagePacket[BufIndex-TxDescLen],
5778 PSPollLength, _TRUE, _FALSE, _FALSE);
5779
5780 CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize);
5781
5782 TotalPageNum += CurtPktPageNum;
5783
5784 BufIndex += (CurtPktPageNum*PageSize);
5785
5786 #ifdef CONFIG_BT_COEXIST
5787 /* BT Qos null data * 1 page */
5788 RsvdPageLoc.LocBTQosNull = TotalPageNum;
5789 DBG_871X("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull);
5790 rtw_hal_construct_NullFunctionData(
5791 adapter,
5792 &ReservedPagePacket[BufIndex],
5793 &BTQosNullLength,
5794 get_my_bssid(&pmlmeinfo->network),
5795 _TRUE, 0, 0, _FALSE);
5796 rtw_hal_fill_fake_txdesc(adapter,
5797 &ReservedPagePacket[BufIndex-TxDescLen],
5798 BTQosNullLength, _FALSE, _TRUE, _FALSE);
5799
5800 CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, PageSize);
5801
5802 TotalPageNum += CurtPktPageNum;
5803
5804 BufIndex += (CurtPktPageNum*PageSize);
5805 #endif /* CONFIG_BT_COEXIT */
5806
5807 /* null data * 1 page */
5808 RsvdPageLoc.LocNullData = TotalPageNum;
5809 DBG_871X("LocNullData: %d\n", RsvdPageLoc.LocNullData);
5810 rtw_hal_construct_NullFunctionData(
5811 adapter,
5812 &ReservedPagePacket[BufIndex],
5813 &NullDataLength,
5814 get_my_bssid(&pmlmeinfo->network),
5815 _FALSE, 0, 0, _FALSE);
5816 rtw_hal_fill_fake_txdesc(adapter,
5817 &ReservedPagePacket[BufIndex-TxDescLen],
5818 NullDataLength, _FALSE, _FALSE, _FALSE);
5819
5820 CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize);
5821
5822 TotalPageNum += CurtPktPageNum;
5823
5824 BufIndex += (CurtPktPageNum*PageSize);
5825
5826 //Qos null data * 1 page
5827 RsvdPageLoc.LocQosNull = TotalPageNum;
5828 DBG_871X("LocQosNull: %d\n", RsvdPageLoc.LocQosNull);
5829 rtw_hal_construct_NullFunctionData(
5830 adapter,
5831 &ReservedPagePacket[BufIndex],
5832 &QosNullLength,
5833 get_my_bssid(&pmlmeinfo->network),
5834 _TRUE, 0, 0, _FALSE);
5835 rtw_hal_fill_fake_txdesc(adapter,
5836 &ReservedPagePacket[BufIndex-TxDescLen],
5837 QosNullLength, _FALSE, _FALSE, _FALSE);
5838
5839 CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, PageSize);
5840
5841 TotalPageNum += CurtPktPageNum;
5842
5843 TotalPacketLen = BufIndex + QosNullLength;
5844
5845 BufIndex += (CurtPktPageNum*PageSize);
5846
5847 #ifdef CONFIG_WOWLAN
5848 if (pwrctl->wowlan_mode == _TRUE &&
5849 check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
5850 rtw_hal_set_wow_fw_rsvd_page(adapter, ReservedPagePacket,
5851 BufIndex, TxDescLen, PageSize,
5852 &TotalPageNum, &TotalPacketLen, &RsvdPageLoc);
5853 }
5854 #endif /* CONFIG_WOWLAN */
5855
5856 #ifdef CONFIG_P2P_WOWLAN
5857 if(_TRUE == pwrctl->wowlan_p2p_mode) {
5858 rtw_hal_set_p2p_wow_fw_rsvd_page(adapter, ReservedPagePacket,
5859 BufIndex, TxDescLen, PageSize,
5860 &TotalPageNum, &TotalPacketLen, &RsvdPageLoc);
5861 }
5862 #endif /* CONFIG_P2P_WOWLAN */
5863
5864 download_page:
5865 /* DBG_871X("%s BufIndex(%d), TxDescLen(%d), PageSize(%d)\n",__func__, BufIndex, TxDescLen, PageSize);*/
5866 DBG_871X("%s PageNum(%d), pktlen(%d)\n",
5867 __func__, TotalPageNum, TotalPacketLen);
5868
5869 if (TotalPacketLen > MaxRsvdPageBufSize) {
5870 DBG_871X("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
5871 __FUNCTION__, TotalPacketLen,MaxRsvdPageBufSize);
5872 rtw_warn_on(1);
5873 goto error;
5874 } else {
5875 /* update attribute */
5876 pattrib = &pcmdframe->attrib;
5877 update_mgntframe_attrib(adapter, pattrib);
5878 pattrib->qsel = QSLT_BEACON;
5879 pattrib->pktlen = TotalPacketLen - TxDescOffset;
5880 pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset;
5881 #ifdef CONFIG_PCI_HCI
5882 dump_mgntframe(adapter, pcmdframe);
5883 #else
5884 dump_mgntframe_and_wait(adapter, pcmdframe, 100);
5885 #endif
5886 }
5887
5888 DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n",
5889 __func__,TotalPacketLen,TotalPageNum);
5890
5891 if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
5892 rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc);
5893 if (pwrctl->wowlan_mode == _TRUE)
5894 rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc);
5895 #ifdef CONFIG_AP_WOWLAN
5896 if (pwrctl->wowlan_ap_mode == _TRUE)
5897 rtw_hal_set_ap_rsvdpage_loc_cmd(adapter, &RsvdPageLoc);
5898 #endif /* CONFIG_AP_WOWLAN */
5899 } else if (pwrctl->wowlan_pno_enable) {
5900 #ifdef CONFIG_PNO_SUPPORT
5901 rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc);
5902 if(pwrctl->pno_in_resume)
5903 rtw_hal_set_scan_offload_info_cmd(adapter,
5904 &RsvdPageLoc, 0);
5905 else
5906 rtw_hal_set_scan_offload_info_cmd(adapter,
5907 &RsvdPageLoc, 1);
5908 #endif /* CONFIG_PNO_SUPPORT */
5909 }
5910 #ifdef CONFIG_P2P_WOWLAN
5911 if(_TRUE == pwrctl->wowlan_p2p_mode)
5912 rtw_hal_set_FwP2PRsvdPage_cmd(adapter, &RsvdPageLoc);
5913 #endif /* CONFIG_P2P_WOWLAN */
5914 return;
5915 error:
5916 rtw_free_xmitframe(pxmitpriv, pcmdframe);
5917 }
5918
5919 #ifdef CONFIG_TDLS
5920 #ifdef CONFIG_TDLS_CH_SW
rtw_hal_ch_sw_oper_offload(_adapter * padapter,u8 channel,u8 channel_offset,u16 bwmode)5921 s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode)
5922 {
5923 u8 ch_sw_h2c_buf[4] = {0x00, 0x00, 0x00, 0x00};
5924
5925 ch_sw_h2c_buf[0] = channel;
5926 ch_sw_h2c_buf[2] = 1;
5927
5928 switch (bwmode) {
5929 case CHANNEL_WIDTH_40:
5930 ch_sw_h2c_buf[1] |= 0x01;
5931 break;
5932 case CHANNEL_WIDTH_80:
5933 ch_sw_h2c_buf[1] |= 0x02;
5934 break;
5935 case CHANNEL_WIDTH_20:
5936 default:
5937 break;
5938 }
5939
5940 switch (channel_offset) {
5941 case HAL_PRIME_CHNL_OFFSET_LOWER:
5942 if (bwmode == CHANNEL_WIDTH_40)
5943 ch_sw_h2c_buf[1] |= 0x04;
5944 else if (bwmode == CHANNEL_WIDTH_80)
5945 ch_sw_h2c_buf[1] |= 0x20;
5946 break;
5947 case HAL_PRIME_CHNL_OFFSET_UPPER:
5948 if (bwmode == CHANNEL_WIDTH_40)
5949 ch_sw_h2c_buf[1] |= 0x08;
5950 else if (bwmode == CHANNEL_WIDTH_80)
5951 ch_sw_h2c_buf[1] |= 0x40;
5952 break;
5953 case HAL_PRIME_CHNL_OFFSET_DONT_CARE:
5954 default:
5955 break;
5956 }
5957
5958 return rtw_hal_fill_h2c_cmd(padapter, H2C_CHNL_SWITCH_OPER_OFFLOAD, sizeof(ch_sw_h2c_buf), ch_sw_h2c_buf);
5959 }
5960 #endif
5961 #endif
5962
SetHwReg(_adapter * adapter,u8 variable,u8 * val)5963 void SetHwReg(_adapter *adapter, u8 variable, u8 *val)
5964 {
5965 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
5966 _func_enter_;
5967
5968 switch (variable) {
5969 case HW_VAR_PORT_SWITCH:
5970 hw_var_port_switch(adapter);
5971 break;
5972 case HW_VAR_INIT_RTS_RATE:
5973 {
5974 u16 brate_cfg = *((u16*)val);
5975 u8 rate_index = 0;
5976 HAL_VERSION *hal_ver = &hal_data->VersionID;
5977
5978 if (IS_8188E(*hal_ver)) {
5979
5980 while (brate_cfg > 0x1) {
5981 brate_cfg = (brate_cfg >> 1);
5982 rate_index++;
5983 }
5984 rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index);
5985 } else {
5986 rtw_warn_on(1);
5987 }
5988 }
5989 break;
5990 case HW_VAR_SEC_CFG:
5991 {
5992 #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC)
5993 // enable tx enc and rx dec engine, and no key search for MC/BC
5994 rtw_write8(adapter, REG_SECCFG, SCR_NoSKMC|SCR_RxDecEnable|SCR_TxEncEnable);
5995 #elif defined(DYNAMIC_CAMID_ALLOC)
5996 u16 reg_scr_ori;
5997 u16 reg_scr;
5998
5999 reg_scr = reg_scr_ori = rtw_read16(adapter, REG_SECCFG);
6000 reg_scr |= (SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
6001
6002 if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC))
6003 reg_scr |= SCR_CHK_BMC;
6004
6005 if (_rtw_camctl_chk_flags(adapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH))
6006 reg_scr |= SCR_NoSKMC;
6007
6008 if (reg_scr != reg_scr_ori)
6009 rtw_write16(adapter, REG_SECCFG, reg_scr);
6010 #else
6011 rtw_write8(adapter, REG_SECCFG, *((u8*)val));
6012 #endif
6013 }
6014 break;
6015 case HW_VAR_SEC_DK_CFG:
6016 {
6017 struct security_priv *sec = &adapter->securitypriv;
6018 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
6019
6020 if (val) /* Enable default key related setting */
6021 {
6022 reg_scr |= SCR_TXBCUSEDK;
6023 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
6024 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
6025 }
6026 else /* Disable default key related setting */
6027 {
6028 reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
6029 }
6030
6031 rtw_write8(adapter, REG_SECCFG, reg_scr);
6032 }
6033 break;
6034
6035 case HW_VAR_ASIX_IOT:
6036 // enable ASIX IOT function
6037 if (*((u8*)val) == _TRUE) {
6038 // 0xa2e[0]=0 (disable rake receiver)
6039 rtw_write8(adapter, rCCK0_FalseAlarmReport+2,
6040 rtw_read8(adapter, rCCK0_FalseAlarmReport+2) & ~(BIT0));
6041 // 0xa1c=0xa0 (reset channel estimation if signal quality is bad)
6042 rtw_write8(adapter, rCCK0_DSPParameter2, 0xa0);
6043 } else {
6044 // restore reg:0xa2e, reg:0xa1c
6045 rtw_write8(adapter, rCCK0_FalseAlarmReport+2,
6046 rtw_read8(adapter, rCCK0_FalseAlarmReport+2)|(BIT0));
6047 rtw_write8(adapter, rCCK0_DSPParameter2, 0x00);
6048 }
6049 break;
6050 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
6051 case HW_VAR_WOWLAN:
6052 {
6053 struct wowlan_ioctl_param *poidparam;
6054
6055 poidparam = (struct wowlan_ioctl_param *)val;
6056 switch (poidparam->subcode) {
6057 #ifdef CONFIG_WOWLAN
6058 case WOWLAN_PATTERN_CLEAN:
6059 rtw_hal_dl_pattern(adapter, _TRUE);
6060 break;
6061 case WOWLAN_ENABLE:
6062 rtw_hal_wow_enable(adapter);
6063 break;
6064 case WOWLAN_DISABLE:
6065 rtw_hal_wow_disable(adapter);
6066 break;
6067 #endif /*CONFIG_WOWLAN*/
6068 #ifdef CONFIG_AP_WOWLAN
6069 case WOWLAN_AP_ENABLE:
6070 rtw_hal_ap_wow_enable(adapter);
6071 break;
6072 case WOWLAN_AP_DISABLE:
6073 rtw_hal_ap_wow_disable(adapter);
6074 break;
6075 #endif /*CONFIG_AP_WOWLAN*/
6076 default:
6077 break;
6078 }
6079 }
6080 break;
6081 #endif /*defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)*/
6082 default:
6083 if (0)
6084 DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n",
6085 FUNC_ADPT_ARG(adapter), variable);
6086 break;
6087 }
6088
6089 _func_exit_;
6090 }
6091
GetHwReg(_adapter * adapter,u8 variable,u8 * val)6092 void GetHwReg(_adapter *adapter, u8 variable, u8 *val)
6093 {
6094 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
6095
6096 _func_enter_;
6097
6098 switch (variable) {
6099 case HW_VAR_BASIC_RATE:
6100 *((u16*)val) = hal_data->BasicRateSet;
6101 break;
6102 case HW_VAR_RF_TYPE:
6103 *((u8*)val) = hal_data->rf_type;
6104 break;
6105 case HW_VAR_DO_IQK:
6106 *val = hal_data->bNeedIQK;
6107 break;
6108 case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO:
6109 if (hal_is_band_support(adapter, BAND_ON_5G))
6110 *val = _TRUE;
6111 else
6112 *val = _FALSE;
6113
6114 break;
6115 default:
6116 if (0)
6117 DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n",
6118 FUNC_ADPT_ARG(adapter), variable);
6119 break;
6120 }
6121
6122 _func_exit_;
6123 }
6124
6125 u8
SetHalDefVar(_adapter * adapter,HAL_DEF_VARIABLE variable,void * value)6126 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
6127 {
6128 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
6129 u8 bResult = _SUCCESS;
6130
6131 switch(variable) {
6132
6133 case HAL_DEF_DBG_DUMP_RXPKT:
6134 hal_data->bDumpRxPkt = *((u8*)value);
6135 break;
6136 case HAL_DEF_DBG_DUMP_TXPKT:
6137 hal_data->bDumpTxPkt = *((u8*)value);
6138 break;
6139 case HAL_DEF_ANT_DETECT:
6140 hal_data->AntDetection = *((u8 *)value);
6141 break;
6142 case HAL_DEF_DBG_DIS_PWT:
6143 hal_data->bDisableTXPowerTraining = *((u8*)value);
6144 break;
6145 default:
6146 DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable);
6147 bResult = _FAIL;
6148 break;
6149 }
6150
6151 return bResult;
6152 }
6153
6154 #ifdef CONFIG_BEAMFORMING
rtw_hal_query_txbfer_rf_num(_adapter * adapter)6155 u8 rtw_hal_query_txbfer_rf_num(_adapter *adapter)
6156 {
6157 struct registry_priv *pregistrypriv = &adapter->registrypriv;
6158 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
6159
6160 if ((pregistrypriv->beamformer_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter)))
6161 return pregistrypriv->beamformer_rf_num;
6162 else if (IS_HARDWARE_TYPE_8814AE(adapter)
6163 /*
6164 #if defined(CONFIG_USB_HCI)
6165 || (IS_HARDWARE_TYPE_8814AU(adapter) && (pUsbModeMech->CurUsbMode == 2 || pUsbModeMech->HubUsbMode == 2)) //for USB3.0
6166 #endif
6167 */
6168 ) {
6169 /*BF cap provided by Yu Chen, Sean, 2015, 01 */
6170 if (hal_data->rf_type == RF_3T3R)
6171 return 2;
6172 else if (hal_data->rf_type == RF_4T4R)
6173 return 3;
6174 else
6175 return 1;
6176 } else
6177 return 1;
6178
6179 }
rtw_hal_query_txbfee_rf_num(_adapter * adapter)6180 u8 rtw_hal_query_txbfee_rf_num(_adapter *adapter)
6181 {
6182 struct registry_priv *pregistrypriv = &adapter->registrypriv;
6183 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
6184 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
6185
6186 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
6187
6188 if ((pregistrypriv->beamformee_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter)))
6189 return pregistrypriv->beamformee_rf_num;
6190 else if (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter)) {
6191 if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM)
6192 return 2;
6193 else
6194 return 2;/*TODO: May be 3 in the future, by ChenYu. */
6195 } else
6196 return 1;
6197
6198 }
6199 #endif
6200
6201 u8
GetHalDefVar(_adapter * adapter,HAL_DEF_VARIABLE variable,void * value)6202 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
6203 {
6204 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
6205 u8 bResult = _SUCCESS;
6206
6207 switch(variable) {
6208 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
6209 {
6210 struct mlme_priv *pmlmepriv;
6211 struct sta_priv *pstapriv;
6212 struct sta_info *psta;
6213
6214 pmlmepriv = &adapter->mlmepriv;
6215 pstapriv = &adapter->stapriv;
6216 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
6217 if (psta)
6218 {
6219 *((int*)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
6220 }
6221 }
6222 break;
6223 case HAL_DEF_DBG_DUMP_RXPKT:
6224 *((u8*)value) = hal_data->bDumpRxPkt;
6225 break;
6226 case HAL_DEF_DBG_DUMP_TXPKT:
6227 *((u8*)value) = hal_data->bDumpTxPkt;
6228 break;
6229 case HAL_DEF_ANT_DETECT:
6230 *((u8 *)value) = hal_data->AntDetection;
6231 break;
6232 case HAL_DEF_MACID_SLEEP:
6233 *(u8*)value = _FALSE;
6234 break;
6235 case HAL_DEF_TX_PAGE_SIZE:
6236 *(( u32*)value) = PAGE_SIZE_128;
6237 break;
6238 case HAL_DEF_DBG_DIS_PWT:
6239 *(u8*)value = hal_data->bDisableTXPowerTraining;
6240 break;
6241 #ifdef CONFIG_BEAMFORMING
6242 case HAL_DEF_BEAMFORMER_CAP:
6243 *(u8 *)value = rtw_hal_query_txbfer_rf_num(adapter);
6244 break;
6245 case HAL_DEF_BEAMFORMEE_CAP:
6246 *(u8 *)value = rtw_hal_query_txbfee_rf_num(adapter);
6247 break;
6248 #endif
6249 default:
6250 DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable);
6251 bResult = _FAIL;
6252 break;
6253 }
6254
6255 return bResult;
6256 }
6257
SetHalODMVar(PADAPTER Adapter,HAL_ODM_VARIABLE eVariable,PVOID pValue1,BOOLEAN bSet)6258 void SetHalODMVar(
6259 PADAPTER Adapter,
6260 HAL_ODM_VARIABLE eVariable,
6261 PVOID pValue1,
6262 BOOLEAN bSet)
6263 {
6264 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
6265 PDM_ODM_T podmpriv = &pHalData->odmpriv;
6266 //_irqL irqL;
6267 switch(eVariable){
6268 case HAL_ODM_STA_INFO:
6269 {
6270 struct sta_info *psta = (struct sta_info *)pValue1;
6271 if(bSet){
6272 DBG_8192C("### Set STA_(%d) info ###\n",psta->mac_id);
6273 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta);
6274 }
6275 else{
6276 DBG_8192C("### Clean STA_(%d) info ###\n",psta->mac_id);
6277 //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
6278 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL);
6279
6280 //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
6281 }
6282 }
6283 break;
6284 case HAL_ODM_P2P_STATE:
6285 ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet);
6286 break;
6287 case HAL_ODM_WIFI_DISPLAY_STATE:
6288 ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet);
6289 break;
6290 case HAL_ODM_REGULATION:
6291 ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
6292 ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
6293 break;
6294 #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR)
6295 case HAL_ODM_NOISE_MONITOR:
6296 {
6297 struct noise_info *pinfo = (struct noise_info *)pValue1;
6298
6299 #ifdef DBG_NOISE_MONITOR
6300 DBG_8192C("### Noise monitor chan(%d)-bPauseDIG:%d,IGIValue:0x%02x,max_time:%d (ms) ###\n",
6301 pinfo->chan,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time);
6302 #endif
6303
6304 pHalData->noise[pinfo->chan] = ODM_InbandNoise_Monitor(podmpriv,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time);
6305 DBG_871X("chan_%d, noise = %d (dBm)\n",pinfo->chan,pHalData->noise[pinfo->chan]);
6306 #ifdef DBG_NOISE_MONITOR
6307 DBG_871X("noise_a = %d, noise_b = %d noise_all:%d \n",
6308 podmpriv->noise_level.noise[ODM_RF_PATH_A],
6309 podmpriv->noise_level.noise[ODM_RF_PATH_B],
6310 podmpriv->noise_level.noise_all);
6311 #endif
6312 }
6313 break;
6314 #endif/*#ifdef CONFIG_BACKGROUND_NOISE_MONITOR*/
6315
6316 case HAL_ODM_INITIAL_GAIN:
6317 {
6318 u8 rx_gain = *((u8 *)(pValue1));
6319 /*printk("rx_gain:%x\n",rx_gain);*/
6320 if (rx_gain == 0xff) {/*restore rx gain*/
6321 /*ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue);*/
6322 odm_PauseDIG(podmpriv, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, rx_gain);
6323 } else {
6324 /*pDigTable->BackupIGValue = pDigTable->CurIGValue;*/
6325 /*ODM_Write_DIG(podmpriv,rx_gain);*/
6326 odm_PauseDIG(podmpriv, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, rx_gain);
6327 }
6328 }
6329 break;
6330 case HAL_ODM_FA_CNT_DUMP:
6331 if (*((u8 *)pValue1))
6332 podmpriv->DebugComponents |= (ODM_COMP_DIG | ODM_COMP_FA_CNT);
6333 else
6334 podmpriv->DebugComponents &= ~(ODM_COMP_DIG | ODM_COMP_FA_CNT);
6335 break;
6336 case HAL_ODM_DBG_FLAG:
6337 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_DBG_COMP, *((u8Byte *)pValue1));
6338 break;
6339 case HAL_ODM_DBG_LEVEL:
6340 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_DBG_LEVEL, *((u4Byte *)pValue1));
6341 break;
6342 case HAL_ODM_RX_INFO_DUMP:
6343 {
6344 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure(podmpriv , PHYDM_FALSEALMCNT);
6345 pDIG_T pDM_DigTable = &podmpriv->DM_DigTable;
6346 void *sel;
6347
6348 sel = pValue1;
6349
6350 DBG_871X_SEL(sel , "============ Rx Info dump ===================\n");
6351 DBG_871X_SEL(sel , "bLinked = %d, RSSI_Min = %d(%%), CurrentIGI = 0x%x\n", podmpriv->bLinked, podmpriv->RSSI_Min, pDM_DigTable->CurIGValue);
6352 DBG_871X_SEL(sel , "Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n", FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all);
6353
6354 if (podmpriv->bLinked) {
6355 DBG_871X_SEL(sel , "RxRate = %s", HDATA_RATE(podmpriv->RxRate));
6356 DBG_871X_SEL(sel , " RSSI_A = %d(%%), RSSI_B = %d(%%)\n", podmpriv->RSSI_A, podmpriv->RSSI_B);
6357 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
6358 rtw_dump_raw_rssi_info(Adapter, sel);
6359 #endif
6360 }
6361 }
6362 break;
6363
6364 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
6365 case HAL_ODM_AUTO_CHNL_SEL:
6366 {
6367 ACS_OP acs_op = *(ACS_OP *)pValue1;
6368
6369 rtw_phydm_func_set(Adapter, ODM_BB_NHM_CNT);
6370
6371 if (ACS_INIT == acs_op) {
6372 #ifdef DBG_AUTO_CHNL_SEL_NHM
6373 DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_INIT\n", ADPT_ARG(Adapter));
6374 #endif
6375 odm_AutoChannelSelectInit(podmpriv);
6376 } else if (ACS_RESET == acs_op) {
6377 /* Reset statistics for auto channel selection mechanism.*/
6378 #ifdef DBG_AUTO_CHNL_SEL_NHM
6379 DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_RESET\n", ADPT_ARG(Adapter));
6380 #endif
6381 odm_AutoChannelSelectReset(podmpriv);
6382
6383 } else if (ACS_SELECT == acs_op) {
6384 /* Collect NHM measurement result after current channel */
6385 #ifdef DBG_AUTO_CHNL_SEL_NHM
6386 DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_SELECT, CH(%d)\n", ADPT_ARG(Adapter), rtw_get_acs_channel(Adapter));
6387 #endif
6388 odm_AutoChannelSelect(podmpriv, rtw_get_acs_channel(Adapter));
6389 } else
6390 DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: Unexpected OP\n", ADPT_ARG(Adapter));
6391
6392 }
6393 break;
6394 #endif
6395 #ifdef CONFIG_ANTENNA_DIVERSITY
6396 case HAL_ODM_ANTDIV_SELECT:
6397 {
6398 u8 antenna = (*(u8 *)pValue1);
6399
6400 /*switch antenna*/
6401 ODM_UpdateRxIdleAnt(&pHalData->odmpriv, antenna);
6402 /*DBG_871X("==> HAL_ODM_ANTDIV_SELECT, Ant_(%s)\n", (antenna == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");*/
6403
6404 }
6405 break;
6406 #endif
6407
6408 default:
6409 break;
6410 }
6411 }
6412
GetHalODMVar(PADAPTER Adapter,HAL_ODM_VARIABLE eVariable,PVOID pValue1,PVOID pValue2)6413 void GetHalODMVar(
6414 PADAPTER Adapter,
6415 HAL_ODM_VARIABLE eVariable,
6416 PVOID pValue1,
6417 PVOID pValue2)
6418 {
6419 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
6420 PDM_ODM_T podmpriv = &pHalData->odmpriv;
6421
6422 switch (eVariable) {
6423 #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR)
6424 case HAL_ODM_NOISE_MONITOR:
6425 {
6426 u8 chan = *(u8 *)pValue1;
6427 *(s16 *)pValue2 = pHalData->noise[chan];
6428 #ifdef DBG_NOISE_MONITOR
6429 DBG_8192C("### Noise monitor chan(%d)-noise:%d (dBm) ###\n",
6430 chan, pHalData->noise[chan]);
6431 #endif
6432 }
6433 break;
6434 #endif/*#ifdef CONFIG_BACKGROUND_NOISE_MONITOR*/
6435 case HAL_ODM_DBG_FLAG:
6436 *((u8Byte *)pValue1) = podmpriv->DebugComponents;
6437 break;
6438 case HAL_ODM_DBG_LEVEL:
6439 *((u4Byte *)pValue1) = podmpriv->DebugLevel;
6440 break;
6441
6442 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
6443 case HAL_ODM_AUTO_CHNL_SEL:
6444 {
6445 #ifdef DBG_AUTO_CHNL_SEL_NHM
6446 DBG_871X("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: GET_BEST_CHAN\n", ADPT_ARG(Adapter));
6447 #endif
6448 /* Retrieve better channel from NHM mechanism */
6449 if (IsSupported24G(Adapter->registrypriv.wireless_mode))
6450 *((u8 *)(pValue1)) = ODM_GetAutoChannelSelectResult(podmpriv, BAND_ON_2_4G);
6451 if (IsSupported5G(Adapter->registrypriv.wireless_mode))
6452 *((u8 *)(pValue2)) = ODM_GetAutoChannelSelectResult(podmpriv, BAND_ON_5G);
6453 }
6454 break;
6455 #endif
6456 #ifdef CONFIG_ANTENNA_DIVERSITY
6457 case HAL_ODM_ANTDIV_SELECT:
6458 {
6459 pFAT_T pDM_FatTable = &podmpriv->DM_FatTable;
6460 *((u8 *)pValue1) = pDM_FatTable->RxIdleAnt;
6461 }
6462 break;
6463 #endif
6464 case HAL_ODM_INITIAL_GAIN:
6465 {
6466 pDIG_T pDM_DigTable = &podmpriv->DM_DigTable;
6467 *((u8 *)pValue1) = pDM_DigTable->CurIGValue;
6468 }
6469 break;
6470 default:
6471 break;
6472 }
6473 }
6474
6475
rtw_phydm_ability_ops(_adapter * adapter,HAL_PHYDM_OPS ops,u32 ability)6476 u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
6477 {
6478 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
6479 PDM_ODM_T podmpriv = &pHalData->odmpriv;
6480 u32 result = 0;
6481
6482 switch (ops) {
6483 case HAL_PHYDM_DIS_ALL_FUNC:
6484 podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
6485 break;
6486 case HAL_PHYDM_FUNC_SET:
6487 podmpriv->SupportAbility |= ability;
6488 break;
6489 case HAL_PHYDM_FUNC_CLR:
6490 podmpriv->SupportAbility &= ~(ability);
6491 break;
6492 case HAL_PHYDM_ABILITY_BK:
6493 /* dm flag backup*/
6494 podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
6495 break;
6496 case HAL_PHYDM_ABILITY_RESTORE:
6497 /* restore dm flag */
6498 podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
6499 break;
6500 case HAL_PHYDM_ABILITY_SET:
6501 podmpriv->SupportAbility = ability;
6502 break;
6503 case HAL_PHYDM_ABILITY_GET:
6504 result = podmpriv->SupportAbility;
6505 break;
6506 }
6507 return result;
6508 }
6509
6510
6511 BOOLEAN
eqNByte(u8 * str1,u8 * str2,u32 num)6512 eqNByte(
6513 u8* str1,
6514 u8* str2,
6515 u32 num
6516 )
6517 {
6518 if(num==0)
6519 return _FALSE;
6520 while(num>0)
6521 {
6522 num--;
6523 if(str1[num]!=str2[num])
6524 return _FALSE;
6525 }
6526 return _TRUE;
6527 }
6528
6529 //
6530 // Description:
6531 // Translate a character to hex digit.
6532 //
6533 u32
MapCharToHexDigit(IN char chTmp)6534 MapCharToHexDigit(
6535 IN char chTmp
6536 )
6537 {
6538 if(chTmp >= '0' && chTmp <= '9')
6539 return (chTmp - '0');
6540 else if(chTmp >= 'a' && chTmp <= 'f')
6541 return (10 + (chTmp - 'a'));
6542 else if(chTmp >= 'A' && chTmp <= 'F')
6543 return (10 + (chTmp - 'A'));
6544 else
6545 return 0;
6546 }
6547
6548
6549
6550 //
6551 // Description:
6552 // Parse hex number from the string pucStr.
6553 //
6554 BOOLEAN
GetHexValueFromString(IN char * szStr,IN OUT u32 * pu4bVal,IN OUT u32 * pu4bMove)6555 GetHexValueFromString(
6556 IN char* szStr,
6557 IN OUT u32* pu4bVal,
6558 IN OUT u32* pu4bMove
6559 )
6560 {
6561 char* szScan = szStr;
6562
6563 // Check input parameter.
6564 if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL)
6565 {
6566 DBG_871X("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove);
6567 return _FALSE;
6568 }
6569
6570 // Initialize output.
6571 *pu4bMove = 0;
6572 *pu4bVal = 0;
6573
6574 // Skip leading space.
6575 while( *szScan != '\0' &&
6576 (*szScan == ' ' || *szScan == '\t') )
6577 {
6578 szScan++;
6579 (*pu4bMove)++;
6580 }
6581
6582 // Skip leading '0x' or '0X'.
6583 if(*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X'))
6584 {
6585 szScan += 2;
6586 (*pu4bMove) += 2;
6587 }
6588
6589 // Check if szScan is now pointer to a character for hex digit,
6590 // if not, it means this is not a valid hex number.
6591 if(!IsHexDigit(*szScan))
6592 {
6593 return _FALSE;
6594 }
6595
6596 // Parse each digit.
6597 do
6598 {
6599 (*pu4bVal) <<= 4;
6600 *pu4bVal += MapCharToHexDigit(*szScan);
6601
6602 szScan++;
6603 (*pu4bMove)++;
6604 } while(IsHexDigit(*szScan));
6605
6606 return _TRUE;
6607 }
6608
6609 BOOLEAN
GetFractionValueFromString(IN char * szStr,IN OUT u8 * pInteger,IN OUT u8 * pFraction,IN OUT u32 * pu4bMove)6610 GetFractionValueFromString(
6611 IN char* szStr,
6612 IN OUT u8* pInteger,
6613 IN OUT u8* pFraction,
6614 IN OUT u32* pu4bMove
6615 )
6616 {
6617 char *szScan = szStr;
6618
6619 // Initialize output.
6620 *pu4bMove = 0;
6621 *pInteger = 0;
6622 *pFraction = 0;
6623
6624 // Skip leading space.
6625 while ( *szScan != '\0' && (*szScan == ' ' || *szScan == '\t') ) {
6626 ++szScan;
6627 ++(*pu4bMove);
6628 }
6629
6630 // Parse each digit.
6631 do {
6632 (*pInteger) *= 10;
6633 *pInteger += ( *szScan - '0' );
6634
6635 ++szScan;
6636 ++(*pu4bMove);
6637
6638 if ( *szScan == '.' )
6639 {
6640 ++szScan;
6641 ++(*pu4bMove);
6642
6643 if ( *szScan < '0' || *szScan > '9' )
6644 return _FALSE;
6645 else {
6646 *pFraction = *szScan - '0';
6647 ++szScan;
6648 ++(*pu4bMove);
6649 return _TRUE;
6650 }
6651 }
6652 } while(*szScan >= '0' && *szScan <= '9');
6653
6654 return _TRUE;
6655 }
6656
6657 //
6658 // Description:
6659 // Return TRUE if szStr is comment out with leading "//".
6660 //
6661 BOOLEAN
IsCommentString(IN char * szStr)6662 IsCommentString(
6663 IN char *szStr
6664 )
6665 {
6666 if(*szStr == '/' && *(szStr+1) == '/')
6667 {
6668 return _TRUE;
6669 }
6670 else
6671 {
6672 return _FALSE;
6673 }
6674 }
6675
6676 BOOLEAN
GetU1ByteIntegerFromStringInDecimal(IN char * Str,IN OUT u8 * pInt)6677 GetU1ByteIntegerFromStringInDecimal(
6678 IN char* Str,
6679 IN OUT u8* pInt
6680 )
6681 {
6682 u16 i = 0;
6683 *pInt = 0;
6684
6685 while ( Str[i] != '\0' )
6686 {
6687 if ( Str[i] >= '0' && Str[i] <= '9' )
6688 {
6689 *pInt *= 10;
6690 *pInt += ( Str[i] - '0' );
6691 }
6692 else
6693 {
6694 return _FALSE;
6695 }
6696 ++i;
6697 }
6698
6699 return _TRUE;
6700 }
6701
6702 // <20121004, Kordan> For example,
6703 // ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]".
6704 // If RightQualifier does not exist, it will hang on in the while loop
6705 BOOLEAN
ParseQualifiedString(IN char * In,IN OUT u32 * Start,OUT char * Out,IN char LeftQualifier,IN char RightQualifier)6706 ParseQualifiedString(
6707 IN char* In,
6708 IN OUT u32* Start,
6709 OUT char* Out,
6710 IN char LeftQualifier,
6711 IN char RightQualifier
6712 )
6713 {
6714 u32 i = 0, j = 0;
6715 char c = In[(*Start)++];
6716
6717 if (c != LeftQualifier)
6718 return _FALSE;
6719
6720 i = (*Start);
6721 while ((c = In[(*Start)++]) != RightQualifier)
6722 ; // find ']'
6723 j = (*Start) - 2;
6724 strncpy((char *)Out, (const char*)(In+i), j-i+1);
6725
6726 return _TRUE;
6727 }
6728
6729 BOOLEAN
isAllSpaceOrTab(u8 * data,u8 size)6730 isAllSpaceOrTab(
6731 u8* data,
6732 u8 size
6733 )
6734 {
6735 u8 cnt = 0, NumOfSpaceAndTab = 0;
6736
6737 while( size > cnt )
6738 {
6739 if ( data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0' )
6740 ++NumOfSpaceAndTab;
6741
6742 ++cnt;
6743 }
6744
6745 return size == NumOfSpaceAndTab;
6746 }
6747
6748
rtw_hal_check_rxfifo_full(_adapter * adapter)6749 void rtw_hal_check_rxfifo_full(_adapter *adapter)
6750 {
6751 struct dvobj_priv *psdpriv = adapter->dvobj;
6752 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
6753 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
6754 int save_cnt=_FALSE;
6755
6756 //switch counter to RX fifo
6757 if (IS_8188E(pHalData->VersionID) || IS_8188F(pHalData->VersionID)
6758 || IS_8812_SERIES(pHalData->VersionID) || IS_8821_SERIES(pHalData->VersionID)
6759 || IS_8723B_SERIES(pHalData->VersionID) || IS_8192E(pHalData->VersionID) || IS_8703B_SERIES(pHalData->VersionID))
6760 {
6761 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0);
6762 save_cnt = _TRUE;
6763 }
6764 else
6765 {
6766 //todo: other chips
6767 }
6768
6769
6770 if (save_cnt) {
6771 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
6772 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
6773 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
6774 } else {
6775 /* special value to indicate no implementation */
6776 pdbgpriv->dbg_rx_fifo_last_overflow = 1;
6777 pdbgpriv->dbg_rx_fifo_curr_overflow = 1;
6778 pdbgpriv->dbg_rx_fifo_diff_overflow = 1;
6779 }
6780 }
6781
linked_info_dump(_adapter * padapter,u8 benable)6782 void linked_info_dump(_adapter *padapter,u8 benable)
6783 {
6784 struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
6785
6786 if(padapter->bLinkInfoDump == benable)
6787 return;
6788
6789 DBG_871X("%s %s \n",__FUNCTION__,(benable)?"enable":"disable");
6790
6791 if(benable){
6792 #ifdef CONFIG_LPS
6793 pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;//keep org value
6794 rtw_pm_set_lps(padapter,PS_MODE_ACTIVE);
6795 #endif
6796
6797 #ifdef CONFIG_IPS
6798 pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;//keep org value
6799 rtw_pm_set_ips(padapter,IPS_NONE);
6800 #endif
6801 }
6802 else{
6803 #ifdef CONFIG_IPS
6804 rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode);
6805 #endif // CONFIG_IPS
6806
6807 #ifdef CONFIG_LPS
6808 rtw_pm_set_lps(padapter, pwrctrlpriv->org_power_mgnt );
6809 #endif // CONFIG_LPS
6810 }
6811 padapter->bLinkInfoDump = benable ;
6812 }
6813
6814 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
rtw_get_raw_rssi_info(void * sel,_adapter * padapter)6815 void rtw_get_raw_rssi_info(void *sel, _adapter *padapter)
6816 {
6817 u8 isCCKrate,rf_path;
6818 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
6819 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
6820
6821 DBG_871X_SEL_NL(sel,"RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n",
6822 HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
6823 isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE;
6824
6825 if(isCCKrate)
6826 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
6827
6828 for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
6829 {
6830 DBG_871X_SEL_NL(sel, "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)\n"
6831 , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]);
6832
6833 if(!isCCKrate){
6834 DBG_871X_SEL_NL(sel,"\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n",
6835 psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]);
6836 }
6837 }
6838 }
6839
rtw_dump_raw_rssi_info(_adapter * padapter,void * sel)6840 void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel)
6841 {
6842 u8 isCCKrate,rf_path;
6843 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
6844 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
6845 DBG_871X_SEL(sel, "============ RAW Rx Info dump ===================\n");
6846 DBG_871X_SEL(sel, "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
6847
6848 isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE;
6849
6850 if(isCCKrate)
6851 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
6852
6853 for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
6854 {
6855 DBG_871X_SEL(sel , "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)"
6856 , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]);
6857
6858 if (!isCCKrate)
6859 DBG_871X_SEL(sel , ",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]);
6860 else
6861 DBG_871X_SEL(sel , "\n");
6862
6863 }
6864 }
6865
rtw_store_phy_info(_adapter * padapter,union recv_frame * prframe)6866 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe)
6867 {
6868 u8 isCCKrate,rf_path;
6869 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
6870 struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
6871
6872 PODM_PHY_INFO_T pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
6873 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
6874
6875 psample_pkt_rssi->data_rate = pattrib->data_rate;
6876 isCCKrate = (pattrib->data_rate <= DESC_RATE11M)?TRUE :FALSE;
6877
6878 psample_pkt_rssi->pwdball = pPhyInfo->RxPWDBAll;
6879 psample_pkt_rssi->pwr_all = pPhyInfo->RecvSignalPower;
6880
6881 for(rf_path = 0;rf_path<pHalData->NumTotalRFPath;rf_path++)
6882 {
6883 psample_pkt_rssi->mimo_signal_strength[rf_path] = pPhyInfo->RxMIMOSignalStrength[rf_path];
6884 psample_pkt_rssi->mimo_signal_quality[rf_path] = pPhyInfo->RxMIMOSignalQuality[rf_path];
6885 if(!isCCKrate){
6886 psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path];
6887 psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path];
6888 }
6889 }
6890 }
6891 #endif
6892
check_phy_efuse_tx_power_info_valid(PADAPTER padapter)6893 int check_phy_efuse_tx_power_info_valid(PADAPTER padapter) {
6894 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
6895 u8* pContent = pHalData->efuse_eeprom_data;
6896 int index = 0;
6897 u16 tx_index_offset = 0x0000;
6898
6899 switch (rtw_get_chip_type(padapter)) {
6900 case RTL8723B:
6901 tx_index_offset = EEPROM_TX_PWR_INX_8723B;
6902 break;
6903 case RTL8703B:
6904 tx_index_offset = EEPROM_TX_PWR_INX_8703B;
6905 break;
6906 case RTL8188E:
6907 tx_index_offset = EEPROM_TX_PWR_INX_88E;
6908 break;
6909 case RTL8188F:
6910 tx_index_offset = EEPROM_TX_PWR_INX_8188F;
6911 break;
6912 case RTL8192E:
6913 tx_index_offset = EEPROM_TX_PWR_INX_8192E;
6914 break;
6915 case RTL8821:
6916 tx_index_offset = EEPROM_TX_PWR_INX_8821;
6917 break;
6918 case RTL8812:
6919 tx_index_offset = EEPROM_TX_PWR_INX_8812;
6920 break;
6921 case RTL8814A:
6922 tx_index_offset = EEPROM_TX_PWR_INX_8814;
6923 break;
6924 default:
6925 tx_index_offset = 0x0010;
6926 break;
6927 }
6928
6929 /* TODO: chacking length by ICs */
6930 for (index = 0 ; index < 11 ; index++) {
6931 if (pContent[tx_index_offset + index] == 0xFF)
6932 return _FALSE;
6933 }
6934 return _TRUE;
6935 }
6936
hal_efuse_macaddr_offset(_adapter * adapter)6937 int hal_efuse_macaddr_offset(_adapter *adapter)
6938 {
6939 u8 interface_type = 0;
6940 int addr_offset = -1;
6941
6942 interface_type = rtw_get_intf_type(adapter);
6943
6944 switch (rtw_get_chip_type(adapter)) {
6945 #ifdef CONFIG_RTL8723B
6946 case RTL8723B:
6947 if (interface_type == RTW_USB)
6948 addr_offset = EEPROM_MAC_ADDR_8723BU;
6949 else if (interface_type == RTW_SDIO)
6950 addr_offset = EEPROM_MAC_ADDR_8723BS;
6951 else if (interface_type == RTW_PCIE)
6952 addr_offset = EEPROM_MAC_ADDR_8723BE;
6953 break;
6954 #endif
6955 #ifdef CONFIG_RTL8703B
6956 case RTL8703B:
6957 if (interface_type == RTW_USB)
6958 addr_offset = EEPROM_MAC_ADDR_8703BU;
6959 else if (interface_type == RTW_SDIO)
6960 addr_offset = EEPROM_MAC_ADDR_8703BS;
6961 break;
6962 #endif
6963 #ifdef CONFIG_RTL8188E
6964 case RTL8188E:
6965 if (interface_type == RTW_USB)
6966 addr_offset = EEPROM_MAC_ADDR_88EU;
6967 else if (interface_type == RTW_SDIO)
6968 addr_offset = EEPROM_MAC_ADDR_88ES;
6969 else if (interface_type == RTW_PCIE)
6970 addr_offset = EEPROM_MAC_ADDR_88EE;
6971 break;
6972 #endif
6973 #ifdef CONFIG_RTL8188F
6974 case RTL8188F:
6975 if (interface_type == RTW_USB)
6976 addr_offset = EEPROM_MAC_ADDR_8188FU;
6977 else if (interface_type == RTW_SDIO)
6978 addr_offset = EEPROM_MAC_ADDR_8188FS;
6979 break;
6980 #endif
6981 #ifdef CONFIG_RTL8812A
6982 case RTL8812:
6983 if (interface_type == RTW_USB)
6984 addr_offset = EEPROM_MAC_ADDR_8812AU;
6985 else if (interface_type == RTW_PCIE)
6986 addr_offset = EEPROM_MAC_ADDR_8812AE;
6987 break;
6988 #endif
6989 #ifdef CONFIG_RTL8821A
6990 case RTL8821:
6991 if (interface_type == RTW_USB)
6992 addr_offset = EEPROM_MAC_ADDR_8821AU;
6993 else if (interface_type == RTW_SDIO)
6994 addr_offset = EEPROM_MAC_ADDR_8821AS;
6995 else if (interface_type == RTW_PCIE)
6996 addr_offset = EEPROM_MAC_ADDR_8821AE;
6997 break;
6998 #endif
6999 #ifdef CONFIG_RTL8192E
7000 case RTL8192E:
7001 if (interface_type == RTW_USB)
7002 addr_offset = EEPROM_MAC_ADDR_8192EU;
7003 else if (interface_type == RTW_SDIO)
7004 addr_offset = EEPROM_MAC_ADDR_8192ES;
7005 else if (interface_type == RTW_PCIE)
7006 addr_offset = EEPROM_MAC_ADDR_8192EE;
7007 break;
7008 #endif
7009 #ifdef CONFIG_RTL8814A
7010 case RTL8814A:
7011 if (interface_type == RTW_USB)
7012 addr_offset = EEPROM_MAC_ADDR_8814AU;
7013 else if (interface_type == RTW_PCIE)
7014 addr_offset = EEPROM_MAC_ADDR_8814AE;
7015 break;
7016 #endif
7017 }
7018
7019 if (addr_offset == -1) {
7020 DBG_871X_LEVEL(_drv_err_, "%s: unknown combination - chip_type:%u, interface:%u\n"
7021 , __func__, rtw_get_chip_type(adapter), rtw_get_intf_type(adapter));
7022 }
7023
7024 return addr_offset;
7025 }
7026
Hal_GetPhyEfuseMACAddr(PADAPTER padapter,u8 * mac_addr)7027 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr)
7028 {
7029 int ret = _FAIL;
7030 int addr_offset;
7031
7032 addr_offset = hal_efuse_macaddr_offset(padapter);
7033 if (addr_offset == -1)
7034 goto exit;
7035
7036 ret = rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr);
7037
7038 exit:
7039 return ret;
7040 }
7041
7042 #ifdef CONFIG_EFUSE_CONFIG_FILE
Hal_readPGDataFromConfigFile(PADAPTER padapter)7043 u32 Hal_readPGDataFromConfigFile(PADAPTER padapter)
7044 {
7045 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
7046 u32 ret;
7047
7048 ret = rtw_read_efuse_from_file(EFUSE_MAP_PATH, hal_data->efuse_eeprom_data);
7049 hal_data->efuse_file_status = ((ret == _FAIL) ? EFUSE_FILE_FAILED : EFUSE_FILE_LOADED);
7050
7051 return ret;
7052 }
7053
Hal_ReadMACAddrFromFile(PADAPTER padapter,u8 * mac_addr)7054 u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr)
7055 {
7056 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
7057 u32 ret = _FAIL;
7058
7059 if (rtw_read_macaddr_from_file(WIFIMAC_PATH, mac_addr) == _SUCCESS
7060 && rtw_check_invalid_mac_address(mac_addr, _TRUE) == _FALSE
7061 ) {
7062 hal_data->macaddr_file_status = MACADDR_FILE_LOADED;
7063 ret = _SUCCESS;
7064 } else {
7065 hal_data->macaddr_file_status = MACADDR_FILE_FAILED;
7066 }
7067
7068 return ret;
7069 }
7070 #endif /* CONFIG_EFUSE_CONFIG_FILE */
7071
hal_config_macaddr(_adapter * adapter,bool autoload_fail)7072 int hal_config_macaddr(_adapter *adapter, bool autoload_fail)
7073 {
7074 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
7075 u8 addr[ETH_ALEN];
7076 int addr_offset = hal_efuse_macaddr_offset(adapter);
7077 u8 *hw_addr = NULL;
7078 int ret = _SUCCESS;
7079
7080 if (autoload_fail)
7081 goto bypass_hw_pg;
7082
7083 if (addr_offset != -1)
7084 hw_addr = &hal_data->efuse_eeprom_data[addr_offset];
7085
7086 #ifdef CONFIG_EFUSE_CONFIG_FILE
7087 /* if the hw_addr is written by efuse file, set to NULL */
7088 if (hal_data->efuse_file_status == EFUSE_FILE_LOADED)
7089 hw_addr = NULL;
7090 #endif
7091
7092 if (!hw_addr) {
7093 /* try getting hw pg data */
7094 if (Hal_GetPhyEfuseMACAddr(adapter, addr) == _SUCCESS)
7095 hw_addr = addr;
7096 }
7097
7098 /* check hw pg data */
7099 if (hw_addr && rtw_check_invalid_mac_address(hw_addr, _TRUE) == _FALSE) {
7100 _rtw_memcpy(hal_data->EEPROMMACAddr, hw_addr, ETH_ALEN);
7101 goto exit;
7102 }
7103
7104 bypass_hw_pg:
7105
7106 #ifdef CONFIG_EFUSE_CONFIG_FILE
7107 /* check wifi mac file */
7108 if (Hal_ReadMACAddrFromFile(adapter, addr) == _SUCCESS) {
7109 _rtw_memcpy(hal_data->EEPROMMACAddr, addr, ETH_ALEN);
7110 goto exit;
7111 }
7112 #endif
7113
7114 _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN);
7115 ret = _FAIL;
7116
7117 exit:
7118 return ret;
7119 }
7120
7121 #ifdef CONFIG_RF_GAIN_OFFSET
7122 u32 Array_kfreemap[] = {
7123 0x08,0xe,
7124 0x06,0xc,
7125 0x04,0xa,
7126 0x02,0x8,
7127 0x00,0x6,
7128 0x03,0x4,
7129 0x05,0x2,
7130 0x07,0x0,
7131 0x09,0x0,
7132 0x0c,0x0,
7133 };
7134
rtw_bb_rf_gain_offset(_adapter * padapter)7135 void rtw_bb_rf_gain_offset(_adapter *padapter)
7136 {
7137 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7138 struct registry_priv *registry_par = &padapter->registrypriv;
7139 struct kfree_data_t *kfree_data = &pHalData->kfree_data;
7140 u8 value = pHalData->EEPROMRFGainOffset;
7141 u8 tmp = 0x3e;
7142 u32 res, i = 0;
7143 u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32);
7144 pu4Byte Array = Array_kfreemap;
7145 u4Byte v1 = 0, v2 = 0, GainValue = 0, target = 0;
7146
7147 if (registry_par->RegRfKFreeEnable == 2) {
7148 DBG_871X("Registry kfree default force disable.\n");
7149 return;
7150 }
7151
7152 #if defined(CONFIG_RTL8723B)
7153 if (value & BIT4 || (registry_par->RegRfKFreeEnable == 1)) {
7154 DBG_871X("Offset RF Gain.\n");
7155 DBG_871X("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n",pHalData->EEPROMRFGainVal);
7156
7157 if(pHalData->EEPROMRFGainVal != 0xff){
7158
7159 if(pHalData->ant_path == ODM_RF_PATH_A) {
7160 GainValue=(pHalData->EEPROMRFGainVal & 0x0f);
7161
7162 } else {
7163 GainValue=(pHalData->EEPROMRFGainVal & 0xf0)>>4;
7164 }
7165 DBG_871X("Ant PATH_%d GainValue Offset = 0x%x\n",(pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B),GainValue);
7166
7167 for (i = 0; i < ArrayLen; i += 2 )
7168 {
7169 //DBG_871X("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x \n",i,Array[i],Array[i]+1);
7170 v1 = Array[i];
7171 v2 = Array[i+1];
7172 if ( v1 == GainValue ) {
7173 DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2);
7174 target=v2;
7175 break;
7176 }
7177 }
7178 DBG_871X("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",pHalData->EEPROMRFGainVal,target);
7179
7180 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
7181 DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res);
7182 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
7183 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
7184
7185 DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res);
7186
7187 }else {
7188
7189 DBG_871X("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",pHalData->EEPROMRFGainVal);
7190 }
7191 } else {
7192 DBG_871X("Using the default RF gain.\n");
7193 }
7194
7195 #elif defined(CONFIG_RTL8188E)
7196 if (value & BIT4 || (registry_par->RegRfKFreeEnable == 1)) {
7197 DBG_871X("8188ES Offset RF Gain.\n");
7198 DBG_871X("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n",
7199 pHalData->EEPROMRFGainVal);
7200
7201 if (pHalData->EEPROMRFGainVal != 0xff) {
7202 res = rtw_hal_read_rfreg(padapter, RF_PATH_A,
7203 REG_RF_BB_GAIN_OFFSET, 0xffffffff);
7204
7205 DBG_871X("Offset RF Gain. reg 0x55=0x%x\n",res);
7206 res &= 0xfff87fff;
7207
7208 res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15;
7209 DBG_871X("Offset RF Gain. res=0x%x\n",res);
7210
7211 rtw_hal_write_rfreg(padapter, RF_PATH_A,
7212 REG_RF_BB_GAIN_OFFSET,
7213 RF_GAIN_OFFSET_MASK, res);
7214 } else {
7215 DBG_871X("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n",
7216 pHalData->EEPROMRFGainVal);
7217 }
7218 } else {
7219 DBG_871X("Using the default RF gain.\n");
7220 }
7221 #else
7222 /* TODO: call this when channel switch */
7223 if (kfree_data->flag & KFREE_FLAG_ON)
7224 rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */
7225 #endif
7226
7227 }
7228 #endif //CONFIG_RF_GAIN_OFFSET
7229
kfree_data_is_bb_gain_empty(struct kfree_data_t * data)7230 bool kfree_data_is_bb_gain_empty(struct kfree_data_t *data)
7231 {
7232 #ifdef CONFIG_RF_GAIN_OFFSET
7233 int i, j;
7234
7235 for (i = 0; i < BB_GAIN_NUM; i++)
7236 for (j = 0; j < RF_PATH_MAX; j++)
7237 if (data->bb_gain[i][j] != 0)
7238 return 0;
7239 #endif
7240 return 1;
7241 }
7242
7243 #ifdef CONFIG_USB_RX_AGGREGATION
rtw_set_usb_agg_by_mode_normal(_adapter * padapter,u8 cur_wireless_mode)7244 void rtw_set_usb_agg_by_mode_normal(_adapter *padapter, u8 cur_wireless_mode)
7245 {
7246 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7247 if(cur_wireless_mode < WIRELESS_11_24N
7248 && cur_wireless_mode > 0) //ABG mode
7249 {
7250 #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
7251 u32 remainder = 0;
7252 u8 quotient = 0;
7253
7254 remainder = MAX_RECVBUF_SZ % (4*1024);
7255 quotient = (u8)(MAX_RECVBUF_SZ >> 12);
7256
7257 if (quotient > 5) {
7258 pHalData->RegAcUsbDmaSize = 0x6;
7259 pHalData->RegAcUsbDmaTime = 0x10;
7260 } else {
7261 if (remainder >= 2048) {
7262 pHalData->RegAcUsbDmaSize = quotient;
7263 pHalData->RegAcUsbDmaTime = 0x10;
7264 } else {
7265 pHalData->RegAcUsbDmaSize = (quotient-1);
7266 pHalData->RegAcUsbDmaTime = 0x10;
7267 }
7268 }
7269 #else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */
7270 if(0x6 != pHalData->RegAcUsbDmaSize || 0x10 !=pHalData->RegAcUsbDmaTime)
7271 {
7272 pHalData->RegAcUsbDmaSize = 0x6;
7273 pHalData->RegAcUsbDmaTime = 0x10;
7274 rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,
7275 pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8));
7276 }
7277 #endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
7278
7279 }
7280 else if(cur_wireless_mode >= WIRELESS_11_24N
7281 && cur_wireless_mode <= WIRELESS_MODE_MAX)//N AC mode
7282 {
7283 #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
7284 u32 remainder = 0;
7285 u8 quotient = 0;
7286
7287 remainder = MAX_RECVBUF_SZ % (4*1024);
7288 quotient = (u8)(MAX_RECVBUF_SZ >> 12);
7289
7290 if (quotient > 5) {
7291 pHalData->RegAcUsbDmaSize = 0x5;
7292 pHalData->RegAcUsbDmaTime = 0x20;
7293 } else {
7294 if (remainder >= 2048) {
7295 pHalData->RegAcUsbDmaSize = quotient;
7296 pHalData->RegAcUsbDmaTime = 0x10;
7297 } else {
7298 pHalData->RegAcUsbDmaSize = (quotient-1);
7299 pHalData->RegAcUsbDmaTime = 0x10;
7300 }
7301 }
7302 #else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */
7303 if(0x5 != pHalData->RegAcUsbDmaSize || 0x20 !=pHalData->RegAcUsbDmaTime)
7304 {
7305 pHalData->RegAcUsbDmaSize = 0x5;
7306 pHalData->RegAcUsbDmaTime = 0x20;
7307 rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,
7308 pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8));
7309 }
7310 #endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
7311
7312 }
7313 else
7314 {
7315 /* DBG_871X("%s: Unknow wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */
7316 }
7317 }
7318
rtw_set_usb_agg_by_mode_customer(_adapter * padapter,u8 cur_wireless_mode,u8 UsbDmaSize,u8 Legacy_UsbDmaSize)7319 void rtw_set_usb_agg_by_mode_customer(_adapter *padapter, u8 cur_wireless_mode, u8 UsbDmaSize, u8 Legacy_UsbDmaSize)
7320 {
7321 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7322
7323 if (cur_wireless_mode < WIRELESS_11_24N
7324 && cur_wireless_mode > 0) { /* ABG mode */
7325 if (Legacy_UsbDmaSize != pHalData->RegAcUsbDmaSize
7326 || 0x10 != pHalData->RegAcUsbDmaTime) {
7327 pHalData->RegAcUsbDmaSize = Legacy_UsbDmaSize;
7328 pHalData->RegAcUsbDmaTime = 0x10;
7329 rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,
7330 pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8));
7331 }
7332 } else if (cur_wireless_mode >= WIRELESS_11_24N
7333 && cur_wireless_mode <= WIRELESS_MODE_MAX) { /* N AC mode */
7334 if (UsbDmaSize != pHalData->RegAcUsbDmaSize
7335 || 0x20 != pHalData->RegAcUsbDmaTime) {
7336 pHalData->RegAcUsbDmaSize = UsbDmaSize;
7337 pHalData->RegAcUsbDmaTime = 0x20;
7338 rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,
7339 pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8));
7340 }
7341 } else {
7342 /* DBG_871X("%s: Unknown wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */
7343 }
7344 }
7345
rtw_set_usb_agg_by_mode(_adapter * padapter,u8 cur_wireless_mode)7346 void rtw_set_usb_agg_by_mode(_adapter *padapter, u8 cur_wireless_mode)
7347 {
7348 #ifdef CONFIG_PLATFORM_NOVATEK_NT72668
7349 rtw_set_usb_agg_by_mode_customer(padapter, cur_wireless_mode, 0x3, 0x3);
7350 return;
7351 #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
7352
7353 rtw_set_usb_agg_by_mode_normal(padapter, cur_wireless_mode);
7354 }
7355 #endif //CONFIG_USB_RX_AGGREGATION
7356
7357 //To avoid RX affect TX throughput
dm_DynamicUsbTxAgg(_adapter * padapter,u8 from_timer)7358 void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer)
7359 {
7360 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
7361 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
7362 struct mlme_ext_priv *pmlmeextpriv = &(padapter->mlmeextpriv);
7363 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7364 u8 cur_wireless_mode = pmlmeextpriv->cur_wireless_mode;
7365 #ifdef CONFIG_CONCURRENT_MODE
7366 struct mlme_ext_priv *pbuddymlmeextpriv = &(padapter->pbuddy_adapter->mlmeextpriv);
7367 #endif //CONFIG_CONCURRENT_MODE
7368
7369 #ifdef CONFIG_USB_RX_AGGREGATION
7370 if(IS_HARDWARE_TYPE_8821U(padapter) )//|| IS_HARDWARE_TYPE_8192EU(padapter))
7371 {
7372 //This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB
7373 if((pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
7374 {
7375 if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30)
7376 rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1010);
7377 else if (pdvobjpriv->traffic_stat.last_tx_bytes > 220000 && pdvobjpriv->traffic_stat.cur_rx_tp < 30)
7378 rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1006);
7379 else
7380 rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K
7381
7382 //DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp);
7383 }
7384 }
7385 else if(IS_HARDWARE_TYPE_8812(padapter))
7386 {
7387 #ifdef CONFIG_CONCURRENT_MODE
7388 if(rtw_linked_check(padapter) == _TRUE && rtw_linked_check(padapter->pbuddy_adapter) == _TRUE)
7389 {
7390 if(pbuddymlmeextpriv->cur_wireless_mode >= pmlmeextpriv->cur_wireless_mode)
7391 cur_wireless_mode = pbuddymlmeextpriv->cur_wireless_mode;
7392 else
7393 cur_wireless_mode = pmlmeextpriv->cur_wireless_mode;
7394
7395 rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode);
7396 }
7397 else if (rtw_linked_check(padapter) == _TRUE && rtw_linked_check(padapter->pbuddy_adapter) == _FALSE)
7398 {
7399 rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode);
7400 }
7401 #else //!CONFIG_CONCURRENT_MODE
7402 rtw_set_usb_agg_by_mode(padapter,cur_wireless_mode);
7403 #endif //CONFIG_CONCURRENT_MODE
7404 #ifdef CONFIG_PLATFORM_NOVATEK_NT72668
7405 } else {
7406 rtw_set_usb_agg_by_mode(padapter, cur_wireless_mode);
7407 #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
7408 }
7409 #endif
7410 }
7411
7412 //bus-agg check for SoftAP mode
rtw_hal_busagg_qsel_check(_adapter * padapter,u8 pre_qsel,u8 next_qsel)7413 inline u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel)
7414 {
7415 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
7416 u8 chk_rst = _SUCCESS;
7417
7418 if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
7419 return chk_rst;
7420
7421 //if((pre_qsel == 0xFF)||(next_qsel== 0xFF))
7422 // return chk_rst;
7423
7424 if( ((pre_qsel == QSLT_HIGH)||((next_qsel== QSLT_HIGH)))
7425 && (pre_qsel != next_qsel )){
7426 //DBG_871X("### bus-agg break cause of qsel misatch, pre_qsel=0x%02x,next_qsel=0x%02x ###\n",
7427 // pre_qsel,next_qsel);
7428 chk_rst = _FAIL;
7429 }
7430 return chk_rst;
7431 }
7432
7433 /*
7434 * Description:
7435 * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload
7436 * contant.
7437 *
7438 * Input:
7439 * adapter: adapter pointer.
7440 * page_num: The max. page number that user want to dump.
7441 * page_size: page size of each page. eg. 128 bytes, 256 bytes, 512byte.
7442 */
dump_TX_FIFO(_adapter * padapter,u8 page_num,u16 page_size)7443 void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){
7444
7445 int i;
7446 u8 val = 0;
7447 u8 base = 0;
7448 u32 addr = 0;
7449 u32 count = (page_size / 8);
7450
7451 if (page_num <= 0) {
7452 DBG_871X("!!%s: incorrect input page_num paramter!\n", __func__);
7453 return;
7454 }
7455
7456 if (page_size < 128 || page_size > 512) {
7457 DBG_871X("!!%s: incorrect input page_size paramter!\n", __func__);
7458 return;
7459 }
7460
7461 DBG_871X("+%s+\n", __func__);
7462 val = rtw_read8(padapter, 0x106);
7463 rtw_write8(padapter, 0x106, 0x69);
7464 DBG_871X("0x106: 0x%02x\n", val);
7465 base = rtw_read8(padapter, 0x209);
7466 DBG_871X("0x209: 0x%02x\n", base);
7467
7468 addr = ((base) * page_size)/8;
7469 for (i = 0 ; i < page_num * count ; i+=2) {
7470 rtw_write32(padapter, 0x140, addr + i);
7471 printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148));
7472 rtw_write32(padapter, 0x140, addr + i + 1);
7473 printk(" %08x %08x \n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148));
7474 }
7475 }
7476
7477 #ifdef CONFIG_GPIO_API
rtw_hal_get_gpio(_adapter * adapter,u8 gpio_num)7478 u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num)
7479 {
7480 u8 value = 0;
7481 u8 direction = 0;
7482 u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2;
7483 u8 gpio_num_to_set = gpio_num;
7484 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
7485
7486 if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL)
7487 return value;
7488
7489 rtw_ps_deny(adapter, PS_DENY_IOCTL);
7490
7491 DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate);
7492 LeaveAllPowerSaveModeDirect(adapter);
7493
7494 if (gpio_num > 7) {
7495 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2;
7496 gpio_num_to_set = gpio_num - 8;
7497 }
7498
7499 /* Read GPIO Direction */
7500 direction = (rtw_read8(adapter, gpio_ctrl_reg_to_set) & BIT(gpio_num_to_set)) >> gpio_num;
7501
7502 /* According the direction to read register value */
7503 if( direction )
7504 value = (rtw_read8(adapter, gpio_ctrl_reg_to_set)& BIT(gpio_num_to_set)) >> gpio_num;
7505 else
7506 value = (rtw_read8(adapter, gpio_ctrl_reg_to_set)& BIT(gpio_num_to_set)) >> gpio_num;
7507
7508 rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
7509 DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value);
7510
7511 return value;
7512 }
7513
rtw_hal_set_gpio_output_value(_adapter * adapter,u8 gpio_num,bool isHigh)7514 int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, bool isHigh)
7515 {
7516 u8 direction = 0;
7517 u8 res = -1;
7518 u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2;
7519 u8 gpio_num_to_set = gpio_num;
7520
7521 if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL)
7522 return -1;
7523
7524 rtw_ps_deny(adapter, PS_DENY_IOCTL);
7525
7526 LeaveAllPowerSaveModeDirect(adapter);
7527
7528 if (gpio_num > 7) {
7529 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2;
7530 gpio_num_to_set = gpio_num - 8;
7531 }
7532
7533 /* Read GPIO direction */
7534 direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num;
7535
7536 /* If GPIO is output direction, setting value. */
7537 if( direction ) {
7538 if(isHigh)
7539 rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) | BIT(gpio_num_to_set));
7540 else
7541 rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) & ~BIT(gpio_num_to_set));
7542
7543 DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh );
7544 res = 0;
7545 } else {
7546 DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__);
7547 res = -1;
7548 }
7549
7550 rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
7551 return res;
7552 }
7553
rtw_hal_config_gpio(_adapter * adapter,u8 gpio_num,bool isOutput)7554 int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, bool isOutput)
7555 {
7556 u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2;
7557 u8 gpio_num_to_set = gpio_num;
7558
7559 if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL)
7560 return -1;
7561
7562 DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput);
7563
7564 rtw_ps_deny(adapter, PS_DENY_IOCTL);
7565
7566 LeaveAllPowerSaveModeDirect(adapter);
7567
7568 rtw_hal_gpio_multi_func_reset(adapter, gpio_num);
7569
7570 if (gpio_num > 7) {
7571 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2;
7572 gpio_num_to_set = gpio_num - 8;
7573 }
7574
7575 if( isOutput )
7576 rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) | BIT(gpio_num_to_set));
7577 else
7578 rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) & ~BIT(gpio_num_to_set));
7579
7580 rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
7581
7582 return 0;
7583 }
rtw_hal_register_gpio_interrupt(_adapter * adapter,int gpio_num,void (* callback)(u8 level))7584 int rtw_hal_register_gpio_interrupt(_adapter* adapter, int gpio_num, void(*callback)(u8 level))
7585 {
7586 u8 value;
7587 u8 direction;
7588 PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter);
7589
7590 if (IS_HARDWARE_TYPE_8188E(adapter)){
7591 if(gpio_num > 7 || gpio_num < 4) {
7592 DBG_871X_LEVEL(_drv_always_, "%s The gpio number does not included 4~7.\n",__FUNCTION__);
7593 return -1;
7594 }
7595 }
7596
7597 rtw_ps_deny(adapter, PS_DENY_IOCTL);
7598
7599 LeaveAllPowerSaveModeDirect(adapter);
7600
7601 /* Read GPIO direction */
7602 direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num;
7603 if(direction){
7604 DBG_871X_LEVEL(_drv_always_, "%s Can't register output gpio as interrupt.\n",__FUNCTION__);
7605 return -1;
7606 }
7607
7608 /* Config GPIO Mode */
7609 rtw_write8(adapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 3) | BIT(gpio_num));
7610
7611 /* Register GPIO interrupt handler*/
7612 adapter->gpiointpriv.callback[gpio_num] = callback;
7613
7614 /* Set GPIO interrupt mode, 0:positive edge, 1:negative edge */
7615 value = rtw_read8(adapter, REG_GPIO_PIN_CTRL) & BIT(gpio_num);
7616 adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_HSIMR + 2)^value;
7617 rtw_write8(adapter, REG_GPIO_INTM, adapter->gpiointpriv.interrupt_mode);
7618
7619 /* Enable GPIO interrupt */
7620 adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) | BIT(gpio_num);
7621 rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask);
7622
7623 rtw_hal_update_hisr_hsisr_ind(adapter, 1);
7624
7625 rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
7626
7627 return 0;
7628 }
rtw_hal_disable_gpio_interrupt(_adapter * adapter,int gpio_num)7629 int rtw_hal_disable_gpio_interrupt(_adapter* adapter, int gpio_num)
7630 {
7631 u8 value;
7632 u8 direction;
7633 PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter);
7634
7635 if (IS_HARDWARE_TYPE_8188E(adapter)){
7636 if(gpio_num > 7 || gpio_num < 4) {
7637 DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__);
7638 return -1;
7639 }
7640 }
7641
7642 rtw_ps_deny(adapter, PS_DENY_IOCTL);
7643
7644 LeaveAllPowerSaveModeDirect(adapter);
7645
7646 /* Config GPIO Mode */
7647 rtw_write8(adapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 3) &~ BIT(gpio_num));
7648
7649 /* Unregister GPIO interrupt handler*/
7650 adapter->gpiointpriv.callback[gpio_num] = NULL;
7651
7652 /* Reset GPIO interrupt mode, 0:positive edge, 1:negative edge */
7653 adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_GPIO_INTM) &~ BIT(gpio_num);
7654 rtw_write8(adapter, REG_GPIO_INTM, 0x00);
7655
7656 /* Disable GPIO interrupt */
7657 adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) &~ BIT(gpio_num);
7658 rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask);
7659
7660 if(!adapter->gpiointpriv.interrupt_enable_mask)
7661 rtw_hal_update_hisr_hsisr_ind(adapter, 0);
7662
7663 rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
7664
7665 return 0;
7666 }
7667 #endif
7668
rtw_hal_ch_sw_iqk_info_search(_adapter * padapter,u8 central_chnl,u8 bw_mode)7669 s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode)
7670 {
7671 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7672 u8 i;
7673
7674 for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) {
7675 if ((pHalData->iqk_reg_backup[i].central_chnl != 0)) {
7676 if ((pHalData->iqk_reg_backup[i].central_chnl == central_chnl)
7677 && (pHalData->iqk_reg_backup[i].bw_mode == bw_mode)) {
7678 return i;
7679 }
7680 }
7681 }
7682
7683 return -1;
7684 }
7685
rtw_hal_ch_sw_iqk_info_backup(_adapter * padapter)7686 void rtw_hal_ch_sw_iqk_info_backup(_adapter *padapter)
7687 {
7688 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7689 s8 res;
7690 u8 i;
7691
7692 /* If it's an existed record, overwrite it */
7693 res = rtw_hal_ch_sw_iqk_info_search(padapter, pHalData->CurrentChannel, pHalData->CurrentChannelBW);
7694 if ((res >= 0) && (res < MAX_IQK_INFO_BACKUP_CHNL_NUM)) {
7695 rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[res]));
7696 return;
7697 }
7698
7699 /* Search for the empty record to use */
7700 for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) {
7701 if (pHalData->iqk_reg_backup[i].central_chnl == 0) {
7702 rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[i]));
7703 return;
7704 }
7705 }
7706
7707 /* Else, overwrite the oldest record */
7708 for (i = 1; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++)
7709 _rtw_memcpy(&(pHalData->iqk_reg_backup[i - 1]), &(pHalData->iqk_reg_backup[i]), sizeof(struct hal_iqk_reg_backup));
7710
7711 rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM - 1]));
7712 }
7713
rtw_hal_ch_sw_iqk_info_restore(_adapter * padapter,u8 ch_sw_use_case)7714 void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case)
7715 {
7716 rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_RESTORE, &ch_sw_use_case);
7717 }
7718
rtw_dump_mac_rx_counters(_adapter * padapter,struct dbg_rx_counter * rx_counter)7719 void rtw_dump_mac_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter)
7720 {
7721 u32 mac_cck_ok=0, mac_ofdm_ok=0, mac_ht_ok=0, mac_vht_ok=0;
7722 u32 mac_cck_err=0, mac_ofdm_err=0, mac_ht_err=0, mac_vht_err=0;
7723 u32 mac_cck_fa=0, mac_ofdm_fa=0, mac_ht_fa=0;
7724 u32 DropPacket=0;
7725
7726 if(!rx_counter){
7727 rtw_warn_on(1);
7728 return;
7729 }
7730
7731 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x3);
7732 mac_cck_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7733 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x0);
7734 mac_ofdm_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7735 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x6);
7736 mac_ht_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7737 mac_vht_ok = 0;
7738 if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) {
7739 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x0);
7740 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT26, 0x1);
7741 mac_vht_ok = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7742 }
7743
7744 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x4);
7745 mac_cck_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7746 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x1);
7747 mac_ofdm_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7748 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x7);
7749 mac_ht_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7750 mac_vht_err = 0;
7751 if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) {
7752 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x1);
7753 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT26, 0x1);
7754 mac_vht_err = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7755 }
7756
7757 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x5);
7758 mac_cck_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7759 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x2);
7760 mac_ofdm_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7761 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT28|BIT29|BIT30|BIT31, 0x9);
7762 mac_ht_fa = PHY_QueryMacReg(padapter, REG_RXERR_RPT, bMaskLWord);// [15:0]
7763
7764 //Mac_DropPacket
7765 rtw_write32(padapter, REG_RXERR_RPT, (rtw_read32(padapter, REG_RXERR_RPT)& 0x0FFFFFFF)| Mac_DropPacket);
7766 DropPacket = rtw_read32(padapter, REG_RXERR_RPT)& 0x0000FFFF;
7767
7768 rx_counter->rx_pkt_ok = mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok;
7769 rx_counter->rx_pkt_crc_error = mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err;
7770 rx_counter->rx_cck_fa = mac_cck_fa;
7771 rx_counter->rx_ofdm_fa = mac_ofdm_fa;
7772 rx_counter->rx_ht_fa = mac_ht_fa;
7773 rx_counter->rx_pkt_drop = DropPacket;
7774 }
rtw_reset_mac_rx_counters(_adapter * padapter)7775 void rtw_reset_mac_rx_counters(_adapter* padapter)
7776 {
7777
7778 if (IS_HARDWARE_TYPE_8703B(padapter) || IS_HARDWARE_TYPE_8188F(padapter))
7779 PHY_SetMacReg(padapter, 0x608, BIT19, 0x1); /* If no packet rx, MaxRx clock be gating ,BIT_DISGCLK bit19 set 1 for fix*/
7780
7781 //reset mac counter
7782 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT27, 0x1);
7783 PHY_SetMacReg(padapter, REG_RXERR_RPT, BIT27, 0x0);
7784 }
7785
rtw_dump_phy_rx_counters(_adapter * padapter,struct dbg_rx_counter * rx_counter)7786 void rtw_dump_phy_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter)
7787 {
7788 u32 cckok=0,cckcrc=0,ofdmok=0,ofdmcrc=0,htok=0,htcrc=0,OFDM_FA=0,CCK_FA=0,vht_ok=0,vht_err=0;
7789 if(!rx_counter){
7790 rtw_warn_on(1);
7791 return;
7792 }
7793 if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)){
7794 cckok = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF); // [13:0]
7795 ofdmok = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF); // [13:0]
7796 htok = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF); // [13:0]
7797 vht_ok = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF); // [13:0]
7798 cckcrc = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF0000); // [29:16]
7799 ofdmcrc = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF0000); // [29:16]
7800 htcrc = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF0000); // [29:16]
7801 vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16]
7802 CCK_FA = PHY_QueryBBReg(padapter, 0xA5C, bMaskLWord);
7803 OFDM_FA = PHY_QueryBBReg(padapter, 0xF48, bMaskLWord);
7804 }
7805 else
7806 {
7807 cckok = PHY_QueryBBReg(padapter, 0xF88, bMaskDWord);
7808 ofdmok = PHY_QueryBBReg(padapter, 0xF94, bMaskLWord);
7809 htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord);
7810 vht_ok = 0;
7811 cckcrc = PHY_QueryBBReg(padapter, 0xF84, bMaskDWord);
7812 ofdmcrc = PHY_QueryBBReg(padapter, 0xF94, bMaskHWord);
7813 htcrc = PHY_QueryBBReg(padapter, 0xF90, bMaskHWord);
7814 vht_err = 0;
7815 OFDM_FA = PHY_QueryBBReg(padapter, 0xCF0, bMaskLWord) + PHY_QueryBBReg(padapter, 0xCF2, bMaskLWord) +
7816 PHY_QueryBBReg(padapter, 0xDA2, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA4, bMaskLWord) +
7817 PHY_QueryBBReg(padapter, 0xDA6, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA8, bMaskLWord);
7818
7819 CCK_FA=(rtw_read8(padapter, 0xA5B )<<8 ) | (rtw_read8(padapter, 0xA5C));
7820 }
7821
7822 rx_counter->rx_pkt_ok = cckok+ofdmok+htok+vht_ok;
7823 rx_counter->rx_pkt_crc_error = cckcrc+ofdmcrc+htcrc+vht_err;
7824 rx_counter->rx_ofdm_fa = OFDM_FA;
7825 rx_counter->rx_cck_fa = CCK_FA;
7826
7827 }
7828
rtw_reset_phy_rx_counters(_adapter * padapter)7829 void rtw_reset_phy_rx_counters(_adapter* padapter)
7830 {
7831 //reset phy counter
7832 if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter))
7833 {
7834 PHY_SetBBReg(padapter, 0xB58, BIT0, 0x1);
7835 PHY_SetBBReg(padapter, 0xB58, BIT0, 0x0);
7836
7837 PHY_SetBBReg(padapter, 0x9A4, BIT17, 0x1);//reset OFDA FA counter
7838 PHY_SetBBReg(padapter, 0x9A4, BIT17, 0x0);
7839
7840 PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter
7841 PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x1);
7842 }
7843 else
7844 {
7845 PHY_SetBBReg(padapter, 0xF14, BIT16, 0x1);
7846 rtw_msleep_os(10);
7847 PHY_SetBBReg(padapter, 0xF14, BIT16, 0x0);
7848
7849 PHY_SetBBReg(padapter, 0xD00, BIT27, 0x1);//reset OFDA FA counter
7850 PHY_SetBBReg(padapter, 0xC0C, BIT31, 0x1);//reset OFDA FA counter
7851 PHY_SetBBReg(padapter, 0xD00, BIT27, 0x0);
7852 PHY_SetBBReg(padapter, 0xC0C, BIT31, 0x0);
7853
7854 PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter
7855 PHY_SetBBReg(padapter, 0xA2C, BIT15, 0x1);
7856 }
7857 }
7858 #ifdef DBG_RX_COUNTER_DUMP
rtw_dump_drv_rx_counters(_adapter * padapter,struct dbg_rx_counter * rx_counter)7859 void rtw_dump_drv_rx_counters(_adapter* padapter,struct dbg_rx_counter *rx_counter)
7860 {
7861 struct recv_priv *precvpriv = &padapter->recvpriv;
7862 if(!rx_counter){
7863 rtw_warn_on(1);
7864 return;
7865 }
7866 rx_counter->rx_pkt_ok = padapter->drv_rx_cnt_ok;
7867 rx_counter->rx_pkt_crc_error = padapter->drv_rx_cnt_crcerror;
7868 rx_counter->rx_pkt_drop = precvpriv->rx_drop - padapter->drv_rx_cnt_drop;
7869 }
rtw_reset_drv_rx_counters(_adapter * padapter)7870 void rtw_reset_drv_rx_counters(_adapter* padapter)
7871 {
7872 struct recv_priv *precvpriv = &padapter->recvpriv;
7873 padapter->drv_rx_cnt_ok = 0;
7874 padapter->drv_rx_cnt_crcerror = 0;
7875 padapter->drv_rx_cnt_drop = precvpriv->rx_drop;
7876 }
rtw_dump_phy_rxcnts_preprocess(_adapter * padapter,u8 rx_cnt_mode)7877 void rtw_dump_phy_rxcnts_preprocess(_adapter* padapter,u8 rx_cnt_mode)
7878 {
7879 u8 initialgain;
7880 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
7881
7882 if((!(padapter->dump_rx_cnt_mode& DUMP_PHY_RX_COUNTER)) && (rx_cnt_mode & DUMP_PHY_RX_COUNTER))
7883 {
7884 /*initialgain = pDigTable->CurIGValue;*/
7885 rtw_hal_get_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, NULL);
7886 DBG_871X("%s CurIGValue:0x%02x\n",__FUNCTION__,initialgain);
7887 rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);
7888 /*disable dynamic functions, such as high power, DIG*/
7889 rtw_phydm_ability_backup(padapter);
7890 rtw_phydm_func_clr(padapter, (ODM_BB_DIG|ODM_BB_FA_CNT));
7891 }
7892 else if((padapter->dump_rx_cnt_mode& DUMP_PHY_RX_COUNTER) &&(!(rx_cnt_mode & DUMP_PHY_RX_COUNTER )))
7893 {
7894 //turn on phy-dynamic functions
7895 rtw_phydm_ability_restore(padapter);
7896 initialgain = 0xff; //restore RX GAIN
7897 rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);
7898
7899 }
7900 }
7901
rtw_dump_rx_counters(_adapter * padapter)7902 void rtw_dump_rx_counters(_adapter* padapter)
7903 {
7904 struct dbg_rx_counter rx_counter;
7905
7906 if( padapter->dump_rx_cnt_mode & DUMP_DRV_RX_COUNTER ){
7907 _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter));
7908 rtw_dump_drv_rx_counters(padapter,&rx_counter);
7909 DBG_871X( "Drv Received packet OK:%d CRC error:%d Drop Packets: %d\n",
7910 rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error,rx_counter.rx_pkt_drop);
7911 rtw_reset_drv_rx_counters(padapter);
7912 }
7913
7914 if( padapter->dump_rx_cnt_mode & DUMP_MAC_RX_COUNTER ){
7915 _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter));
7916 rtw_dump_mac_rx_counters(padapter,&rx_counter);
7917 DBG_871X( "Mac Received packet OK:%d CRC error:%d FA Counter: %d Drop Packets: %d\n",
7918 rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error,
7919 rx_counter.rx_cck_fa+rx_counter.rx_ofdm_fa+rx_counter.rx_ht_fa,
7920 rx_counter.rx_pkt_drop);
7921 rtw_reset_mac_rx_counters(padapter);
7922 }
7923
7924 if(padapter->dump_rx_cnt_mode & DUMP_PHY_RX_COUNTER ){
7925 _rtw_memset(&rx_counter,0,sizeof(struct dbg_rx_counter));
7926 rtw_dump_phy_rx_counters(padapter,&rx_counter);
7927 //DBG_871X("%s: OFDM_FA =%d\n", __FUNCTION__, rx_counter.rx_ofdm_fa);
7928 //DBG_871X("%s: CCK_FA =%d\n", __FUNCTION__, rx_counter.rx_cck_fa);
7929 DBG_871X("Phy Received packet OK:%d CRC error:%d FA Counter: %d\n",rx_counter.rx_pkt_ok,rx_counter.rx_pkt_crc_error,
7930 rx_counter.rx_ofdm_fa+rx_counter.rx_cck_fa);
7931 rtw_reset_phy_rx_counters(padapter);
7932 }
7933 }
7934 #endif
rtw_get_noise(_adapter * padapter)7935 void rtw_get_noise(_adapter* padapter)
7936 {
7937 #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR)
7938 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
7939 struct noise_info info;
7940 if(rtw_linked_check(padapter)){
7941 info.bPauseDIG = _TRUE;
7942 info.IGIValue = 0x1e;
7943 info.max_time = 100;//ms
7944 info.chan = pmlmeext->cur_channel ;//rtw_get_oper_ch(padapter);
7945 rtw_ps_deny(padapter, PS_DENY_IOCTL);
7946 LeaveAllPowerSaveModeDirect(padapter);
7947
7948 rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE);
7949 //ODM_InbandNoise_Monitor(podmpriv,_TRUE,0x20,100);
7950 rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL);
7951 rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(info.chan), &(padapter->recvpriv.noise));
7952 #ifdef DBG_NOISE_MONITOR
7953 DBG_871X("chan:%d,noise_level:%d\n",info.chan,padapter->recvpriv.noise);
7954 #endif
7955 }
7956 #endif
7957
7958 }
7959
rtw_get_current_tx_rate(_adapter * padapter,u8 macid)7960 u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid)
7961 {
7962 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
7963 PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
7964 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
7965 u8 rate_id = 0;
7966
7967 #if (RATE_ADAPTIVE_SUPPORT == 1)
7968 rate_id = ODM_RA_GetDecisionRate_8188E(pDM_Odm, macid);
7969 #else
7970 rate_id = (pRA_Table->link_tx_rate[macid]) & 0x7f;
7971 #endif
7972
7973 return rate_id;
7974
7975 }
7976
7977 #ifdef CONFIG_FW_C2H_DEBUG
7978
7979 /* C2H RX package original is 128.
7980 if enable CONFIG_FW_C2H_DEBUG, it should increase to 256.
7981 C2H FW debug message:
7982 without aggregate:
7983 {C2H_CmdID,Seq,SubID,Len,Content[0~n]}
7984 Content[0~n]={'a','b','c',...,'z','\n'}
7985 with aggregate:
7986 {C2H_CmdID,Seq,SubID,Len,Content[0~n]}
7987 Content[0~n]={'a','b','c',...,'z','\n',Extend C2H pkt 2...}
7988 Extend C2H pkt 2={C2H CmdID,Seq,SubID,Len,Content = {'a','b','c',...,'z','\n'}}
7989 Author: Isaac */
7990
Debug_FwC2H(PADAPTER padapter,u8 * pdata,u8 len)7991 void Debug_FwC2H(PADAPTER padapter, u8 *pdata, u8 len)
7992 {
7993 int i = 0;
7994 int cnt = 0, total_length = 0;
7995 u8 buf[128] = {0};
7996 u8 more_data = _FALSE;
7997 u8 *nextdata = NULL;
7998 u8 test = 0;
7999
8000 u8 data_len;
8001 u8 seq_no;
8002
8003 nextdata = pdata;
8004 do {
8005 data_len = *(nextdata + 1);
8006 seq_no = *(nextdata + 2);
8007
8008 for (i = 0 ; i < data_len - 2 ; i++) {
8009 cnt += sprintf((buf+cnt), "%c", nextdata[3 + i]);
8010
8011 if (nextdata[3 + i] == 0x0a && nextdata[4 + i] == 0xff)
8012 more_data = _TRUE;
8013 else if (nextdata[3 + i] == 0x0a && nextdata[4 + i] != 0xff)
8014 more_data = _FALSE;
8015 }
8016
8017 DBG_871X("[RTKFW, SEQ=%d]: %s", seq_no, buf);
8018 data_len += 3;
8019 total_length += data_len;
8020
8021 if (more_data == _TRUE) {
8022 _rtw_memset(buf, '\0', 128);
8023 cnt = 0;
8024 nextdata = (pdata + total_length);
8025 }
8026 } while (more_data == _TRUE);
8027 }
8028 #endif /*CONFIG_FW_C2H_DEBUG*/
update_IOT_info(_adapter * padapter)8029 void update_IOT_info(_adapter *padapter)
8030 {
8031 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
8032 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
8033
8034 switch (pmlmeinfo->assoc_AP_vendor)
8035 {
8036 case HT_IOT_PEER_MARVELL:
8037 pmlmeinfo->turboMode_cts2self = 1;
8038 pmlmeinfo->turboMode_rtsen = 0;
8039 break;
8040
8041 case HT_IOT_PEER_RALINK:
8042 pmlmeinfo->turboMode_cts2self = 0;
8043 pmlmeinfo->turboMode_rtsen = 1;
8044 //disable high power
8045 rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR);
8046 break;
8047 case HT_IOT_PEER_REALTEK:
8048 //rtw_write16(padapter, 0x4cc, 0xffff);
8049 //rtw_write16(padapter, 0x546, 0x01c0);
8050 //disable high power
8051 rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR);
8052 break;
8053 default:
8054 pmlmeinfo->turboMode_cts2self = 0;
8055 pmlmeinfo->turboMode_rtsen = 1;
8056 break;
8057 }
8058
8059 }
8060 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
rtw_acs_start(_adapter * padapter,bool bStart)8061 void rtw_acs_start(_adapter *padapter, bool bStart)
8062 {
8063 if (_TRUE == bStart) {
8064 ACS_OP acs_op = ACS_INIT;
8065
8066 rtw_hal_set_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &acs_op, _TRUE);
8067 rtw_set_acs_channel(padapter, 0);
8068 SET_ACS_STATE(padapter, ACS_ENABLE);
8069 } else {
8070 SET_ACS_STATE(padapter, ACS_DISABLE);
8071 #ifdef DBG_AUTO_CHNL_SEL_NHM
8072 if (1) {
8073 u8 best_24g_ch = 0;
8074 u8 best_5g_ch = 0;
8075
8076 rtw_hal_get_odm_var(padapter, HAL_ODM_AUTO_CHNL_SEL, &(best_24g_ch), &(best_5g_ch));
8077 DBG_871X("[ACS-"ADPT_FMT"] Best 2.4G CH:%u\n", ADPT_ARG(padapter), best_24g_ch);
8078 DBG_871X("[ACS-"ADPT_FMT"] Best 5G CH:%u\n", ADPT_ARG(padapter), best_5g_ch);
8079 }
8080 #endif
8081 }
8082 }
8083 #endif
8084
8085 /* TODO: merge with phydm, see odm_SetCrystalCap() */
hal_set_crystal_cap(_adapter * adapter,u8 crystal_cap)8086 void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
8087 {
8088 crystal_cap = crystal_cap & 0x3F;
8089
8090 switch (rtw_get_chip_type(adapter)) {
8091 #if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F)
8092 case RTL8188E:
8093 case RTL8188F:
8094 /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
8095 PHY_SetBBReg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6)));
8096 break;
8097 #endif
8098 #if defined(CONFIG_RTL8812A)
8099 case RTL8812:
8100 /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */
8101 PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
8102 break;
8103 #endif
8104 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E)
8105 case RTL8723B:
8106 case RTL8703B:
8107 case RTL8821:
8108 case RTL8192E:
8109 /* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */
8110 PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
8111 break;
8112 #endif
8113 #if defined(CONFIG_RTL8814A)
8114 case RTL8814A:
8115 /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/
8116 PHY_SetBBReg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
8117 break;
8118 #endif
8119 #if defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B)
8120 case RTL8821B:
8121 case RTL8822B:
8122 /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
8123 crystal_cap = crystal_cap & 0x3F;
8124 PHY_SetBBReg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap);
8125 PHY_SetBBReg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap);
8126 break;
8127 #endif
8128 default:
8129 rtw_warn_on(1);
8130 }
8131 }
8132
hal_spec_init(_adapter * adapter)8133 int hal_spec_init(_adapter *adapter)
8134 {
8135 u8 interface_type = 0;
8136 int ret = _SUCCESS;
8137
8138 interface_type = rtw_get_intf_type(adapter);
8139
8140 switch (rtw_get_chip_type(adapter)) {
8141 #ifdef CONFIG_RTL8723B
8142 case RTL8723B:
8143 init_hal_spec_8723b(adapter);
8144 break;
8145 #endif
8146 #ifdef CONFIG_RTL8703B
8147 case RTL8703B:
8148 init_hal_spec_8703b(adapter);
8149 break;
8150 #endif
8151 #ifdef CONFIG_RTL8188E
8152 case RTL8188E:
8153 init_hal_spec_8188e(adapter);
8154 break;
8155 #endif
8156 #ifdef CONFIG_RTL8188F
8157 case RTL8188F:
8158 init_hal_spec_8188f(adapter);
8159 break;
8160 #endif
8161 #ifdef CONFIG_RTL8812A
8162 case RTL8812:
8163 init_hal_spec_8812a(adapter);
8164 break;
8165 #endif
8166 #ifdef CONFIG_RTL8821A
8167 case RTL8821:
8168 init_hal_spec_8821a(adapter);
8169 break;
8170 #endif
8171 #ifdef CONFIG_RTL8192E
8172 case RTL8192E:
8173 init_hal_spec_8192e(adapter);
8174 break;
8175 #endif
8176 #ifdef CONFIG_RTL8814A
8177 case RTL8814A:
8178 init_hal_spec_8814a(adapter);
8179 break;
8180 #endif
8181 default:
8182 DBG_871X_LEVEL(_drv_err_, "%s: unknown chip_type:%u\n"
8183 , __func__, rtw_get_chip_type(adapter));
8184 ret = _FAIL;
8185 break;
8186 }
8187
8188 return ret;
8189 }
8190
8191 static const char * const _band_cap_str[] = {
8192 /* BIT0 */"2G",
8193 /* BIT1 */"5G",
8194 };
8195
8196 static const char * const _bw_cap_str[] = {
8197 /* BIT0 */"5M",
8198 /* BIT1 */"10M",
8199 /* BIT2 */"20M",
8200 /* BIT3 */"40M",
8201 /* BIT4 */"80M",
8202 /* BIT5 */"160M",
8203 /* BIT6 */"80_80M",
8204 };
8205
8206 static const char * const _proto_cap_str[] = {
8207 /* BIT0 */"b",
8208 /* BIT1 */"g",
8209 /* BIT2 */"n",
8210 /* BIT3 */"ac",
8211 };
8212
8213 static const char * const _wl_func_str[] = {
8214 /* BIT0 */"P2P",
8215 /* BIT1 */"MIRACAST",
8216 /* BIT2 */"TDLS",
8217 /* BIT3 */"FTM",
8218 };
8219
dump_hal_spec(void * sel,_adapter * adapter)8220 void dump_hal_spec(void *sel, _adapter *adapter)
8221 {
8222 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
8223 int i;
8224
8225 DBG_871X_SEL_NL(sel, "macid_num:%u\n", hal_spec->macid_num);
8226 DBG_871X_SEL_NL(sel, "sec_cap:0x%02x\n", hal_spec->sec_cap);
8227 DBG_871X_SEL_NL(sel, "sec_cam_ent_num:%u\n", hal_spec->sec_cam_ent_num);
8228 DBG_871X_SEL_NL(sel, "nss_num:%u\n", hal_spec->nss_num);
8229
8230 DBG_871X_SEL_NL(sel, "band_cap:");
8231 for (i = 0; i < BAND_CAP_BIT_NUM; i++) {
8232 if (((hal_spec->band_cap) >> i) & BIT0 && _band_cap_str[i])
8233 DBG_871X_SEL(sel, "%s ", _band_cap_str[i]);
8234 }
8235 DBG_871X_SEL(sel, "\n");
8236
8237 DBG_871X_SEL_NL(sel, "bw_cap:");
8238 for (i = 0; i < BW_CAP_BIT_NUM; i++) {
8239 if (((hal_spec->bw_cap) >> i) & BIT0 && _bw_cap_str[i])
8240 DBG_871X_SEL(sel, "%s ", _bw_cap_str[i]);
8241 }
8242 DBG_871X_SEL(sel, "\n");
8243
8244 DBG_871X_SEL_NL(sel, "proto_cap:");
8245 for (i = 0; i < PROTO_CAP_BIT_NUM; i++) {
8246 if (((hal_spec->proto_cap) >> i) & BIT0 && _proto_cap_str[i])
8247 DBG_871X_SEL(sel, "%s ", _proto_cap_str[i]);
8248 }
8249 DBG_871X_SEL(sel, "\n");
8250
8251 DBG_871X_SEL_NL(sel, "wl_func:");
8252 for (i = 0; i < WL_FUNC_BIT_NUM; i++) {
8253 if (((hal_spec->wl_func) >> i) & BIT0 && _wl_func_str[i])
8254 DBG_871X_SEL(sel, "%s ", _wl_func_str[i]);
8255 }
8256 DBG_871X_SEL(sel, "\n");
8257 }
8258
hal_chk_band_cap(_adapter * adapter,u8 cap)8259 inline bool hal_chk_band_cap(_adapter *adapter, u8 cap)
8260 {
8261 return (GET_HAL_SPEC(adapter)->band_cap & cap);
8262 }
8263
hal_chk_bw_cap(_adapter * adapter,u8 cap)8264 inline bool hal_chk_bw_cap(_adapter *adapter, u8 cap)
8265 {
8266 return (GET_HAL_SPEC(adapter)->bw_cap & cap);
8267 }
8268
hal_chk_proto_cap(_adapter * adapter,u8 cap)8269 inline bool hal_chk_proto_cap(_adapter *adapter, u8 cap)
8270 {
8271 return (GET_HAL_SPEC(adapter)->proto_cap & cap);
8272 }
8273
hal_chk_wl_func(_adapter * adapter,u8 func)8274 inline bool hal_chk_wl_func(_adapter *adapter, u8 func)
8275 {
8276 return (GET_HAL_SPEC(adapter)->wl_func & func);
8277 }
8278
hal_is_band_support(_adapter * adapter,u8 band)8279 inline bool hal_is_band_support(_adapter *adapter, u8 band)
8280 {
8281 return (GET_HAL_SPEC(adapter)->band_cap & band_to_band_cap(band));
8282 }
8283
hal_is_bw_support(_adapter * adapter,u8 bw)8284 inline bool hal_is_bw_support(_adapter *adapter, u8 bw)
8285 {
8286 return (GET_HAL_SPEC(adapter)->bw_cap & ch_width_to_bw_cap(bw));
8287 }
8288
hal_is_wireless_mode_support(_adapter * adapter,u8 mode)8289 inline bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode)
8290 {
8291 u8 proto_cap = GET_HAL_SPEC(adapter)->proto_cap;
8292
8293 if (mode == WIRELESS_11B)
8294 if ((proto_cap & PROTO_CAP_11B) && hal_chk_band_cap(adapter, BAND_CAP_2G))
8295 return 1;
8296
8297 if (mode == WIRELESS_11G)
8298 if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_2G))
8299 return 1;
8300
8301 if (mode == WIRELESS_11A)
8302 if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_5G))
8303 return 1;
8304
8305 if (mode == WIRELESS_11_24N)
8306 if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_2G))
8307 return 1;
8308
8309 if (mode == WIRELESS_11_5N)
8310 if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_5G))
8311 return 1;
8312
8313 if (mode == WIRELESS_11AC)
8314 if ((proto_cap & PROTO_CAP_11AC) && hal_chk_band_cap(adapter, BAND_CAP_5G))
8315 return 1;
8316
8317 return 0;
8318 }
8319
8320 /*
8321 * hal_largest_bw - starting from in_bw, get largest bw supported by HAL
8322 * @adapter:
8323 * @in_bw: starting bw, value of CHANNEL_WIDTH
8324 *
8325 * Returns: value of CHANNEL_WIDTH
8326 */
hal_largest_bw(_adapter * adapter,u8 in_bw)8327 u8 hal_largest_bw(_adapter *adapter, u8 in_bw)
8328 {
8329 for (; in_bw > CHANNEL_WIDTH_20; in_bw--) {
8330 if (hal_is_bw_support(adapter, in_bw))
8331 break;
8332 }
8333
8334 if (!hal_is_bw_support(adapter, in_bw))
8335 rtw_warn_on(1);
8336
8337 return in_bw;
8338 }
8339
8340 #ifdef CONFIG_ANTENNA_DIVERSITY
rtw_hal_antdiv_before_linked(_adapter * padapter)8341 u8 rtw_hal_antdiv_before_linked(_adapter *padapter)
8342 {
8343 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
8344 u8 cur_ant, change_ant;
8345
8346 if (!pHalData->AntDivCfg)
8347 return _FALSE;
8348
8349 if (pHalData->sw_antdiv_bl_state == 0) {
8350 pHalData->sw_antdiv_bl_state = 1;
8351
8352 rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &cur_ant, NULL);
8353 change_ant = (cur_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
8354
8355 return rtw_antenna_select_cmd(padapter, change_ant, _FALSE);
8356 }
8357
8358 pHalData->sw_antdiv_bl_state = 0;
8359 return _FALSE;
8360 }
8361
rtw_hal_antdiv_rssi_compared(_adapter * padapter,WLAN_BSSID_EX * dst,WLAN_BSSID_EX * src)8362 void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
8363 {
8364 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
8365
8366 if (pHalData->AntDivCfg) {
8367 /*DBG_871X("update_network=> org-RSSI(%d), new-RSSI(%d)\n", dst->Rssi, src->Rssi);*/
8368 /*select optimum_antenna for before linked =>For antenna diversity*/
8369 if (dst->Rssi >= src->Rssi) {/*keep org parameter*/
8370 src->Rssi = dst->Rssi;
8371 src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
8372 }
8373 }
8374 }
8375 #endif
8376
8377