1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __HALBTC_OUT_SRC_H__ 3 #define __HALBTC_OUT_SRC_H__ 4 5 6 #define BTC_COEX_OFFLOAD 0 7 #define BTC_TMP_BUF_SHORT 20 8 9 extern u1Byte gl_btc_trace_buf[]; 10 #define BTC_SPRINTF rsprintf 11 #define BTC_TRACE(_MSG_) RT_TRACE(COMP_COEX, DBG_LOUD, (_MSG_)) 12 #define BT_PrintData(adapter, _MSG_, len, data) RT_PRINT_DATA(COMP_COEX, DBG_LOUD, (_MSG_), data, len) 13 14 15 #define NORMAL_EXEC FALSE 16 #define FORCE_EXEC TRUE 17 18 #define BTC_RF_OFF 0x0 19 #define BTC_RF_ON 0x1 20 21 #define BTC_RF_A 0x0 22 #define BTC_RF_B 0x1 23 #define BTC_RF_C 0x2 24 #define BTC_RF_D 0x3 25 26 #define BTC_SMSP SINGLEMAC_SINGLEPHY 27 #define BTC_DMDP DUALMAC_DUALPHY 28 #define BTC_DMSP DUALMAC_SINGLEPHY 29 #define BTC_MP_UNKNOWN 0xff 30 31 #define BT_COEX_ANT_TYPE_PG 0 32 #define BT_COEX_ANT_TYPE_ANTDIV 1 33 #define BT_COEX_ANT_TYPE_DETECTED 2 34 35 #define BTC_MIMO_PS_STATIC 0 // 1ss 36 #define BTC_MIMO_PS_DYNAMIC 1 // 2ss 37 38 #define BTC_RATE_DISABLE 0 39 #define BTC_RATE_ENABLE 1 40 41 // single Antenna definition 42 #define BTC_ANT_PATH_WIFI 0 43 #define BTC_ANT_PATH_BT 1 44 #define BTC_ANT_PATH_PTA 2 45 // dual Antenna definition 46 #define BTC_ANT_WIFI_AT_MAIN 0 47 #define BTC_ANT_WIFI_AT_AUX 1 48 // coupler Antenna definition 49 #define BTC_ANT_WIFI_AT_CPL_MAIN 0 50 #define BTC_ANT_WIFI_AT_CPL_AUX 1 51 52 typedef enum _BTC_POWERSAVE_TYPE{ 53 BTC_PS_WIFI_NATIVE = 0, // wifi original power save behavior 54 BTC_PS_LPS_ON = 1, 55 BTC_PS_LPS_OFF = 2, 56 BTC_PS_MAX 57 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; 58 59 typedef enum _BTC_BT_REG_TYPE{ 60 BTC_BT_REG_RF = 0, 61 BTC_BT_REG_MODEM = 1, 62 BTC_BT_REG_BLUEWIZE = 2, 63 BTC_BT_REG_VENDOR = 3, 64 BTC_BT_REG_LE = 4, 65 BTC_BT_REG_MAX 66 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; 67 68 typedef enum _BTC_CHIP_INTERFACE{ 69 BTC_INTF_UNKNOWN = 0, 70 BTC_INTF_PCI = 1, 71 BTC_INTF_USB = 2, 72 BTC_INTF_SDIO = 3, 73 BTC_INTF_MAX 74 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; 75 76 typedef enum _BTC_CHIP_TYPE{ 77 BTC_CHIP_UNDEF = 0, 78 BTC_CHIP_CSR_BC4 = 1, 79 BTC_CHIP_CSR_BC8 = 2, 80 BTC_CHIP_RTL8723A = 3, 81 BTC_CHIP_RTL8821 = 4, 82 BTC_CHIP_RTL8723B = 5, 83 BTC_CHIP_MAX 84 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; 85 86 // following is for wifi link status 87 #define WIFI_STA_CONNECTED BIT0 88 #define WIFI_AP_CONNECTED BIT1 89 #define WIFI_HS_CONNECTED BIT2 90 #define WIFI_P2P_GO_CONNECTED BIT3 91 #define WIFI_P2P_GC_CONNECTED BIT4 92 93 // following is for command line utility 94 #define CL_SPRINTF rsprintf 95 #define CL_PRINTF DCMD_Printf 96 97 struct btc_board_info{ 98 /* The following is some board information */ 99 u8 bt_chip_type; 100 u8 pg_ant_num; /* pg ant number */ 101 u8 btdm_ant_num; /* ant number for btdm */ 102 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ 103 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ 104 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ 105 boolean tfbga_package; /* for Antenna detect threshold */ 106 boolean btdm_ant_det_finish; 107 boolean btdm_ant_det_already_init_phydm; 108 }; 109 110 typedef enum _BTC_DBG_OPCODE{ 111 BTC_DBG_SET_COEX_NORMAL = 0x0, 112 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, 113 BTC_DBG_SET_COEX_BT_ONLY = 0x2, 114 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, 115 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, 116 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, 117 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, 118 BTC_DBG_MAX 119 }BTC_DBG_OPCODE,*PBTC_DBG_OPCODE; 120 121 typedef enum _BTC_RSSI_STATE{ 122 BTC_RSSI_STATE_HIGH = 0x0, 123 BTC_RSSI_STATE_MEDIUM = 0x1, 124 BTC_RSSI_STATE_LOW = 0x2, 125 BTC_RSSI_STATE_STAY_HIGH = 0x3, 126 BTC_RSSI_STATE_STAY_MEDIUM = 0x4, 127 BTC_RSSI_STATE_STAY_LOW = 0x5, 128 BTC_RSSI_MAX 129 }BTC_RSSI_STATE,*PBTC_RSSI_STATE; 130 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_==BTC_RSSI_STATE_HIGH||_rssi_==BTC_RSSI_STATE_STAY_HIGH)? TRUE:FALSE) 131 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_==BTC_RSSI_STATE_MEDIUM||_rssi_==BTC_RSSI_STATE_STAY_MEDIUM)? TRUE:FALSE) 132 #define BTC_RSSI_LOW(_rssi_) ((_rssi_==BTC_RSSI_STATE_LOW||_rssi_==BTC_RSSI_STATE_STAY_LOW)? TRUE:FALSE) 133 134 typedef enum _BTC_WIFI_ROLE{ 135 BTC_ROLE_STATION = 0x0, 136 BTC_ROLE_AP = 0x1, 137 BTC_ROLE_IBSS = 0x2, 138 BTC_ROLE_HS_MODE = 0x3, 139 BTC_ROLE_MAX 140 }BTC_WIFI_ROLE,*PBTC_WIFI_ROLE; 141 142 typedef enum _BTC_WIRELESS_FREQ{ 143 BTC_FREQ_2_4G = 0x0, 144 BTC_FREQ_5G = 0x1, 145 BTC_FREQ_MAX 146 }BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ; 147 148 typedef enum _BTC_WIFI_BW_MODE{ 149 BTC_WIFI_BW_LEGACY = 0x0, 150 BTC_WIFI_BW_HT20 = 0x1, 151 BTC_WIFI_BW_HT40 = 0x2, 152 BTC_WIFI_BW_HT80 = 0x3, 153 BTC_WIFI_BW_HT160 = 0x4, 154 BTC_WIFI_BW_MAX 155 }BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE; 156 157 typedef enum _BTC_WIFI_TRAFFIC_DIR{ 158 BTC_WIFI_TRAFFIC_TX = 0x0, 159 BTC_WIFI_TRAFFIC_RX = 0x1, 160 BTC_WIFI_TRAFFIC_MAX 161 }BTC_WIFI_TRAFFIC_DIR,*PBTC_WIFI_TRAFFIC_DIR; 162 163 typedef enum _BTC_WIFI_PNP{ 164 BTC_WIFI_PNP_WAKE_UP = 0x0, 165 BTC_WIFI_PNP_SLEEP = 0x1, 166 BTC_WIFI_PNP_MAX 167 }BTC_WIFI_PNP,*PBTC_WIFI_PNP; 168 169 typedef enum _BTC_IOT_PEER 170 { 171 BTC_IOT_PEER_UNKNOWN = 0, 172 BTC_IOT_PEER_REALTEK = 1, 173 BTC_IOT_PEER_REALTEK_92SE = 2, 174 BTC_IOT_PEER_BROADCOM = 3, 175 BTC_IOT_PEER_RALINK = 4, 176 BTC_IOT_PEER_ATHEROS = 5, 177 BTC_IOT_PEER_CISCO = 6, 178 BTC_IOT_PEER_MERU = 7, 179 BTC_IOT_PEER_MARVELL = 8, 180 BTC_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 181 BTC_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP 182 BTC_IOT_PEER_AIRGO = 11, 183 BTC_IOT_PEER_INTEL = 12, 184 BTC_IOT_PEER_RTK_APCLIENT = 13, 185 BTC_IOT_PEER_REALTEK_81XX = 14, 186 BTC_IOT_PEER_REALTEK_WOW = 15, 187 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, 188 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, 189 BTC_IOT_PEER_MAX, 190 }BTC_IOT_PEER, *PBTC_IOT_PEER; 191 192 //for 8723b-d cut large current issue 193 typedef enum _BTC_WIFI_COEX_STATE{ 194 BTC_WIFI_STAT_INIT, 195 BTC_WIFI_STAT_IQK, 196 BTC_WIFI_STAT_NORMAL_OFF, 197 BTC_WIFI_STAT_MP_OFF, 198 BTC_WIFI_STAT_NORMAL, 199 BTC_WIFI_STAT_ANT_DIV, 200 BTC_WIFI_STAT_MAX 201 }BTC_WIFI_COEX_STATE,*PBTC_WIFI_COEX_STATE; 202 203 typedef enum _BTC_ANT_TYPE{ 204 BTC_ANT_TYPE_0, 205 BTC_ANT_TYPE_1, 206 BTC_ANT_TYPE_2, 207 BTC_ANT_TYPE_3, 208 BTC_ANT_TYPE_4, 209 BTC_ANT_TYPE_MAX 210 }BTC_ANT_TYPE,*PBTC_ANT_TYPE; 211 212 typedef enum _BTC_VENDOR{ 213 BTC_VENDOR_LENOVO, 214 BTC_VENDOR_ASUS, 215 BTC_VENDOR_OTHER 216 }BTC_VENDOR,*PBTC_VENDOR; 217 218 219 // defined for BFP_BTC_GET 220 typedef enum _BTC_GET_TYPE{ 221 // type BOOLEAN 222 BTC_GET_BL_HS_OPERATION, 223 BTC_GET_BL_HS_CONNECTING, 224 BTC_GET_BL_WIFI_CONNECTED, 225 BTC_GET_BL_WIFI_BUSY, 226 BTC_GET_BL_WIFI_SCAN, 227 BTC_GET_BL_WIFI_LINK, 228 BTC_GET_BL_WIFI_ROAM, 229 BTC_GET_BL_WIFI_4_WAY_PROGRESS, 230 BTC_GET_BL_WIFI_UNDER_5G, 231 BTC_GET_BL_WIFI_AP_MODE_ENABLE, 232 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, 233 BTC_GET_BL_WIFI_UNDER_B_MODE, 234 BTC_GET_BL_EXT_SWITCH, 235 BTC_GET_BL_WIFI_IS_IN_MP_MODE, 236 BTC_GET_BL_IS_ASUS_8723B, 237 BTC_GET_BL_FW_READY, 238 239 // type s4Byte 240 BTC_GET_S4_WIFI_RSSI, 241 BTC_GET_S4_HS_RSSI, 242 243 // type u4Byte 244 BTC_GET_U4_WIFI_BW, 245 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 246 BTC_GET_U4_WIFI_FW_VER, 247 BTC_GET_U4_WIFI_LINK_STATUS, 248 BTC_GET_U4_BT_PATCH_VER, 249 BTC_GET_U4_VENDOR, 250 251 // type u1Byte 252 BTC_GET_U1_WIFI_DOT11_CHNL, 253 BTC_GET_U1_WIFI_CENTRAL_CHNL, 254 BTC_GET_U1_WIFI_HS_CHNL, 255 BTC_GET_U1_MAC_PHY_MODE, 256 BTC_GET_U1_AP_NUM, 257 BTC_GET_U1_ANT_TYPE, 258 BTC_GET_U1_IOT_PEER, 259 260 //===== for 1Ant ====== 261 BTC_GET_U1_LPS_MODE, 262 263 BTC_GET_MAX 264 }BTC_GET_TYPE,*PBTC_GET_TYPE; 265 266 // defined for BFP_BTC_SET 267 typedef enum _BTC_SET_TYPE{ 268 // type BOOLEAN 269 BTC_SET_BL_BT_DISABLE, 270 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, 271 BTC_SET_BL_BT_TRAFFIC_BUSY, 272 BTC_SET_BL_BT_LIMITED_DIG, 273 BTC_SET_BL_FORCE_TO_ROAM, 274 BTC_SET_BL_TO_REJ_AP_AGG_PKT, 275 BTC_SET_BL_BT_CTRL_AGG_SIZE, 276 BTC_SET_BL_INC_SCAN_DEV_NUM, 277 BTC_SET_BL_BT_TX_RX_MASK, 278 BTC_SET_BL_MIRACAST_PLUS_BT, 279 280 // type u1Byte 281 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, 282 BTC_SET_U1_AGG_BUF_SIZE, 283 284 // type trigger some action 285 BTC_SET_ACT_GET_BT_RSSI, 286 BTC_SET_ACT_AGGREGATE_CTRL, 287 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, 288 //===== for 1Ant ====== 289 // type BOOLEAN 290 291 // type u1Byte 292 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, 293 BTC_SET_U1_LPS_VAL, 294 BTC_SET_U1_RPWM_VAL, 295 // type trigger some action 296 BTC_SET_ACT_LEAVE_LPS, 297 BTC_SET_ACT_ENTER_LPS, 298 BTC_SET_ACT_NORMAL_LPS, 299 BTC_SET_ACT_DISABLE_LOW_POWER, 300 BTC_SET_ACT_UPDATE_RAMASK, 301 BTC_SET_ACT_SEND_MIMO_PS, 302 // BT Coex related 303 BTC_SET_ACT_CTRL_BT_INFO, 304 BTC_SET_ACT_CTRL_BT_COEX, 305 BTC_SET_ACT_CTRL_8723B_ANT, 306 //================= 307 BTC_SET_MAX 308 }BTC_SET_TYPE,*PBTC_SET_TYPE; 309 310 typedef enum _BTC_DBG_DISP_TYPE{ 311 BTC_DBG_DISP_COEX_STATISTICS = 0x0, 312 BTC_DBG_DISP_BT_LINK_INFO = 0x1, 313 BTC_DBG_DISP_WIFI_STATUS = 0x2, 314 BTC_DBG_DISP_MAX 315 }BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE; 316 317 typedef enum _BTC_NOTIFY_TYPE_IPS{ 318 BTC_IPS_LEAVE = 0x0, 319 BTC_IPS_ENTER = 0x1, 320 BTC_IPS_MAX 321 }BTC_NOTIFY_TYPE_IPS,*PBTC_NOTIFY_TYPE_IPS; 322 typedef enum _BTC_NOTIFY_TYPE_LPS{ 323 BTC_LPS_DISABLE = 0x0, 324 BTC_LPS_ENABLE = 0x1, 325 BTC_LPS_MAX 326 }BTC_NOTIFY_TYPE_LPS,*PBTC_NOTIFY_TYPE_LPS; 327 typedef enum _BTC_NOTIFY_TYPE_SCAN{ 328 BTC_SCAN_FINISH = 0x0, 329 BTC_SCAN_START = 0x1, 330 BTC_SCAN_MAX 331 }BTC_NOTIFY_TYPE_SCAN,*PBTC_NOTIFY_TYPE_SCAN; 332 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE{ 333 BTC_ASSOCIATE_FINISH = 0x0, 334 BTC_ASSOCIATE_START = 0x1, 335 BTC_ASSOCIATE_MAX 336 }BTC_NOTIFY_TYPE_ASSOCIATE,*PBTC_NOTIFY_TYPE_ASSOCIATE; 337 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS{ 338 BTC_MEDIA_DISCONNECT = 0x0, 339 BTC_MEDIA_CONNECT = 0x1, 340 BTC_MEDIA_MAX 341 }BTC_NOTIFY_TYPE_MEDIA_STATUS,*PBTC_NOTIFY_TYPE_MEDIA_STATUS; 342 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET{ 343 BTC_PACKET_UNKNOWN = 0x0, 344 BTC_PACKET_DHCP = 0x1, 345 BTC_PACKET_ARP = 0x2, 346 BTC_PACKET_EAPOL = 0x3, 347 BTC_PACKET_MAX 348 }BTC_NOTIFY_TYPE_SPECIFIC_PACKET,*PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; 349 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION{ 350 BTC_STACK_OP_NONE = 0x0, 351 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, 352 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, 353 BTC_STACK_OP_MAX 354 }BTC_NOTIFY_TYPE_STACK_OPERATION,*PBTC_NOTIFY_TYPE_STACK_OPERATION; 355 356 //Bryant Add 357 typedef enum _BTC_ANTENNA_POS{ 358 BTC_ANTENNA_AT_MAIN_PORT = 0x1, 359 BTC_ANTENNA_AT_AUX_PORT = 0x2, 360 }BTC_ANTENNA_POS,*PBTC_ANTENNA_POS; 361 362 //Bryant Add 363 typedef enum _BTC_BT_OFFON{ 364 BTC_BT_OFF = 0x0, 365 BTC_BT_ON = 0x1, 366 }BTC_BTOFFON,*PBTC_BT_OFFON; 367 368 //================================================== 369 // For following block is for coex offload 370 //================================================== 371 typedef struct _COL_H2C{ 372 u1Byte opcode; 373 u1Byte opcode_ver:4; 374 u1Byte req_num:4; 375 u1Byte buf[1]; 376 }COL_H2C, *PCOL_H2C; 377 378 #define COL_C2H_ACK_HDR_LEN 3 379 typedef struct _COL_C2H_ACK{ 380 u1Byte status; 381 u1Byte opcode_ver:4; 382 u1Byte req_num:4; 383 u1Byte ret_len; 384 u1Byte buf[1]; 385 }COL_C2H_ACK, *PCOL_C2H_ACK; 386 387 #define COL_C2H_IND_HDR_LEN 3 388 typedef struct _COL_C2H_IND{ 389 u1Byte type; 390 u1Byte version; 391 u1Byte length; 392 u1Byte data[1]; 393 }COL_C2H_IND, *PCOL_C2H_IND; 394 395 //============================================ 396 // NOTE: for debug message, the following define should match 397 // the strings in coexH2cResultString. 398 //============================================ 399 typedef enum _COL_H2C_STATUS{ 400 // c2h status 401 COL_STATUS_C2H_OK = 0x00, // Wifi received H2C request and check content ok. 402 COL_STATUS_C2H_UNKNOWN = 0x01, // Not handled routine 403 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, // Invalid OP code, It means that wifi firmware received an undefiend OP code. 404 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, // Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. 405 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, // Error paraneter.(ex: parameters = NULL but it should have values) 406 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, // Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) 407 // other COL status start from here 408 COL_STATUS_C2H_REQ_NUM_MISMATCH , // c2h req_num mismatch, means this c2h is not we expected. 409 COL_STATUS_H2C_HALMAC_FAIL , // HALMAC return fail. 410 COL_STATUS_H2C_TIMTOUT , // not received the c2h response from fw 411 COL_STATUS_INVALID_C2H_LEN , // invalid coex offload c2h ack length, must >= 3 412 COL_STATUS_COEX_DATA_OVERFLOW , // coex returned length over the c2h ack length. 413 COL_STATUS_MAX 414 }COL_H2C_STATUS,*PCOL_H2C_STATUS; 415 416 #define COL_MAX_H2C_REQ_NUM 16 417 418 #define COL_H2C_BUF_LEN 20 419 typedef enum _COL_OPCODE{ 420 COL_OP_WIFI_STATUS_NOTIFY = 0x0, 421 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, 422 COL_OP_WIFI_INFO_NOTIFY = 0x2, 423 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, 424 COL_OP_SET_CONTROL = 0x4, 425 COL_OP_GET_CONTROL = 0x5, 426 COL_OP_WIFI_OPCODE_MAX 427 }COL_OPCODE,*PCOL_OPCODE; 428 429 typedef enum _COL_IND_TYPE{ 430 COL_IND_BT_INFO = 0x0, 431 COL_IND_PSTDMA = 0x1, 432 COL_IND_LIMITED_TX_RX = 0x2, 433 COL_IND_COEX_TABLE = 0x3, 434 COL_IND_REQ = 0x4, 435 COL_IND_MAX 436 }COL_IND_TYPE,*PCOL_IND_TYPE; 437 438 typedef struct _COL_SINGLE_H2C_RECORD{ 439 u1Byte h2c_buf[COL_H2C_BUF_LEN]; // the latest sent h2c buffer 440 u4Byte h2c_len; 441 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; // the latest received c2h buffer 442 u4Byte c2h_ack_len; 443 u4Byte count; // the total number of the sent h2c command 444 u4Byte status[COL_STATUS_MAX]; // the c2h status for the sent h2c command 445 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; 446 447 typedef struct _COL_SINGLE_C2H_IND_RECORD{ 448 u1Byte ind_buf[COL_H2C_BUF_LEN]; // the latest received c2h indication buffer 449 u4Byte ind_len; 450 u4Byte count; // the total number of the rcvd c2h indication 451 u4Byte status[COL_STATUS_MAX]; // the c2h indication verified status 452 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; 453 454 typedef struct _BTC_OFFLOAD{ 455 // H2C command related 456 u1Byte h2c_req_num; 457 u4Byte cnt_h2c_sent; 458 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; 459 460 // C2H Ack related 461 u4Byte cnt_c2h_ack; 462 u4Byte status[COL_STATUS_MAX]; 463 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; // for req_num = 1~COL_MAX_H2C_REQ_NUM 464 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; 465 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; 466 467 // C2H Indication related 468 u4Byte cnt_c2h_ind; 469 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; 470 u4Byte c2h_ind_status[COL_STATUS_MAX]; 471 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; 472 u1Byte c2h_ind_len; 473 } BTC_OFFLOAD, *PBTC_OFFLOAD; 474 extern BTC_OFFLOAD gl_coex_offload; 475 //================================================== 476 477 typedef u1Byte 478 (*BFP_BTC_R1)( 479 IN PVOID pBtcContext, 480 IN u4Byte RegAddr 481 ); 482 typedef u2Byte 483 (*BFP_BTC_R2)( 484 IN PVOID pBtcContext, 485 IN u4Byte RegAddr 486 ); 487 typedef u4Byte 488 (*BFP_BTC_R4)( 489 IN PVOID pBtcContext, 490 IN u4Byte RegAddr 491 ); 492 typedef VOID 493 (*BFP_BTC_W1)( 494 IN PVOID pBtcContext, 495 IN u4Byte RegAddr, 496 IN u1Byte Data 497 ); 498 typedef VOID 499 (*BFP_BTC_W1_BIT_MASK)( 500 IN PVOID pBtcContext, 501 IN u4Byte regAddr, 502 IN u1Byte bitMask, 503 IN u1Byte data1b 504 ); 505 typedef VOID 506 (*BFP_BTC_W2)( 507 IN PVOID pBtcContext, 508 IN u4Byte RegAddr, 509 IN u2Byte Data 510 ); 511 typedef VOID 512 (*BFP_BTC_W4)( 513 IN PVOID pBtcContext, 514 IN u4Byte RegAddr, 515 IN u4Byte Data 516 ); 517 typedef VOID 518 (*BFP_BTC_LOCAL_REG_W1)( 519 IN PVOID pBtcContext, 520 IN u4Byte RegAddr, 521 IN u1Byte Data 522 ); 523 typedef VOID 524 (*BFP_BTC_SET_BB_REG)( 525 IN PVOID pBtcContext, 526 IN u4Byte RegAddr, 527 IN u4Byte BitMask, 528 IN u4Byte Data 529 ); 530 typedef u4Byte 531 (*BFP_BTC_GET_BB_REG)( 532 IN PVOID pBtcContext, 533 IN u4Byte RegAddr, 534 IN u4Byte BitMask 535 ); 536 typedef VOID 537 (*BFP_BTC_SET_RF_REG)( 538 IN PVOID pBtcContext, 539 IN u1Byte eRFPath, 540 IN u4Byte RegAddr, 541 IN u4Byte BitMask, 542 IN u4Byte Data 543 ); 544 typedef u4Byte 545 (*BFP_BTC_GET_RF_REG)( 546 IN PVOID pBtcContext, 547 IN u1Byte eRFPath, 548 IN u4Byte RegAddr, 549 IN u4Byte BitMask 550 ); 551 typedef VOID 552 (*BFP_BTC_FILL_H2C)( 553 IN PVOID pBtcContext, 554 IN u1Byte elementId, 555 IN u4Byte cmdLen, 556 IN pu1Byte pCmdBuffer 557 ); 558 559 typedef BOOLEAN 560 (*BFP_BTC_GET)( 561 IN PVOID pBtCoexist, 562 IN u1Byte getType, 563 OUT PVOID pOutBuf 564 ); 565 566 typedef BOOLEAN 567 (*BFP_BTC_SET)( 568 IN PVOID pBtCoexist, 569 IN u1Byte setType, 570 OUT PVOID pInBuf 571 ); 572 typedef u2Byte 573 (*BFP_BTC_SET_BT_REG)( 574 IN PVOID pBtcContext, 575 IN u1Byte regType, 576 IN u4Byte offset, 577 IN u4Byte value 578 ); 579 typedef BOOLEAN 580 (*BFP_BTC_SET_BT_ANT_DETECTION)( 581 IN PVOID pBtcContext, 582 IN u1Byte txTime, 583 IN u1Byte btChnl 584 ); 585 typedef u2Byte 586 (*BFP_BTC_GET_BT_REG)( 587 IN PVOID pBtcContext, 588 IN u1Byte regType, 589 IN u4Byte offset, 590 IN pu4Byte data 591 ); 592 typedef VOID 593 (*BFP_BTC_DISP_DBG_MSG)( 594 IN PVOID pBtCoexist, 595 IN u1Byte dispType 596 ); 597 598 typedef COL_H2C_STATUS 599 (*BFP_BTC_COEX_H2C_PROCESS)( 600 IN PVOID pBtCoexist, 601 IN u1Byte opcode, 602 IN u1Byte opcode_ver, 603 IN pu1Byte ph2c_par, 604 IN u1Byte h2c_par_len 605 ); 606 607 typedef struct _BTC_BT_INFO{ 608 BOOLEAN bBtDisabled; 609 boolean bt_enable_disable_change; 610 u1Byte rssiAdjustForAgcTableOn; 611 u1Byte rssiAdjustFor1AntCoexType; 612 BOOLEAN bPreBtCtrlAggBufSize; 613 BOOLEAN bBtCtrlAggBufSize; 614 BOOLEAN bPreRejectAggPkt; 615 BOOLEAN bRejectAggPkt; 616 BOOLEAN bIncreaseScanDevNum; 617 BOOLEAN bBtTxRxMask; 618 u1Byte preAggBufSize; 619 u1Byte aggBufSize; 620 BOOLEAN bBtBusy; 621 BOOLEAN bLimitedDig; 622 u2Byte btHciVer; 623 u2Byte btRealFwVer; 624 u1Byte btFwVer; 625 u4Byte getBtFwVerCnt; 626 BOOLEAN bMiracastPlusBt; 627 628 BOOLEAN bBtDisableLowPwr; 629 630 BOOLEAN bBtCtrlLps; 631 BOOLEAN bBtLpsOn; 632 BOOLEAN bForceToRoam; // for 1Ant solution 633 u1Byte lpsVal; 634 u1Byte rpwmVal; 635 u4Byte raMask; 636 } BTC_BT_INFO, *PBTC_BT_INFO; 637 638 struct btc_stack_info { 639 boolean profile_notified; 640 u16 hci_version; /* stack hci version */ 641 u8 num_of_link; 642 boolean bt_link_exist; 643 boolean sco_exist; 644 boolean acl_exist; 645 boolean a2dp_exist; 646 boolean hid_exist; 647 u8 num_of_hid; 648 boolean pan_exist; 649 boolean unknown_acl_exist; 650 s8 min_bt_rssi; 651 }; 652 653 struct btc_bt_link_info { 654 boolean bt_link_exist; 655 boolean bt_hi_pri_link_exist; 656 boolean sco_exist; 657 boolean sco_only; 658 boolean a2dp_exist; 659 boolean a2dp_only; 660 boolean hid_exist; 661 boolean hid_only; 662 boolean pan_exist; 663 boolean pan_only; 664 boolean slave_role; 665 boolean acl_busy; 666 }; 667 668 typedef struct _BTC_STATISTICS{ 669 u4Byte cntBind; 670 u4Byte cntPowerOn; 671 u4Byte cntPreLoadFirmware; 672 u4Byte cntInitHwConfig; 673 u4Byte cntInitCoexDm; 674 u4Byte cntIpsNotify; 675 u4Byte cntLpsNotify; 676 u4Byte cntScanNotify; 677 u4Byte cntConnectNotify; 678 u4Byte cntMediaStatusNotify; 679 u4Byte cntSpecificPacketNotify; 680 u4Byte cntBtInfoNotify; 681 u4Byte cntRfStatusNotify; 682 u4Byte cntPeriodical; 683 u4Byte cntCoexDmSwitch; 684 u4Byte cntStackOperationNotify; 685 u4Byte cntDbgCtrl; 686 } BTC_STATISTICS, *PBTC_STATISTICS; 687 688 struct btc_coexist{ 689 BOOLEAN bBinded; // make sure only one adapter can bind the data context 690 PVOID Adapter; // default adapter 691 struct btc_board_info board_info; 692 BTC_BT_INFO btInfo; // some bt info referenced by non-bt module 693 struct btc_stack_info stack_info; 694 struct btc_bt_link_info bt_link_info; 695 BTC_CHIP_INTERFACE chip_interface; 696 697 BOOLEAN initilized; 698 BOOLEAN stop_coex_dm; 699 BOOLEAN manual_control; 700 pu1Byte cli_buf; 701 BTC_STATISTICS statistics; 702 u1Byte pwrModeVal[10]; 703 704 // function pointers 705 // io related 706 BFP_BTC_R1 btc_read_1byte; 707 BFP_BTC_W1 btc_write_1byte; 708 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; 709 BFP_BTC_R2 btc_read_2byte; 710 BFP_BTC_W2 btc_write_2byte; 711 BFP_BTC_R4 btc_read_4byte; 712 BFP_BTC_W4 btc_write_4byte; 713 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; 714 // read/write bb related 715 BFP_BTC_SET_BB_REG btc_set_bb_reg; 716 BFP_BTC_GET_BB_REG btc_get_bb_reg; 717 718 // read/write rf related 719 BFP_BTC_SET_RF_REG btc_set_rf_reg; 720 BFP_BTC_GET_RF_REG btc_get_rf_reg; 721 722 // fill h2c related 723 BFP_BTC_FILL_H2C btc_fill_h2c; 724 // other 725 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; 726 // normal get/set related 727 BFP_BTC_GET btc_get; 728 BFP_BTC_SET btc_set; 729 730 BFP_BTC_GET_BT_REG btc_get_bt_reg; 731 BFP_BTC_SET_BT_REG btc_set_bt_reg; 732 733 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; 734 735 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; 736 }; 737 typedef struct btc_coexist *PBTC_COEXIST; 738 739 extern struct btc_coexist GLBtCoexist; 740 741 BOOLEAN 742 EXhalbtcoutsrc_InitlizeVariables( 743 IN PVOID Adapter 744 ); 745 VOID 746 EXhalbtcoutsrc_PowerOnSetting( 747 IN PBTC_COEXIST pBtCoexist 748 ); 749 VOID 750 EXhalbtcoutsrc_PreLoadFirmware( 751 IN PBTC_COEXIST pBtCoexist 752 ); 753 VOID 754 EXhalbtcoutsrc_InitHwConfig( 755 IN PBTC_COEXIST pBtCoexist, 756 IN BOOLEAN bWifiOnly 757 ); 758 VOID 759 EXhalbtcoutsrc_InitCoexDm( 760 IN PBTC_COEXIST pBtCoexist 761 ); 762 VOID 763 EXhalbtcoutsrc_IpsNotify( 764 IN PBTC_COEXIST pBtCoexist, 765 IN u1Byte type 766 ); 767 VOID 768 EXhalbtcoutsrc_LpsNotify( 769 IN PBTC_COEXIST pBtCoexist, 770 IN u1Byte type 771 ); 772 VOID 773 EXhalbtcoutsrc_ScanNotify( 774 IN PBTC_COEXIST pBtCoexist, 775 IN u1Byte type 776 ); 777 VOID 778 EXhalbtcoutsrc_ConnectNotify( 779 IN PBTC_COEXIST pBtCoexist, 780 IN u1Byte action 781 ); 782 VOID 783 EXhalbtcoutsrc_MediaStatusNotify( 784 IN PBTC_COEXIST pBtCoexist, 785 IN RT_MEDIA_STATUS mediaStatus 786 ); 787 VOID 788 EXhalbtcoutsrc_SpecificPacketNotify( 789 IN PBTC_COEXIST pBtCoexist, 790 IN u1Byte pktType 791 ); 792 VOID 793 EXhalbtcoutsrc_BtInfoNotify( 794 IN PBTC_COEXIST pBtCoexist, 795 IN pu1Byte tmpBuf, 796 IN u1Byte length 797 ); 798 VOID 799 EXhalbtcoutsrc_RfStatusNotify( 800 IN PBTC_COEXIST pBtCoexist, 801 IN u1Byte type 802 ); 803 VOID 804 EXhalbtcoutsrc_StackOperationNotify( 805 IN PBTC_COEXIST pBtCoexist, 806 IN u1Byte type 807 ); 808 VOID 809 EXhalbtcoutsrc_HaltNotify( 810 IN PBTC_COEXIST pBtCoexist 811 ); 812 VOID 813 EXhalbtcoutsrc_PnpNotify( 814 IN PBTC_COEXIST pBtCoexist, 815 IN u1Byte pnpState 816 ); 817 VOID 818 EXhalbtcoutsrc_ScoreBoardStatusNotify( 819 IN PBTC_COEXIST pBtCoexist, 820 IN pu1Byte tmpBuf, 821 IN u1Byte length 822 ); 823 VOID 824 EXhalbtcoutsrc_CoexDmSwitch( 825 IN PBTC_COEXIST pBtCoexist 826 ); 827 VOID 828 EXhalbtcoutsrc_Periodical( 829 IN PBTC_COEXIST pBtCoexist 830 ); 831 VOID 832 EXhalbtcoutsrc_DbgControl( 833 IN PBTC_COEXIST pBtCoexist, 834 IN u1Byte opCode, 835 IN u1Byte opLen, 836 IN pu1Byte pData 837 ); 838 VOID 839 EXhalbtcoutsrc_AntennaDetection( 840 IN PBTC_COEXIST pBtCoexist, 841 IN u4Byte centFreq, 842 IN u4Byte offset, 843 IN u4Byte span, 844 IN u4Byte seconds 845 ); 846 VOID 847 EXhalbtcoutsrc_StackUpdateProfileInfo( 848 VOID 849 ); 850 VOID 851 EXhalbtcoutsrc_SetHciVersion( 852 IN u2Byte hciVersion 853 ); 854 VOID 855 EXhalbtcoutsrc_SetBtPatchVersion( 856 IN u2Byte btHciVersion, 857 IN u2Byte btPatchVersion 858 ); 859 VOID 860 EXhalbtcoutsrc_UpdateMinBtRssi( 861 IN s1Byte btRssi 862 ); 863 #if 0 864 VOID 865 EXhalbtcoutsrc_SetBtExist( 866 IN BOOLEAN bBtExist 867 ); 868 #endif 869 VOID 870 EXhalbtcoutsrc_SetChipType( 871 IN u1Byte chipType 872 ); 873 VOID 874 EXhalbtcoutsrc_SetAntNum( 875 IN u1Byte type, 876 IN u1Byte antNum 877 ); 878 VOID 879 EXhalbtcoutsrc_SetSingleAntPath( 880 IN u1Byte singleAntPath 881 ); 882 VOID 883 EXhalbtcoutsrc_DisplayBtCoexInfo( 884 IN PBTC_COEXIST pBtCoexist 885 ); 886 VOID 887 EXhalbtcoutsrc_DisplayAntDetection( 888 IN PBTC_COEXIST pBtCoexist 889 ); 890 891 892 #define MASKBYTE0 0xff 893 #define MASKBYTE1 0xff00 894 #define MASKBYTE2 0xff0000 895 #define MASKBYTE3 0xff000000 896 #define MASKHWORD 0xffff0000 897 #define MASKLWORD 0x0000ffff 898 #define MASKDWORD 0xffffffff 899 #define MASK12BITS 0xfff 900 #define MASKH4BITS 0xf0000000 901 #define MASKOFDM_D 0xffc00000 902 #define MASKCCK 0x3f3f3f3f 903 904 #endif 905