1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ************************************************************
3 * Description:
4 *
5 * This file is for RTL8821A_CSR_CSR Co-exist mechanism
6 *
7 * History
8 * 2012/08/22 Cosa first check in.
9 * 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing.
10 *
11 * ************************************************************ */
12
13 /* ************************************************************
14 * include files
15 * ************************************************************ */
16 #include "Mp_Precomp.h"
17
18 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
19
20 #if (RTL8821A_SUPPORT == 1)
21
22 #define _BTCOEX_CSR 1
23
24 #ifndef rtw_warn_on_8821acsr2ant
25 #define rtw_warn_on_8821acsr2ant(condition) do {} while (0)
26 #endif
27 /* ************************************************************
28 * Global variables, these are static variables
29 * ************************************************************ */
30 static u8 *trace_buf = &gl_btc_trace_buf[0];
31 static struct coex_dm_8821a_csr_2ant glcoex_dm_8821a_csr_2ant;
32 static struct coex_dm_8821a_csr_2ant *coex_dm = &glcoex_dm_8821a_csr_2ant;
33 static struct coex_sta_8821a_csr_2ant glcoex_sta_8821a_csr_2ant;
34 static struct coex_sta_8821a_csr_2ant *coex_sta = &glcoex_sta_8821a_csr_2ant;
35
36 const char *const glbt_info_src_8821a_csr_2ant[] = {
37 "BT Info[wifi fw]",
38 "BT Info[bt rsp]",
39 "BT Info[bt auto report]",
40 };
41
42 u32 glcoex_ver_date_8821a_csr_2ant = 20140901;
43 u32 glcoex_ver_8821a_csr_2ant = 0x51;
44
45 /* ************************************************************
46 * local function proto type if needed
47 * ************************************************************
48 * ************************************************************
49 * local function start with halbtc8821aCsr2ant_
50 * ************************************************************ */
halbtc8821aCsr2ant_bt_rssi_state(u8 level_num,u8 rssi_thresh,u8 rssi_thresh1)51 u8 halbtc8821aCsr2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh,
52 u8 rssi_thresh1)
53 {
54 s32 bt_rssi = 0;
55 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
56
57 bt_rssi = coex_sta->bt_rssi;
58
59 if (level_num == 2) {
60 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
61 (coex_sta->pre_bt_rssi_state ==
62 BTC_RSSI_STATE_STAY_LOW)) {
63 if (bt_rssi >= (rssi_thresh +
64 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
65 bt_rssi_state = BTC_RSSI_STATE_HIGH;
66 else
67 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
68 } else {
69 if (bt_rssi < rssi_thresh)
70 bt_rssi_state = BTC_RSSI_STATE_LOW;
71 else
72 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
73 }
74 } else if (level_num == 3) {
75 if (rssi_thresh > rssi_thresh1) {
76 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
77 "[BTCoex], BT Rssi thresh error!!\n");
78 BTC_TRACE(trace_buf);
79 return coex_sta->pre_bt_rssi_state;
80 }
81
82 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
83 (coex_sta->pre_bt_rssi_state ==
84 BTC_RSSI_STATE_STAY_LOW)) {
85 if (bt_rssi >= (rssi_thresh +
86 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
87 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
88 else
89 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
90 } else if ((coex_sta->pre_bt_rssi_state ==
91 BTC_RSSI_STATE_MEDIUM) ||
92 (coex_sta->pre_bt_rssi_state ==
93 BTC_RSSI_STATE_STAY_MEDIUM)) {
94 if (bt_rssi >= (rssi_thresh1 +
95 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
96 bt_rssi_state = BTC_RSSI_STATE_HIGH;
97 else if (bt_rssi < rssi_thresh)
98 bt_rssi_state = BTC_RSSI_STATE_LOW;
99 else
100 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
101 } else {
102 if (bt_rssi < rssi_thresh1)
103 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
104 else
105 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
106 }
107 }
108
109 coex_sta->pre_bt_rssi_state = bt_rssi_state;
110
111 return bt_rssi_state;
112 }
113
halbtc8821aCsr2ant_wifi_rssi_state(IN struct btc_coexist * btcoexist,IN u8 index,IN u8 level_num,IN u8 rssi_thresh,IN u8 rssi_thresh1)114 u8 halbtc8821aCsr2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
115 IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
116 {
117 s32 wifi_rssi = 0;
118 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
119
120 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
121
122 if (level_num == 2) {
123 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
124 ||
125 (coex_sta->pre_wifi_rssi_state[index] ==
126 BTC_RSSI_STATE_STAY_LOW)) {
127 if (wifi_rssi >= (rssi_thresh +
128 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
129 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
130 else
131 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
132 } else {
133 if (wifi_rssi < rssi_thresh)
134 wifi_rssi_state = BTC_RSSI_STATE_LOW;
135 else
136 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
137 }
138 } else if (level_num == 3) {
139 if (rssi_thresh > rssi_thresh1) {
140 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
141 "[BTCoex], wifi RSSI thresh error!!\n");
142 BTC_TRACE(trace_buf);
143 return coex_sta->pre_wifi_rssi_state[index];
144 }
145
146 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
147 ||
148 (coex_sta->pre_wifi_rssi_state[index] ==
149 BTC_RSSI_STATE_STAY_LOW)) {
150 if (wifi_rssi >= (rssi_thresh +
151 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
152 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
153 else
154 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
155 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
156 BTC_RSSI_STATE_MEDIUM) ||
157 (coex_sta->pre_wifi_rssi_state[index] ==
158 BTC_RSSI_STATE_STAY_MEDIUM)) {
159 if (wifi_rssi >= (rssi_thresh1 +
160 BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
161 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
162 else if (wifi_rssi < rssi_thresh)
163 wifi_rssi_state = BTC_RSSI_STATE_LOW;
164 else
165 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
166 } else {
167 if (wifi_rssi < rssi_thresh1)
168 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
169 else
170 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
171 }
172 }
173
174 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
175
176 return wifi_rssi_state;
177 }
178
halbtc8821aCsr2ant_monitor_bt_enable_disable(IN struct btc_coexist * btcoexist)179 void halbtc8821aCsr2ant_monitor_bt_enable_disable(IN struct btc_coexist
180 *btcoexist)
181 {
182 static u32 bt_disable_cnt = 0;
183 boolean bt_active = true, bt_disabled = false;
184
185 /* This function check if bt is disabled */
186
187 if (coex_sta->high_priority_tx == 0 &&
188 coex_sta->high_priority_rx == 0 &&
189 coex_sta->low_priority_tx == 0 &&
190 coex_sta->low_priority_rx == 0)
191 bt_active = false;
192 if (coex_sta->high_priority_tx == 0xffff &&
193 coex_sta->high_priority_rx == 0xffff &&
194 coex_sta->low_priority_tx == 0xffff &&
195 coex_sta->low_priority_rx == 0xffff)
196 bt_active = false;
197 if (bt_active) {
198 bt_disable_cnt = 0;
199 bt_disabled = false;
200 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
201 &bt_disabled);
202 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
203 "[BTCoex], BT is enabled !!\n");
204 BTC_TRACE(trace_buf);
205 } else {
206 bt_disable_cnt++;
207 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
208 "[BTCoex], bt all counters=0, %d times!!\n",
209 bt_disable_cnt);
210 BTC_TRACE(trace_buf);
211 if (bt_disable_cnt >= 2) {
212 bt_disabled = true;
213 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
214 &bt_disabled);
215 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
216 "[BTCoex], BT is disabled !!\n");
217 BTC_TRACE(trace_buf);
218 }
219 }
220 if (coex_sta->bt_disabled != bt_disabled) {
221 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
222 "[BTCoex], BT is from %s to %s!!\n",
223 (coex_sta->bt_disabled ? "disabled" : "enabled"),
224 (bt_disabled ? "disabled" : "enabled"));
225 BTC_TRACE(trace_buf);
226 coex_sta->bt_disabled = bt_disabled;
227 if (!bt_disabled) {
228 } else {
229 }
230 }
231 }
232
halbtc8821aCsr2ant_monitor_bt_ctr(IN struct btc_coexist * btcoexist)233 void halbtc8821aCsr2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
234 {
235 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
236 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
237
238 reg_hp_txrx = 0x770;
239 reg_lp_txrx = 0x774;
240
241 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
242 reg_hp_tx = u32tmp & MASKLWORD;
243 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
244
245 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
246 reg_lp_tx = u32tmp & MASKLWORD;
247 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
248
249 coex_sta->high_priority_tx = reg_hp_tx;
250 coex_sta->high_priority_rx = reg_hp_rx;
251 coex_sta->low_priority_tx = reg_lp_tx;
252 coex_sta->low_priority_rx = reg_lp_rx;
253
254 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
255 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
256 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
257 BTC_TRACE(trace_buf);
258 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
259 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
260 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
261 BTC_TRACE(trace_buf);
262
263 /* reset counter */
264 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x5d);
265 }
266
halbtc8821aCsr2ant_update_ra_mask(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 dis_rate_mask)267 void halbtc8821aCsr2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
268 IN boolean force_exec, IN u32 dis_rate_mask)
269 {
270 coex_dm->cur_ra_mask = dis_rate_mask;
271
272 if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
273 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
274 &coex_dm->cur_ra_mask);
275 coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
276 }
277
halbtc8821aCsr2ant_auto_rate_fallback_retry(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)278 void halbtc8821aCsr2ant_auto_rate_fallback_retry(IN struct btc_coexist
279 *btcoexist, IN boolean force_exec, IN u8 type)
280 {
281 boolean wifi_under_b_mode = false;
282
283 coex_dm->cur_arfr_type = type;
284
285 if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
286 switch (coex_dm->cur_arfr_type) {
287 case 0: /* normal mode */
288 btcoexist->btc_write_4byte(btcoexist, 0x430,
289 coex_dm->backup_arfr_cnt1);
290 btcoexist->btc_write_4byte(btcoexist, 0x434,
291 coex_dm->backup_arfr_cnt2);
292 break;
293 case 1:
294 btcoexist->btc_get(btcoexist,
295 BTC_GET_BL_WIFI_UNDER_B_MODE,
296 &wifi_under_b_mode);
297 if (wifi_under_b_mode) {
298 btcoexist->btc_write_4byte(btcoexist,
299 0x430, 0x0);
300 btcoexist->btc_write_4byte(btcoexist,
301 0x434, 0x01010101);
302 } else {
303 btcoexist->btc_write_4byte(btcoexist,
304 0x430, 0x0);
305 btcoexist->btc_write_4byte(btcoexist,
306 0x434, 0x04030201);
307 }
308 break;
309 default:
310 break;
311 }
312 }
313
314 coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
315 }
316
halbtc8821aCsr2ant_retry_limit(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)317 void halbtc8821aCsr2ant_retry_limit(IN struct btc_coexist *btcoexist,
318 IN boolean force_exec, IN u8 type)
319 {
320 coex_dm->cur_retry_limit_type = type;
321
322 if (force_exec ||
323 (coex_dm->pre_retry_limit_type !=
324 coex_dm->cur_retry_limit_type)) {
325 switch (coex_dm->cur_retry_limit_type) {
326 case 0: /* normal mode */
327 btcoexist->btc_write_2byte(btcoexist, 0x42a,
328 coex_dm->backup_retry_limit);
329 break;
330 case 1: /* retry limit=8 */
331 btcoexist->btc_write_2byte(btcoexist, 0x42a,
332 0x0808);
333 break;
334 default:
335 break;
336 }
337 }
338
339 coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
340 }
341
halbtc8821aCsr2ant_ampdu_max_time(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)342 void halbtc8821aCsr2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
343 IN boolean force_exec, IN u8 type)
344 {
345 coex_dm->cur_ampdu_time_type = type;
346
347 if (force_exec ||
348 (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
349 switch (coex_dm->cur_ampdu_time_type) {
350 case 0: /* normal mode */
351 btcoexist->btc_write_1byte(btcoexist, 0x456,
352 coex_dm->backup_ampdu_max_time);
353 break;
354 case 1: /* AMPDU timw = 0x38 * 32us */
355 btcoexist->btc_write_1byte(btcoexist, 0x456,
356 0x38);
357 break;
358 case 2:
359 btcoexist->btc_write_1byte(btcoexist, 0x456,
360 0x17);
361 break;
362 default:
363 break;
364 }
365 }
366
367 coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
368 }
369
halbtc8821aCsr2Ant_AmpduMaxNum(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)370 void halbtc8821aCsr2Ant_AmpduMaxNum(IN struct btc_coexist *btcoexist,
371 IN boolean force_exec, IN u8 type)
372 {
373 coex_dm->cur_ampdu_num_type = type;
374
375 if (force_exec ||
376 (coex_dm->pre_ampdu_num_type != coex_dm->cur_ampdu_num_type)) {
377 switch (coex_dm->cur_ampdu_num_type) {
378 case 0: /* normal mode */
379 btcoexist->btc_write_2byte(btcoexist, 0x4ca,
380 coex_dm->backup_ampdu_max_num);
381 break;
382 case 1:
383 btcoexist->btc_write_2byte(btcoexist, 0x4ca,
384 0x0808);
385 break;
386 case 2:
387 btcoexist->btc_write_2byte(btcoexist, 0x4ca,
388 0x1f1f);
389 break;
390 default:
391 break;
392 }
393 }
394
395 coex_dm->pre_ampdu_num_type = coex_dm->cur_ampdu_num_type;
396
397 }
398
halbtc8821aCsr2ant_limited_tx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 ra_mask_type,IN u8 arfr_type,IN u8 retry_limit_type,IN u8 ampdu_time_type,IN u8 ampdu_num_type)399 void halbtc8821aCsr2ant_limited_tx(IN struct btc_coexist *btcoexist,
400 IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
401 IN u8 retry_limit_type, IN u8 ampdu_time_type, IN u8 ampdu_num_type)
402 {
403 switch (ra_mask_type) {
404 case 0: /* normal mode */
405 halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec,
406 0x0);
407 break;
408 case 1: /* disable cck 1/2 */
409 halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec,
410 0x00000003);
411 break;
412 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
413 halbtc8821aCsr2ant_update_ra_mask(btcoexist, force_exec,
414 0x0001f1f7);
415 break;
416 default:
417 break;
418 }
419
420 halbtc8821aCsr2ant_auto_rate_fallback_retry(btcoexist, force_exec,
421 arfr_type);
422 halbtc8821aCsr2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
423 halbtc8821aCsr2ant_ampdu_max_time(btcoexist, force_exec,
424 ampdu_time_type);
425 halbtc8821aCsr2Ant_AmpduMaxNum(btcoexist, force_exec, ampdu_num_type);
426 }
427
428
429
halbtc8821aCsr2ant_limited_rx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rej_ap_agg_pkt,IN boolean bt_ctrl_agg_buf_size,IN u8 agg_buf_size)430 void halbtc8821aCsr2ant_limited_rx(IN struct btc_coexist *btcoexist,
431 IN boolean force_exec, IN boolean rej_ap_agg_pkt,
432 IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
433 {
434 boolean reject_rx_agg = rej_ap_agg_pkt;
435 boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
436 u8 rx_agg_size = agg_buf_size;
437
438 /* ============================================ */
439 /* Rx Aggregation related setting */
440 /* ============================================ */
441 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
442 &reject_rx_agg);
443 /* decide BT control aggregation buf size or not */
444 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
445 &bt_ctrl_rx_agg_size);
446 /* aggregation buf size, only work when BT control Rx aggregation size. */
447 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
448 /* real update aggregation setting */
449 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
450 }
451
halbtc8821aCsr2ant_query_bt_info(IN struct btc_coexist * btcoexist)452 void halbtc8821aCsr2ant_query_bt_info(IN struct btc_coexist *btcoexist)
453 {
454 u8 h2c_parameter[1] = {0};
455
456 coex_sta->c2h_bt_info_req_sent = true;
457
458 h2c_parameter[0] |= BIT(0); /* trigger */
459
460 rtw_warn_on_8821acsr2ant(_BTCOEX_CSR);
461 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
462 }
463
halbtc8821aCsr2ant_action_algorithm(IN struct btc_coexist * btcoexist)464 u8 halbtc8821aCsr2ant_action_algorithm(IN struct btc_coexist *btcoexist)
465 {
466 struct btc_stack_info *stack_info = &btcoexist->stack_info;
467 boolean bt_hs_on = false;
468 u8 algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED;
469 u8 num_of_diff_profile = 0;
470
471 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
472
473 /* sync StackInfo with BT firmware and stack */
474 stack_info->hid_exist = coex_sta->hid_exist;
475 stack_info->bt_link_exist = coex_sta->bt_link_exist;
476 stack_info->sco_exist = coex_sta->sco_exist;
477 stack_info->pan_exist = coex_sta->pan_exist;
478 stack_info->a2dp_exist = coex_sta->a2dp_exist;
479
480 if (!stack_info->bt_link_exist) {
481 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
482 "[BTCoex], No profile exists!!!\n");
483 BTC_TRACE(trace_buf);
484 return algorithm;
485 }
486
487 if (stack_info->sco_exist)
488 num_of_diff_profile++;
489 if (stack_info->hid_exist)
490 num_of_diff_profile++;
491 if (stack_info->pan_exist)
492 num_of_diff_profile++;
493 if (stack_info->a2dp_exist)
494 num_of_diff_profile++;
495
496 if (num_of_diff_profile == 1) {
497 if (stack_info->sco_exist) {
498 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
499 "[BTCoex], SCO only\n");
500 BTC_TRACE(trace_buf);
501 algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO;
502 } else {
503 if (stack_info->hid_exist) {
504 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
505 "[BTCoex], HID only\n");
506 BTC_TRACE(trace_buf);
507 algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID;
508 } else if (stack_info->a2dp_exist) {
509 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
510 "[BTCoex], A2DP only\n");
511 BTC_TRACE(trace_buf);
512 algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP;
513 } else if (stack_info->pan_exist) {
514 if (bt_hs_on) {
515 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
516 "[BTCoex], PAN(HS) only\n");
517 BTC_TRACE(trace_buf);
518 algorithm =
519 BT_8821A_CSR_2ANT_COEX_ALGO_PANHS;
520 } else {
521 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
522 "[BTCoex], PAN(EDR) only\n");
523 BTC_TRACE(trace_buf);
524 algorithm =
525 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR;
526 }
527 }
528 }
529 } else if (num_of_diff_profile == 2) {
530 if (stack_info->sco_exist) {
531 if (stack_info->hid_exist) {
532 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
533 "[BTCoex], SCO + HID\n");
534 BTC_TRACE(trace_buf);
535 algorithm =
536 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
537 } else if (stack_info->a2dp_exist) {
538 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
539 "[BTCoex], SCO + A2DP ==> SCO\n");
540 BTC_TRACE(trace_buf);
541 algorithm =
542 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
543 } else if (stack_info->pan_exist) {
544 if (bt_hs_on) {
545 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
546 "[BTCoex], SCO + PAN(HS)\n");
547 BTC_TRACE(trace_buf);
548 algorithm =
549 BT_8821A_CSR_2ANT_COEX_ALGO_SCO;
550 } else {
551 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
552 "[BTCoex], SCO + PAN(EDR)\n");
553 BTC_TRACE(trace_buf);
554 algorithm =
555 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
556 }
557 }
558 } else {
559 if (stack_info->hid_exist &&
560 stack_info->a2dp_exist) {
561 if (stack_info->num_of_hid >= 2) {
562 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
563 "[BTCoex], HID*2 + A2DP\n");
564 BTC_TRACE(trace_buf);
565 algorithm =
566 BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
567 } else {
568 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
569 "[BTCoex], HID + A2DP\n");
570 BTC_TRACE(trace_buf);
571 algorithm =
572 BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP;
573 }
574 } else if (stack_info->hid_exist &&
575 stack_info->pan_exist) {
576 if (bt_hs_on) {
577 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
578 "[BTCoex], HID + PAN(HS)\n");
579 BTC_TRACE(trace_buf);
580 algorithm =
581 BT_8821A_CSR_2ANT_COEX_ALGO_HID;
582 } else {
583 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
584 "[BTCoex], HID + PAN(EDR)\n");
585 BTC_TRACE(trace_buf);
586 algorithm =
587 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
588 }
589 } else if (stack_info->pan_exist &&
590 stack_info->a2dp_exist) {
591 if (bt_hs_on) {
592 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
593 "[BTCoex], A2DP + PAN(HS)\n");
594 BTC_TRACE(trace_buf);
595 algorithm =
596 BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS;
597 } else {
598 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
599 "[BTCoex], A2DP + PAN(EDR)\n");
600 BTC_TRACE(trace_buf);
601 algorithm =
602 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP;
603 }
604 }
605 }
606 } else if (num_of_diff_profile == 3) {
607 if (stack_info->sco_exist) {
608 if (stack_info->hid_exist &&
609 stack_info->a2dp_exist) {
610 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
611 "[BTCoex], SCO + HID + A2DP ==> HID\n");
612 BTC_TRACE(trace_buf);
613 algorithm =
614 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
615 } else if (stack_info->hid_exist &&
616 stack_info->pan_exist) {
617 if (bt_hs_on) {
618 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
619 "[BTCoex], SCO + HID + PAN(HS)\n");
620 BTC_TRACE(trace_buf);
621 algorithm =
622 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
623 } else {
624 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
625 "[BTCoex], SCO + HID + PAN(EDR)\n");
626 BTC_TRACE(trace_buf);
627 algorithm =
628 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
629 }
630 } else if (stack_info->pan_exist &&
631 stack_info->a2dp_exist) {
632 if (bt_hs_on) {
633 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
634 "[BTCoex], SCO + A2DP + PAN(HS)\n");
635 BTC_TRACE(trace_buf);
636 algorithm =
637 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
638 } else {
639 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
640 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
641 BTC_TRACE(trace_buf);
642 algorithm =
643 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
644 }
645 }
646 } else {
647 if (stack_info->hid_exist &&
648 stack_info->pan_exist &&
649 stack_info->a2dp_exist) {
650 if (bt_hs_on) {
651 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
652 "[BTCoex], HID + A2DP + PAN(HS)\n");
653 BTC_TRACE(trace_buf);
654 algorithm =
655 BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP;
656 } else {
657 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
658 "[BTCoex], HID + A2DP + PAN(EDR)\n");
659 BTC_TRACE(trace_buf);
660 algorithm =
661 BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
662 }
663 }
664 }
665 } else if (num_of_diff_profile >= 3) {
666 if (stack_info->sco_exist) {
667 if (stack_info->hid_exist &&
668 stack_info->pan_exist &&
669 stack_info->a2dp_exist) {
670 if (bt_hs_on) {
671 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
672 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
673 BTC_TRACE(trace_buf);
674
675 } else {
676 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
677 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
678 BTC_TRACE(trace_buf);
679 algorithm =
680 BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
681 }
682 }
683 }
684 }
685
686 return algorithm;
687 }
688
halbtc8821aCsr2ant_need_to_dec_bt_pwr(IN struct btc_coexist * btcoexist)689 boolean halbtc8821aCsr2ant_need_to_dec_bt_pwr(IN struct btc_coexist *btcoexist)
690 {
691 boolean ret = false;
692 boolean bt_hs_on = false, wifi_connected = false;
693 s32 bt_hs_rssi = 0;
694 u8 bt_rssi_state;
695
696 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on))
697 return false;
698 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
699 &wifi_connected))
700 return false;
701 if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi))
702 return false;
703
704 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
705
706 if (wifi_connected) {
707 if (bt_hs_on) {
708 if (bt_hs_rssi > 37)
709 ret = true;
710 } else {
711 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
712 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
713 ret = true;
714 }
715 }
716
717 return ret;
718 }
719
halbtc8821aCsr2ant_set_fw_dac_swing_level(IN struct btc_coexist * btcoexist,IN u8 dac_swing_lvl)720 void halbtc8821aCsr2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
721 IN u8 dac_swing_lvl)
722 {
723 u8 h2c_parameter[1] = {0};
724
725 /* There are several type of dacswing */
726 /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
727 h2c_parameter[0] = dac_swing_lvl;
728
729 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
730 }
731
halbtc8821aCsr2ant_set_fw_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean dec_bt_pwr)732 void halbtc8821aCsr2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
733 IN boolean dec_bt_pwr)
734 {
735 u8 h2c_parameter[1] = {0};
736
737 h2c_parameter[0] = 0;
738
739 if (dec_bt_pwr)
740 h2c_parameter[0] |= BIT(1);
741
742 rtw_warn_on_8821acsr2ant(_BTCOEX_CSR);
743 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
744 }
745
halbtc8821aCsr2ant_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean dec_bt_pwr)746 void halbtc8821aCsr2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
747 IN boolean force_exec, IN boolean dec_bt_pwr)
748 {
749 coex_dm->cur_dec_bt_pwr = dec_bt_pwr;
750
751 if (!force_exec) {
752 if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr)
753 return;
754 }
755
756 /* TODO: may CSR consider to decrease BT power? */
757 /* halbtc8821aCsr2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); */
758
759 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
760 }
761
halbtc8821aCsr2ant_set_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean enable_auto_report)762 void halbtc8821aCsr2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
763 IN boolean enable_auto_report)
764 {
765 u8 h2c_parameter[1] = {0};
766
767 h2c_parameter[0] = 0;
768
769 if (enable_auto_report)
770 h2c_parameter[0] |= BIT(0);
771
772 rtw_warn_on_8821acsr2ant(_BTCOEX_CSR);
773 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
774 }
775
halbtc8821aCsr2ant_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable_auto_report)776 void halbtc8821aCsr2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
777 IN boolean force_exec, IN boolean enable_auto_report)
778 {
779 coex_dm->cur_bt_auto_report = enable_auto_report;
780
781 if (!force_exec) {
782 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
783 return;
784 }
785 /* halbtc8821aCsr2ant_set_bt_auto_report(btcoexist, coex_dm->cur_bt_auto_report); */
786
787 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
788 }
789
halbtc8821aCsr2ant_fw_dac_swing_lvl(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 fw_dac_swing_lvl)790 void halbtc8821aCsr2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
791 IN boolean force_exec, IN u8 fw_dac_swing_lvl)
792 {
793 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
794
795 if (!force_exec) {
796 if (coex_dm->pre_fw_dac_swing_lvl ==
797 coex_dm->cur_fw_dac_swing_lvl)
798 return;
799 }
800
801 halbtc8821aCsr2ant_set_fw_dac_swing_level(btcoexist,
802 coex_dm->cur_fw_dac_swing_lvl);
803
804 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
805 }
806
halbtc8821aCsr2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist * btcoexist,IN boolean rx_rf_shrink_on)807 void halbtc8821aCsr2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist
808 *btcoexist, IN boolean rx_rf_shrink_on)
809 {
810 if (rx_rf_shrink_on) {
811 /* Shrink RF Rx LPF corner */
812 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
813 "[BTCoex], Shrink RF Rx LPF corner!!\n");
814 BTC_TRACE(trace_buf);
815 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
816 0xffffc);
817 } else {
818 /* Resume RF Rx LPF corner */
819 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
820 if (btcoexist->initilized) {
821 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
822 "[BTCoex], Resume RF Rx LPF corner!!\n");
823 BTC_TRACE(trace_buf);
824 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
825 0xfffff, coex_dm->bt_rf_0x1e_backup);
826 }
827 }
828 }
829
halbtc8821aCsr2ant_rf_shrink(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rx_rf_shrink_on)830 void halbtc8821aCsr2ant_rf_shrink(IN struct btc_coexist *btcoexist,
831 IN boolean force_exec, IN boolean rx_rf_shrink_on)
832 {
833 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
834
835 if (!force_exec) {
836 if (coex_dm->pre_rf_rx_lpf_shrink ==
837 coex_dm->cur_rf_rx_lpf_shrink)
838 return;
839 }
840 halbtc8821aCsr2ant_set_sw_rf_rx_lpf_corner(btcoexist,
841 coex_dm->cur_rf_rx_lpf_shrink);
842
843 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
844 }
845
halbtc8821aCsr2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist * btcoexist,IN boolean low_penalty_ra)846 void halbtc8821aCsr2ant_set_sw_penalty_tx_rate_adaptive(
847 IN struct btc_coexist *btcoexist, IN boolean low_penalty_ra)
848 {
849 u8 h2c_parameter[6] = {0};
850
851 h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
852
853 if (low_penalty_ra) {
854 h2c_parameter[1] |= BIT(0);
855 h2c_parameter[2] =
856 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
857 h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
858 h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
859 h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
860 }
861
862 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
863 }
864
halbtc8821aCsr2ant_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean low_penalty_ra)865 void halbtc8821aCsr2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
866 IN boolean force_exec, IN boolean low_penalty_ra)
867 {
868 coex_dm->cur_low_penalty_ra = low_penalty_ra;
869
870 if (!force_exec) {
871 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
872 return;
873 }
874 halbtc8821aCsr2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
875 coex_dm->cur_low_penalty_ra);
876
877 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
878 }
879
halbtc8821aCsr2ant_set_dac_swing_reg(IN struct btc_coexist * btcoexist,IN u32 level)880 void halbtc8821aCsr2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
881 IN u32 level)
882 {
883 u8 val = (u8)level;
884
885 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
886 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
887 BTC_TRACE(trace_buf);
888 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val);
889 }
890
halbtc8821aCsr2ant_set_sw_full_time_dac_swing(IN struct btc_coexist * btcoexist,IN boolean sw_dac_swing_on,IN u32 sw_dac_swing_lvl)891 void halbtc8821aCsr2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
892 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
893 {
894 if (sw_dac_swing_on)
895 halbtc8821aCsr2ant_set_dac_swing_reg(btcoexist,
896 sw_dac_swing_lvl);
897 else
898 halbtc8821aCsr2ant_set_dac_swing_reg(btcoexist, 0x18);
899 }
900
901
halbtc8821aCsr2ant_dac_swing(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean dac_swing_on,IN u32 dac_swing_lvl)902 void halbtc8821aCsr2ant_dac_swing(IN struct btc_coexist *btcoexist,
903 IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
904 {
905 coex_dm->cur_dac_swing_on = dac_swing_on;
906 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
907
908 if (!force_exec) {
909 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
910 (coex_dm->pre_dac_swing_lvl ==
911 coex_dm->cur_dac_swing_lvl))
912 return;
913 }
914 delay_ms(30);
915 halbtc8821aCsr2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
916 dac_swing_lvl);
917
918 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
919 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
920 }
921
halbtc8821aCsr2ant_set_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean adc_back_off)922 void halbtc8821aCsr2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
923 IN boolean adc_back_off)
924 {
925 if (adc_back_off) {
926 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
927 "[BTCoex], BB BackOff Level On!\n");
928 BTC_TRACE(trace_buf);
929 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3);
930 } else {
931 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
932 "[BTCoex], BB BackOff Level Off!\n");
933 BTC_TRACE(trace_buf);
934 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1);
935 }
936 }
937
halbtc8821aCsr2ant_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean adc_back_off)938 void halbtc8821aCsr2ant_adc_back_off(IN struct btc_coexist *btcoexist,
939 IN boolean force_exec, IN boolean adc_back_off)
940 {
941 coex_dm->cur_adc_back_off = adc_back_off;
942
943 if (!force_exec) {
944 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
945 return;
946 }
947 halbtc8821aCsr2ant_set_adc_back_off(btcoexist,
948 coex_dm->cur_adc_back_off);
949
950 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
951 }
952
halbtc8821aCsr2ant_set_agc_table(IN struct btc_coexist * btcoexist,IN boolean agc_table_en)953 void halbtc8821aCsr2ant_set_agc_table(IN struct btc_coexist *btcoexist,
954 IN boolean agc_table_en)
955 {
956 u8 rssi_adjust_val = 0;
957
958 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
959 if (agc_table_en) {
960 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
961 "[BTCoex], Agc Table On!\n");
962 BTC_TRACE(trace_buf);
963 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
964 0x28F4B);
965 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
966 0x10AB2);
967 rssi_adjust_val = 8;
968 } else {
969 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
970 "[BTCoex], Agc Table Off!\n");
971 BTC_TRACE(trace_buf);
972 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
973 0x2884B);
974 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
975 0x104B2);
976 }
977 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
978
979 /* set rssi_adjust_val for wifi module. */
980 btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
981 &rssi_adjust_val);
982 }
983
halbtc8821aCsr2ant_agc_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean agc_table_en)984 void halbtc8821aCsr2ant_agc_table(IN struct btc_coexist *btcoexist,
985 IN boolean force_exec, IN boolean agc_table_en)
986 {
987 coex_dm->cur_agc_table_en = agc_table_en;
988
989 if (!force_exec) {
990 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
991 return;
992 }
993 halbtc8821aCsr2ant_set_agc_table(btcoexist, agc_table_en);
994
995 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
996 }
997
halbtc8821aCsr2ant_set_coex_table(IN struct btc_coexist * btcoexist,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)998 void halbtc8821aCsr2ant_set_coex_table(IN struct btc_coexist *btcoexist,
999 IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
1000 {
1001 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1002
1003 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1004
1005 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1006
1007 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1008 }
1009
halbtc8821aCsr2ant_coex_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)1010 void halbtc8821aCsr2ant_coex_table(IN struct btc_coexist *btcoexist,
1011 IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1012 IN u32 val0x6c8, IN u8 val0x6cc)
1013 {
1014 coex_dm->cur_val0x6c0 = val0x6c0;
1015 coex_dm->cur_val0x6c4 = val0x6c4;
1016 coex_dm->cur_val0x6c8 = val0x6c8;
1017 coex_dm->cur_val0x6cc = val0x6cc;
1018
1019 if (!force_exec) {
1020 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1021 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1022 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1023 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1024 return;
1025 }
1026 halbtc8821aCsr2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1027 val0x6c8, val0x6cc);
1028
1029 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1030 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1031 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1032 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1033 }
1034
halbtc8821aCsr2ant_set_fw_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean enable)1035 void halbtc8821aCsr2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1036 IN boolean enable)
1037 {
1038 u8 h2c_parameter[1] = {0};
1039
1040 if (enable) {
1041 h2c_parameter[0] |= BIT(0); /* function enable */
1042 }
1043
1044 rtw_warn_on_8821acsr2ant(_BTCOEX_CSR);
1045 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1046 }
1047
halbtc8821aCsr2ant_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable)1048 void halbtc8821aCsr2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1049 IN boolean force_exec, IN boolean enable)
1050 {
1051 coex_dm->cur_ignore_wlan_act = enable;
1052
1053 if (!force_exec) {
1054 if (coex_dm->pre_ignore_wlan_act ==
1055 coex_dm->cur_ignore_wlan_act)
1056 return;
1057 }
1058 /* halbtc8821aCsr2ant_set_fw_ignore_wlan_act(btcoexist, enable); */
1059
1060 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1061 }
1062
halbtc8821aCsr2ant_set_fw_pstdma(IN struct btc_coexist * btcoexist,IN u8 byte1,IN u8 byte2,IN u8 byte3,IN u8 byte4,IN u8 byte5)1063 void halbtc8821aCsr2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1064 IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1065 {
1066 u8 h2c_parameter[6] = {0};
1067
1068 h2c_parameter[0] = byte1;
1069 h2c_parameter[1] = byte2;
1070 h2c_parameter[2] = byte3;
1071 h2c_parameter[3] = byte4;
1072 h2c_parameter[4] = byte5;
1073 h2c_parameter[5] = 0x01;
1074
1075 coex_dm->ps_tdma_para[0] = byte1;
1076 coex_dm->ps_tdma_para[1] = byte2;
1077 coex_dm->ps_tdma_para[2] = byte3;
1078 coex_dm->ps_tdma_para[3] = byte4;
1079 coex_dm->ps_tdma_para[4] = byte5;
1080 coex_dm->ps_tdma_para[5] = 0x01;
1081
1082 btcoexist->btc_fill_h2c(btcoexist, 0x60, 6, h2c_parameter);
1083 }
1084
halbtc8821aCsr2ant_sw_mechanism1(IN struct btc_coexist * btcoexist,IN boolean shrink_rx_lpf,IN boolean low_penalty_ra,IN boolean limited_dig,IN boolean bt_lna_constrain)1085 void halbtc8821aCsr2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1086 IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1087 IN boolean limited_dig, IN boolean bt_lna_constrain)
1088 {
1089 u32 wifi_bw;
1090
1091 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1092
1093 if (BTC_WIFI_BW_HT40 != wifi_bw) { /* only shrink RF Rx LPF for HT40 */
1094 if (shrink_rx_lpf)
1095 shrink_rx_lpf = false;
1096 }
1097
1098 halbtc8821aCsr2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1099 halbtc8821aCsr2ant_low_penalty_ra(btcoexist, NORMAL_EXEC,
1100 low_penalty_ra);
1101
1102 /* no limited DIG */
1103 /* halbtc8821aCsr2ant_setBtLnaConstrain(btcoexist, NORMAL_EXEC, bt_lna_constrain); */
1104 }
1105
halbtc8821aCsr2ant_sw_mechanism2(IN struct btc_coexist * btcoexist,IN boolean agc_table_shift,IN boolean adc_back_off,IN boolean sw_dac_swing,IN u32 dac_swing_lvl)1106 void halbtc8821aCsr2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1107 IN boolean agc_table_shift, IN boolean adc_back_off,
1108 IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1109 {
1110 /* halbtc8821aCsr2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
1111 halbtc8821aCsr2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off);
1112 halbtc8821aCsr2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1113 dac_swing_lvl);
1114 }
1115
halbtc8821aCsr2ant_set_ant_path(IN struct btc_coexist * btcoexist,IN u8 ant_pos_type,IN boolean init_hwcfg,IN boolean wifi_off)1116 void halbtc8821aCsr2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1117 IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1118 {
1119 struct btc_board_info *board_info = &btcoexist->board_info;
1120 u32 u32tmp = 0;
1121 u8 h2c_parameter[2] = {0};
1122
1123 if (init_hwcfg) {
1124 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
1125 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1126 u32tmp &= ~BIT(23);
1127 u32tmp |= BIT(24);
1128 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1129
1130 btcoexist->btc_write_4byte(btcoexist, 0x974, 0x3ff);
1131 btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77);
1132
1133 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
1134 /* tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */
1135 h2c_parameter[0] = 1;
1136 h2c_parameter[1] = 1;
1137 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
1138 h2c_parameter);
1139 } else {
1140 /* tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix */
1141 h2c_parameter[0] = 0;
1142 h2c_parameter[1] = 1;
1143 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
1144 h2c_parameter);
1145 }
1146 }
1147
1148 /* ext switch setting */
1149 switch (ant_pos_type) {
1150 case BTC_ANT_WIFI_AT_MAIN:
1151 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7,
1152 0x30, 0x1);
1153 break;
1154 case BTC_ANT_WIFI_AT_AUX:
1155 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7,
1156 0x30, 0x2);
1157 break;
1158 }
1159 }
1160
halbtc8821aCsr2ant_ps_tdma(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean turn_on,IN u8 type)1161 void halbtc8821aCsr2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1162 IN boolean force_exec, IN boolean turn_on, IN u8 type)
1163 {
1164 coex_dm->cur_ps_tdma_on = turn_on;
1165 coex_dm->cur_ps_tdma = type;
1166
1167 if (!force_exec) {
1168 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1169 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1170 return;
1171 }
1172 if (turn_on) {
1173 switch (type) {
1174 case 1:
1175 default:
1176 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1177 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1178 break;
1179 case 2:
1180 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1181 0xe3, 0x12, 0x12, 0xe1, 0x90);
1182 break;
1183 case 3:
1184 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1185 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1186 break;
1187 case 4:
1188 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1189 0xe3, 0x10, 0x03, 0xf1, 0x90);
1190 break;
1191 case 5:
1192 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1193 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1194 break;
1195 case 6:
1196 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1197 0xe3, 0x12, 0x12, 0x60, 0x90);
1198 break;
1199 case 7:
1200 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1201 0xe3, 0x1c, 0x3, 0x70, 0x90);
1202 break;
1203 case 8:
1204 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1205 0xa3, 0x10, 0x3, 0x70, 0x90);
1206 break;
1207 case 9:
1208 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1209 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1210 break;
1211 case 10:
1212 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1213 0xe3, 0x12, 0x12, 0xe1, 0x90);
1214 break;
1215 case 11:
1216 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1217 0xe3, 0xa, 0xa, 0xe1, 0x90);
1218 break;
1219 case 12:
1220 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1221 0xe3, 0x5, 0x5, 0xe1, 0x90);
1222 break;
1223 case 13:
1224 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1225 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1226 break;
1227 case 14:
1228 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1229 0xe3, 0x12, 0x12, 0x60, 0x90);
1230 break;
1231 case 15:
1232 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1233 0xe3, 0xa, 0xa, 0x60, 0x90);
1234 break;
1235 case 16:
1236 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1237 0xe3, 0x5, 0x5, 0x60, 0x90);
1238 break;
1239 case 17:
1240 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1241 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1242 break;
1243 case 18:
1244 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1245 0xe3, 0x5, 0x5, 0xe1, 0x90);
1246 break;
1247 case 19:
1248 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1249 0xe3, 0x25, 0x25, 0xe1, 0x90);
1250 break;
1251 case 20:
1252 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1253 0xe3, 0x25, 0x25, 0x60, 0x90);
1254 break;
1255 case 21:
1256 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1257 0xe3, 0x15, 0x03, 0x70, 0x90);
1258 break;
1259 case 22: /* ad2dp master */
1260 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1261 0xeb, 0x11, 0x11, 0x21, 0x10);
1262 break;
1263 case 23: /* a2dp slave */
1264 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1265 0xeb, 0x12, 0x12, 0x20, 0x10);
1266 break;
1267 case 71:
1268 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist,
1269 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1270 break;
1271 }
1272 } else {
1273 /* disable PS tdma */
1274 switch (type) {
1275 case 0:
1276 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0,
1277 0x0, 0x0, 0x40, 0x0);
1278 break;
1279 case 1:
1280 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0,
1281 0x0, 0x0, 0x48, 0x0);
1282 break;
1283 default:
1284 halbtc8821aCsr2ant_set_fw_pstdma(btcoexist, 0x0,
1285 0x0, 0x0, 0x40, 0x0);
1286 break;
1287 }
1288 }
1289
1290 /* update pre state */
1291 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1292 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1293 }
1294
halbtc8821aCsr2ant_coex_all_off(IN struct btc_coexist * btcoexist)1295 void halbtc8821aCsr2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1296 {
1297 /* fw all off */
1298 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1299 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1300 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1301
1302 /* sw all off */
1303 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, false);
1304 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1305
1306 /* hw all off */
1307 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55555555,
1308 0x55555555, 0xffff, 0x3);
1309 }
1310
halbtc8821aCsr2ant_coex_under_5g(IN struct btc_coexist * btcoexist)1311 void halbtc8821aCsr2ant_coex_under_5g(IN struct btc_coexist *btcoexist)
1312 {
1313 halbtc8821aCsr2ant_coex_all_off(btcoexist);
1314
1315 halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true);
1316 }
1317
halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist * btcoexist)1318 void halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1319 {
1320 /* force to reset coex mechanism */
1321 halbtc8821aCsr2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555,
1322 0x55555555, 0xffff, 0x3);
1323
1324 halbtc8821aCsr2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1325 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1326 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
1327
1328 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false, false);
1329 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1330 }
1331
halbtc8821aCsr2ant_bt_inquiry_page(IN struct btc_coexist * btcoexist)1332 void halbtc8821aCsr2ant_bt_inquiry_page(IN struct btc_coexist *btcoexist)
1333 {
1334 boolean low_pwr_disable = true;
1335
1336 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1337 &low_pwr_disable);
1338
1339 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
1340 0x5afa5afa, 0xffff, 0x3);
1341 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1342 }
halbtc8821aCsr2ant_is_common_action(IN struct btc_coexist * btcoexist)1343 boolean halbtc8821aCsr2ant_is_common_action(IN struct btc_coexist *btcoexist)
1344 {
1345 boolean common = false, wifi_connected = false, wifi_busy = false;
1346 boolean low_pwr_disable = false;
1347
1348 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1349 &wifi_connected);
1350 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1351
1352 if (!wifi_connected &&
1353 BT_8821A_CSR_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) {
1354 low_pwr_disable = false;
1355 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1356 &low_pwr_disable);
1357
1358 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1359 "[BTCoex], Wifi IPS + BT IPS!!\n");
1360 BTC_TRACE(trace_buf);
1361
1362
1363 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1364 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1365 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1366
1367 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false,
1368 false);
1369 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false,
1370 0x18);
1371 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
1372 0, 0);
1373 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0);
1374
1375 common = true;
1376 } else if (wifi_connected &&
1377 (BT_8821A_CSR_2ANT_BT_STATUS_IDLE ==
1378 coex_dm->bt_status)) {
1379 low_pwr_disable = false;
1380 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1381 &low_pwr_disable);
1382
1383 if (wifi_busy) {
1384 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1385 "[BTCoex], Wifi Busy + BT IPS!!\n");
1386 BTC_TRACE(trace_buf);
1387 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1388 false, 1);
1389 } else {
1390 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1391 "[BTCoex], Wifi LPS + BT IPS!!\n");
1392 BTC_TRACE(trace_buf);
1393 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1394 false, 1);
1395 }
1396
1397 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1398 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1399
1400 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false,
1401 false);
1402 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false,
1403 0x18);
1404 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
1405 0, 0);
1406 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0);
1407
1408 common = true;
1409 } else if (!wifi_connected &&
1410 (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE ==
1411 coex_dm->bt_status)) {
1412 low_pwr_disable = true;
1413 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1414 &low_pwr_disable);
1415
1416 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1417 "[BTCoex], Wifi IPS + BT LPS!!\n");
1418 BTC_TRACE(trace_buf);
1419
1420 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1421 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1422 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1423
1424 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false,
1425 false);
1426 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false,
1427 0x18);
1428 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
1429 0, 0);
1430 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0);
1431
1432 common = true;
1433 } else if (wifi_connected &&
1434 (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE ==
1435 coex_dm->bt_status)) {
1436 low_pwr_disable = true;
1437 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1438 &low_pwr_disable);
1439
1440 if (wifi_busy) {
1441 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1442 "[BTCoex], Wifi Busy + BT LPS!!\n");
1443 BTC_TRACE(trace_buf);
1444 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1445 false, 1);
1446 } else {
1447 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1448 "[BTCoex], Wifi LPS + BT LPS!!\n");
1449 BTC_TRACE(trace_buf);
1450 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1451 false, 1);
1452 }
1453
1454 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1455 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1456
1457 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, true,
1458 true);
1459 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false,
1460 0x18);
1461 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
1462 0, 0);
1463 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0);
1464
1465 common = true;
1466 } else if (!wifi_connected &&
1467 (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE ==
1468 coex_dm->bt_status)) {
1469 low_pwr_disable = false;
1470 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1471 &low_pwr_disable);
1472
1473 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1474 "[BTCoex], Wifi IPS + BT Busy!!\n");
1475 BTC_TRACE(trace_buf);
1476
1477 /* halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); */
1478 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1479 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1480 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1481
1482 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false, false, false,
1483 false);
1484 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, false,
1485 0x18);
1486 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
1487 0, 0);
1488 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, 0, 0, 0);
1489
1490 common = true;
1491 } else {
1492 low_pwr_disable = true;
1493 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1494 &low_pwr_disable);
1495
1496 if (wifi_busy) {
1497 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1498 "[BTCoex], Wifi Busy + BT Busy!!\n");
1499 BTC_TRACE(trace_buf);
1500 common = false;
1501 } else {
1502 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1503 "[BTCoex], Wifi LPS + BT Busy!!\n");
1504 BTC_TRACE(trace_buf);
1505 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
1506 21);
1507
1508 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
1509 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist,
1510 NORMAL_EXEC, true);
1511 else
1512 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist,
1513 NORMAL_EXEC, false);
1514
1515 common = true;
1516 }
1517
1518 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true, true,
1519 true);
1520 }
1521
1522 if (common == true)
1523 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
1524 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
1525
1526 return common;
1527 }
halbtc8821aCsr2ant_tdma_duration_adjust(IN struct btc_coexist * btcoexist,IN boolean sco_hid,IN boolean tx_pause,IN u8 max_interval)1528 void halbtc8821aCsr2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
1529 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
1530 {
1531 static s32 up, dn, m, n, wait_count;
1532 s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1533 u8 retry_count = 0;
1534
1535 if (coex_dm->reset_tdma_adjust) {
1536 coex_dm->reset_tdma_adjust = false;
1537 {
1538 if (sco_hid) {
1539 if (tx_pause) {
1540 if (max_interval == 1) {
1541 halbtc8821aCsr2ant_ps_tdma(
1542 btcoexist, NORMAL_EXEC,
1543 true, 13);
1544 coex_dm->ps_tdma_du_adj_type =
1545 13;
1546 } else if (max_interval == 2) {
1547 halbtc8821aCsr2ant_ps_tdma(
1548 btcoexist, NORMAL_EXEC,
1549 true, 14);
1550 coex_dm->ps_tdma_du_adj_type =
1551 14;
1552 } else if (max_interval == 3) {
1553 halbtc8821aCsr2ant_ps_tdma(
1554 btcoexist, NORMAL_EXEC,
1555 true, 15);
1556 coex_dm->ps_tdma_du_adj_type =
1557 15;
1558 } else {
1559 halbtc8821aCsr2ant_ps_tdma(
1560 btcoexist, NORMAL_EXEC,
1561 true, 15);
1562 coex_dm->ps_tdma_du_adj_type =
1563 15;
1564 }
1565 } else {
1566 if (max_interval == 1) {
1567 halbtc8821aCsr2ant_ps_tdma(
1568 btcoexist, NORMAL_EXEC,
1569 true, 9);
1570 coex_dm->ps_tdma_du_adj_type =
1571 9;
1572 } else if (max_interval == 2) {
1573 halbtc8821aCsr2ant_ps_tdma(
1574 btcoexist, NORMAL_EXEC,
1575 true, 10);
1576 coex_dm->ps_tdma_du_adj_type =
1577 10;
1578 } else if (max_interval == 3) {
1579 halbtc8821aCsr2ant_ps_tdma(
1580 btcoexist, NORMAL_EXEC,
1581 true, 11);
1582 coex_dm->ps_tdma_du_adj_type =
1583 11;
1584 } else {
1585 halbtc8821aCsr2ant_ps_tdma(
1586 btcoexist, NORMAL_EXEC,
1587 true, 11);
1588 coex_dm->ps_tdma_du_adj_type =
1589 11;
1590 }
1591 }
1592 } else {
1593 if (tx_pause) {
1594 if (max_interval == 1) {
1595 halbtc8821aCsr2ant_ps_tdma(
1596 btcoexist, NORMAL_EXEC,
1597 true, 5);
1598 coex_dm->ps_tdma_du_adj_type =
1599 5;
1600 } else if (max_interval == 2) {
1601 halbtc8821aCsr2ant_ps_tdma(
1602 btcoexist, NORMAL_EXEC,
1603 true, 6);
1604 coex_dm->ps_tdma_du_adj_type =
1605 6;
1606 } else if (max_interval == 3) {
1607 halbtc8821aCsr2ant_ps_tdma(
1608 btcoexist, NORMAL_EXEC,
1609 true, 7);
1610 coex_dm->ps_tdma_du_adj_type =
1611 7;
1612 } else {
1613 halbtc8821aCsr2ant_ps_tdma(
1614 btcoexist, NORMAL_EXEC,
1615 true, 7);
1616 coex_dm->ps_tdma_du_adj_type =
1617 7;
1618 }
1619 } else {
1620 if (max_interval == 1) {
1621 halbtc8821aCsr2ant_ps_tdma(
1622 btcoexist, NORMAL_EXEC,
1623 true, 1);
1624 coex_dm->ps_tdma_du_adj_type =
1625 1;
1626 } else if (max_interval == 2) {
1627 halbtc8821aCsr2ant_ps_tdma(
1628 btcoexist, NORMAL_EXEC,
1629 true, 2);
1630 coex_dm->ps_tdma_du_adj_type =
1631 2;
1632 } else if (max_interval == 3) {
1633 halbtc8821aCsr2ant_ps_tdma(
1634 btcoexist, NORMAL_EXEC,
1635 true, 3);
1636 coex_dm->ps_tdma_du_adj_type =
1637 3;
1638 } else {
1639 halbtc8821aCsr2ant_ps_tdma(
1640 btcoexist, NORMAL_EXEC,
1641 true, 3);
1642 coex_dm->ps_tdma_du_adj_type =
1643 3;
1644 }
1645 }
1646 }
1647 }
1648 /* ============ */
1649 up = 0;
1650 dn = 0;
1651 m = 1;
1652 n = 3;
1653 result = 0;
1654 wait_count = 0;
1655 } else {
1656 /* accquire the BT TRx retry count from BT_Info byte2 */
1657 retry_count = coex_sta->bt_retry_cnt;
1658 result = 0;
1659 wait_count++;
1660
1661 if (retry_count ==
1662 0) { /* no retry in the last 2-second duration */
1663 up++;
1664 dn--;
1665
1666 if (dn <= 0)
1667 dn = 0;
1668
1669 if (up >= n) { /* if �s�� n ��2�� retry count��0, �h�ռeWiFi duration */
1670 wait_count = 0;
1671 n = 3;
1672 up = 0;
1673 dn = 0;
1674 result = 1;
1675 }
1676 } else if (retry_count <=
1677 3) { /* <=3 retry in the last 2-second duration */
1678 up--;
1679 dn++;
1680
1681 if (up <= 0)
1682 up = 0;
1683
1684 if (dn == 2) { /* if �s�� 2 ��2�� retry count< 3, �h�կ�WiFi duration */
1685 if (wait_count <= 2)
1686 m++; /* �קK�@���b���level���Ӧ^ */
1687 else
1688 m = 1;
1689
1690 if (m >= 20) /* m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration. */
1691 m = 20;
1692
1693 n = 3 * m;
1694 up = 0;
1695 dn = 0;
1696 wait_count = 0;
1697 result = -1;
1698 }
1699 } else { /* retry count > 3, �u�n1�� retry count > 3, �h�կ�WiFi duration */
1700 if (wait_count == 1)
1701 m++; /* �קK�@���b���level���Ӧ^ */
1702 else
1703 m = 1;
1704
1705 if (m >= 20) /* m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration. */
1706 m = 20;
1707
1708 n = 3 * m;
1709 up = 0;
1710 dn = 0;
1711 wait_count = 0;
1712 result = -1;
1713 }
1714
1715 if (max_interval == 1) {
1716 if (tx_pause) {
1717 if (coex_dm->cur_ps_tdma == 71) {
1718 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1719 NORMAL_EXEC, true, 5);
1720 coex_dm->ps_tdma_du_adj_type = 5;
1721 } else if (coex_dm->cur_ps_tdma == 1) {
1722 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1723 NORMAL_EXEC, true, 5);
1724 coex_dm->ps_tdma_du_adj_type = 5;
1725 } else if (coex_dm->cur_ps_tdma == 2) {
1726 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1727 NORMAL_EXEC, true, 6);
1728 coex_dm->ps_tdma_du_adj_type = 6;
1729 } else if (coex_dm->cur_ps_tdma == 3) {
1730 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1731 NORMAL_EXEC, true, 7);
1732 coex_dm->ps_tdma_du_adj_type = 7;
1733 } else if (coex_dm->cur_ps_tdma == 4) {
1734 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1735 NORMAL_EXEC, true, 8);
1736 coex_dm->ps_tdma_du_adj_type = 8;
1737 }
1738 if (coex_dm->cur_ps_tdma == 9) {
1739 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1740 NORMAL_EXEC, true, 13);
1741 coex_dm->ps_tdma_du_adj_type = 13;
1742 } else if (coex_dm->cur_ps_tdma == 10) {
1743 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1744 NORMAL_EXEC, true, 14);
1745 coex_dm->ps_tdma_du_adj_type = 14;
1746 } else if (coex_dm->cur_ps_tdma == 11) {
1747 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1748 NORMAL_EXEC, true, 15);
1749 coex_dm->ps_tdma_du_adj_type = 15;
1750 } else if (coex_dm->cur_ps_tdma == 12) {
1751 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1752 NORMAL_EXEC, true, 16);
1753 coex_dm->ps_tdma_du_adj_type = 16;
1754 }
1755
1756 if (result == -1) {
1757 if (coex_dm->cur_ps_tdma == 5) {
1758 halbtc8821aCsr2ant_ps_tdma(
1759 btcoexist, NORMAL_EXEC,
1760 true, 6);
1761 coex_dm->ps_tdma_du_adj_type =
1762 6;
1763 } else if (coex_dm->cur_ps_tdma == 6) {
1764 halbtc8821aCsr2ant_ps_tdma(
1765 btcoexist, NORMAL_EXEC,
1766 true, 7);
1767 coex_dm->ps_tdma_du_adj_type =
1768 7;
1769 } else if (coex_dm->cur_ps_tdma == 7) {
1770 halbtc8821aCsr2ant_ps_tdma(
1771 btcoexist, NORMAL_EXEC,
1772 true, 8);
1773 coex_dm->ps_tdma_du_adj_type =
1774 8;
1775 } else if (coex_dm->cur_ps_tdma == 13) {
1776 halbtc8821aCsr2ant_ps_tdma(
1777 btcoexist, NORMAL_EXEC,
1778 true, 14);
1779 coex_dm->ps_tdma_du_adj_type =
1780 14;
1781 } else if (coex_dm->cur_ps_tdma == 14) {
1782 halbtc8821aCsr2ant_ps_tdma(
1783 btcoexist, NORMAL_EXEC,
1784 true, 15);
1785 coex_dm->ps_tdma_du_adj_type =
1786 15;
1787 } else if (coex_dm->cur_ps_tdma == 15) {
1788 halbtc8821aCsr2ant_ps_tdma(
1789 btcoexist, NORMAL_EXEC,
1790 true, 16);
1791 coex_dm->ps_tdma_du_adj_type =
1792 16;
1793 }
1794 } else if (result == 1) {
1795 if (coex_dm->cur_ps_tdma == 8) {
1796 halbtc8821aCsr2ant_ps_tdma(
1797 btcoexist, NORMAL_EXEC,
1798 true, 7);
1799 coex_dm->ps_tdma_du_adj_type =
1800 7;
1801 } else if (coex_dm->cur_ps_tdma == 7) {
1802 halbtc8821aCsr2ant_ps_tdma(
1803 btcoexist, NORMAL_EXEC,
1804 true, 6);
1805 coex_dm->ps_tdma_du_adj_type =
1806 6;
1807 } else if (coex_dm->cur_ps_tdma == 6) {
1808 halbtc8821aCsr2ant_ps_tdma(
1809 btcoexist, NORMAL_EXEC,
1810 true, 5);
1811 coex_dm->ps_tdma_du_adj_type =
1812 5;
1813 } else if (coex_dm->cur_ps_tdma == 16) {
1814 halbtc8821aCsr2ant_ps_tdma(
1815 btcoexist, NORMAL_EXEC,
1816 true, 15);
1817 coex_dm->ps_tdma_du_adj_type =
1818 15;
1819 } else if (coex_dm->cur_ps_tdma == 15) {
1820 halbtc8821aCsr2ant_ps_tdma(
1821 btcoexist, NORMAL_EXEC,
1822 true, 14);
1823 coex_dm->ps_tdma_du_adj_type =
1824 14;
1825 } else if (coex_dm->cur_ps_tdma == 14) {
1826 halbtc8821aCsr2ant_ps_tdma(
1827 btcoexist, NORMAL_EXEC,
1828 true, 13);
1829 coex_dm->ps_tdma_du_adj_type =
1830 13;
1831 }
1832 }
1833 } else {
1834 if (coex_dm->cur_ps_tdma == 5) {
1835 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1836 NORMAL_EXEC, true, 71);
1837 coex_dm->ps_tdma_du_adj_type = 71;
1838 } else if (coex_dm->cur_ps_tdma == 6) {
1839 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1840 NORMAL_EXEC, true, 2);
1841 coex_dm->ps_tdma_du_adj_type = 2;
1842 } else if (coex_dm->cur_ps_tdma == 7) {
1843 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1844 NORMAL_EXEC, true, 3);
1845 coex_dm->ps_tdma_du_adj_type = 3;
1846 } else if (coex_dm->cur_ps_tdma == 8) {
1847 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1848 NORMAL_EXEC, true, 4);
1849 coex_dm->ps_tdma_du_adj_type = 4;
1850 }
1851 if (coex_dm->cur_ps_tdma == 13) {
1852 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1853 NORMAL_EXEC, true, 9);
1854 coex_dm->ps_tdma_du_adj_type = 9;
1855 } else if (coex_dm->cur_ps_tdma == 14) {
1856 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1857 NORMAL_EXEC, true, 10);
1858 coex_dm->ps_tdma_du_adj_type = 10;
1859 } else if (coex_dm->cur_ps_tdma == 15) {
1860 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1861 NORMAL_EXEC, true, 11);
1862 coex_dm->ps_tdma_du_adj_type = 11;
1863 } else if (coex_dm->cur_ps_tdma == 16) {
1864 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1865 NORMAL_EXEC, true, 12);
1866 coex_dm->ps_tdma_du_adj_type = 12;
1867 }
1868
1869 if (result == -1) {
1870 if (coex_dm->cur_ps_tdma == 71) {
1871 halbtc8821aCsr2ant_ps_tdma(
1872 btcoexist, NORMAL_EXEC,
1873 true, 1);
1874 coex_dm->ps_tdma_du_adj_type =
1875 1;
1876 } else if (coex_dm->cur_ps_tdma == 1) {
1877 halbtc8821aCsr2ant_ps_tdma(
1878 btcoexist, NORMAL_EXEC,
1879 true, 2);
1880 coex_dm->ps_tdma_du_adj_type =
1881 2;
1882 } else if (coex_dm->cur_ps_tdma == 2) {
1883 halbtc8821aCsr2ant_ps_tdma(
1884 btcoexist, NORMAL_EXEC,
1885 true, 3);
1886 coex_dm->ps_tdma_du_adj_type =
1887 3;
1888 } else if (coex_dm->cur_ps_tdma == 3) {
1889 halbtc8821aCsr2ant_ps_tdma(
1890 btcoexist, NORMAL_EXEC,
1891 true, 4);
1892 coex_dm->ps_tdma_du_adj_type =
1893 4;
1894 } else if (coex_dm->cur_ps_tdma == 9) {
1895 halbtc8821aCsr2ant_ps_tdma(
1896 btcoexist, NORMAL_EXEC,
1897 true, 10);
1898 coex_dm->ps_tdma_du_adj_type =
1899 10;
1900 } else if (coex_dm->cur_ps_tdma == 10) {
1901 halbtc8821aCsr2ant_ps_tdma(
1902 btcoexist, NORMAL_EXEC,
1903 true, 11);
1904 coex_dm->ps_tdma_du_adj_type =
1905 11;
1906 } else if (coex_dm->cur_ps_tdma == 11) {
1907 halbtc8821aCsr2ant_ps_tdma(
1908 btcoexist, NORMAL_EXEC,
1909 true, 12);
1910 coex_dm->ps_tdma_du_adj_type =
1911 12;
1912 }
1913 } else if (result == 1) {
1914 if (coex_dm->cur_ps_tdma == 4) {
1915 halbtc8821aCsr2ant_ps_tdma(
1916 btcoexist, NORMAL_EXEC,
1917 true, 3);
1918 coex_dm->ps_tdma_du_adj_type =
1919 3;
1920 } else if (coex_dm->cur_ps_tdma == 3) {
1921 halbtc8821aCsr2ant_ps_tdma(
1922 btcoexist, NORMAL_EXEC,
1923 true, 2);
1924 coex_dm->ps_tdma_du_adj_type =
1925 2;
1926 } else if (coex_dm->cur_ps_tdma == 2) {
1927 halbtc8821aCsr2ant_ps_tdma(
1928 btcoexist, NORMAL_EXEC,
1929 true, 1);
1930 coex_dm->ps_tdma_du_adj_type =
1931 1;
1932 } else if (coex_dm->cur_ps_tdma == 1) {
1933 halbtc8821aCsr2ant_ps_tdma(
1934 btcoexist, NORMAL_EXEC,
1935 true, 71);
1936 coex_dm->ps_tdma_du_adj_type =
1937 71;
1938 } else if (coex_dm->cur_ps_tdma == 12) {
1939 halbtc8821aCsr2ant_ps_tdma(
1940 btcoexist, NORMAL_EXEC,
1941 true, 11);
1942 coex_dm->ps_tdma_du_adj_type =
1943 11;
1944 } else if (coex_dm->cur_ps_tdma == 11) {
1945 halbtc8821aCsr2ant_ps_tdma(
1946 btcoexist, NORMAL_EXEC,
1947 true, 10);
1948 coex_dm->ps_tdma_du_adj_type =
1949 10;
1950 } else if (coex_dm->cur_ps_tdma == 10) {
1951 halbtc8821aCsr2ant_ps_tdma(
1952 btcoexist, NORMAL_EXEC,
1953 true, 9);
1954 coex_dm->ps_tdma_du_adj_type =
1955 9;
1956 }
1957 }
1958 }
1959 } else if (max_interval == 2) {
1960 if (tx_pause) {
1961 if (coex_dm->cur_ps_tdma == 1) {
1962 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1963 NORMAL_EXEC, true, 6);
1964 coex_dm->ps_tdma_du_adj_type = 6;
1965 } else if (coex_dm->cur_ps_tdma == 2) {
1966 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1967 NORMAL_EXEC, true, 6);
1968 coex_dm->ps_tdma_du_adj_type = 6;
1969 } else if (coex_dm->cur_ps_tdma == 3) {
1970 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1971 NORMAL_EXEC, true, 7);
1972 coex_dm->ps_tdma_du_adj_type = 7;
1973 } else if (coex_dm->cur_ps_tdma == 4) {
1974 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1975 NORMAL_EXEC, true, 8);
1976 coex_dm->ps_tdma_du_adj_type = 8;
1977 }
1978 if (coex_dm->cur_ps_tdma == 9) {
1979 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1980 NORMAL_EXEC, true, 14);
1981 coex_dm->ps_tdma_du_adj_type = 14;
1982 } else if (coex_dm->cur_ps_tdma == 10) {
1983 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1984 NORMAL_EXEC, true, 14);
1985 coex_dm->ps_tdma_du_adj_type = 14;
1986 } else if (coex_dm->cur_ps_tdma == 11) {
1987 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1988 NORMAL_EXEC, true, 15);
1989 coex_dm->ps_tdma_du_adj_type = 15;
1990 } else if (coex_dm->cur_ps_tdma == 12) {
1991 halbtc8821aCsr2ant_ps_tdma(btcoexist,
1992 NORMAL_EXEC, true, 16);
1993 coex_dm->ps_tdma_du_adj_type = 16;
1994 }
1995 if (result == -1) {
1996 if (coex_dm->cur_ps_tdma == 5) {
1997 halbtc8821aCsr2ant_ps_tdma(
1998 btcoexist, NORMAL_EXEC,
1999 true, 6);
2000 coex_dm->ps_tdma_du_adj_type =
2001 6;
2002 } else if (coex_dm->cur_ps_tdma == 6) {
2003 halbtc8821aCsr2ant_ps_tdma(
2004 btcoexist, NORMAL_EXEC,
2005 true, 7);
2006 coex_dm->ps_tdma_du_adj_type =
2007 7;
2008 } else if (coex_dm->cur_ps_tdma == 7) {
2009 halbtc8821aCsr2ant_ps_tdma(
2010 btcoexist, NORMAL_EXEC,
2011 true, 8);
2012 coex_dm->ps_tdma_du_adj_type =
2013 8;
2014 } else if (coex_dm->cur_ps_tdma == 13) {
2015 halbtc8821aCsr2ant_ps_tdma(
2016 btcoexist, NORMAL_EXEC,
2017 true, 14);
2018 coex_dm->ps_tdma_du_adj_type =
2019 14;
2020 } else if (coex_dm->cur_ps_tdma == 14) {
2021 halbtc8821aCsr2ant_ps_tdma(
2022 btcoexist, NORMAL_EXEC,
2023 true, 15);
2024 coex_dm->ps_tdma_du_adj_type =
2025 15;
2026 } else if (coex_dm->cur_ps_tdma == 15) {
2027 halbtc8821aCsr2ant_ps_tdma(
2028 btcoexist, NORMAL_EXEC,
2029 true, 16);
2030 coex_dm->ps_tdma_du_adj_type =
2031 16;
2032 }
2033 } else if (result == 1) {
2034 if (coex_dm->cur_ps_tdma == 8) {
2035 halbtc8821aCsr2ant_ps_tdma(
2036 btcoexist, NORMAL_EXEC,
2037 true, 7);
2038 coex_dm->ps_tdma_du_adj_type =
2039 7;
2040 } else if (coex_dm->cur_ps_tdma == 7) {
2041 halbtc8821aCsr2ant_ps_tdma(
2042 btcoexist, NORMAL_EXEC,
2043 true, 6);
2044 coex_dm->ps_tdma_du_adj_type =
2045 6;
2046 } else if (coex_dm->cur_ps_tdma == 6) {
2047 halbtc8821aCsr2ant_ps_tdma(
2048 btcoexist, NORMAL_EXEC,
2049 true, 6);
2050 coex_dm->ps_tdma_du_adj_type =
2051 6;
2052 } else if (coex_dm->cur_ps_tdma == 16) {
2053 halbtc8821aCsr2ant_ps_tdma(
2054 btcoexist, NORMAL_EXEC,
2055 true, 15);
2056 coex_dm->ps_tdma_du_adj_type =
2057 15;
2058 } else if (coex_dm->cur_ps_tdma == 15) {
2059 halbtc8821aCsr2ant_ps_tdma(
2060 btcoexist, NORMAL_EXEC,
2061 true, 14);
2062 coex_dm->ps_tdma_du_adj_type =
2063 14;
2064 } else if (coex_dm->cur_ps_tdma == 14) {
2065 halbtc8821aCsr2ant_ps_tdma(
2066 btcoexist, NORMAL_EXEC,
2067 true, 14);
2068 coex_dm->ps_tdma_du_adj_type =
2069 14;
2070 }
2071 }
2072 } else {
2073 if (coex_dm->cur_ps_tdma == 5) {
2074 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2075 NORMAL_EXEC, true, 2);
2076 coex_dm->ps_tdma_du_adj_type = 2;
2077 } else if (coex_dm->cur_ps_tdma == 6) {
2078 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2079 NORMAL_EXEC, true, 2);
2080 coex_dm->ps_tdma_du_adj_type = 2;
2081 } else if (coex_dm->cur_ps_tdma == 7) {
2082 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2083 NORMAL_EXEC, true, 3);
2084 coex_dm->ps_tdma_du_adj_type = 3;
2085 } else if (coex_dm->cur_ps_tdma == 8) {
2086 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2087 NORMAL_EXEC, true, 4);
2088 coex_dm->ps_tdma_du_adj_type = 4;
2089 }
2090 if (coex_dm->cur_ps_tdma == 13) {
2091 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2092 NORMAL_EXEC, true, 10);
2093 coex_dm->ps_tdma_du_adj_type = 10;
2094 } else if (coex_dm->cur_ps_tdma == 14) {
2095 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2096 NORMAL_EXEC, true, 10);
2097 coex_dm->ps_tdma_du_adj_type = 10;
2098 } else if (coex_dm->cur_ps_tdma == 15) {
2099 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2100 NORMAL_EXEC, true, 11);
2101 coex_dm->ps_tdma_du_adj_type = 11;
2102 } else if (coex_dm->cur_ps_tdma == 16) {
2103 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2104 NORMAL_EXEC, true, 12);
2105 coex_dm->ps_tdma_du_adj_type = 12;
2106 }
2107 if (result == -1) {
2108 if (coex_dm->cur_ps_tdma == 1) {
2109 halbtc8821aCsr2ant_ps_tdma(
2110 btcoexist, NORMAL_EXEC,
2111 true, 2);
2112 coex_dm->ps_tdma_du_adj_type =
2113 2;
2114 } else if (coex_dm->cur_ps_tdma == 2) {
2115 halbtc8821aCsr2ant_ps_tdma(
2116 btcoexist, NORMAL_EXEC,
2117 true, 3);
2118 coex_dm->ps_tdma_du_adj_type =
2119 3;
2120 } else if (coex_dm->cur_ps_tdma == 3) {
2121 halbtc8821aCsr2ant_ps_tdma(
2122 btcoexist, NORMAL_EXEC,
2123 true, 4);
2124 coex_dm->ps_tdma_du_adj_type =
2125 4;
2126 } else if (coex_dm->cur_ps_tdma == 9) {
2127 halbtc8821aCsr2ant_ps_tdma(
2128 btcoexist, NORMAL_EXEC,
2129 true, 10);
2130 coex_dm->ps_tdma_du_adj_type =
2131 10;
2132 } else if (coex_dm->cur_ps_tdma == 10) {
2133 halbtc8821aCsr2ant_ps_tdma(
2134 btcoexist, NORMAL_EXEC,
2135 true, 11);
2136 coex_dm->ps_tdma_du_adj_type =
2137 11;
2138 } else if (coex_dm->cur_ps_tdma == 11) {
2139 halbtc8821aCsr2ant_ps_tdma(
2140 btcoexist, NORMAL_EXEC,
2141 true, 12);
2142 coex_dm->ps_tdma_du_adj_type =
2143 12;
2144 }
2145 } else if (result == 1) {
2146 if (coex_dm->cur_ps_tdma == 4) {
2147 halbtc8821aCsr2ant_ps_tdma(
2148 btcoexist, NORMAL_EXEC,
2149 true, 3);
2150 coex_dm->ps_tdma_du_adj_type =
2151 3;
2152 } else if (coex_dm->cur_ps_tdma == 3) {
2153 halbtc8821aCsr2ant_ps_tdma(
2154 btcoexist, NORMAL_EXEC,
2155 true, 2);
2156 coex_dm->ps_tdma_du_adj_type =
2157 2;
2158 } else if (coex_dm->cur_ps_tdma == 2) {
2159 halbtc8821aCsr2ant_ps_tdma(
2160 btcoexist, NORMAL_EXEC,
2161 true, 2);
2162 coex_dm->ps_tdma_du_adj_type =
2163 2;
2164 } else if (coex_dm->cur_ps_tdma == 12) {
2165 halbtc8821aCsr2ant_ps_tdma(
2166 btcoexist, NORMAL_EXEC,
2167 true, 11);
2168 coex_dm->ps_tdma_du_adj_type =
2169 11;
2170 } else if (coex_dm->cur_ps_tdma == 11) {
2171 halbtc8821aCsr2ant_ps_tdma(
2172 btcoexist, NORMAL_EXEC,
2173 true, 10);
2174 coex_dm->ps_tdma_du_adj_type =
2175 10;
2176 } else if (coex_dm->cur_ps_tdma == 10) {
2177 halbtc8821aCsr2ant_ps_tdma(
2178 btcoexist, NORMAL_EXEC,
2179 true, 10);
2180 coex_dm->ps_tdma_du_adj_type =
2181 10;
2182 }
2183 }
2184 }
2185 } else if (max_interval == 3) {
2186 if (tx_pause) {
2187 if (coex_dm->cur_ps_tdma == 1) {
2188 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2189 NORMAL_EXEC, true, 7);
2190 coex_dm->ps_tdma_du_adj_type = 7;
2191 } else if (coex_dm->cur_ps_tdma == 2) {
2192 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2193 NORMAL_EXEC, true, 7);
2194 coex_dm->ps_tdma_du_adj_type = 7;
2195 } else if (coex_dm->cur_ps_tdma == 3) {
2196 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2197 NORMAL_EXEC, true, 7);
2198 coex_dm->ps_tdma_du_adj_type = 7;
2199 } else if (coex_dm->cur_ps_tdma == 4) {
2200 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2201 NORMAL_EXEC, true, 8);
2202 coex_dm->ps_tdma_du_adj_type = 8;
2203 }
2204 if (coex_dm->cur_ps_tdma == 9) {
2205 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2206 NORMAL_EXEC, true, 15);
2207 coex_dm->ps_tdma_du_adj_type = 15;
2208 } else if (coex_dm->cur_ps_tdma == 10) {
2209 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2210 NORMAL_EXEC, true, 15);
2211 coex_dm->ps_tdma_du_adj_type = 15;
2212 } else if (coex_dm->cur_ps_tdma == 11) {
2213 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2214 NORMAL_EXEC, true, 15);
2215 coex_dm->ps_tdma_du_adj_type = 15;
2216 } else if (coex_dm->cur_ps_tdma == 12) {
2217 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2218 NORMAL_EXEC, true, 16);
2219 coex_dm->ps_tdma_du_adj_type = 16;
2220 }
2221 if (result == -1) {
2222 if (coex_dm->cur_ps_tdma == 5) {
2223 halbtc8821aCsr2ant_ps_tdma(
2224 btcoexist, NORMAL_EXEC,
2225 true, 7);
2226 coex_dm->ps_tdma_du_adj_type =
2227 7;
2228 } else if (coex_dm->cur_ps_tdma == 6) {
2229 halbtc8821aCsr2ant_ps_tdma(
2230 btcoexist, NORMAL_EXEC,
2231 true, 7);
2232 coex_dm->ps_tdma_du_adj_type =
2233 7;
2234 } else if (coex_dm->cur_ps_tdma == 7) {
2235 halbtc8821aCsr2ant_ps_tdma(
2236 btcoexist, NORMAL_EXEC,
2237 true, 8);
2238 coex_dm->ps_tdma_du_adj_type =
2239 8;
2240 } else if (coex_dm->cur_ps_tdma == 13) {
2241 halbtc8821aCsr2ant_ps_tdma(
2242 btcoexist, NORMAL_EXEC,
2243 true, 15);
2244 coex_dm->ps_tdma_du_adj_type =
2245 15;
2246 } else if (coex_dm->cur_ps_tdma == 14) {
2247 halbtc8821aCsr2ant_ps_tdma(
2248 btcoexist, NORMAL_EXEC,
2249 true, 15);
2250 coex_dm->ps_tdma_du_adj_type =
2251 15;
2252 } else if (coex_dm->cur_ps_tdma == 15) {
2253 halbtc8821aCsr2ant_ps_tdma(
2254 btcoexist, NORMAL_EXEC,
2255 true, 16);
2256 coex_dm->ps_tdma_du_adj_type =
2257 16;
2258 }
2259 } else if (result == 1) {
2260 if (coex_dm->cur_ps_tdma == 8) {
2261 halbtc8821aCsr2ant_ps_tdma(
2262 btcoexist, NORMAL_EXEC,
2263 true, 7);
2264 coex_dm->ps_tdma_du_adj_type =
2265 7;
2266 } else if (coex_dm->cur_ps_tdma == 7) {
2267 halbtc8821aCsr2ant_ps_tdma(
2268 btcoexist, NORMAL_EXEC,
2269 true, 7);
2270 coex_dm->ps_tdma_du_adj_type =
2271 7;
2272 } else if (coex_dm->cur_ps_tdma == 6) {
2273 halbtc8821aCsr2ant_ps_tdma(
2274 btcoexist, NORMAL_EXEC,
2275 true, 7);
2276 coex_dm->ps_tdma_du_adj_type =
2277 7;
2278 } else if (coex_dm->cur_ps_tdma == 16) {
2279 halbtc8821aCsr2ant_ps_tdma(
2280 btcoexist, NORMAL_EXEC,
2281 true, 15);
2282 coex_dm->ps_tdma_du_adj_type =
2283 15;
2284 } else if (coex_dm->cur_ps_tdma == 15) {
2285 halbtc8821aCsr2ant_ps_tdma(
2286 btcoexist, NORMAL_EXEC,
2287 true, 15);
2288 coex_dm->ps_tdma_du_adj_type =
2289 15;
2290 } else if (coex_dm->cur_ps_tdma == 14) {
2291 halbtc8821aCsr2ant_ps_tdma(
2292 btcoexist, NORMAL_EXEC,
2293 true, 15);
2294 coex_dm->ps_tdma_du_adj_type =
2295 15;
2296 }
2297 }
2298 } else {
2299 if (coex_dm->cur_ps_tdma == 5) {
2300 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2301 NORMAL_EXEC, true, 3);
2302 coex_dm->ps_tdma_du_adj_type = 3;
2303 } else if (coex_dm->cur_ps_tdma == 6) {
2304 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2305 NORMAL_EXEC, true, 3);
2306 coex_dm->ps_tdma_du_adj_type = 3;
2307 } else if (coex_dm->cur_ps_tdma == 7) {
2308 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2309 NORMAL_EXEC, true, 3);
2310 coex_dm->ps_tdma_du_adj_type = 3;
2311 } else if (coex_dm->cur_ps_tdma == 8) {
2312 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2313 NORMAL_EXEC, true, 4);
2314 coex_dm->ps_tdma_du_adj_type = 4;
2315 }
2316 if (coex_dm->cur_ps_tdma == 13) {
2317 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2318 NORMAL_EXEC, true, 11);
2319 coex_dm->ps_tdma_du_adj_type = 11;
2320 } else if (coex_dm->cur_ps_tdma == 14) {
2321 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2322 NORMAL_EXEC, true, 11);
2323 coex_dm->ps_tdma_du_adj_type = 11;
2324 } else if (coex_dm->cur_ps_tdma == 15) {
2325 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2326 NORMAL_EXEC, true, 11);
2327 coex_dm->ps_tdma_du_adj_type = 11;
2328 } else if (coex_dm->cur_ps_tdma == 16) {
2329 halbtc8821aCsr2ant_ps_tdma(btcoexist,
2330 NORMAL_EXEC, true, 12);
2331 coex_dm->ps_tdma_du_adj_type = 12;
2332 }
2333 if (result == -1) {
2334 if (coex_dm->cur_ps_tdma == 1) {
2335 halbtc8821aCsr2ant_ps_tdma(
2336 btcoexist, NORMAL_EXEC,
2337 true, 3);
2338 coex_dm->ps_tdma_du_adj_type =
2339 3;
2340 } else if (coex_dm->cur_ps_tdma == 2) {
2341 halbtc8821aCsr2ant_ps_tdma(
2342 btcoexist, NORMAL_EXEC,
2343 true, 3);
2344 coex_dm->ps_tdma_du_adj_type =
2345 3;
2346 } else if (coex_dm->cur_ps_tdma == 3) {
2347 halbtc8821aCsr2ant_ps_tdma(
2348 btcoexist, NORMAL_EXEC,
2349 true, 4);
2350 coex_dm->ps_tdma_du_adj_type =
2351 4;
2352 } else if (coex_dm->cur_ps_tdma == 9) {
2353 halbtc8821aCsr2ant_ps_tdma(
2354 btcoexist, NORMAL_EXEC,
2355 true, 11);
2356 coex_dm->ps_tdma_du_adj_type =
2357 11;
2358 } else if (coex_dm->cur_ps_tdma == 10) {
2359 halbtc8821aCsr2ant_ps_tdma(
2360 btcoexist, NORMAL_EXEC,
2361 true, 11);
2362 coex_dm->ps_tdma_du_adj_type =
2363 11;
2364 } else if (coex_dm->cur_ps_tdma == 11) {
2365 halbtc8821aCsr2ant_ps_tdma(
2366 btcoexist, NORMAL_EXEC,
2367 true, 12);
2368 coex_dm->ps_tdma_du_adj_type =
2369 12;
2370 }
2371 } else if (result == 1) {
2372 if (coex_dm->cur_ps_tdma == 4) {
2373 halbtc8821aCsr2ant_ps_tdma(
2374 btcoexist, NORMAL_EXEC,
2375 true, 3);
2376 coex_dm->ps_tdma_du_adj_type =
2377 3;
2378 } else if (coex_dm->cur_ps_tdma == 3) {
2379 halbtc8821aCsr2ant_ps_tdma(
2380 btcoexist, NORMAL_EXEC,
2381 true, 3);
2382 coex_dm->ps_tdma_du_adj_type =
2383 3;
2384 } else if (coex_dm->cur_ps_tdma == 2) {
2385 halbtc8821aCsr2ant_ps_tdma(
2386 btcoexist, NORMAL_EXEC,
2387 true, 3);
2388 coex_dm->ps_tdma_du_adj_type =
2389 3;
2390 } else if (coex_dm->cur_ps_tdma == 12) {
2391 halbtc8821aCsr2ant_ps_tdma(
2392 btcoexist, NORMAL_EXEC,
2393 true, 11);
2394 coex_dm->ps_tdma_du_adj_type =
2395 11;
2396 } else if (coex_dm->cur_ps_tdma == 11) {
2397 halbtc8821aCsr2ant_ps_tdma(
2398 btcoexist, NORMAL_EXEC,
2399 true, 11);
2400 coex_dm->ps_tdma_du_adj_type =
2401 11;
2402 } else if (coex_dm->cur_ps_tdma == 10) {
2403 halbtc8821aCsr2ant_ps_tdma(
2404 btcoexist, NORMAL_EXEC,
2405 true, 11);
2406 coex_dm->ps_tdma_du_adj_type =
2407 11;
2408 }
2409 }
2410 }
2411 }
2412 }
2413
2414 /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2415 /* then we have to adjust it back to the previous record one. */
2416 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2417 boolean scan = false, link = false, roam = false;
2418 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2419 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2420 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2421 BTC_TRACE(trace_buf);
2422
2423 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2424 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2425 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2426
2427 if (!scan && !link && !roam)
2428 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2429 coex_dm->ps_tdma_du_adj_type);
2430 else {
2431 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2432 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2433 BTC_TRACE(trace_buf);
2434 }
2435 }
2436
2437 /* when halbtc8821aCsr2ant_tdma_duration_adjust() is called, fw dac swing is included in the function. */
2438 /* if(coex_dm->ps_tdma_du_adj_type == 71) */
2439 /* halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40 */
2440 /* else */
2441 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2442 0x6);
2443 }
2444
2445 /* SCO only or SCO+PAN(HS) */
halbtc8821aCsr2ant_action_sco(IN struct btc_coexist * btcoexist)2446 void halbtc8821aCsr2ant_action_sco(IN struct btc_coexist *btcoexist)
2447 {
2448 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55555555,
2449 0x55555555, 0xffffff, 0x3);
2450 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2451
2452 halbtc8821aCsr2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
2453
2454 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 1, 0, 2, 0);
2455
2456 if (coex_sta->slave == false)
2457 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false,
2458 true, 0x4);
2459 else
2460 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false,
2461 true, 0x2);
2462
2463 /*
2464 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2465 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2466
2467 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
2468
2469 if(halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2470 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2471 else
2472 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2473
2474 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2475
2476 if (BTC_WIFI_BW_LEGACY == wifi_bw)
2477 {
2478 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
2479 }
2480 else
2481 {
2482 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
2483 }
2484
2485 if(BTC_WIFI_BW_HT40 == wifi_bw)
2486 {
2487
2488
2489
2490
2491 if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2492 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2493 {
2494 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2495 }
2496 else
2497 {
2498 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2499 }
2500
2501
2502 if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2503 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2504 {
2505 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,true,false,false);
2506 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18);
2507 }
2508 else
2509 {
2510 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,true,false,false);
2511 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18);
2512 }
2513 }
2514 else
2515 {
2516
2517
2518
2519 if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2520 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2521 {
2522 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2523 }
2524 else
2525 {
2526 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2527 }
2528
2529
2530 if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2531 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2532 {
2533 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,true,false,false);
2534 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18);
2535 }
2536 else
2537 {
2538 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,true,false,false);
2539 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18);
2540 }
2541 }
2542 */
2543 }
2544
2545
halbtc8821aCsr2ant_action_hid(IN struct btc_coexist * btcoexist)2546 void halbtc8821aCsr2ant_action_hid(IN struct btc_coexist *btcoexist)
2547 {
2548 u8 wifi_rssi_state, bt_rssi_state;
2549 u32 wifi_bw;
2550
2551 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
2552 15, 0);
2553 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2554
2555 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2556
2557 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2558 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2559 else
2560 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2561
2562 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2563
2564 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
2565 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2566 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
2567 else /* for HID quality & wifi performance balance at 11n mode */
2568 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2569 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3);
2570
2571 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2572 /* fw mechanism */
2573 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2574 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2575 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2576 9);
2577 else
2578 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2579 13);
2580
2581 /* sw mechanism */
2582 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2583 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2584 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
2585 false, false);
2586 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2587 false, false, 0x18);
2588 } else {
2589 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
2590 false, false);
2591 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2592 false, false, 0x18);
2593 }
2594 } else {
2595 /* fw mechanism */
2596 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2597 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2598 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2599 9);
2600 else
2601 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2602 13);
2603
2604 /* sw mechanism */
2605 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2606 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2607 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2608 true, false, false);
2609 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2610 false, false, 0x18);
2611 } else {
2612 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2613 true, false, false);
2614 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2615 false, false, 0x18);
2616 }
2617 }
2618 }
2619
2620 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
halbtc8821aCsr2ant_action_a2dp(IN struct btc_coexist * btcoexist)2621 void halbtc8821aCsr2ant_action_a2dp(IN struct btc_coexist *btcoexist)
2622 {
2623 halbtc8821aCsr2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x8);
2624
2625 if (coex_sta->slave == false) {
2626 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2627 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
2628 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
2629 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
2630 0, 1);
2631 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, true,
2632 0x0c);
2633 } else {
2634 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2635 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
2636 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
2637 halbtc8821aCsr2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0,
2638 0, 2);
2639 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false, false, true,
2640 0x18);
2641 }
2642
2643 /*
2644 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2645 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2646
2647
2648
2649
2650
2651 if(halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2652 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2653 else
2654 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2655
2656 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2657
2658 if(BTC_WIFI_BW_HT40 == wifi_bw)
2659 {
2660
2661 if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2662 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2663 {
2664 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, false, 1);
2665 }
2666 else
2667 {
2668 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, true, 1);
2669 }
2670
2671
2672 if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2673 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2674 {
2675 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,false,false,false);
2676 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18);
2677 }
2678 else
2679 {
2680 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,true,false,false,false);
2681 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18);
2682 }
2683 }
2684 else
2685 {
2686
2687 if( (bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2688 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2689 {
2690 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, false, 1);
2691 }
2692 else
2693 {
2694 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, false, true, 1);
2695 }
2696
2697
2698 if( (wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2699 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH) )
2700 {
2701 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,false,false,false);
2702 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,true,false,false,0x18);
2703 }
2704 else
2705 {
2706 halbtc8821aCsr2ant_sw_mechanism1(btcoexist,false,false,false,false);
2707 halbtc8821aCsr2ant_sw_mechanism2(btcoexist,false,false,false,0x18);
2708 }
2709 }
2710 */
2711 }
2712
halbtc8821aCsr2ant_action_a2dp_pan_hs(IN struct btc_coexist * btcoexist)2713 void halbtc8821aCsr2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
2714 {
2715 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
2716 u32 wifi_bw;
2717
2718 bt_info_ext = coex_sta->bt_info_ext;
2719 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
2720 15, 0);
2721 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2722
2723 /* fw dac swing is called in halbtc8821aCsr2ant_tdma_duration_adjust() */
2724 /* halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); */
2725
2726
2727 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2728 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2729 else
2730 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2731
2732 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2733
2734 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2735 /* fw mechanism */
2736 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2737 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist,
2738 false, true, 2);
2739 else /* a2dp edr rate */
2740 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist,
2741 false, true, 1);
2742
2743 /* sw mechanism */
2744 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2745 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2746 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2747 false, false, false);
2748 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2749 false, false, 0x18);
2750 } else {
2751 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2752 false, false, false);
2753 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2754 false, false, 0x18);
2755 }
2756 } else {
2757 /* fw mechanism */
2758 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2759 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist,
2760 false, true, 2);
2761 else /* a2dp edr rate */
2762 halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist,
2763 false, true, 1);
2764
2765 /* sw mechanism */
2766 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2767 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2768 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2769 false, false, false);
2770 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2771 false, false, 0x18);
2772 } else {
2773 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2774 false, false, false);
2775 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2776 false, false, 0x18);
2777 }
2778 }
2779 }
2780
halbtc8821aCsr2ant_action_pan_edr(IN struct btc_coexist * btcoexist)2781 void halbtc8821aCsr2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
2782 {
2783 u8 wifi_rssi_state, bt_rssi_state;
2784 u32 wifi_bw;
2785
2786 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
2787 15, 0);
2788 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2789
2790 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2791
2792 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2793 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2794 else
2795 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2796
2797 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2798
2799 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
2800 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2801 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
2802 else /* for HID quality & wifi performance balance at 11n mode */
2803 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2804 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
2805
2806 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2807 /* fw mechanism */
2808 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2809 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2810 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2811 1);
2812 else
2813 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2814 5);
2815
2816 /* sw mechanism */
2817 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2818 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2819 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2820 false, false, false);
2821 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2822 false, false, 0x18);
2823 } else {
2824 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2825 false, false, false);
2826 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2827 false, false, 0x18);
2828 }
2829 } else {
2830 /* fw mechanism */
2831 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2832 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2833 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2834 1);
2835 else
2836 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2837 5);
2838
2839 /* sw mechanism */
2840 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2841 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2842 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2843 false, false, false);
2844 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2845 false, false, 0x18);
2846 } else {
2847 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2848 false, false, false);
2849 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2850 false, false, 0x18);
2851 }
2852 }
2853 }
2854
2855
2856 /* PAN(HS) only */
halbtc8821aCsr2ant_action_pan_hs(IN struct btc_coexist * btcoexist)2857 void halbtc8821aCsr2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
2858 {
2859 u8 wifi_rssi_state, bt_rssi_state;
2860 u32 wifi_bw;
2861
2862 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
2863 15, 0);
2864 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2865
2866 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2867
2868 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2869
2870 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2871 /* fw mechanism */
2872 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2873 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2874 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2875 true);
2876 else
2877 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2878 false);
2879 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2880
2881 /* sw mechanism */
2882 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2883 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2884 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2885 false, false, false);
2886 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2887 false, false, 0x18);
2888 } else {
2889 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2890 false, false, false);
2891 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2892 false, false, 0x18);
2893 }
2894 } else {
2895 /* fw mechanism */
2896 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2897 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2898 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2899 true);
2900 else
2901 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2902 false);
2903
2904 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2905 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2906 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2907 false, 1);
2908 else
2909 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2910 false, 1);
2911
2912 /* sw mechanism */
2913 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2914 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2915 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2916 false, false, false);
2917 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2918 false, false, 0x18);
2919 } else {
2920 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
2921 false, false, false);
2922 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2923 false, false, 0x18);
2924 }
2925 }
2926 }
2927
2928 /* PAN(EDR)+A2DP */
halbtc8821aCsr2ant_action_pan_edr_a2dp(IN struct btc_coexist * btcoexist)2929 void halbtc8821aCsr2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
2930 {
2931 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
2932 u32 wifi_bw;
2933
2934 bt_info_ext = coex_sta->bt_info_ext;
2935 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
2936 15, 0);
2937 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
2938
2939 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2940
2941 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
2942 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2943 else
2944 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2945
2946 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2947
2948 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
2949 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2950 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
2951 else /* for HID quality & wifi performance balance at 11n mode */
2952 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
2953 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
2954
2955 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2956 /* fw mechanism */
2957 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2958 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2959 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2960 halbtc8821aCsr2ant_tdma_duration_adjust(
2961 btcoexist, false, false, 3);
2962 else /* a2dp edr rate */
2963 halbtc8821aCsr2ant_tdma_duration_adjust(
2964 btcoexist, false, false, 3);
2965 } else {
2966 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2967 halbtc8821aCsr2ant_tdma_duration_adjust(
2968 btcoexist, false, true, 3);
2969 else /* a2dp edr rate */
2970 halbtc8821aCsr2ant_tdma_duration_adjust(
2971 btcoexist, false, true, 3);
2972 }
2973
2974 /* sw mechanism */
2975 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2976 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2977 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2978 false, false, false);
2979 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
2980 false, false, 0x18);
2981 } else {
2982 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true,
2983 false, false, false);
2984 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
2985 false, false, 0x18);
2986 };
2987 } else {
2988 /* fw mechanism */
2989 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2990 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2991 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2992 halbtc8821aCsr2ant_tdma_duration_adjust(
2993 btcoexist, false, false, 3);
2994 else /* a2dp edr rate */
2995 halbtc8821aCsr2ant_tdma_duration_adjust(
2996 btcoexist, false, false, 3);
2997 } else {
2998 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
2999 halbtc8821aCsr2ant_tdma_duration_adjust(
3000 btcoexist, false, true, 3);
3001 else /* a2dp edr rate */
3002 halbtc8821aCsr2ant_tdma_duration_adjust(
3003 btcoexist, false, true, 3);
3004 }
3005
3006 /* sw mechanism */
3007 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3008 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3009 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3010 false, false, false);
3011 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3012 false, false, 0x18);
3013 } else {
3014 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3015 false, false, false);
3016 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3017 false, false, 0x18);
3018 }
3019 }
3020 }
3021
halbtc8821aCsr2ant_action_pan_edr_hid(IN struct btc_coexist * btcoexist)3022 void halbtc8821aCsr2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3023 {
3024 u8 wifi_rssi_state, bt_rssi_state;
3025 u32 wifi_bw;
3026
3027 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
3028 15, 0);
3029 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
3030
3031 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3032
3033 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
3034 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
3035 else
3036 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
3037
3038 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3039
3040 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
3041 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3042 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
3043 else /* for HID quality & wifi performance balance at 11n mode */
3044 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3045 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
3046
3047 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3048 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3);
3049 /* fw mechanism */
3050 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3051 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3052 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3053 10);
3054 else
3055 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3056 14);
3057
3058 /* sw mechanism */
3059 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3060 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3061 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3062 false, false);
3063 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3064 false, false, 0x18);
3065 } else {
3066 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3067 false, false);
3068 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3069 false, false, 0x18);
3070 }
3071 } else {
3072 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3073 /* fw mechanism */
3074 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3075 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3076 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3077 10);
3078 else
3079 halbtc8821aCsr2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3080 14);
3081
3082 /* sw mechanism */
3083 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3084 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3085 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3086 true, false, false);
3087 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3088 false, false, 0x18);
3089 } else {
3090 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3091 true, false, false);
3092 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3093 false, false, 0x18);
3094 }
3095 }
3096 }
3097
3098 /* HID+A2DP+PAN(EDR) */
halbtc8821aCsr2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist * btcoexist)3099 void halbtc8821aCsr2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist
3100 *btcoexist)
3101 {
3102 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
3103 u32 wifi_bw;
3104
3105 bt_info_ext = coex_sta->bt_info_ext;
3106 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
3107 15, 0);
3108 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
3109
3110 halbtc8821aCsr2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3111
3112 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
3113 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
3114 else
3115 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
3116
3117 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3118
3119 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
3120 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3121 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3122 else /* for HID quality & wifi performance balance at 11n mode */
3123 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3124 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3125
3126 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3127 /* fw mechanism */
3128 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3129 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3130 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3131 halbtc8821aCsr2ant_tdma_duration_adjust(
3132 btcoexist, true, true, 3);
3133 else /* a2dp edr rate */
3134 halbtc8821aCsr2ant_tdma_duration_adjust(
3135 btcoexist, true, true, 3);
3136 } else {
3137 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3138 halbtc8821aCsr2ant_tdma_duration_adjust(
3139 btcoexist, true, true, 3);
3140 else /* a2dp edr rate */
3141 halbtc8821aCsr2ant_tdma_duration_adjust(
3142 btcoexist, true, true, 3);
3143 }
3144
3145 /* sw mechanism */
3146 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3147 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3148 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3149 false, false);
3150 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3151 false, false, 0x18);
3152 } else {
3153 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3154 false, false);
3155 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3156 false, false, 0x18);
3157 }
3158 } else {
3159 /* fw mechanism */
3160 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3161 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3162 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3163 halbtc8821aCsr2ant_tdma_duration_adjust(
3164 btcoexist, true, false, 3);
3165 else /* a2dp edr rate */
3166 halbtc8821aCsr2ant_tdma_duration_adjust(
3167 btcoexist, true, false, 3);
3168 } else {
3169 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3170 halbtc8821aCsr2ant_tdma_duration_adjust(
3171 btcoexist, true, true, 3);
3172 else /* a2dp edr rate */
3173 halbtc8821aCsr2ant_tdma_duration_adjust(
3174 btcoexist, true, true, 3);
3175 }
3176
3177 /* sw mechanism */
3178 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3179 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3180 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3181 true, false, false);
3182 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3183 false, false, 0x18);
3184 } else {
3185 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3186 true, false, false);
3187 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3188 false, false, 0x18);
3189 }
3190 }
3191 }
3192
halbtc8821aCsr2ant_action_hid_a2dp(IN struct btc_coexist * btcoexist)3193 void halbtc8821aCsr2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3194 {
3195 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
3196 u32 wifi_bw;
3197
3198 bt_info_ext = coex_sta->bt_info_ext;
3199 wifi_rssi_state = halbtc8821aCsr2ant_wifi_rssi_state(btcoexist, 0, 2,
3200 15, 0);
3201 bt_rssi_state = halbtc8821aCsr2ant_bt_rssi_state(2, 35, 0);
3202
3203 if (halbtc8821aCsr2ant_need_to_dec_bt_pwr(btcoexist))
3204 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
3205 else
3206 halbtc8821aCsr2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
3207
3208 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3209
3210 if (BTC_WIFI_BW_LEGACY == wifi_bw) { /* for HID at 11b/g mode */
3211 /* Allen halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); */
3212 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3213 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3);
3214 } else { /* for HID quality & wifi performance balance at 11n mode */
3215 /* Allen halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); */
3216 halbtc8821aCsr2ant_coex_table(btcoexist, NORMAL_EXEC,
3217 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3);
3218
3219 }
3220
3221 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3222 /* fw mechanism */
3223 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3224 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3225 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3226 halbtc8821aCsr2ant_tdma_duration_adjust(
3227 btcoexist, true, true, 2);
3228 else /* a2dp edr rate */
3229 halbtc8821aCsr2ant_tdma_duration_adjust(
3230 btcoexist, true, true, 2);
3231 } else {
3232 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3233 halbtc8821aCsr2ant_tdma_duration_adjust(
3234 btcoexist, true, true, 2);
3235 else /* a2dp edr rate */
3236 halbtc8821aCsr2ant_tdma_duration_adjust(
3237 btcoexist, true, true, 2);
3238 }
3239
3240 /* sw mechanism */
3241 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3242 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3243 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3244 false, false);
3245 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3246 false, false, 0x18);
3247 } else {
3248 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, true, true,
3249 false, false);
3250 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3251 false, false, 0x18);
3252 }
3253 } else {
3254 /* fw mechanism */
3255 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3256 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3257 if (bt_info_ext & BIT(0)) { /* a2dp basic rate */
3258 /* halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, true, false, 2); */
3259 halbtc8821aCsr2ant_tdma_duration_adjust(
3260 btcoexist, true, true, 2);
3261
3262 } else { /* a2dp edr rate */
3263 /* Allen halbtc8821aCsr2ant_tdma_duration_adjust(btcoexist, true, false, 2); */
3264 halbtc8821aCsr2ant_tdma_duration_adjust(
3265 btcoexist, true, true, 2);
3266 }
3267 } else {
3268 if (bt_info_ext & BIT(0)) /* a2dp basic rate */
3269 halbtc8821aCsr2ant_tdma_duration_adjust(
3270 btcoexist, true, true, 2);
3271 else /* a2dp edr rate */
3272 halbtc8821aCsr2ant_tdma_duration_adjust(
3273 btcoexist, true, true, 2);
3274 }
3275
3276 /* sw mechanism */
3277 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3278 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3279 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3280 true, false, false);
3281 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, true,
3282 false, false, 0x18);
3283 } else {
3284 halbtc8821aCsr2ant_sw_mechanism1(btcoexist, false,
3285 true, false, false);
3286 halbtc8821aCsr2ant_sw_mechanism2(btcoexist, false,
3287 false, false, 0x18);
3288 }
3289 }
3290 }
3291
halbtc8821aCsr2ant_run_coexist_mechanism(IN struct btc_coexist * btcoexist)3292 void halbtc8821aCsr2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3293 {
3294 boolean wifi_under_5g = false;
3295 u8 algorithm = 0;
3296
3297 if (btcoexist->manual_control) {
3298 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3299 "[BTCoex], Manual control!!!\n");
3300 BTC_TRACE(trace_buf);
3301 return;
3302 }
3303
3304 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3305
3306 if (wifi_under_5g) {
3307 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3308 "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n");
3309 BTC_TRACE(trace_buf);
3310 halbtc8821aCsr2ant_coex_under_5g(btcoexist);
3311 return;
3312 }
3313
3314 {
3315 algorithm = halbtc8821aCsr2ant_action_algorithm(btcoexist);
3316 if (coex_sta->c2h_bt_inquiry_page &&
3317 (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS != algorithm)) {
3318 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3319 "[BTCoex], BT is under inquiry/page scan !!\n");
3320 BTC_TRACE(trace_buf);
3321 halbtc8821aCsr2ant_bt_inquiry_page(btcoexist);
3322 return;
3323 }
3324
3325 coex_dm->cur_algorithm = algorithm;
3326 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3327 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
3328 BTC_TRACE(trace_buf);
3329
3330 if (halbtc8821aCsr2ant_is_common_action(btcoexist)) {
3331 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3332 "[BTCoex], Action 2-Ant common.\n");
3333 BTC_TRACE(trace_buf);
3334 coex_dm->reset_tdma_adjust = true;
3335 } else {
3336 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3337 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3338 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3339 coex_dm->pre_algorithm,
3340 coex_dm->cur_algorithm);
3341 BTC_TRACE(trace_buf);
3342 coex_dm->reset_tdma_adjust = true;
3343 }
3344 switch (coex_dm->cur_algorithm) {
3345 case BT_8821A_CSR_2ANT_COEX_ALGO_SCO:
3346 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3347 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3348 BTC_TRACE(trace_buf);
3349 halbtc8821aCsr2ant_action_sco(
3350 btcoexist);
3351 break;
3352 case BT_8821A_CSR_2ANT_COEX_ALGO_HID:
3353 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3354 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3355 BTC_TRACE(trace_buf);
3356 halbtc8821aCsr2ant_action_hid(
3357 btcoexist);
3358 break;
3359 case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP:
3360 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3361 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3362 BTC_TRACE(trace_buf);
3363 halbtc8821aCsr2ant_action_a2dp(
3364 btcoexist);
3365 break;
3366 case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS:
3367 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3368 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3369 BTC_TRACE(trace_buf);
3370 halbtc8821aCsr2ant_action_a2dp_pan_hs(
3371 btcoexist);
3372 break;
3373 case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR:
3374 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3375 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
3376 BTC_TRACE(trace_buf);
3377 halbtc8821aCsr2ant_action_pan_edr(
3378 btcoexist);
3379 break;
3380 case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS:
3381 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3382 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
3383 BTC_TRACE(trace_buf);
3384 halbtc8821aCsr2ant_action_pan_hs(
3385 btcoexist);
3386 break;
3387 case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP:
3388 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3389 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
3390 BTC_TRACE(trace_buf);
3391 halbtc8821aCsr2ant_action_pan_edr_a2dp(
3392 btcoexist);
3393 break;
3394 case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID:
3395 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3396 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3397 BTC_TRACE(trace_buf);
3398 halbtc8821aCsr2ant_action_pan_edr_hid(
3399 btcoexist);
3400 break;
3401 case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR
3402 :
3403 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3404 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3405 BTC_TRACE(trace_buf);
3406 halbtc8821aCsr2ant_action_hid_a2dp_pan_edr(
3407 btcoexist);
3408 break;
3409 case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP:
3410 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3411 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3412 BTC_TRACE(trace_buf);
3413 halbtc8821aCsr2ant_action_hid_a2dp(
3414 btcoexist);
3415 break;
3416 default:
3417 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3418 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
3419 BTC_TRACE(trace_buf);
3420 halbtc8821aCsr2ant_coex_all_off(
3421 btcoexist);
3422 break;
3423 }
3424 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3425 }
3426 }
3427 }
3428
3429
3430
3431 /* ************************************************************
3432 * work around function start with wa_halbtc8821aCsr2ant_
3433 * ************************************************************
3434 * ************************************************************
3435 * extern function start with ex_halbtc8821aCsr2ant_
3436 * ************************************************************ */
ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist * btcoexist)3437 void ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist *btcoexist)
3438 {
3439 }
3440
ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)3441 void ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3442 IN boolean wifi_only)
3443 {
3444 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3445 "[BTCoex], 2Ant Init HW Config!!\n");
3446 BTC_TRACE(trace_buf);
3447
3448 if (wifi_only)
3449 return;
3450
3451 /* if(back_up) */
3452 {
3453 /* backup rf 0x1e value */
3454 coex_dm->bt_rf_0x1e_backup = btcoexist->btc_get_rf_reg(
3455 btcoexist, BTC_RF_A, 0x1e, 0xfffff);
3456 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3457 0x430);
3458 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3459 0x434);
3460 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
3461 btcoexist, 0x42a);
3462 coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
3463 btcoexist, 0x456);
3464 coex_dm->backup_ampdu_max_num = btcoexist->btc_read_2byte(
3465 btcoexist, 0x4ca);
3466 }
3467
3468 #if 0 /* REMOVE */
3469 /* 0x790[5:0]=0x5 */
3470 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3471 u8tmp &= 0xc0;
3472 u8tmp |= 0x5;
3473 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3474 #endif
3475
3476 /* Antenna config */
3477 halbtc8821aCsr2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
3478 false);
3479
3480 /* PTA parameter */
3481 halbtc8821aCsr2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555,
3482 0x55555555, 0xffff, 0x3);
3483
3484 /* Enable counter statistics */
3485 btcoexist->btc_write_1byte(btcoexist, 0x76e,
3486 0xc); /* 0x76e[3] =1, WLAN_Act control by PTA */
3487 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3488
3489 #if 0 /* REMOVE */
3490 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
3491 #endif
3492 }
3493
ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist * btcoexist)3494 void ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
3495 {
3496 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3497 "[BTCoex], Coex Mechanism Init!!\n");
3498 BTC_TRACE(trace_buf);
3499
3500 halbtc8821aCsr2ant_init_coex_dm(btcoexist);
3501 }
3502
ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist * btcoexist)3503 void ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist *btcoexist)
3504 {
3505 struct btc_board_info *board_info = &btcoexist->board_info;
3506 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3507 u8 *cli_buf = btcoexist->cli_buf;
3508 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3509 u32 u32tmp[4];
3510 u32 fw_ver = 0, bt_patch_ver = 0;
3511
3512 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3513 "\r\n ============[BT Coexist info]============");
3514 CL_PRINTF(cli_buf);
3515
3516 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3517 "Ant PG number/ Ant mechanism:",
3518 board_info->pg_ant_num, board_info->btdm_ant_num);
3519 CL_PRINTF(cli_buf);
3520
3521 if (btcoexist->manual_control) {
3522 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3523 "[Action Manual control]!!");
3524 CL_PRINTF(cli_buf);
3525 }
3526
3527 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3528 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3529 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3530 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3531 "CoexVer/ FwVer/ PatchVer",
3532 glcoex_ver_date_8821a_csr_2ant, glcoex_ver_8821a_csr_2ant,
3533 fw_ver, bt_patch_ver, bt_patch_ver);
3534 CL_PRINTF(cli_buf);
3535
3536 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3537 "Wifi channel informed to BT",
3538 coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
3539 coex_dm->wifi_chnl_info[2]);
3540 CL_PRINTF(cli_buf);
3541
3542 /* wifi status */
3543 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3544 "============[Wifi Status]============");
3545 CL_PRINTF(cli_buf);
3546 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
3547
3548 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3549 "============[BT Status]============");
3550 CL_PRINTF(cli_buf);
3551
3552 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3553 "BT [status/ rssi/ retryCnt]",
3554 ((coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") : ((
3555 BT_8821A_CSR_2ANT_BT_STATUS_IDLE == coex_dm->bt_status)
3556 ? "idle" : ((BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE
3557 == coex_dm->bt_status) ? "connected-idle" : "busy"))),
3558 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3559 CL_PRINTF(cli_buf);
3560
3561 if (stack_info->profile_notified) {
3562 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3563 "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP",
3564 stack_info->sco_exist, stack_info->hid_exist,
3565 stack_info->pan_exist, stack_info->a2dp_exist);
3566 CL_PRINTF(cli_buf);
3567
3568 btcoexist->btc_disp_dbg_msg(btcoexist,
3569 BTC_DBG_DISP_BT_LINK_INFO);
3570 }
3571
3572 bt_info_ext = coex_sta->bt_info_ext;
3573 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3574 "BT Info A2DP rate",
3575 (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3576 CL_PRINTF(cli_buf);
3577
3578 for (i = 0; i < BT_INFO_SRC_8821A_CSR_2ANT_MAX; i++) {
3579 if (coex_sta->bt_info_c2h_cnt[i]) {
3580 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3581 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
3582 glbt_info_src_8821a_csr_2ant[i],
3583 coex_sta->bt_info_c2h[i][0],
3584 coex_sta->bt_info_c2h[i][1],
3585 coex_sta->bt_info_c2h[i][2],
3586 coex_sta->bt_info_c2h[i][3],
3587 coex_sta->bt_info_c2h[i][4],
3588 coex_sta->bt_info_c2h[i][5],
3589 coex_sta->bt_info_c2h[i][6],
3590 coex_sta->bt_info_c2h_cnt[i]);
3591 CL_PRINTF(cli_buf);
3592 }
3593 }
3594
3595 /* Sw mechanism */
3596 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3597 "============[Sw mechanism]============");
3598 CL_PRINTF(cli_buf);
3599 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3600 "SM1[ShRf/ LpRA/ LimDig]",
3601 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3602 coex_dm->limited_dig);
3603 CL_PRINTF(cli_buf);
3604 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3605 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3606 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3607 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3608 CL_PRINTF(cli_buf);
3609
3610 /* Fw mechanism */
3611 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3612 "============[Fw mechanism]============");
3613 CL_PRINTF(cli_buf);
3614
3615 if (!btcoexist->manual_control) {
3616 ps_tdma_case = coex_dm->cur_ps_tdma;
3617 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3618 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d",
3619 "PS TDMA",
3620 coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
3621 coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
3622 coex_dm->ps_tdma_para[4], ps_tdma_case);
3623 CL_PRINTF(cli_buf);
3624
3625 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3626 "DecBtPwr/ IgnWlanAct",
3627 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3628 CL_PRINTF(cli_buf);
3629 }
3630
3631 /* Hw setting */
3632 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3633 "============[Hw setting]============");
3634 CL_PRINTF(cli_buf);
3635
3636 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3637 "RF-A, 0x1e initVal",
3638 coex_dm->bt_rf_0x1e_backup);
3639 CL_PRINTF(cli_buf);
3640
3641 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3642 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3643 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ",
3644 "0x778 (W_Act)/ 0x6cc (CoTab Sel)",
3645 u8tmp[0], u8tmp[1]);
3646 CL_PRINTF(cli_buf);
3647
3648 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db);
3649 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b);
3650 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3651 "0x8db(ADC)/0xc5b[29:25](DAC)",
3652 ((u8tmp[0] & 0x60) >> 5), ((u8tmp[1] & 0x3e) >> 1));
3653 CL_PRINTF(cli_buf);
3654
3655 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
3656 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3657 "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)",
3658 u32tmp[0] & 0xff, ((u32tmp[0] & 0x30000000) >> 28));
3659 CL_PRINTF(cli_buf);
3660
3661 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3662 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
3663 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974);
3664 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3665 "0x40/ 0x4c[24:23]/ 0x974",
3666 u8tmp[0], ((u32tmp[0] & 0x01800000) >> 23), u32tmp[1]);
3667 CL_PRINTF(cli_buf);
3668
3669 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3670 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3671 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3672 "0x550(bcn ctrl)/0x522",
3673 u32tmp[0], u8tmp[0]);
3674 CL_PRINTF(cli_buf);
3675
3676 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3677 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa0a);
3678 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3679 "0xc50(DIG)/0xa0a(CCK-TH)",
3680 u32tmp[0], u8tmp[0]);
3681 CL_PRINTF(cli_buf);
3682
3683 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48);
3684 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
3685 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
3686 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3687 "OFDM-FA/ CCK-FA",
3688 u32tmp[0], (u8tmp[0] << 8) + u8tmp[1]);
3689 CL_PRINTF(cli_buf);
3690
3691 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3692 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3693 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3694 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3695 "0x6c0/0x6c4/0x6c8",
3696 u32tmp[0], u32tmp[1], u32tmp[2]);
3697 CL_PRINTF(cli_buf);
3698
3699 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3700 "0x770 (hi-pri Rx/Tx)",
3701 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3702 CL_PRINTF(cli_buf);
3703 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3704 "0x774(low-pri Rx/Tx)",
3705 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3706 CL_PRINTF(cli_buf);
3707
3708 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3709 }
3710
3711
ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist * btcoexist,IN u8 type)3712 void ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist *btcoexist,
3713 IN u8 type)
3714 {
3715 if (BTC_IPS_ENTER == type) {
3716 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3717 "[BTCoex], IPS ENTER notify\n");
3718 BTC_TRACE(trace_buf);
3719 coex_sta->under_ips = true;
3720 halbtc8821aCsr2ant_coex_all_off(btcoexist);
3721 } else if (BTC_IPS_LEAVE == type) {
3722 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3723 "[BTCoex], IPS LEAVE notify\n");
3724 BTC_TRACE(trace_buf);
3725 coex_sta->under_ips = false;
3726 /* halbtc8821aCsr2ant_init_coex_dm(btcoexist); */
3727 }
3728 }
3729
ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist * btcoexist,IN u8 type)3730 void ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist *btcoexist,
3731 IN u8 type)
3732 {
3733 if (BTC_LPS_ENABLE == type) {
3734 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3735 "[BTCoex], LPS ENABLE notify\n");
3736 BTC_TRACE(trace_buf);
3737 coex_sta->under_lps = true;
3738 } else if (BTC_LPS_DISABLE == type) {
3739 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3740 "[BTCoex], LPS DISABLE notify\n");
3741 BTC_TRACE(trace_buf);
3742 coex_sta->under_lps = false;
3743 }
3744 }
3745
ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist * btcoexist,IN u8 type)3746 void ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist *btcoexist,
3747 IN u8 type)
3748 {
3749 if (BTC_SCAN_START == type) {
3750 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3751 "[BTCoex], SCAN START notify\n");
3752 BTC_TRACE(trace_buf);
3753 } else if (BTC_SCAN_FINISH == type) {
3754 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3755 "[BTCoex], SCAN FINISH notify\n");
3756 BTC_TRACE(trace_buf);
3757 }
3758 }
3759
ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist * btcoexist,IN u8 type)3760 void ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist *btcoexist,
3761 IN u8 type)
3762 {
3763 if (BTC_ASSOCIATE_START == type) {
3764 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3765 "[BTCoex], CONNECT START notify\n");
3766 BTC_TRACE(trace_buf);
3767 } else if (BTC_ASSOCIATE_FINISH == type) {
3768 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3769 "[BTCoex], CONNECT FINISH notify\n");
3770 BTC_TRACE(trace_buf);
3771 }
3772 }
3773
ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)3774 void ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist *btcoexist,
3775 IN u8 type)
3776 {
3777 u8 h2c_parameter[3] = {0};
3778 u32 wifi_bw;
3779 u8 wifi_central_chnl;
3780
3781 if (BTC_MEDIA_CONNECT == type) {
3782 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3783 "[BTCoex], MEDIA connect notify\n");
3784 BTC_TRACE(trace_buf);
3785 } else {
3786 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3787 "[BTCoex], MEDIA disconnect notify\n");
3788 BTC_TRACE(trace_buf);
3789 }
3790
3791 /* only 2.4G we need to inform bt the chnl mask */
3792 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3793 &wifi_central_chnl);
3794 if ((BTC_MEDIA_CONNECT == type) &&
3795 (wifi_central_chnl <= 14)) {
3796 h2c_parameter[0] = 0x1;
3797 h2c_parameter[1] = wifi_central_chnl;
3798 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3799 if (BTC_WIFI_BW_HT40 == wifi_bw)
3800 h2c_parameter[2] = 0x30;
3801 else
3802 h2c_parameter[2] = 0x20;
3803 }
3804
3805 }
3806
ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist * btcoexist,IN u8 type)3807 void ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist
3808 *btcoexist, IN u8 type)
3809 {
3810 if (type == BTC_PACKET_DHCP) {
3811 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3812 "[BTCoex], DHCP Packet notify\n");
3813 BTC_TRACE(trace_buf);
3814 }
3815 }
3816
ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist * btcoexist,IN u8 * tmp_buf,IN u8 length)3817 void ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
3818 IN u8 *tmp_buf, IN u8 length)
3819 {
3820 u8 bt_info = 0;
3821 u8 i, rsp_source = 0;
3822 boolean bt_busy = false, limited_dig = false;
3823 boolean wifi_connected = false, bt_hs_on = false,
3824 wifi_under_5g = false;
3825
3826 coex_sta->c2h_bt_info_req_sent = false;
3827 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3828
3829 rsp_source = tmp_buf[0] & 0xf;
3830 if (rsp_source >= BT_INFO_SRC_8821A_CSR_2ANT_MAX)
3831 rsp_source = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW;
3832 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3833
3834 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3835 "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
3836 length);
3837 BTC_TRACE(trace_buf);
3838 for (i = 0; i < length; i++) {
3839 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3840 if (i == 1)
3841 bt_info = tmp_buf[i];
3842 if (i == length - 1) {
3843 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
3844 tmp_buf[i]);
3845 BTC_TRACE(trace_buf);
3846 } else {
3847 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
3848 tmp_buf[i]);
3849 BTC_TRACE(trace_buf);
3850 }
3851 }
3852
3853 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3854 &wifi_connected);
3855 if (BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rsp_source) {
3856 coex_sta->bt_retry_cnt = /* [3:0] */
3857 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3858
3859 coex_sta->bt_rssi =
3860 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3861
3862 coex_sta->bt_info_ext =
3863 coex_sta->bt_info_c2h[rsp_source][4];
3864
3865 #if 0 /* REMOVE */
3866 /* Here we need to resend some wifi info to BT */
3867 /* because bt is reset and loss of the info. */
3868 if ((coex_sta->bt_info_ext & BIT(1))) {
3869
3870 if (wifi_connected)
3871 ex_halbtc8821aCsr2ant_media_status_notify(
3872 btcoexist, BTC_MEDIA_CONNECT);
3873 else
3874 ex_halbtc8821aCsr2ant_media_status_notify(
3875 btcoexist, BTC_MEDIA_DISCONNECT);
3876 }
3877 #endif
3878
3879 }
3880
3881 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
3882
3883 if (bt_info ==
3884 BT_INFO_8821A_CSR_2ANT_B_CONNECTION) { /* connection exists but no busy */
3885 coex_sta->bt_link_exist = true;
3886 coex_dm->bt_status =
3887 BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE;
3888 } else if (bt_info &
3889 BT_INFO_8821A_CSR_2ANT_B_CONNECTION) { /* connection exists and some link is busy */
3890 coex_sta->bt_link_exist = true;
3891
3892 if (bt_info & BT_INFO_8821A_CSR_2ANT_B_FTP)
3893 coex_sta->pan_exist = true;
3894 else
3895 coex_sta->pan_exist = false;
3896
3897 if (bt_info & BT_INFO_8821A_CSR_2ANT_B_A2DP)
3898 coex_sta->a2dp_exist = true;
3899 else
3900 coex_sta->a2dp_exist = false;
3901
3902 if (bt_info & BT_INFO_8821A_CSR_2ANT_B_HID)
3903 coex_sta->hid_exist = true;
3904 else
3905 coex_sta->hid_exist = false;
3906
3907 if (bt_info & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO)
3908 coex_sta->sco_exist = true;
3909 else
3910 coex_sta->sco_exist = false;
3911
3912 if (coex_sta->bt_info_ext & 0x80)
3913 coex_sta->slave = true; /* Slave */
3914 else
3915 coex_sta->slave = false; /* Master */
3916
3917 coex_dm->bt_status =
3918 BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
3919 } else {
3920 coex_sta->bt_link_exist = false;
3921 coex_sta->pan_exist = false;
3922 coex_sta->a2dp_exist = false;
3923 coex_sta->slave = false;
3924 coex_sta->hid_exist = false;
3925 coex_sta->sco_exist = false;
3926 coex_dm->bt_status = BT_8821A_CSR_2ANT_BT_STATUS_IDLE;
3927 }
3928
3929 if (bt_hs_on)
3930 coex_dm->bt_status =
3931 BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
3932
3933 if (bt_info & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE) {
3934 coex_sta->c2h_bt_inquiry_page = true;
3935 coex_dm->bt_status = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
3936 } else
3937 coex_sta->c2h_bt_inquiry_page = false;
3938
3939
3940 if (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == coex_dm->bt_status)
3941 bt_busy = true;
3942 else
3943 bt_busy = false;
3944 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3945
3946 if (BT_8821A_CSR_2ANT_BT_STATUS_IDLE != coex_dm->bt_status)
3947 limited_dig = true;
3948 else
3949 limited_dig = false;
3950 coex_dm->limited_dig = limited_dig;
3951 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3952
3953 halbtc8821aCsr2ant_run_coexist_mechanism(btcoexist);
3954 }
3955
ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist * btcoexist)3956 void ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist *btcoexist)
3957 {
3958 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
3959 BTC_TRACE(trace_buf);
3960
3961 halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3962 ex_halbtc8821aCsr2ant_media_status_notify(btcoexist,
3963 BTC_MEDIA_DISCONNECT);
3964 }
3965
ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist * btcoexist,IN u8 pnp_state)3966 void ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist *btcoexist,
3967 IN u8 pnp_state)
3968 {
3969 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
3970 BTC_TRACE(trace_buf);
3971
3972 if (BTC_WIFI_PNP_SLEEP == pnp_state) {
3973 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3974 "[BTCoex], Pnp notify to SLEEP\n");
3975 BTC_TRACE(trace_buf);
3976 halbtc8821aCsr2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3977
3978 /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
3979 /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
3980 /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
3981 coex_sta->under_ips = false;
3982 coex_sta->under_lps = false;
3983 } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
3984 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3985 "[BTCoex], Pnp notify to WAKE UP\n");
3986 BTC_TRACE(trace_buf);
3987 }
3988 }
3989
ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist * btcoexist)3990 void ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist *btcoexist)
3991 {
3992 halbtc8821aCsr2ant_monitor_bt_ctr(btcoexist);
3993 halbtc8821aCsr2ant_monitor_bt_enable_disable(btcoexist);
3994 }
3995
3996 #endif
3997
3998 #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */