1 /* SPDX-License-Identifier: GPL-2.0 */
2 //============================================================
3 // Description:
4 //
5 // This file is for RTL8703B Co-exist mechanism
6 //
7 // History
8 // 2012/11/15 Cosa first check in.
9 //
10 //============================================================
11
12 //============================================================
13 // include files
14 //============================================================
15 #include "Mp_Precomp.h"
16
17 #if WPP_SOFTWARE_TRACE
18 #include "HalBtc8703b2Ant.tmh"
19 #endif
20
21 #if(BT_30_SUPPORT == 1)
22 //============================================================
23 // Global variables, these are static variables
24 //============================================================
25 static COEX_DM_8703B_2ANT GLCoexDm8703b2Ant;
26 static PCOEX_DM_8703B_2ANT pCoexDm=&GLCoexDm8703b2Ant;
27 static COEX_STA_8703B_2ANT GLCoexSta8703b2Ant;
28 static PCOEX_STA_8703B_2ANT pCoexSta=&GLCoexSta8703b2Ant;
29
30 const char *const GLBtInfoSrc8703b2Ant[]={
31 "BT Info[wifi fw]",
32 "BT Info[bt rsp]",
33 "BT Info[bt auto report]",
34 };
35
36 u4Byte GLCoexVerDate8703b2Ant=20140903;
37 u4Byte GLCoexVer8703b2Ant=0x43;
38
39 //============================================================
40 // local function proto type if needed
41 //============================================================
42 //============================================================
43 // local function start with halbtc8703b2ant_
44 //============================================================
45 u1Byte
halbtc8703b2ant_BtRssiState(u1Byte levelNum,u1Byte rssiThresh,u1Byte rssiThresh1)46 halbtc8703b2ant_BtRssiState(
47 u1Byte levelNum,
48 u1Byte rssiThresh,
49 u1Byte rssiThresh1
50 )
51 {
52 s4Byte btRssi=0;
53 u1Byte btRssiState=pCoexSta->preBtRssiState;
54
55 btRssi = pCoexSta->btRssi;
56
57 if(levelNum == 2)
58 {
59 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
60 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
61 {
62 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
63 {
64 btRssiState = BTC_RSSI_STATE_HIGH;
65 }
66 else
67 {
68 btRssiState = BTC_RSSI_STATE_STAY_LOW;
69 }
70 }
71 else
72 {
73 if(btRssi < rssiThresh)
74 {
75 btRssiState = BTC_RSSI_STATE_LOW;
76 }
77 else
78 {
79 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
80 }
81 }
82 }
83 else if(levelNum == 3)
84 {
85 if(rssiThresh > rssiThresh1)
86 {
87 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n"));
88 return pCoexSta->preBtRssiState;
89 }
90
91 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
92 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
93 {
94 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
95 {
96 btRssiState = BTC_RSSI_STATE_MEDIUM;
97 }
98 else
99 {
100 btRssiState = BTC_RSSI_STATE_STAY_LOW;
101 }
102 }
103 else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
104 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM))
105 {
106 if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
107 {
108 btRssiState = BTC_RSSI_STATE_HIGH;
109 }
110 else if(btRssi < rssiThresh)
111 {
112 btRssiState = BTC_RSSI_STATE_LOW;
113 }
114 else
115 {
116 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
117 }
118 }
119 else
120 {
121 if(btRssi < rssiThresh1)
122 {
123 btRssiState = BTC_RSSI_STATE_MEDIUM;
124 }
125 else
126 {
127 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
128 }
129 }
130 }
131
132 pCoexSta->preBtRssiState = btRssiState;
133
134 return btRssiState;
135 }
136
137 u1Byte
halbtc8703b2ant_WifiRssiState(IN PBTC_COEXIST pBtCoexist,IN u1Byte index,IN u1Byte levelNum,IN u1Byte rssiThresh,IN u1Byte rssiThresh1)138 halbtc8703b2ant_WifiRssiState(
139 IN PBTC_COEXIST pBtCoexist,
140 IN u1Byte index,
141 IN u1Byte levelNum,
142 IN u1Byte rssiThresh,
143 IN u1Byte rssiThresh1
144 )
145 {
146 s4Byte wifiRssi=0;
147 u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index];
148
149 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
150
151 if(levelNum == 2)
152 {
153 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
154 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
155 {
156 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
157 {
158 wifiRssiState = BTC_RSSI_STATE_HIGH;
159 }
160 else
161 {
162 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
163 }
164 }
165 else
166 {
167 if(wifiRssi < rssiThresh)
168 {
169 wifiRssiState = BTC_RSSI_STATE_LOW;
170 }
171 else
172 {
173 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
174 }
175 }
176 }
177 else if(levelNum == 3)
178 {
179 if(rssiThresh > rssiThresh1)
180 {
181 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n"));
182 return pCoexSta->preWifiRssiState[index];
183 }
184
185 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
186 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
187 {
188 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
189 {
190 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
191 }
192 else
193 {
194 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
195 }
196 }
197 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
198 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
199 {
200 if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8703B_2ANT))
201 {
202 wifiRssiState = BTC_RSSI_STATE_HIGH;
203 }
204 else if(wifiRssi < rssiThresh)
205 {
206 wifiRssiState = BTC_RSSI_STATE_LOW;
207 }
208 else
209 {
210 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
211 }
212 }
213 else
214 {
215 if(wifiRssi < rssiThresh1)
216 {
217 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
218 }
219 else
220 {
221 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
222 }
223 }
224 }
225
226 pCoexSta->preWifiRssiState[index] = wifiRssiState;
227
228 return wifiRssiState;
229 }
230
231 VOID
halbtc8703b2ant_MonitorBtEnableDisable(IN PBTC_COEXIST pBtCoexist)232 halbtc8703b2ant_MonitorBtEnableDisable(
233 IN PBTC_COEXIST pBtCoexist
234 )
235 {
236 static BOOLEAN bPreBtDisabled=FALSE;
237 static u4Byte btDisableCnt=0;
238 BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE;
239
240 // This function check if bt is disabled
241
242 if( pCoexSta->highPriorityTx == 0 &&
243 pCoexSta->highPriorityRx == 0 &&
244 pCoexSta->lowPriorityTx == 0 &&
245 pCoexSta->lowPriorityRx == 0)
246 {
247 bBtActive = FALSE;
248 }
249 if( pCoexSta->highPriorityTx == 0xffff &&
250 pCoexSta->highPriorityRx == 0xffff &&
251 pCoexSta->lowPriorityTx == 0xffff &&
252 pCoexSta->lowPriorityRx == 0xffff)
253 {
254 bBtActive = FALSE;
255 }
256 if(bBtActive)
257 {
258 btDisableCnt = 0;
259 bBtDisabled = FALSE;
260 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
261 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n"));
262 }
263 else
264 {
265 btDisableCnt++;
266 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n",
267 btDisableCnt));
268 if(btDisableCnt >= 2)
269 {
270 bBtDisabled = TRUE;
271 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
272 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n"));
273 }
274 }
275 if(bPreBtDisabled != bBtDisabled)
276 {
277 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n",
278 (bPreBtDisabled ? "disabled":"enabled"),
279 (bBtDisabled ? "disabled":"enabled")));
280 bPreBtDisabled = bBtDisabled;
281 if(!bBtDisabled)
282 {
283 }
284 else
285 {
286 }
287 }
288 }
289
290 VOID
halbtc8703b2ant_LimitedRx(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRejApAggPkt,IN BOOLEAN bBtCtrlAggBufSize,IN u1Byte aggBufSize)291 halbtc8703b2ant_LimitedRx(
292 IN PBTC_COEXIST pBtCoexist,
293 IN BOOLEAN bForceExec,
294 IN BOOLEAN bRejApAggPkt,
295 IN BOOLEAN bBtCtrlAggBufSize,
296 IN u1Byte aggBufSize
297 )
298 {
299 BOOLEAN bRejectRxAgg=bRejApAggPkt;
300 BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize;
301 u1Byte rxAggSize=aggBufSize;
302
303 //============================================
304 // Rx Aggregation related setting
305 //============================================
306 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
307 // decide BT control aggregation buf size or not
308 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
309 // aggregation buf size, only work when BT control Rx aggregation size.
310 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
311 // real update aggregation setting
312 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
313 }
314
315 VOID
halbtc8703b2ant_MonitorBtCtr(IN PBTC_COEXIST pBtCoexist)316 halbtc8703b2ant_MonitorBtCtr(
317 IN PBTC_COEXIST pBtCoexist
318 )
319 {
320 u4Byte regHPTxRx, regLPTxRx, u4Tmp;
321 u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
322 u1Byte u1Tmp;
323
324 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
325
326 regHPTxRx = 0x770;
327 regLPTxRx = 0x774;
328
329 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
330 regHPTx = u4Tmp & bMaskLWord;
331 regHPRx = (u4Tmp & bMaskHWord)>>16;
332
333 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
334 regLPTx = u4Tmp & bMaskLWord;
335 regLPRx = (u4Tmp & bMaskHWord)>>16;
336
337 pCoexSta->highPriorityTx = regHPTx;
338 pCoexSta->highPriorityRx = regHPRx;
339 pCoexSta->lowPriorityTx = regLPTx;
340 pCoexSta->lowPriorityRx = regLPRx;
341
342 if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) )
343 {
344 pBtLinkInfo->bSlaveRole = TRUE;
345 }
346 else
347 {
348 pBtLinkInfo->bSlaveRole = FALSE;
349 }
350
351 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
352 regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
353 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
354 regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
355
356 // reset counter
357 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
358 }
359
360 VOID
halbtc8703b2ant_MonitorWiFiCtr(IN PBTC_COEXIST pBtCoexist)361 halbtc8703b2ant_MonitorWiFiCtr(
362 IN PBTC_COEXIST pBtCoexist
363 )
364 {
365 u4Byte u4Tmp;
366 u2Byte u2Tmp[3];
367 s4Byte wifiRssi=0;
368 BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE;
369 static u1Byte nCCKLockCounter = 0;
370
371
372 if (pCoexSta->bUnderIps)
373 {
374 pCoexSta->nCRCOK_CCK = 0;
375 pCoexSta->nCRCOK_11g = 0;
376 pCoexSta->nCRCOK_11n = 0;
377 pCoexSta->nCRCOK_11nAgg = 0;
378
379 pCoexSta->nCRCErr_CCK = 0;
380 pCoexSta->nCRCErr_11g = 0;
381 pCoexSta->nCRCErr_11n = 0;
382 pCoexSta->nCRCErr_11nAgg = 0;
383 }
384 else
385 {
386 pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88);
387 pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94);
388 pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90);
389 pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8);
390
391 pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84);
392 pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96);
393 pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92);
394 pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba);
395 }
396
397 //reset counter
398 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1);
399 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0);
400 }
401
402 VOID
halbtc8703b2ant_QueryBtInfo(IN PBTC_COEXIST pBtCoexist)403 halbtc8703b2ant_QueryBtInfo(
404 IN PBTC_COEXIST pBtCoexist
405 )
406 {
407 u1Byte H2C_Parameter[1] ={0};
408
409 pCoexSta->bC2hBtInfoReqSent = TRUE;
410
411 H2C_Parameter[0] |= BIT0; // trigger
412
413 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
414 H2C_Parameter[0]));
415
416 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
417 }
418
419 BOOLEAN
halbtc8703b2ant_IsWifiStatusChanged(IN PBTC_COEXIST pBtCoexist)420 halbtc8703b2ant_IsWifiStatusChanged(
421 IN PBTC_COEXIST pBtCoexist
422 )
423 {
424 static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE;
425 BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE;
426 BOOLEAN bWifiConnected=FALSE;
427 u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH;
428
429
430 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
431 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
432 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
433 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
434
435 if(bWifiConnected)
436 {
437 if(bWifiBusy != bPreWifiBusy)
438 {
439 bPreWifiBusy = bWifiBusy;
440 return TRUE;
441 }
442 if(bUnder4way != bPreUnder4way)
443 {
444 bPreUnder4way = bUnder4way;
445 return TRUE;
446 }
447 if(bBtHsOn != bPreBtHsOn)
448 {
449 bPreBtHsOn = bBtHsOn;
450 return TRUE;
451 }
452
453
454 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
455
456 if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState ))
457 {
458 return TRUE;
459 }
460
461 }
462
463 return FALSE;
464 }
465
466 VOID
halbtc8703b2ant_UpdateBtLinkInfo(IN PBTC_COEXIST pBtCoexist)467 halbtc8703b2ant_UpdateBtLinkInfo(
468 IN PBTC_COEXIST pBtCoexist
469 )
470 {
471 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
472 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
473 BOOLEAN bBtHsOn=FALSE;
474
475 #if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1) // profile from bt patch
476 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
477
478 pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
479 pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
480 pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
481 pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
482 pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
483
484 // work around for HS mode.
485 if(bBtHsOn)
486 {
487 pBtLinkInfo->bPanExist = TRUE;
488 pBtLinkInfo->bBtLinkExist = TRUE;
489 }
490 #else // profile from bt stack
491 pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist;
492 pBtLinkInfo->bScoExist = pStackInfo->bScoExist;
493 pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist;
494 pBtLinkInfo->bPanExist = pStackInfo->bPanExist;
495 pBtLinkInfo->bHidExist = pStackInfo->bHidExist;
496
497 //for win-8 stack HID report error
498 if(!pStackInfo->bHidExist)
499 pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack
500 // when stack HID report error, here we use the info from bt fw.
501 if(!pStackInfo->bBtLinkExist)
502 pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
503 #endif
504 // check if Sco only
505 if( pBtLinkInfo->bScoExist &&
506 !pBtLinkInfo->bA2dpExist &&
507 !pBtLinkInfo->bPanExist &&
508 !pBtLinkInfo->bHidExist )
509 pBtLinkInfo->bScoOnly = TRUE;
510 else
511 pBtLinkInfo->bScoOnly = FALSE;
512
513 // check if A2dp only
514 if( !pBtLinkInfo->bScoExist &&
515 pBtLinkInfo->bA2dpExist &&
516 !pBtLinkInfo->bPanExist &&
517 !pBtLinkInfo->bHidExist )
518 pBtLinkInfo->bA2dpOnly = TRUE;
519 else
520 pBtLinkInfo->bA2dpOnly = FALSE;
521
522 // check if Pan only
523 if( !pBtLinkInfo->bScoExist &&
524 !pBtLinkInfo->bA2dpExist &&
525 pBtLinkInfo->bPanExist &&
526 !pBtLinkInfo->bHidExist )
527 pBtLinkInfo->bPanOnly = TRUE;
528 else
529 pBtLinkInfo->bPanOnly = FALSE;
530
531 // check if Hid only
532 if( !pBtLinkInfo->bScoExist &&
533 !pBtLinkInfo->bA2dpExist &&
534 !pBtLinkInfo->bPanExist &&
535 pBtLinkInfo->bHidExist )
536 pBtLinkInfo->bHidOnly = TRUE;
537 else
538 pBtLinkInfo->bHidOnly = FALSE;
539 }
540
541 u1Byte
halbtc8703b2ant_ActionAlgorithm(IN PBTC_COEXIST pBtCoexist)542 halbtc8703b2ant_ActionAlgorithm(
543 IN PBTC_COEXIST pBtCoexist
544 )
545 {
546 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
547 BOOLEAN bBtHsOn=FALSE;
548 u1Byte algorithm=BT_8703B_2ANT_COEX_ALGO_UNDEFINED;
549 u1Byte numOfDiffProfile=0;
550
551 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
552
553 if(!pBtLinkInfo->bBtLinkExist)
554 {
555 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n"));
556 return algorithm;
557 }
558
559 if(pBtLinkInfo->bScoExist)
560 numOfDiffProfile++;
561 if(pBtLinkInfo->bHidExist)
562 numOfDiffProfile++;
563 if(pBtLinkInfo->bPanExist)
564 numOfDiffProfile++;
565 if(pBtLinkInfo->bA2dpExist)
566 numOfDiffProfile++;
567
568 if(numOfDiffProfile == 1)
569 {
570 if(pBtLinkInfo->bScoExist)
571 {
572 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n"));
573 algorithm = BT_8703B_2ANT_COEX_ALGO_SCO;
574 }
575 else
576 {
577 if(pBtLinkInfo->bHidExist)
578 {
579 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n"));
580 algorithm = BT_8703B_2ANT_COEX_ALGO_HID;
581 }
582 else if(pBtLinkInfo->bA2dpExist)
583 {
584 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n"));
585 algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP;
586 }
587 else if(pBtLinkInfo->bPanExist)
588 {
589 if(bBtHsOn)
590 {
591 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n"));
592 algorithm = BT_8703B_2ANT_COEX_ALGO_PANHS;
593 }
594 else
595 {
596 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n"));
597 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR;
598 }
599 }
600 }
601 }
602 else if(numOfDiffProfile == 2)
603 {
604 if(pBtLinkInfo->bScoExist)
605 {
606 if(pBtLinkInfo->bHidExist)
607 {
608 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n"));
609 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
610 }
611 else if(pBtLinkInfo->bA2dpExist)
612 {
613 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n"));
614 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
615 }
616 else if(pBtLinkInfo->bPanExist)
617 {
618 if(bBtHsOn)
619 {
620 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n"));
621 algorithm = BT_8703B_2ANT_COEX_ALGO_SCO;
622 }
623 else
624 {
625 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n"));
626 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
627 }
628 }
629 }
630 else
631 {
632 if( pBtLinkInfo->bHidExist &&
633 pBtLinkInfo->bA2dpExist )
634 {
635 #if 0
636 if(pStackInfo->numOfHid >= 2)
637 {
638 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n"));
639 algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
640 }
641 else
642 #endif
643 {
644 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n"));
645 algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP;
646 }
647 }
648 else if( pBtLinkInfo->bHidExist &&
649 pBtLinkInfo->bPanExist )
650 {
651 if(bBtHsOn)
652 {
653 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n"));
654 algorithm = BT_8703B_2ANT_COEX_ALGO_HID;
655 }
656 else
657 {
658 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n"));
659 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
660 }
661 }
662 else if( pBtLinkInfo->bPanExist &&
663 pBtLinkInfo->bA2dpExist )
664 {
665 if(bBtHsOn)
666 {
667 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n"));
668 algorithm = BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS;
669 }
670 else
671 {
672 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n"));
673 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP;
674 }
675 }
676 }
677 }
678 else if(numOfDiffProfile == 3)
679 {
680 if(pBtLinkInfo->bScoExist)
681 {
682 if( pBtLinkInfo->bHidExist &&
683 pBtLinkInfo->bA2dpExist )
684 {
685 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n"));
686 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
687 }
688 else if( pBtLinkInfo->bHidExist &&
689 pBtLinkInfo->bPanExist )
690 {
691 if(bBtHsOn)
692 {
693 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n"));
694 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
695 }
696 else
697 {
698 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n"));
699 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
700 }
701 }
702 else if( pBtLinkInfo->bPanExist &&
703 pBtLinkInfo->bA2dpExist )
704 {
705 if(bBtHsOn)
706 {
707 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
708 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
709 }
710 else
711 {
712 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
713 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
714 }
715 }
716 }
717 else
718 {
719 if( pBtLinkInfo->bHidExist &&
720 pBtLinkInfo->bPanExist &&
721 pBtLinkInfo->bA2dpExist )
722 {
723 if(bBtHsOn)
724 {
725 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
726 algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP;
727 }
728 else
729 {
730 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
731 algorithm = BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
732 }
733 }
734 }
735 }
736 else if(numOfDiffProfile >= 3)
737 {
738 if(pBtLinkInfo->bScoExist)
739 {
740 if( pBtLinkInfo->bHidExist &&
741 pBtLinkInfo->bPanExist &&
742 pBtLinkInfo->bA2dpExist )
743 {
744 if(bBtHsOn)
745 {
746 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
747
748 }
749 else
750 {
751 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"));
752 algorithm = BT_8703B_2ANT_COEX_ALGO_PANEDR_HID;
753 }
754 }
755 }
756 }
757
758 return algorithm;
759 }
760
761 VOID
halbtc8703b2ant_SetFwDacSwingLevel(IN PBTC_COEXIST pBtCoexist,IN u1Byte dacSwingLvl)762 halbtc8703b2ant_SetFwDacSwingLevel(
763 IN PBTC_COEXIST pBtCoexist,
764 IN u1Byte dacSwingLvl
765 )
766 {
767 u1Byte H2C_Parameter[1] ={0};
768
769 // There are several type of dacswing
770 // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
771 H2C_Parameter[0] = dacSwingLvl;
772
773 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl));
774 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0]));
775
776 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
777 }
778
779 VOID
halbtc8703b2ant_SetFwDecBtPwr(IN PBTC_COEXIST pBtCoexist,IN u1Byte decBtPwrLvl)780 halbtc8703b2ant_SetFwDecBtPwr(
781 IN PBTC_COEXIST pBtCoexist,
782 IN u1Byte decBtPwrLvl
783 )
784 {
785 u1Byte H2C_Parameter[1] ={0};
786
787 H2C_Parameter[0] = decBtPwrLvl;
788
789 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n",
790 decBtPwrLvl, H2C_Parameter[0]));
791
792 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
793 }
794
795 VOID
halbtc8703b2ant_DecBtPwr(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte decBtPwrLvl)796 halbtc8703b2ant_DecBtPwr(
797 IN PBTC_COEXIST pBtCoexist,
798 IN BOOLEAN bForceExec,
799 IN u1Byte decBtPwrLvl
800 )
801 {
802 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n",
803 (bForceExec? "force to":""), decBtPwrLvl));
804 pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
805
806 if(!bForceExec)
807 {
808 if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
809 return;
810 }
811 halbtc8703b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
812
813 pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
814 }
815
816 VOID
halbtc8703b2ant_SetBtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnableAutoReport)817 halbtc8703b2ant_SetBtAutoReport(
818 IN PBTC_COEXIST pBtCoexist,
819 IN BOOLEAN bEnableAutoReport
820 )
821 {
822 u1Byte H2C_Parameter[1] ={0};
823
824 H2C_Parameter[0] = 0;
825
826 if(bEnableAutoReport)
827 {
828 H2C_Parameter[0] |= BIT0;
829 }
830
831 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
832 (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
833
834 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
835 }
836
837 VOID
halbtc8703b2ant_BtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnableAutoReport)838 halbtc8703b2ant_BtAutoReport(
839 IN PBTC_COEXIST pBtCoexist,
840 IN BOOLEAN bForceExec,
841 IN BOOLEAN bEnableAutoReport
842 )
843 {
844 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n",
845 (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled")));
846 pCoexDm->bCurBtAutoReport = bEnableAutoReport;
847
848 if(!bForceExec)
849 {
850 if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
851 return;
852 }
853 halbtc8703b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
854
855 pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
856 }
857
858 VOID
halbtc8703b2ant_FwDacSwingLvl(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte fwDacSwingLvl)859 halbtc8703b2ant_FwDacSwingLvl(
860 IN PBTC_COEXIST pBtCoexist,
861 IN BOOLEAN bForceExec,
862 IN u1Byte fwDacSwingLvl
863 )
864 {
865 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n",
866 (bForceExec? "force to":""), fwDacSwingLvl));
867 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
868
869 if(!bForceExec)
870 {
871 if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
872 return;
873 }
874
875 halbtc8703b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
876
877 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
878 }
879
880 VOID
halbtc8703b2ant_SetSwRfRxLpfCorner(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bRxRfShrinkOn)881 halbtc8703b2ant_SetSwRfRxLpfCorner(
882 IN PBTC_COEXIST pBtCoexist,
883 IN BOOLEAN bRxRfShrinkOn
884 )
885 {
886 if(bRxRfShrinkOn)
887 {
888 //Shrink RF Rx LPF corner
889 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
890 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
891 }
892 else
893 {
894 //Resume RF Rx LPF corner
895 // After initialized, we can use pCoexDm->btRf0x1eBackup
896 if(pBtCoexist->bInitilized)
897 {
898 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
899 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
900 }
901 }
902 }
903
904 VOID
halbtc8703b2ant_RfShrink(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRxRfShrinkOn)905 halbtc8703b2ant_RfShrink(
906 IN PBTC_COEXIST pBtCoexist,
907 IN BOOLEAN bForceExec,
908 IN BOOLEAN bRxRfShrinkOn
909 )
910 {
911 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
912 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
913 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
914
915 if(!bForceExec)
916 {
917 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
918 return;
919 }
920 halbtc8703b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
921
922 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
923 }
924
925 VOID
halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bLowPenaltyRa)926 halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(
927 IN PBTC_COEXIST pBtCoexist,
928 IN BOOLEAN bLowPenaltyRa
929 )
930 {
931 u1Byte H2C_Parameter[6] ={0};
932
933 H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty
934
935 if(bLowPenaltyRa)
936 {
937 H2C_Parameter[1] |= BIT0;
938 H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36
939 H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54
940 H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48
941 H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36
942 }
943
944 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s",
945 (bLowPenaltyRa? "ON!!":"OFF!!")) );
946
947 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
948 }
949
950 VOID
halbtc8703b2ant_LowPenaltyRa(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bLowPenaltyRa)951 halbtc8703b2ant_LowPenaltyRa(
952 IN PBTC_COEXIST pBtCoexist,
953 IN BOOLEAN bForceExec,
954 IN BOOLEAN bLowPenaltyRa
955 )
956 {
957 //return;
958 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
959 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
960 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
961
962 if(!bForceExec)
963 {
964 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
965 return;
966 }
967 halbtc8703b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
968
969 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
970 }
971
972 VOID
halbtc8703b2ant_SetDacSwingReg(IN PBTC_COEXIST pBtCoexist,IN u4Byte level)973 halbtc8703b2ant_SetDacSwingReg(
974 IN PBTC_COEXIST pBtCoexist,
975 IN u4Byte level
976 )
977 {
978 u1Byte val=(u1Byte)level;
979
980 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level));
981 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
982 }
983
984 VOID
halbtc8703b2ant_SetSwFullTimeDacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bSwDacSwingOn,IN u4Byte swDacSwingLvl)985 halbtc8703b2ant_SetSwFullTimeDacSwing(
986 IN PBTC_COEXIST pBtCoexist,
987 IN BOOLEAN bSwDacSwingOn,
988 IN u4Byte swDacSwingLvl
989 )
990 {
991 if(bSwDacSwingOn)
992 {
993 halbtc8703b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
994 }
995 else
996 {
997 halbtc8703b2ant_SetDacSwingReg(pBtCoexist, 0x18);
998 }
999 }
1000
1001
1002 VOID
halbtc8703b2ant_DacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bDacSwingOn,IN u4Byte dacSwingLvl)1003 halbtc8703b2ant_DacSwing(
1004 IN PBTC_COEXIST pBtCoexist,
1005 IN BOOLEAN bForceExec,
1006 IN BOOLEAN bDacSwingOn,
1007 IN u4Byte dacSwingLvl
1008 )
1009 {
1010 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
1011 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
1012 pCoexDm->bCurDacSwingOn = bDacSwingOn;
1013 pCoexDm->curDacSwingLvl = dacSwingLvl;
1014
1015 if(!bForceExec)
1016 {
1017 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
1018 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
1019 return;
1020 }
1021 delay_ms(30);
1022 halbtc8703b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
1023
1024 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
1025 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
1026 }
1027
1028 VOID
halbtc8703b2ant_SetAdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAdcBackOff)1029 halbtc8703b2ant_SetAdcBackOff(
1030 IN PBTC_COEXIST pBtCoexist,
1031 IN BOOLEAN bAdcBackOff
1032 )
1033 {
1034 if(bAdcBackOff)
1035 {
1036 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n"));
1037 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3);
1038 }
1039 else
1040 {
1041 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n"));
1042 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1);
1043 }
1044 }
1045
1046 VOID
halbtc8703b2ant_AdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAdcBackOff)1047 halbtc8703b2ant_AdcBackOff(
1048 IN PBTC_COEXIST pBtCoexist,
1049 IN BOOLEAN bForceExec,
1050 IN BOOLEAN bAdcBackOff
1051 )
1052 {
1053 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n",
1054 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
1055 pCoexDm->bCurAdcBackOff = bAdcBackOff;
1056
1057 if(!bForceExec)
1058 {
1059 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
1060 return;
1061 }
1062 halbtc8703b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
1063
1064 pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
1065 }
1066
1067 VOID
halbtc8703b2ant_SetAgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAgcTableEn)1068 halbtc8703b2ant_SetAgcTable(
1069 IN PBTC_COEXIST pBtCoexist,
1070 IN BOOLEAN bAgcTableEn
1071 )
1072 {
1073 u1Byte rssiAdjustVal=0;
1074
1075 //=================BB AGC Gain Table
1076 if(bAgcTableEn)
1077 {
1078 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n"));
1079 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
1080 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
1081 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
1082 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
1083 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
1084 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
1085 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
1086 }
1087 else
1088 {
1089 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n"));
1090 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
1091 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
1092 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
1093 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
1094 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
1095 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
1096 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
1097 }
1098
1099
1100 //=================RF Gain
1101 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
1102 if(bAgcTableEn)
1103 {
1104 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
1105 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
1106 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
1107 }
1108 else
1109 {
1110 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
1111 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
1112 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
1113 }
1114 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
1115
1116 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
1117 if(bAgcTableEn)
1118 {
1119 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
1120 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
1121 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
1122 }
1123 else
1124 {
1125 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
1126 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
1127 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
1128 }
1129 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
1130
1131 // set rssiAdjustVal for wifi module.
1132 if(bAgcTableEn)
1133 {
1134 rssiAdjustVal = 8;
1135 }
1136 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
1137 }
1138
1139 VOID
halbtc8703b2ant_AgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAgcTableEn)1140 halbtc8703b2ant_AgcTable(
1141 IN PBTC_COEXIST pBtCoexist,
1142 IN BOOLEAN bForceExec,
1143 IN BOOLEAN bAgcTableEn
1144 )
1145 {
1146 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n",
1147 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
1148 pCoexDm->bCurAgcTableEn = bAgcTableEn;
1149
1150 if(!bForceExec)
1151 {
1152 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
1153 return;
1154 }
1155 halbtc8703b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
1156
1157 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
1158 }
1159
1160 VOID
halbtc8703b2ant_SetCoexTable(IN PBTC_COEXIST pBtCoexist,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1161 halbtc8703b2ant_SetCoexTable(
1162 IN PBTC_COEXIST pBtCoexist,
1163 IN u4Byte val0x6c0,
1164 IN u4Byte val0x6c4,
1165 IN u4Byte val0x6c8,
1166 IN u1Byte val0x6cc
1167 )
1168 {
1169 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
1170 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
1171
1172 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
1173 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
1174
1175 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
1176 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
1177
1178 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
1179 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
1180 }
1181
1182 VOID
halbtc8703b2ant_CoexTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1183 halbtc8703b2ant_CoexTable(
1184 IN PBTC_COEXIST pBtCoexist,
1185 IN BOOLEAN bForceExec,
1186 IN u4Byte val0x6c0,
1187 IN u4Byte val0x6c4,
1188 IN u4Byte val0x6c8,
1189 IN u1Byte val0x6cc
1190 )
1191 {
1192 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1193 (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc));
1194 pCoexDm->curVal0x6c0 = val0x6c0;
1195 pCoexDm->curVal0x6c4 = val0x6c4;
1196 pCoexDm->curVal0x6c8 = val0x6c8;
1197 pCoexDm->curVal0x6cc = val0x6cc;
1198
1199 if(!bForceExec)
1200 {
1201 if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
1202 (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
1203 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
1204 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
1205 return;
1206 }
1207 halbtc8703b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
1208
1209 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
1210 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
1211 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
1212 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
1213 }
1214
1215 VOID
halbtc8703b2ant_CoexTableWithType(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)1216 halbtc8703b2ant_CoexTableWithType(
1217 IN PBTC_COEXIST pBtCoexist,
1218 IN BOOLEAN bForceExec,
1219 IN u1Byte type
1220 )
1221 {
1222 pCoexSta->nCoexTableType = type;
1223
1224 switch(type)
1225 {
1226 case 0:
1227 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3);
1228 break;
1229 case 1:
1230 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
1231 break;
1232 case 2:
1233 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
1234 break;
1235 case 3:
1236 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
1237 break;
1238 case 4:
1239 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3);
1240 break;
1241 case 5:
1242 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
1243 break;
1244 case 6:
1245 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
1246 break;
1247 case 7:
1248 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1249 break;
1250 case 8:
1251 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1252 break;
1253 case 9:
1254 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1255 break;
1256 case 10:
1257 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1258 break;
1259 case 11:
1260 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1261 break;
1262 case 12:
1263 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1264 break;
1265 case 13:
1266 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
1267 break;
1268 case 14:
1269 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
1270 break;
1271 case 15:
1272 halbtc8703b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
1273 break;
1274 default:
1275 break;
1276 }
1277 }
1278
1279 VOID
halbtc8703b2ant_SetFwIgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnable)1280 halbtc8703b2ant_SetFwIgnoreWlanAct(
1281 IN PBTC_COEXIST pBtCoexist,
1282 IN BOOLEAN bEnable
1283 )
1284 {
1285 u1Byte H2C_Parameter[1] ={0};
1286
1287 if(bEnable)
1288 {
1289 H2C_Parameter[0] |= BIT0; // function enable
1290 }
1291
1292 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1293 H2C_Parameter[0]));
1294
1295 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
1296 }
1297
1298 VOID
halbtc8703b2ant_SetLpsRpwm(IN PBTC_COEXIST pBtCoexist,IN u1Byte lpsVal,IN u1Byte rpwmVal)1299 halbtc8703b2ant_SetLpsRpwm(
1300 IN PBTC_COEXIST pBtCoexist,
1301 IN u1Byte lpsVal,
1302 IN u1Byte rpwmVal
1303 )
1304 {
1305 u1Byte lps=lpsVal;
1306 u1Byte rpwm=rpwmVal;
1307
1308 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps);
1309 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1310 }
1311
1312 VOID
halbtc8703b2ant_LpsRpwm(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte lpsVal,IN u1Byte rpwmVal)1313 halbtc8703b2ant_LpsRpwm(
1314 IN PBTC_COEXIST pBtCoexist,
1315 IN BOOLEAN bForceExec,
1316 IN u1Byte lpsVal,
1317 IN u1Byte rpwmVal
1318 )
1319 {
1320 BOOLEAN bForceExecPwrCmd=FALSE;
1321
1322 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n",
1323 (bForceExec? "force to":""), lpsVal, rpwmVal));
1324 pCoexDm->curLps = lpsVal;
1325 pCoexDm->curRpwm = rpwmVal;
1326
1327 if(!bForceExec)
1328 {
1329 if( (pCoexDm->preLps == pCoexDm->curLps) &&
1330 (pCoexDm->preRpwm == pCoexDm->curRpwm) )
1331 {
1332 return;
1333 }
1334 }
1335 halbtc8703b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal);
1336
1337 pCoexDm->preLps = pCoexDm->curLps;
1338 pCoexDm->preRpwm = pCoexDm->curRpwm;
1339 }
1340
1341 VOID
halbtc8703b2ant_IgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnable)1342 halbtc8703b2ant_IgnoreWlanAct(
1343 IN PBTC_COEXIST pBtCoexist,
1344 IN BOOLEAN bForceExec,
1345 IN BOOLEAN bEnable
1346 )
1347 {
1348 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n",
1349 (bForceExec? "force to":""), (bEnable? "ON":"OFF")));
1350 pCoexDm->bCurIgnoreWlanAct = bEnable;
1351
1352 if(!bForceExec)
1353 {
1354 if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
1355 return;
1356 }
1357 halbtc8703b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
1358
1359 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
1360 }
1361
1362 VOID
halbtc8703b2ant_SetFwPstdma(IN PBTC_COEXIST pBtCoexist,IN u1Byte byte1,IN u1Byte byte2,IN u1Byte byte3,IN u1Byte byte4,IN u1Byte byte5)1363 halbtc8703b2ant_SetFwPstdma(
1364 IN PBTC_COEXIST pBtCoexist,
1365 IN u1Byte byte1,
1366 IN u1Byte byte2,
1367 IN u1Byte byte3,
1368 IN u1Byte byte4,
1369 IN u1Byte byte5
1370 )
1371 {
1372 u1Byte H2C_Parameter[5] ={0};
1373
1374
1375 if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) )
1376 {
1377 byte5 = byte5 | 0x1;
1378 }
1379
1380 H2C_Parameter[0] = byte1;
1381 H2C_Parameter[1] = byte2;
1382 H2C_Parameter[2] = byte3;
1383 H2C_Parameter[3] = byte4;
1384 H2C_Parameter[4] = byte5;
1385
1386 pCoexDm->psTdmaPara[0] = byte1;
1387 pCoexDm->psTdmaPara[1] = byte2;
1388 pCoexDm->psTdmaPara[2] = byte3;
1389 pCoexDm->psTdmaPara[3] = byte4;
1390 pCoexDm->psTdmaPara[4] = byte5;
1391
1392 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1393 H2C_Parameter[0],
1394 H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
1395
1396 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
1397 }
1398
1399 VOID
halbtc8703b2ant_SwMechanism1(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bShrinkRxLPF,IN BOOLEAN bLowPenaltyRA,IN BOOLEAN bLimitedDIG,IN BOOLEAN bBTLNAConstrain)1400 halbtc8703b2ant_SwMechanism1(
1401 IN PBTC_COEXIST pBtCoexist,
1402 IN BOOLEAN bShrinkRxLPF,
1403 IN BOOLEAN bLowPenaltyRA,
1404 IN BOOLEAN bLimitedDIG,
1405 IN BOOLEAN bBTLNAConstrain
1406 )
1407 {
1408 /*
1409 u4Byte wifiBw;
1410
1411 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1412
1413 if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40
1414 {
1415 if (bShrinkRxLPF)
1416 bShrinkRxLPF = FALSE;
1417 }
1418 */
1419
1420 //halbtc8703b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
1421 halbtc8703b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
1422 }
1423
1424 VOID
halbtc8703b2ant_SwMechanism2(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAGCTableShift,IN BOOLEAN bADCBackOff,IN BOOLEAN bSWDACSwing,IN u4Byte dacSwingLvl)1425 halbtc8703b2ant_SwMechanism2(
1426 IN PBTC_COEXIST pBtCoexist,
1427 IN BOOLEAN bAGCTableShift,
1428 IN BOOLEAN bADCBackOff,
1429 IN BOOLEAN bSWDACSwing,
1430 IN u4Byte dacSwingLvl
1431 )
1432 {
1433 //halbtc8703b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
1434 //halbtc8703b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff);
1435 //halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
1436 }
1437
1438 VOID
halbtc8703b2ant_SetAntPath(IN PBTC_COEXIST pBtCoexist,IN u1Byte antPosType,IN BOOLEAN bInitHwCfg,IN BOOLEAN bWifiOff)1439 halbtc8703b2ant_SetAntPath(
1440 IN PBTC_COEXIST pBtCoexist,
1441 IN u1Byte antPosType,
1442 IN BOOLEAN bInitHwCfg,
1443 IN BOOLEAN bWifiOff
1444 )
1445 {
1446 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
1447 u4Byte fwVer=0, u4Tmp=0;
1448 BOOLEAN bPgExtSwitch=FALSE;
1449 BOOLEAN bUseExtSwitch=FALSE;
1450 u1Byte H2C_Parameter[2] ={0};
1451
1452 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
1453 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver
1454
1455 if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch)
1456 bUseExtSwitch = TRUE;
1457
1458 if(bInitHwCfg)
1459 {
1460 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
1461 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
1462 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
1463 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
1464 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
1465
1466 if(fwVer >= 0x180000)
1467 {
1468 /* Use H2C to set GNT_BT to High to avoid A2DP click */
1469 H2C_Parameter[0] = 1;
1470 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1471 }
1472 else
1473 {
1474 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
1475 }
1476
1477 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
1478
1479 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off
1480 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
1481 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off
1482
1483 if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT)
1484 {
1485 //tell firmware "no antenna inverse"
1486 H2C_Parameter[0] = 0;
1487 }
1488 else
1489 {
1490 //tell firmware "antenna inverse"
1491 H2C_Parameter[0] = 1;
1492 }
1493
1494 if (bUseExtSwitch)
1495 {
1496 //ext switch type
1497 H2C_Parameter[1] = 1;
1498 }
1499 else
1500 {
1501 //int switch type
1502 H2C_Parameter[1] = 0;
1503 }
1504 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1505 }
1506 else
1507 {
1508 if(fwVer >= 0x180000)
1509 {
1510 /* Use H2C to set GNT_BT to "Control by PTA"*/
1511 H2C_Parameter[0] = 0;
1512 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1513 }
1514 else
1515 {
1516 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
1517 }
1518 }
1519
1520 // ext switch setting
1521 if(bUseExtSwitch)
1522 {
1523 if (bInitHwCfg)
1524 {
1525 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
1526 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1527 u4Tmp &=~BIT23;
1528 u4Tmp |= BIT24;
1529 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1530 }
1531
1532 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
1533 switch(antPosType)
1534 {
1535 case BTC_ANT_WIFI_AT_MAIN:
1536 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi
1537 break;
1538 case BTC_ANT_WIFI_AT_AUX:
1539 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi
1540 break;
1541 }
1542 }
1543 else // internal switch
1544 {
1545 if (bInitHwCfg)
1546 {
1547 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
1548 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1549 u4Tmp |= BIT23;
1550 u4Tmp &=~BIT24;
1551 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1552 }
1553
1554 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux
1555 switch(antPosType)
1556 {
1557 case BTC_ANT_WIFI_AT_MAIN:
1558 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
1559 break;
1560 case BTC_ANT_WIFI_AT_AUX:
1561 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT
1562 break;
1563 }
1564 }
1565 }
1566
1567 VOID
halbtc8703b2ant_PsTdma(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bTurnOn,IN u1Byte type)1568 halbtc8703b2ant_PsTdma(
1569 IN PBTC_COEXIST pBtCoexist,
1570 IN BOOLEAN bForceExec,
1571 IN BOOLEAN bTurnOn,
1572 IN u1Byte type
1573 )
1574 {
1575 BOOLEAN bTurnOnByCnt=FALSE;
1576 u1Byte psTdmaTypeByCnt=0;
1577 u1Byte wifiRssiState1, btRssiState;
1578
1579
1580 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1581 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1582
1583 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
1584 (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
1585 pCoexDm->bCurPsTdmaOn = bTurnOn;
1586 pCoexDm->curPsTdma = type;
1587
1588 if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn)
1589 {
1590 type = type +100; //for WiFi RSSI low or BT RSSI low
1591 pCoexDm->bIsSwitchTo1dot5Ant = TRUE;
1592 }
1593 else
1594 {
1595 pCoexDm->bIsSwitchTo1dot5Ant = FALSE;
1596 }
1597
1598
1599 if(!bForceExec)
1600 {
1601 if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
1602 (pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
1603 return;
1604 }
1605 if(bTurnOn)
1606 {
1607 switch(type)
1608 {
1609 case 1:
1610 default:
1611 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1612 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
1613 break;
1614 case 2:
1615 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1616 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90);
1617 break;
1618 case 3:
1619 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1620 break;
1621 case 4:
1622 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
1623 break;
1624 case 5:
1625 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1626 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90);
1627 break;
1628 case 6:
1629 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1630 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90);
1631 break;
1632 case 7:
1633 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
1634 break;
1635 case 8:
1636 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
1637 break;
1638 case 9:
1639 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1640 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
1641 break;
1642 case 10:
1643 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1644 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90);
1645 break;
1646 case 11:
1647 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
1648 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1649 break;
1650 case 12:
1651 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1652 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90);
1653 break;
1654 case 13:
1655 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1656 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90);
1657 break;
1658 case 14:
1659 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1660 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90);
1661 break;
1662 case 15:
1663 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
1664 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
1665 break;
1666 case 16:
1667 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
1668 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90);
1669 break;
1670 case 17:
1671 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1672 break;
1673 case 18:
1674 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1675 break;
1676 case 19:
1677 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1678 break;
1679 case 20:
1680 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1681 break;
1682 case 21:
1683 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1684 break;
1685 case 71:
1686 //halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1687
1688 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
1689 break;
1690 case 101:
1691 case 105:
1692 case 171:
1693 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50);
1694 break;
1695 case 102:
1696 case 106:
1697 case 110:
1698 case 114:
1699 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50);
1700 break;
1701 case 103:
1702 case 107:
1703 case 111:
1704 case 115:
1705 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50);
1706 break;
1707 case 104:
1708 case 108:
1709 case 112:
1710 case 116:
1711 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50);
1712 break;
1713 case 109:
1714 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
1715 break;
1716 case 113:
1717 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90);
1718 break;
1719 case 121:
1720 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1721 break;
1722 case 22:
1723 case 122:
1724 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11);
1725 break;
1726 }
1727 }
1728 else
1729 {
1730 // disable PS tdma
1731 switch(type)
1732 {
1733 case 0:
1734 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1735 break;
1736 case 1:
1737 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1738 break;
1739 default:
1740 halbtc8703b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1741 break;
1742 }
1743 }
1744
1745 // update pre state
1746 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1747 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1748 }
1749
1750 VOID
halbtc8703b2ant_PsTdmaCheckForPowerSaveState(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bNewPsState)1751 halbtc8703b2ant_PsTdmaCheckForPowerSaveState(
1752 IN PBTC_COEXIST pBtCoexist,
1753 IN BOOLEAN bNewPsState
1754 )
1755 {
1756 u1Byte lpsMode=0x0;
1757
1758 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode);
1759
1760 if(lpsMode) // already under LPS state
1761 {
1762 if(bNewPsState)
1763 {
1764 // keep state under LPS, do nothing.
1765 }
1766 else
1767 {
1768 // will leave LPS state, turn off psTdma first
1769 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1770 }
1771 }
1772 else // NO PS state
1773 {
1774 if(bNewPsState)
1775 {
1776 // will enter LPS state, turn off psTdma first
1777 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1778 }
1779 else
1780 {
1781 // keep state under NO PS state, do nothing.
1782 }
1783 }
1784 }
1785
1786 VOID
halbtc8703b2ant_PowerSaveState(IN PBTC_COEXIST pBtCoexist,IN u1Byte psType,IN u1Byte lpsVal,IN u1Byte rpwmVal)1787 halbtc8703b2ant_PowerSaveState(
1788 IN PBTC_COEXIST pBtCoexist,
1789 IN u1Byte psType,
1790 IN u1Byte lpsVal,
1791 IN u1Byte rpwmVal
1792 )
1793 {
1794 BOOLEAN bLowPwrDisable=FALSE;
1795
1796 switch(psType)
1797 {
1798 case BTC_PS_WIFI_NATIVE:
1799 // recover to original 32k low power setting
1800 bLowPwrDisable = FALSE;
1801 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1802 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
1803 pCoexSta->bForceLpsOn = FALSE;
1804 break;
1805 case BTC_PS_LPS_ON:
1806 halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE);
1807 halbtc8703b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal);
1808 // when coex force to enter LPS, do not enter 32k low power.
1809 bLowPwrDisable = TRUE;
1810 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1811 // power save must executed before psTdma.
1812 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL);
1813 pCoexSta->bForceLpsOn = TRUE;
1814 break;
1815 case BTC_PS_LPS_OFF:
1816 halbtc8703b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE);
1817 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
1818 pCoexSta->bForceLpsOn = FALSE;
1819 break;
1820 default:
1821 break;
1822 }
1823 }
1824
1825
1826 VOID
halbtc8703b2ant_CoexAllOff(IN PBTC_COEXIST pBtCoexist)1827 halbtc8703b2ant_CoexAllOff(
1828 IN PBTC_COEXIST pBtCoexist
1829 )
1830 {
1831 // fw all off
1832 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1833 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1834 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1835 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1836
1837 // sw all off
1838 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1839 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1840
1841 // hw all off
1842 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1843 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1844 }
1845
1846 VOID
halbtc8703b2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)1847 halbtc8703b2ant_InitCoexDm(
1848 IN PBTC_COEXIST pBtCoexist
1849 )
1850 {
1851 // force to reset coex mechanism
1852 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1853
1854 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1855 halbtc8703b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
1856 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1857 halbtc8703b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
1858
1859 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1860 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1861 }
1862
1863 VOID
halbtc8703b2ant_ActionBtInquiry(IN PBTC_COEXIST pBtCoexist)1864 halbtc8703b2ant_ActionBtInquiry(
1865 IN PBTC_COEXIST pBtCoexist
1866 )
1867 {
1868 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
1869 BOOLEAN bWifiConnected=FALSE;
1870 BOOLEAN bLowPwrDisable=TRUE;
1871 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
1872
1873
1874 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1875 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1876 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1877
1878 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1879 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1880
1881 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
1882 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
1883 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
1884
1885
1886 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1887
1888 if(bScan || bLink || bRoam)
1889 {
1890 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n"));
1891 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1892 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1893 }
1894 else if(bWifiConnected)
1895 {
1896 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n"));
1897 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1898 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1899 }
1900 else
1901 {
1902 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n"));
1903 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1904 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1905 }
1906
1907 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1908 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1909
1910 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1911 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1912 /*
1913 pCoexDm->bNeedRecover0x948 = TRUE;
1914 pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1915
1916 halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE);
1917 */
1918 }
1919
1920
1921 VOID
halbtc8703b2ant_ActionWiFiLinkProcess(IN PBTC_COEXIST pBtCoexist)1922 halbtc8703b2ant_ActionWiFiLinkProcess(
1923 IN PBTC_COEXIST pBtCoexist
1924 )
1925 {
1926 u4Byte u4Tmp;
1927 u1Byte u1Tmpa, u1Tmpb;
1928
1929 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1930 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1931
1932 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1933 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1934
1935
1936 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1937 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
1938 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
1939
1940 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
1941 u4Tmp, u1Tmpa, u1Tmpb));
1942 }
1943
1944 BOOLEAN
halbtc8703b2ant_ActionWifiIdleProcess(IN PBTC_COEXIST pBtCoexist)1945 halbtc8703b2ant_ActionWifiIdleProcess(
1946 IN PBTC_COEXIST pBtCoexist
1947 )
1948 {
1949 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
1950 u4Byte wifiBw;
1951 u1Byte apNum=0;
1952
1953 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1954 //wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1955 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0);
1956 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1957
1958 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
1959
1960 // define the office environment
1961 if(BTC_RSSI_HIGH(wifiRssiState1) &&
1962 (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE))
1963 {
1964
1965 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n"));
1966
1967 halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6);
1968 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1969
1970 // sw all off
1971 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1972 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1973
1974 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1975
1976 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1977 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1978
1979 return TRUE;
1980 }
1981 else
1982 {
1983 halbtc8703b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
1984 return FALSE;
1985 }
1986
1987
1988 }
1989
1990
1991
1992 BOOLEAN
halbtc8703b2ant_IsCommonAction(IN PBTC_COEXIST pBtCoexist)1993 halbtc8703b2ant_IsCommonAction(
1994 IN PBTC_COEXIST pBtCoexist
1995 )
1996 {
1997 u1Byte btRssiState=BTC_RSSI_STATE_HIGH;
1998 BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE;
1999 BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE;
2000 BOOLEAN bAsus8703b=FALSE;
2001
2002 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
2003 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
2004 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
2005
2006 if(!bWifiConnected)
2007 {
2008 bLowPwrDisable = FALSE;
2009 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2010 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2011
2012 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n"));
2013
2014 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2015 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2016
2017 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2018 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2019 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2020 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2021
2022 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2023 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2024
2025 bCommon = TRUE;
2026 }
2027 else
2028 {
2029 if(BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)
2030 {
2031 bLowPwrDisable = FALSE;
2032 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2033 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2034
2035 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
2036
2037 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2038 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2039
2040 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2041 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2042 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
2043 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2044
2045 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2046 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2047
2048 bCommon = TRUE;
2049 }
2050 else if(BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)
2051 {
2052 bLowPwrDisable = TRUE;
2053 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2054
2055 if(bBtHsOn)
2056 return FALSE;
2057 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
2058 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2059
2060 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2061 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2062
2063 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2064 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2065 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
2066 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2067
2068 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2069 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2070
2071 bCommon = TRUE;
2072 }
2073 else
2074 {
2075 bLowPwrDisable = TRUE;
2076 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2077
2078 if(bWifiBusy)
2079 {
2080 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
2081 #if 0
2082 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8703B, &bAsus8703b);
2083 if(!bAsus8703b)
2084 bCommon = FALSE;
2085 else
2086 bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist);
2087 #else
2088 bCommon = FALSE;
2089 #endif
2090 }
2091 else
2092 {
2093 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
2094 //bCommon = FALSE;
2095 bCommon = halbtc8703b2ant_ActionWifiIdleProcess(pBtCoexist);
2096 }
2097 }
2098 }
2099
2100 return bCommon;
2101 }
2102 VOID
halbtc8703b2ant_TdmaDurationAdjust(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bScoHid,IN BOOLEAN bTxPause,IN u1Byte maxInterval)2103 halbtc8703b2ant_TdmaDurationAdjust(
2104 IN PBTC_COEXIST pBtCoexist,
2105 IN BOOLEAN bScoHid,
2106 IN BOOLEAN bTxPause,
2107 IN u1Byte maxInterval
2108 )
2109 {
2110 static s4Byte up,dn,m,n,WaitCount;
2111 s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
2112 u1Byte retryCount=0;
2113
2114 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n"));
2115
2116 if(!pCoexDm->bAutoTdmaAdjust)
2117 {
2118 pCoexDm->bAutoTdmaAdjust = TRUE;
2119 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
2120 {
2121 if(bScoHid)
2122 {
2123 if(bTxPause)
2124 {
2125 if(maxInterval == 1)
2126 {
2127 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2128 pCoexDm->psTdmaDuAdjType = 13;
2129 }
2130 else if(maxInterval == 2)
2131 {
2132 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2133 pCoexDm->psTdmaDuAdjType = 14;
2134 }
2135 else if(maxInterval == 3)
2136 {
2137 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2138 pCoexDm->psTdmaDuAdjType = 15;
2139 }
2140 else
2141 {
2142 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2143 pCoexDm->psTdmaDuAdjType = 15;
2144 }
2145 }
2146 else
2147 {
2148 if(maxInterval == 1)
2149 {
2150 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2151 pCoexDm->psTdmaDuAdjType = 9;
2152 }
2153 else if(maxInterval == 2)
2154 {
2155 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2156 pCoexDm->psTdmaDuAdjType = 10;
2157 }
2158 else if(maxInterval == 3)
2159 {
2160 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2161 pCoexDm->psTdmaDuAdjType = 11;
2162 }
2163 else
2164 {
2165 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2166 pCoexDm->psTdmaDuAdjType = 11;
2167 }
2168 }
2169 }
2170 else
2171 {
2172 if(bTxPause)
2173 {
2174 if(maxInterval == 1)
2175 {
2176 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2177 pCoexDm->psTdmaDuAdjType = 5;
2178 }
2179 else if(maxInterval == 2)
2180 {
2181 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2182 pCoexDm->psTdmaDuAdjType = 6;
2183 }
2184 else if(maxInterval == 3)
2185 {
2186 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2187 pCoexDm->psTdmaDuAdjType = 7;
2188 }
2189 else
2190 {
2191 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2192 pCoexDm->psTdmaDuAdjType = 7;
2193 }
2194 }
2195 else
2196 {
2197 if(maxInterval == 1)
2198 {
2199 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2200 pCoexDm->psTdmaDuAdjType = 1;
2201 }
2202 else if(maxInterval == 2)
2203 {
2204 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2205 pCoexDm->psTdmaDuAdjType = 2;
2206 }
2207 else if(maxInterval == 3)
2208 {
2209 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2210 pCoexDm->psTdmaDuAdjType = 3;
2211 }
2212 else
2213 {
2214 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2215 pCoexDm->psTdmaDuAdjType = 3;
2216 }
2217 }
2218 }
2219 }
2220 //============
2221 up = 0;
2222 dn = 0;
2223 m = 1;
2224 n= 3;
2225 result = 0;
2226 WaitCount = 0;
2227 }
2228 else
2229 {
2230 //accquire the BT TRx retry count from BT_Info byte2
2231 retryCount = pCoexSta->btRetryCnt;
2232 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount));
2233 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n",
2234 up, dn, m, n, WaitCount));
2235 result = 0;
2236 WaitCount++;
2237
2238 if(retryCount == 0) // no retry in the last 2-second duration
2239 {
2240 up++;
2241 dn--;
2242
2243 if (dn <= 0)
2244 dn = 0;
2245
2246 if(up >= n) // if �s�� n ��2�� retry count��0, �h�ռeWiFi duration
2247 {
2248 WaitCount = 0;
2249 n = 3;
2250 up = 0;
2251 dn = 0;
2252 result = 1;
2253 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n"));
2254 }
2255 }
2256 else if (retryCount <= 3) // <=3 retry in the last 2-second duration
2257 {
2258 up--;
2259 dn++;
2260
2261 if (up <= 0)
2262 up = 0;
2263
2264 if (dn == 2) // if �s�� 2 ��2�� retry count< 3, �h�կ�WiFi duration
2265 {
2266 if (WaitCount <= 2)
2267 m++; // �קK�@���b���level���Ӧ^
2268 else
2269 m = 1;
2270
2271 if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
2272 m = 20;
2273
2274 n = 3*m;
2275 up = 0;
2276 dn = 0;
2277 WaitCount = 0;
2278 result = -1;
2279 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
2280 }
2281 }
2282 else //retry count > 3, �u�n1�� retry count > 3, �h�կ�WiFi duration
2283 {
2284 if (WaitCount == 1)
2285 m++; // �קK�@���b���level���Ӧ^
2286 else
2287 m = 1;
2288
2289 if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
2290 m = 20;
2291
2292 n = 3*m;
2293 up = 0;
2294 dn = 0;
2295 WaitCount = 0;
2296 result = -1;
2297 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
2298 }
2299
2300 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval));
2301 if(maxInterval == 1)
2302 {
2303 if(bTxPause)
2304 {
2305 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2306
2307 if(pCoexDm->curPsTdma == 71)
2308 {
2309 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2310 pCoexDm->psTdmaDuAdjType = 5;
2311 }
2312 else if(pCoexDm->curPsTdma == 1)
2313 {
2314 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2315 pCoexDm->psTdmaDuAdjType = 5;
2316 }
2317 else if(pCoexDm->curPsTdma == 2)
2318 {
2319 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2320 pCoexDm->psTdmaDuAdjType = 6;
2321 }
2322 else if(pCoexDm->curPsTdma == 3)
2323 {
2324 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2325 pCoexDm->psTdmaDuAdjType = 7;
2326 }
2327 else if(pCoexDm->curPsTdma == 4)
2328 {
2329 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2330 pCoexDm->psTdmaDuAdjType = 8;
2331 }
2332 if(pCoexDm->curPsTdma == 9)
2333 {
2334 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2335 pCoexDm->psTdmaDuAdjType = 13;
2336 }
2337 else if(pCoexDm->curPsTdma == 10)
2338 {
2339 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2340 pCoexDm->psTdmaDuAdjType = 14;
2341 }
2342 else if(pCoexDm->curPsTdma == 11)
2343 {
2344 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2345 pCoexDm->psTdmaDuAdjType = 15;
2346 }
2347 else if(pCoexDm->curPsTdma == 12)
2348 {
2349 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2350 pCoexDm->psTdmaDuAdjType = 16;
2351 }
2352
2353 if(result == -1)
2354 {
2355 if(pCoexDm->curPsTdma == 5)
2356 {
2357 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2358 pCoexDm->psTdmaDuAdjType = 6;
2359 }
2360 else if(pCoexDm->curPsTdma == 6)
2361 {
2362 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2363 pCoexDm->psTdmaDuAdjType = 7;
2364 }
2365 else if(pCoexDm->curPsTdma == 7)
2366 {
2367 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2368 pCoexDm->psTdmaDuAdjType = 8;
2369 }
2370 else if(pCoexDm->curPsTdma == 13)
2371 {
2372 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2373 pCoexDm->psTdmaDuAdjType = 14;
2374 }
2375 else if(pCoexDm->curPsTdma == 14)
2376 {
2377 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2378 pCoexDm->psTdmaDuAdjType = 15;
2379 }
2380 else if(pCoexDm->curPsTdma == 15)
2381 {
2382 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2383 pCoexDm->psTdmaDuAdjType = 16;
2384 }
2385 }
2386 else if (result == 1)
2387 {
2388 if(pCoexDm->curPsTdma == 8)
2389 {
2390 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2391 pCoexDm->psTdmaDuAdjType = 7;
2392 }
2393 else if(pCoexDm->curPsTdma == 7)
2394 {
2395 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2396 pCoexDm->psTdmaDuAdjType = 6;
2397 }
2398 else if(pCoexDm->curPsTdma == 6)
2399 {
2400 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2401 pCoexDm->psTdmaDuAdjType = 5;
2402 }
2403 else if(pCoexDm->curPsTdma == 16)
2404 {
2405 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2406 pCoexDm->psTdmaDuAdjType = 15;
2407 }
2408 else if(pCoexDm->curPsTdma == 15)
2409 {
2410 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2411 pCoexDm->psTdmaDuAdjType = 14;
2412 }
2413 else if(pCoexDm->curPsTdma == 14)
2414 {
2415 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2416 pCoexDm->psTdmaDuAdjType = 13;
2417 }
2418 }
2419 }
2420 else
2421 {
2422 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2423 if(pCoexDm->curPsTdma == 5)
2424 {
2425 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2426 pCoexDm->psTdmaDuAdjType = 71;
2427 }
2428 else if(pCoexDm->curPsTdma == 6)
2429 {
2430 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2431 pCoexDm->psTdmaDuAdjType = 2;
2432 }
2433 else if(pCoexDm->curPsTdma == 7)
2434 {
2435 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2436 pCoexDm->psTdmaDuAdjType = 3;
2437 }
2438 else if(pCoexDm->curPsTdma == 8)
2439 {
2440 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2441 pCoexDm->psTdmaDuAdjType = 4;
2442 }
2443 if(pCoexDm->curPsTdma == 13)
2444 {
2445 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2446 pCoexDm->psTdmaDuAdjType = 9;
2447 }
2448 else if(pCoexDm->curPsTdma == 14)
2449 {
2450 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2451 pCoexDm->psTdmaDuAdjType = 10;
2452 }
2453 else if(pCoexDm->curPsTdma == 15)
2454 {
2455 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2456 pCoexDm->psTdmaDuAdjType = 11;
2457 }
2458 else if(pCoexDm->curPsTdma == 16)
2459 {
2460 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2461 pCoexDm->psTdmaDuAdjType = 12;
2462 }
2463
2464 if(result == -1)
2465 {
2466 if(pCoexDm->curPsTdma == 71)
2467 {
2468 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2469 pCoexDm->psTdmaDuAdjType = 1;
2470 }
2471 else if(pCoexDm->curPsTdma == 1)
2472 {
2473 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2474 pCoexDm->psTdmaDuAdjType = 2;
2475 }
2476 else if(pCoexDm->curPsTdma == 2)
2477 {
2478 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2479 pCoexDm->psTdmaDuAdjType = 3;
2480 }
2481 else if(pCoexDm->curPsTdma == 3)
2482 {
2483 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2484 pCoexDm->psTdmaDuAdjType = 4;
2485 }
2486 else if(pCoexDm->curPsTdma == 9)
2487 {
2488 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2489 pCoexDm->psTdmaDuAdjType = 10;
2490 }
2491 else if(pCoexDm->curPsTdma == 10)
2492 {
2493 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2494 pCoexDm->psTdmaDuAdjType = 11;
2495 }
2496 else if(pCoexDm->curPsTdma == 11)
2497 {
2498 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2499 pCoexDm->psTdmaDuAdjType = 12;
2500 }
2501 }
2502 else if (result == 1)
2503 {
2504 if(pCoexDm->curPsTdma == 4)
2505 {
2506 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2507 pCoexDm->psTdmaDuAdjType = 3;
2508 }
2509 else if(pCoexDm->curPsTdma == 3)
2510 {
2511 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2512 pCoexDm->psTdmaDuAdjType = 2;
2513 }
2514 else if(pCoexDm->curPsTdma == 2)
2515 {
2516 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2517 pCoexDm->psTdmaDuAdjType = 1;
2518 }
2519 else if(pCoexDm->curPsTdma == 1)
2520 {
2521 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2522 pCoexDm->psTdmaDuAdjType = 71;
2523 }
2524 else if(pCoexDm->curPsTdma == 12)
2525 {
2526 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2527 pCoexDm->psTdmaDuAdjType = 11;
2528 }
2529 else if(pCoexDm->curPsTdma == 11)
2530 {
2531 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2532 pCoexDm->psTdmaDuAdjType = 10;
2533 }
2534 else if(pCoexDm->curPsTdma == 10)
2535 {
2536 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2537 pCoexDm->psTdmaDuAdjType = 9;
2538 }
2539 }
2540 }
2541 }
2542 else if(maxInterval == 2)
2543 {
2544 if(bTxPause)
2545 {
2546 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2547 if(pCoexDm->curPsTdma == 1)
2548 {
2549 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2550 pCoexDm->psTdmaDuAdjType = 6;
2551 }
2552 else if(pCoexDm->curPsTdma == 2)
2553 {
2554 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2555 pCoexDm->psTdmaDuAdjType = 6;
2556 }
2557 else if(pCoexDm->curPsTdma == 3)
2558 {
2559 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2560 pCoexDm->psTdmaDuAdjType = 7;
2561 }
2562 else if(pCoexDm->curPsTdma == 4)
2563 {
2564 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2565 pCoexDm->psTdmaDuAdjType = 8;
2566 }
2567 if(pCoexDm->curPsTdma == 9)
2568 {
2569 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2570 pCoexDm->psTdmaDuAdjType = 14;
2571 }
2572 else if(pCoexDm->curPsTdma == 10)
2573 {
2574 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2575 pCoexDm->psTdmaDuAdjType = 14;
2576 }
2577 else if(pCoexDm->curPsTdma == 11)
2578 {
2579 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2580 pCoexDm->psTdmaDuAdjType = 15;
2581 }
2582 else if(pCoexDm->curPsTdma == 12)
2583 {
2584 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2585 pCoexDm->psTdmaDuAdjType = 16;
2586 }
2587 if(result == -1)
2588 {
2589 if(pCoexDm->curPsTdma == 5)
2590 {
2591 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2592 pCoexDm->psTdmaDuAdjType = 6;
2593 }
2594 else if(pCoexDm->curPsTdma == 6)
2595 {
2596 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2597 pCoexDm->psTdmaDuAdjType = 7;
2598 }
2599 else if(pCoexDm->curPsTdma == 7)
2600 {
2601 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2602 pCoexDm->psTdmaDuAdjType = 8;
2603 }
2604 else if(pCoexDm->curPsTdma == 13)
2605 {
2606 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2607 pCoexDm->psTdmaDuAdjType = 14;
2608 }
2609 else if(pCoexDm->curPsTdma == 14)
2610 {
2611 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2612 pCoexDm->psTdmaDuAdjType = 15;
2613 }
2614 else if(pCoexDm->curPsTdma == 15)
2615 {
2616 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2617 pCoexDm->psTdmaDuAdjType = 16;
2618 }
2619 }
2620 else if (result == 1)
2621 {
2622 if(pCoexDm->curPsTdma == 8)
2623 {
2624 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2625 pCoexDm->psTdmaDuAdjType = 7;
2626 }
2627 else if(pCoexDm->curPsTdma == 7)
2628 {
2629 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2630 pCoexDm->psTdmaDuAdjType = 6;
2631 }
2632 else if(pCoexDm->curPsTdma == 6)
2633 {
2634 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2635 pCoexDm->psTdmaDuAdjType = 6;
2636 }
2637 else if(pCoexDm->curPsTdma == 16)
2638 {
2639 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2640 pCoexDm->psTdmaDuAdjType = 15;
2641 }
2642 else if(pCoexDm->curPsTdma == 15)
2643 {
2644 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2645 pCoexDm->psTdmaDuAdjType = 14;
2646 }
2647 else if(pCoexDm->curPsTdma == 14)
2648 {
2649 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2650 pCoexDm->psTdmaDuAdjType = 14;
2651 }
2652 }
2653 }
2654 else
2655 {
2656 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2657 if(pCoexDm->curPsTdma == 5)
2658 {
2659 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2660 pCoexDm->psTdmaDuAdjType = 2;
2661 }
2662 else if(pCoexDm->curPsTdma == 6)
2663 {
2664 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2665 pCoexDm->psTdmaDuAdjType = 2;
2666 }
2667 else if(pCoexDm->curPsTdma == 7)
2668 {
2669 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2670 pCoexDm->psTdmaDuAdjType = 3;
2671 }
2672 else if(pCoexDm->curPsTdma == 8)
2673 {
2674 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2675 pCoexDm->psTdmaDuAdjType = 4;
2676 }
2677 if(pCoexDm->curPsTdma == 13)
2678 {
2679 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2680 pCoexDm->psTdmaDuAdjType = 10;
2681 }
2682 else if(pCoexDm->curPsTdma == 14)
2683 {
2684 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2685 pCoexDm->psTdmaDuAdjType = 10;
2686 }
2687 else if(pCoexDm->curPsTdma == 15)
2688 {
2689 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2690 pCoexDm->psTdmaDuAdjType = 11;
2691 }
2692 else if(pCoexDm->curPsTdma == 16)
2693 {
2694 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2695 pCoexDm->psTdmaDuAdjType = 12;
2696 }
2697 if(result == -1)
2698 {
2699 if(pCoexDm->curPsTdma == 1)
2700 {
2701 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2702 pCoexDm->psTdmaDuAdjType = 2;
2703 }
2704 else if(pCoexDm->curPsTdma == 2)
2705 {
2706 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2707 pCoexDm->psTdmaDuAdjType = 3;
2708 }
2709 else if(pCoexDm->curPsTdma == 3)
2710 {
2711 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2712 pCoexDm->psTdmaDuAdjType = 4;
2713 }
2714 else if(pCoexDm->curPsTdma == 9)
2715 {
2716 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2717 pCoexDm->psTdmaDuAdjType = 10;
2718 }
2719 else if(pCoexDm->curPsTdma == 10)
2720 {
2721 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2722 pCoexDm->psTdmaDuAdjType = 11;
2723 }
2724 else if(pCoexDm->curPsTdma == 11)
2725 {
2726 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2727 pCoexDm->psTdmaDuAdjType = 12;
2728 }
2729 }
2730 else if (result == 1)
2731 {
2732 if(pCoexDm->curPsTdma == 4)
2733 {
2734 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2735 pCoexDm->psTdmaDuAdjType = 3;
2736 }
2737 else if(pCoexDm->curPsTdma == 3)
2738 {
2739 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2740 pCoexDm->psTdmaDuAdjType = 2;
2741 }
2742 else if(pCoexDm->curPsTdma == 2)
2743 {
2744 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2745 pCoexDm->psTdmaDuAdjType = 2;
2746 }
2747 else if(pCoexDm->curPsTdma == 12)
2748 {
2749 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2750 pCoexDm->psTdmaDuAdjType = 11;
2751 }
2752 else if(pCoexDm->curPsTdma == 11)
2753 {
2754 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2755 pCoexDm->psTdmaDuAdjType = 10;
2756 }
2757 else if(pCoexDm->curPsTdma == 10)
2758 {
2759 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2760 pCoexDm->psTdmaDuAdjType = 10;
2761 }
2762 }
2763 }
2764 }
2765 else if(maxInterval == 3)
2766 {
2767 if(bTxPause)
2768 {
2769 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2770 if(pCoexDm->curPsTdma == 1)
2771 {
2772 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2773 pCoexDm->psTdmaDuAdjType = 7;
2774 }
2775 else if(pCoexDm->curPsTdma == 2)
2776 {
2777 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2778 pCoexDm->psTdmaDuAdjType = 7;
2779 }
2780 else if(pCoexDm->curPsTdma == 3)
2781 {
2782 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2783 pCoexDm->psTdmaDuAdjType = 7;
2784 }
2785 else if(pCoexDm->curPsTdma == 4)
2786 {
2787 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2788 pCoexDm->psTdmaDuAdjType = 8;
2789 }
2790 if(pCoexDm->curPsTdma == 9)
2791 {
2792 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2793 pCoexDm->psTdmaDuAdjType = 15;
2794 }
2795 else if(pCoexDm->curPsTdma == 10)
2796 {
2797 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2798 pCoexDm->psTdmaDuAdjType = 15;
2799 }
2800 else if(pCoexDm->curPsTdma == 11)
2801 {
2802 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2803 pCoexDm->psTdmaDuAdjType = 15;
2804 }
2805 else if(pCoexDm->curPsTdma == 12)
2806 {
2807 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2808 pCoexDm->psTdmaDuAdjType = 16;
2809 }
2810 if(result == -1)
2811 {
2812 if(pCoexDm->curPsTdma == 5)
2813 {
2814 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2815 pCoexDm->psTdmaDuAdjType = 7;
2816 }
2817 else if(pCoexDm->curPsTdma == 6)
2818 {
2819 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2820 pCoexDm->psTdmaDuAdjType = 7;
2821 }
2822 else if(pCoexDm->curPsTdma == 7)
2823 {
2824 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2825 pCoexDm->psTdmaDuAdjType = 8;
2826 }
2827 else if(pCoexDm->curPsTdma == 13)
2828 {
2829 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2830 pCoexDm->psTdmaDuAdjType = 15;
2831 }
2832 else if(pCoexDm->curPsTdma == 14)
2833 {
2834 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2835 pCoexDm->psTdmaDuAdjType = 15;
2836 }
2837 else if(pCoexDm->curPsTdma == 15)
2838 {
2839 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2840 pCoexDm->psTdmaDuAdjType = 16;
2841 }
2842 }
2843 else if (result == 1)
2844 {
2845 if(pCoexDm->curPsTdma == 8)
2846 {
2847 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2848 pCoexDm->psTdmaDuAdjType = 7;
2849 }
2850 else if(pCoexDm->curPsTdma == 7)
2851 {
2852 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2853 pCoexDm->psTdmaDuAdjType = 7;
2854 }
2855 else if(pCoexDm->curPsTdma == 6)
2856 {
2857 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2858 pCoexDm->psTdmaDuAdjType = 7;
2859 }
2860 else if(pCoexDm->curPsTdma == 16)
2861 {
2862 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2863 pCoexDm->psTdmaDuAdjType = 15;
2864 }
2865 else if(pCoexDm->curPsTdma == 15)
2866 {
2867 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2868 pCoexDm->psTdmaDuAdjType = 15;
2869 }
2870 else if(pCoexDm->curPsTdma == 14)
2871 {
2872 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2873 pCoexDm->psTdmaDuAdjType = 15;
2874 }
2875 }
2876 }
2877 else
2878 {
2879 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2880 if(pCoexDm->curPsTdma == 5)
2881 {
2882 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2883 pCoexDm->psTdmaDuAdjType = 3;
2884 }
2885 else if(pCoexDm->curPsTdma == 6)
2886 {
2887 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2888 pCoexDm->psTdmaDuAdjType = 3;
2889 }
2890 else if(pCoexDm->curPsTdma == 7)
2891 {
2892 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2893 pCoexDm->psTdmaDuAdjType = 3;
2894 }
2895 else if(pCoexDm->curPsTdma == 8)
2896 {
2897 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2898 pCoexDm->psTdmaDuAdjType = 4;
2899 }
2900 if(pCoexDm->curPsTdma == 13)
2901 {
2902 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2903 pCoexDm->psTdmaDuAdjType = 11;
2904 }
2905 else if(pCoexDm->curPsTdma == 14)
2906 {
2907 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2908 pCoexDm->psTdmaDuAdjType = 11;
2909 }
2910 else if(pCoexDm->curPsTdma == 15)
2911 {
2912 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2913 pCoexDm->psTdmaDuAdjType = 11;
2914 }
2915 else if(pCoexDm->curPsTdma == 16)
2916 {
2917 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2918 pCoexDm->psTdmaDuAdjType = 12;
2919 }
2920 if(result == -1)
2921 {
2922 if(pCoexDm->curPsTdma == 1)
2923 {
2924 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2925 pCoexDm->psTdmaDuAdjType = 3;
2926 }
2927 else if(pCoexDm->curPsTdma == 2)
2928 {
2929 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2930 pCoexDm->psTdmaDuAdjType = 3;
2931 }
2932 else if(pCoexDm->curPsTdma == 3)
2933 {
2934 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2935 pCoexDm->psTdmaDuAdjType = 4;
2936 }
2937 else if(pCoexDm->curPsTdma == 9)
2938 {
2939 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2940 pCoexDm->psTdmaDuAdjType = 11;
2941 }
2942 else if(pCoexDm->curPsTdma == 10)
2943 {
2944 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2945 pCoexDm->psTdmaDuAdjType = 11;
2946 }
2947 else if(pCoexDm->curPsTdma == 11)
2948 {
2949 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2950 pCoexDm->psTdmaDuAdjType = 12;
2951 }
2952 }
2953 else if (result == 1)
2954 {
2955 if(pCoexDm->curPsTdma == 4)
2956 {
2957 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2958 pCoexDm->psTdmaDuAdjType = 3;
2959 }
2960 else if(pCoexDm->curPsTdma == 3)
2961 {
2962 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2963 pCoexDm->psTdmaDuAdjType = 3;
2964 }
2965 else if(pCoexDm->curPsTdma == 2)
2966 {
2967 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2968 pCoexDm->psTdmaDuAdjType = 3;
2969 }
2970 else if(pCoexDm->curPsTdma == 12)
2971 {
2972 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2973 pCoexDm->psTdmaDuAdjType = 11;
2974 }
2975 else if(pCoexDm->curPsTdma == 11)
2976 {
2977 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2978 pCoexDm->psTdmaDuAdjType = 11;
2979 }
2980 else if(pCoexDm->curPsTdma == 10)
2981 {
2982 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2983 pCoexDm->psTdmaDuAdjType = 11;
2984 }
2985 }
2986 }
2987 }
2988 }
2989
2990 // if current PsTdma not match with the recorded one (when scan, dhcp...),
2991 // then we have to adjust it back to the previous record one.
2992 if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType)
2993 {
2994 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
2995 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n",
2996 pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType));
2997
2998 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2999 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
3000 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
3001
3002 if( !bScan && !bLink && !bRoam)
3003 {
3004 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType);
3005 }
3006 else
3007 {
3008 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
3009 }
3010 }
3011 }
3012
3013 // SCO only or SCO+PAN(HS)
3014 VOID
halbtc8703b2ant_ActionSco(IN PBTC_COEXIST pBtCoexist)3015 halbtc8703b2ant_ActionSco(
3016 IN PBTC_COEXIST pBtCoexist
3017 )
3018 {
3019 u1Byte wifiRssiState, btRssiState;
3020 u4Byte wifiBw;
3021
3022 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3023 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3024
3025 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3026
3027 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3028
3029 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
3030
3031 if(BTC_RSSI_HIGH(btRssiState))
3032 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3033 else
3034 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3035
3036 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3037
3038 if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode
3039 {
3040 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
3041 }
3042 else //for SCO quality & wifi performance balance at 11n mode
3043 {
3044 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
3045 }
3046
3047 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3048 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
3049
3050 // sw mechanism
3051 if(BTC_WIFI_BW_HT40 == wifiBw)
3052 {
3053 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3054 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3055 {
3056 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3057 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
3058 }
3059 else
3060 {
3061 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3062 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
3063 }
3064 }
3065 else
3066 {
3067 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3068 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3069 {
3070 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3071 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
3072 }
3073 else
3074 {
3075 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3076 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
3077 }
3078 }
3079 }
3080
3081
3082 VOID
halbtc8703b2ant_ActionHid(IN PBTC_COEXIST pBtCoexist)3083 halbtc8703b2ant_ActionHid(
3084 IN PBTC_COEXIST pBtCoexist
3085 )
3086 {
3087 u1Byte wifiRssiState, btRssiState;
3088 u4Byte wifiBw;
3089
3090 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3091 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3092
3093 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3094
3095 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3096
3097 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3098
3099 if(BTC_RSSI_HIGH(btRssiState))
3100 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3101 else
3102 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3103
3104 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3105
3106 if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3107 {
3108 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3109 }
3110 else //for HID quality & wifi performance balance at 11n mode
3111 {
3112 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
3113 }
3114
3115 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3116
3117 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3118 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3119 {
3120 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
3121 }
3122 else
3123 {
3124 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
3125 }
3126
3127 // sw mechanism
3128 if(BTC_WIFI_BW_HT40 == wifiBw)
3129 {
3130 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3131 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3132 {
3133 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3134 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3135 }
3136 else
3137 {
3138 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3139 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3140 }
3141 }
3142 else
3143 {
3144 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3145 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3146 {
3147 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3148 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3149 }
3150 else
3151 {
3152 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3153 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3154 }
3155 }
3156 }
3157
3158 //A2DP only / PAN(EDR) only/ A2DP+PAN(HS)
3159 VOID
halbtc8703b2ant_ActionA2dp(IN PBTC_COEXIST pBtCoexist)3160 halbtc8703b2ant_ActionA2dp(
3161 IN PBTC_COEXIST pBtCoexist
3162 )
3163 {
3164 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3165 u4Byte wifiBw;
3166 u1Byte apNum=0;
3167
3168 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3169 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3170 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3171
3172 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3173
3174 // define the office environment
3175 if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3176 {
3177 //DbgPrint(" AP#>10(%d)\n", apNum);
3178 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3179
3180 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3181 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3182 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3183 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3184
3185 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3186
3187 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3188 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3189
3190 // sw mechanism
3191 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3192 if(BTC_WIFI_BW_HT40 == wifiBw)
3193 {
3194 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3195 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
3196 }
3197 else
3198 {
3199 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3200 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
3201 }
3202 return;
3203
3204 }
3205
3206 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3207 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3208
3209 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3210
3211 if(BTC_RSSI_HIGH(btRssiState))
3212 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3213 else
3214 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3215
3216
3217 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3218 {
3219 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3220 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3221 }
3222 else
3223 {
3224 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3225 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3226 }
3227
3228
3229 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3230 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3231 {
3232 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
3233 }
3234 else
3235 {
3236 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
3237 }
3238
3239 // sw mechanism
3240 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3241 if(BTC_WIFI_BW_HT40 == wifiBw)
3242 {
3243 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3244 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3245 {
3246 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3247 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3248 }
3249 else
3250 {
3251 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3252 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3253 }
3254 }
3255 else
3256 {
3257 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3258 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3259 {
3260 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3261 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3262 }
3263 else
3264 {
3265 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3266 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3267 }
3268 }
3269 }
3270
3271 VOID
halbtc8703b2ant_ActionA2dpPanHs(IN PBTC_COEXIST pBtCoexist)3272 halbtc8703b2ant_ActionA2dpPanHs(
3273 IN PBTC_COEXIST pBtCoexist
3274 )
3275 {
3276 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3277 u4Byte wifiBw;
3278
3279 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3280 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3281 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3282
3283 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3284
3285 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3286
3287 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3288
3289 if(BTC_RSSI_HIGH(btRssiState))
3290 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3291 else
3292 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3293
3294 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3295 {
3296 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3297 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3298 }
3299 else
3300 {
3301 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3302 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3303 }
3304
3305 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
3306
3307 // sw mechanism
3308 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3309 if(BTC_WIFI_BW_HT40 == wifiBw)
3310 {
3311 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3312 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3313 {
3314 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3315 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3316 }
3317 else
3318 {
3319 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3320 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3321 }
3322 }
3323 else
3324 {
3325 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3326 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3327 {
3328 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3329 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3330 }
3331 else
3332 {
3333 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3334 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3335 }
3336 }
3337 }
3338
3339 VOID
halbtc8703b2ant_ActionPanEdr(IN PBTC_COEXIST pBtCoexist)3340 halbtc8703b2ant_ActionPanEdr(
3341 IN PBTC_COEXIST pBtCoexist
3342 )
3343 {
3344 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
3345 u4Byte wifiBw;
3346
3347 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3348 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3349 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3350
3351 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3352
3353 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3354
3355 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3356
3357 if(BTC_RSSI_HIGH(btRssiState))
3358 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3359 else
3360 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3361
3362 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3363 {
3364 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
3365 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3366 }
3367 else
3368 {
3369 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3370 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3371 }
3372
3373 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3374 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3375 {
3376 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
3377 }
3378 else
3379 {
3380 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
3381 }
3382
3383 // sw mechanism
3384 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3385 if(BTC_WIFI_BW_HT40 == wifiBw)
3386 {
3387 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3388 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3389 {
3390 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3391 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3392 }
3393 else
3394 {
3395 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3396 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3397 }
3398 }
3399 else
3400 {
3401 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3402 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3403 {
3404 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3405 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3406 }
3407 else
3408 {
3409 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3410 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3411 }
3412 }
3413 }
3414
3415
3416 //PAN(HS) only
3417 VOID
halbtc8703b2ant_ActionPanHs(IN PBTC_COEXIST pBtCoexist)3418 halbtc8703b2ant_ActionPanHs(
3419 IN PBTC_COEXIST pBtCoexist
3420 )
3421 {
3422 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3423 u4Byte wifiBw;
3424
3425 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3426 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3427 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3428
3429 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3430
3431 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3432
3433 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3434
3435 if(BTC_RSSI_HIGH(btRssiState))
3436 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3437 else
3438 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3439
3440 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3441
3442 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3443 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3444
3445 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3446 if(BTC_WIFI_BW_HT40 == wifiBw)
3447 {
3448 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3449 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3450 {
3451 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3452 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3453 }
3454 else
3455 {
3456 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3457 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3458 }
3459 }
3460 else
3461 {
3462 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3463 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3464 {
3465 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3466 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3467 }
3468 else
3469 {
3470 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3471 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3472 }
3473 }
3474 }
3475
3476 //PAN(EDR)+A2DP
3477 VOID
halbtc8703b2ant_ActionPanEdrA2dp(IN PBTC_COEXIST pBtCoexist)3478 halbtc8703b2ant_ActionPanEdrA2dp(
3479 IN PBTC_COEXIST pBtCoexist
3480 )
3481 {
3482 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3483 u4Byte wifiBw;
3484
3485 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3486 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3487 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3488
3489 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3490
3491 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3492
3493 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3494
3495 if(BTC_RSSI_HIGH(btRssiState))
3496 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3497 else
3498 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3499
3500 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3501 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3502 else
3503 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3504
3505 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3506
3507 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3508 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3509 {
3510 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
3511
3512 if(BTC_WIFI_BW_HT40 == wifiBw)
3513 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3514 else
3515 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3516 }
3517 else
3518 {
3519 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3520 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3521 }
3522
3523 // sw mechanism
3524 if(BTC_WIFI_BW_HT40 == wifiBw)
3525 {
3526 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3527 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3528 {
3529 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3530 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3531 }
3532 else
3533 {
3534 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3535 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3536 }
3537 }
3538 else
3539 {
3540 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3541 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3542 {
3543 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3544 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3545 }
3546 else
3547 {
3548 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3549 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3550 }
3551 }
3552 }
3553
3554 VOID
halbtc8703b2ant_ActionPanEdrHid(IN PBTC_COEXIST pBtCoexist)3555 halbtc8703b2ant_ActionPanEdrHid(
3556 IN PBTC_COEXIST pBtCoexist
3557 )
3558 {
3559 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3560 u4Byte wifiBw;
3561
3562 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3563 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3564 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3565 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3566
3567 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3568
3569 if(BTC_RSSI_HIGH(btRssiState))
3570 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3571 else
3572 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3573
3574 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3575 {
3576 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3577 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3578 }
3579 else
3580 {
3581 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3582 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3583 }
3584
3585 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3586 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3587 {
3588 if(BTC_WIFI_BW_HT40 == wifiBw)
3589 {
3590 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
3591 //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
3592 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
3593 }
3594 else
3595 {
3596 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3597 //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3598 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3599 }
3600 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
3601 }
3602 else
3603 {
3604 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3605 //halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3606 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3607 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3608 }
3609
3610 // sw mechanism
3611 if(BTC_WIFI_BW_HT40 == wifiBw)
3612 {
3613 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3614 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3615 {
3616 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3617 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3618 }
3619 else
3620 {
3621 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3622 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3623 }
3624 }
3625 else
3626 {
3627 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3628 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3629 {
3630 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3631 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3632 }
3633 else
3634 {
3635 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3636 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3637 }
3638 }
3639 }
3640
3641 // HID+A2DP+PAN(EDR)
3642 VOID
halbtc8703b2ant_ActionHidA2dpPanEdr(IN PBTC_COEXIST pBtCoexist)3643 halbtc8703b2ant_ActionHidA2dpPanEdr(
3644 IN PBTC_COEXIST pBtCoexist
3645 )
3646 {
3647 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
3648 u4Byte wifiBw;
3649
3650 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3651 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3652 btRssiState = halbtc8703b2ant_BtRssiState(2, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3653
3654 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3655
3656 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3657
3658 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3659
3660 if(BTC_RSSI_HIGH(btRssiState))
3661 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3662 else
3663 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3664
3665 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3666 {
3667 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3668 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3669 }
3670 else
3671 {
3672 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3673 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3674 }
3675
3676 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3677
3678 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3679 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3680 {
3681 if(BTC_WIFI_BW_HT40 == wifiBw)
3682 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3683 else
3684 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3685 }
3686 else
3687 {
3688 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3689 }
3690
3691 // sw mechanism
3692 if(BTC_WIFI_BW_HT40 == wifiBw)
3693 {
3694 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3695 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3696 {
3697 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3698 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3699 }
3700 else
3701 {
3702 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3703 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3704 }
3705 }
3706 else
3707 {
3708 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3709 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3710 {
3711 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3712 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3713 }
3714 else
3715 {
3716 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3717 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3718 }
3719 }
3720 }
3721
3722 VOID
halbtc8703b2ant_ActionHidA2dp(IN PBTC_COEXIST pBtCoexist)3723 halbtc8703b2ant_ActionHidA2dp(
3724 IN PBTC_COEXIST pBtCoexist
3725 )
3726 {
3727 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3728 u4Byte wifiBw;
3729 u1Byte apNum=0;
3730
3731 wifiRssiState = halbtc8703b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3732 //btRssiState = halbtc8703b2ant_BtRssiState(2, 29, 0);
3733 wifiRssiState1 = halbtc8703b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8703B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3734 btRssiState = halbtc8703b2ant_BtRssiState(3, BT_8703B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37);
3735
3736 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3737
3738 halbtc8703b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5);
3739
3740 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3741
3742 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3743 if(BTC_WIFI_BW_LEGACY == wifiBw)
3744 {
3745 if(BTC_RSSI_HIGH(btRssiState))
3746 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3747 else if(BTC_RSSI_MEDIUM(btRssiState))
3748 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3749 else
3750 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3751 }
3752 else
3753 { // only 802.11N mode we have to dec bt power to 4 degree
3754 if(BTC_RSSI_HIGH(btRssiState))
3755 {
3756 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3757 // need to check ap Number of Not
3758 if(apNum < 10)
3759 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
3760 else
3761 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3762 }
3763 else if(BTC_RSSI_MEDIUM(btRssiState))
3764 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3765 else
3766 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3767 }
3768
3769 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3770 {
3771 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3772 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3773 }
3774 else
3775 {
3776 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3777 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3778 }
3779
3780 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3781 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3782 {
3783 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3784 }
3785 else
3786 {
3787 halbtc8703b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3788 }
3789
3790 // sw mechanism
3791 if(BTC_WIFI_BW_HT40 == wifiBw)
3792 {
3793 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3794 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3795 {
3796 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3797 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3798 }
3799 else
3800 {
3801 halbtc8703b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3802 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3803 }
3804 }
3805 else
3806 {
3807 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3808 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3809 {
3810 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3811 halbtc8703b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3812 }
3813 else
3814 {
3815 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3816 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3817 }
3818 }
3819 }
3820
3821 VOID
halbtc8703b2ant_ActionBtWhckTest(IN PBTC_COEXIST pBtCoexist)3822 halbtc8703b2ant_ActionBtWhckTest(
3823 IN PBTC_COEXIST pBtCoexist
3824 )
3825 {
3826 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3827
3828 // sw all off
3829 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3830 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3831
3832 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3833
3834 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3835 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3836 }
3837
3838 VOID
halbtc8703b2ant_ActionWifiMultiPort(IN PBTC_COEXIST pBtCoexist)3839 halbtc8703b2ant_ActionWifiMultiPort(
3840 IN PBTC_COEXIST pBtCoexist
3841 )
3842 {
3843 halbtc8703b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3844 halbtc8703b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3845
3846 // sw all off
3847 halbtc8703b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3848 halbtc8703b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3849
3850 // hw all off
3851 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3852 halbtc8703b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3853
3854 halbtc8703b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3855 halbtc8703b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3856 }
3857
3858 VOID
halbtc8703b2ant_RunCoexistMechanism(IN PBTC_COEXIST pBtCoexist)3859 halbtc8703b2ant_RunCoexistMechanism(
3860 IN PBTC_COEXIST pBtCoexist
3861 )
3862 {
3863 BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE;
3864 u1Byte btInfoOriginal=0, btRetryCnt=0;
3865 u1Byte algorithm=0;
3866 u4Byte numOfWifiLink=0;
3867 u4Byte wifiLinkStatus=0;
3868 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
3869 BOOLEAN bMiracastPlusBt=FALSE;
3870 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
3871
3872 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n"));
3873
3874 if(pBtCoexist->bManualControl)
3875 {
3876 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
3877 return;
3878 }
3879
3880 if(pCoexSta->bUnderIps)
3881 {
3882 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n"));
3883 return;
3884 }
3885
3886 if(pCoexSta->bBtWhckTest)
3887 {
3888 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n"));
3889 halbtc8703b2ant_ActionBtWhckTest(pBtCoexist);
3890 return;
3891 }
3892
3893 algorithm = halbtc8703b2ant_ActionAlgorithm(pBtCoexist);
3894 if(pCoexSta->bC2hBtInquiryPage && (BT_8703B_2ANT_COEX_ALGO_PANHS!=algorithm))
3895 {
3896 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n"));
3897 halbtc8703b2ant_ActionBtInquiry(pBtCoexist);
3898 return;
3899 }
3900 else
3901 {
3902 /*
3903 if(pCoexDm->bNeedRecover0x948)
3904 {
3905 pCoexDm->bNeedRecover0x948 = FALSE;
3906 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
3907 }
3908 */
3909 }
3910
3911 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
3912 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
3913 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
3914
3915 if(bScan || bLink || bRoam)
3916 {
3917 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n"));
3918 halbtc8703b2ant_ActionWiFiLinkProcess(pBtCoexist);
3919 return;
3920 }
3921
3922 //for P2P
3923
3924 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus);
3925 numOfWifiLink = wifiLinkStatus>>16;
3926
3927 if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED))
3928 {
3929 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) );
3930
3931 if(pBtLinkInfo->bBtLinkExist)
3932 {
3933 bMiracastPlusBt = TRUE;
3934 }
3935 else
3936 {
3937 bMiracastPlusBt = FALSE;
3938 }
3939
3940 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
3941 halbtc8703b2ant_ActionWifiMultiPort(pBtCoexist);
3942
3943 return;
3944 }
3945 else
3946 {
3947 bMiracastPlusBt = FALSE;
3948 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
3949 }
3950
3951 pCoexDm->curAlgorithm = algorithm;
3952 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm));
3953
3954 if(halbtc8703b2ant_IsCommonAction(pBtCoexist))
3955 {
3956 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n"));
3957 pCoexDm->bAutoTdmaAdjust = FALSE;
3958 }
3959 else
3960 {
3961 if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm)
3962 {
3963 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n",
3964 pCoexDm->preAlgorithm, pCoexDm->curAlgorithm));
3965 pCoexDm->bAutoTdmaAdjust = FALSE;
3966 }
3967 switch(pCoexDm->curAlgorithm)
3968 {
3969 case BT_8703B_2ANT_COEX_ALGO_SCO:
3970 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
3971 halbtc8703b2ant_ActionSco(pBtCoexist);
3972 break;
3973 case BT_8703B_2ANT_COEX_ALGO_HID:
3974 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
3975 halbtc8703b2ant_ActionHid(pBtCoexist);
3976 break;
3977 case BT_8703B_2ANT_COEX_ALGO_A2DP:
3978 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
3979 halbtc8703b2ant_ActionA2dp(pBtCoexist);
3980 break;
3981 case BT_8703B_2ANT_COEX_ALGO_A2DP_PANHS:
3982 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
3983 halbtc8703b2ant_ActionA2dpPanHs(pBtCoexist);
3984 break;
3985 case BT_8703B_2ANT_COEX_ALGO_PANEDR:
3986 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
3987 halbtc8703b2ant_ActionPanEdr(pBtCoexist);
3988 break;
3989 case BT_8703B_2ANT_COEX_ALGO_PANHS:
3990 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
3991 halbtc8703b2ant_ActionPanHs(pBtCoexist);
3992 break;
3993 case BT_8703B_2ANT_COEX_ALGO_PANEDR_A2DP:
3994 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
3995 halbtc8703b2ant_ActionPanEdrA2dp(pBtCoexist);
3996 break;
3997 case BT_8703B_2ANT_COEX_ALGO_PANEDR_HID:
3998 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
3999 halbtc8703b2ant_ActionPanEdrHid(pBtCoexist);
4000 break;
4001 case BT_8703B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
4002 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
4003 halbtc8703b2ant_ActionHidA2dpPanEdr(pBtCoexist);
4004 break;
4005 case BT_8703B_2ANT_COEX_ALGO_HID_A2DP:
4006 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
4007 halbtc8703b2ant_ActionHidA2dp(pBtCoexist);
4008 break;
4009 default:
4010 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
4011 halbtc8703b2ant_CoexAllOff(pBtCoexist);
4012 break;
4013 }
4014 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
4015 }
4016 }
4017
4018 VOID
halbtc8703b2ant_WifiOffHwCfg(IN PBTC_COEXIST pBtCoexist)4019 halbtc8703b2ant_WifiOffHwCfg(
4020 IN PBTC_COEXIST pBtCoexist
4021 )
4022 {
4023 BOOLEAN bIsInMpMode = FALSE;
4024 u1Byte H2C_Parameter[2] ={0};
4025 u4Byte fwVer=0;
4026
4027 // set wlan_act to low
4028 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
4029
4030 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1
4031 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4032 if(fwVer >= 0x180000)
4033 {
4034 /* Use H2C to set GNT_BT to HIGH */
4035 H2C_Parameter[0] = 1;
4036 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
4037 }
4038 else
4039 {
4040 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
4041 }
4042
4043 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
4044 if(!bIsInMpMode)
4045 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT
4046 else
4047 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi
4048 }
4049
4050 VOID
halbtc8703b2ant_InitHwConfig(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bBackUp)4051 halbtc8703b2ant_InitHwConfig(
4052 IN PBTC_COEXIST pBtCoexist,
4053 IN BOOLEAN bBackUp
4054 )
4055 {
4056 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4057 u4Byte u4Tmp=0, fwVer;
4058 u2Byte u2Tmp=0;
4059 u1Byte u1Tmp=0;
4060 u1Byte H2C_Parameter[2] ={0};
4061
4062
4063 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n"));
4064
4065 // backup rf 0x1e value
4066 pCoexDm->btRf0x1eBackup =
4067 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
4068
4069 // 0x790[5:0]=0x5
4070 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
4071 u1Tmp &= 0xc0;
4072 u1Tmp |= 0x5;
4073 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
4074
4075 //Antenna config
4076 halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE);
4077 pCoexSta->disVerInfoCnt = 0;
4078
4079 // PTA parameter
4080 halbtc8703b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
4081
4082 // Enable counter statistics
4083 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA
4084 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
4085 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
4086 }
4087
4088 //============================================================
4089 // work around function start with wa_halbtc8703b2ant_
4090 //============================================================
4091 //============================================================
4092 // extern function start with EXhalbtc8703b2ant_
4093 //============================================================
4094 VOID
EXhalbtc8703b2ant_PowerOnSetting(IN PBTC_COEXIST pBtCoexist)4095 EXhalbtc8703b2ant_PowerOnSetting(
4096 IN PBTC_COEXIST pBtCoexist
4097 )
4098 {
4099 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4100 u2Byte u2Tmp=0x0;
4101
4102 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
4103
4104 // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly.
4105 u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
4106 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
4107
4108 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
4109
4110 if(pBtCoexist->chipInterface == BTC_INTF_USB)
4111 {
4112 // fixed at S0 for USB interface
4113 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
4114 }
4115 else
4116 {
4117 // for PCIE and SDIO interface, we check efuse 0xc3[6]
4118 if(pBoardInfo->singleAntPath == 0)
4119 {
4120 // set to S1
4121 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
4122 }
4123 else if(pBoardInfo->singleAntPath == 1)
4124 {
4125 // set to S0
4126 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
4127 }
4128 }
4129 }
4130
4131 VOID
EXhalbtc8703b2ant_PreLoadFirmware(IN PBTC_COEXIST pBtCoexist)4132 EXhalbtc8703b2ant_PreLoadFirmware(
4133 IN PBTC_COEXIST pBtCoexist
4134 )
4135 {
4136 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4137 u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */
4138
4139 //
4140 // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info)
4141 // Local setting bit define
4142 // BIT0: "0" for no antenna inverse; "1" for antenna inverse
4143 // BIT1: "0" for internal switch; "1" for external switch
4144 // BIT2: "0" for one antenna; "1" for two antenna
4145 // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0
4146 if(pBtCoexist->chipInterface == BTC_INTF_USB)
4147 {
4148 // fixed at S0 for USB interface
4149 u1Tmp |= 0x1; // antenna inverse
4150 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
4151 }
4152 else
4153 {
4154 // for PCIE and SDIO interface, we check efuse 0xc3[6]
4155 if(pBoardInfo->singleAntPath == 0)
4156 {
4157 }
4158 else if(pBoardInfo->singleAntPath == 1)
4159 {
4160 // set to S0
4161 u1Tmp |= 0x1; // antenna inverse
4162 }
4163
4164 if(pBtCoexist->chipInterface == BTC_INTF_PCI)
4165 {
4166 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
4167 }
4168 else if(pBtCoexist->chipInterface == BTC_INTF_SDIO)
4169 {
4170 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
4171 }
4172 }
4173 }
4174
4175 VOID
EXhalbtc8703b2ant_InitHwConfig(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bWifiOnly)4176 EXhalbtc8703b2ant_InitHwConfig(
4177 IN PBTC_COEXIST pBtCoexist,
4178 IN BOOLEAN bWifiOnly
4179 )
4180 {
4181 halbtc8703b2ant_InitHwConfig(pBtCoexist, TRUE);
4182 }
4183
4184 VOID
EXhalbtc8703b2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)4185 EXhalbtc8703b2ant_InitCoexDm(
4186 IN PBTC_COEXIST pBtCoexist
4187 )
4188 {
4189 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n"));
4190
4191 halbtc8703b2ant_InitCoexDm(pBtCoexist);
4192 }
4193
4194 VOID
EXhalbtc8703b2ant_DisplayCoexInfo(IN PBTC_COEXIST pBtCoexist)4195 EXhalbtc8703b2ant_DisplayCoexInfo(
4196 IN PBTC_COEXIST pBtCoexist
4197 )
4198 {
4199 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4200 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
4201 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
4202 pu1Byte cliBuf=pBtCoexist->cliBuf;
4203 u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
4204 u4Byte u4Tmp[4];
4205 u4Byte faOfdm, faCck;
4206 u4Byte fwVer=0, btPatchVer=0;
4207
4208 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
4209 CL_PRINTF(cliBuf);
4210
4211 if(pBtCoexist->bManualControl)
4212 {
4213 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
4214 CL_PRINTF(cliBuf);
4215 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
4216 CL_PRINTF(cliBuf);
4217 }
4218
4219 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
4220 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
4221 CL_PRINTF(cliBuf);
4222
4223 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
4224 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
4225 CL_PRINTF(cliBuf);
4226
4227 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
4228 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4229 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
4230 GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer);
4231 CL_PRINTF(cliBuf);
4232
4233 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
4234 pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
4235 pCoexDm->wifiChnlInfo[2]);
4236 CL_PRINTF(cliBuf);
4237
4238 // wifi status
4239 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
4240 CL_PRINTF(cliBuf);
4241 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
4242
4243 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
4244 CL_PRINTF(cliBuf);
4245
4246 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \
4247 ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
4248 ( (BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
4249 pCoexSta->btRssi-100, pCoexSta->btRetryCnt);
4250 CL_PRINTF(cliBuf);
4251
4252 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
4253 pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist);
4254 CL_PRINTF(cliBuf);
4255
4256 if (pStackInfo->bProfileNotified)
4257 {
4258 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
4259 }
4260 else
4261 {
4262 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \
4263 (pBtLinkInfo->bSlaveRole )? "Slave":"Master");
4264 CL_PRINTF(cliBuf);
4265 }
4266
4267 btInfoExt = pCoexSta->btInfoExt;
4268 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \
4269 (btInfoExt&BIT0)? "Basic rate":"EDR rate");
4270 CL_PRINTF(cliBuf);
4271
4272 for(i=0; i<BT_INFO_SRC_8703B_2ANT_MAX; i++)
4273 {
4274 if(pCoexSta->btInfoC2hCnt[i])
4275 {
4276 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8703b2Ant[i], \
4277 pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1],
4278 pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3],
4279 pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5],
4280 pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]);
4281 CL_PRINTF(cliBuf);
4282 }
4283 }
4284
4285 // Sw mechanism
4286 if(pBtCoexist->bManualControl)
4287 {
4288 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============");
4289 }
4290 else
4291 {
4292 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
4293 }
4294
4295 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
4296 pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig);
4297 CL_PRINTF(cliBuf);
4298 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
4299 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
4300 CL_PRINTF(cliBuf);
4301
4302 // Fw mechanism
4303 if(pBtCoexist->bManualControl)
4304 {
4305 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============");
4306 }
4307 else
4308 {
4309 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
4310 }
4311
4312 psTdmaCase = pCoexDm->curPsTdma;
4313
4314 if (pCoexDm->bIsSwitchTo1dot5Ant)
4315 psTdmaCase = psTdmaCase + 100;
4316
4317 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \
4318 pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1],
4319 pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3],
4320 pCoexDm->psTdmaPara[4], psTdmaCase,
4321 (pCoexDm->bCurPsTdmaOn? "On":"Off"),
4322 (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") );
4323 CL_PRINTF(cliBuf);
4324
4325 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \
4326 pCoexSta->nCoexTableType);
4327 CL_PRINTF(cliBuf);
4328
4329 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
4330 pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct);
4331 CL_PRINTF(cliBuf);
4332
4333 // Hw setting
4334 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
4335 CL_PRINTF(cliBuf);
4336
4337 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
4338 pCoexDm->btRf0x1eBackup);
4339 CL_PRINTF(cliBuf);
4340
4341 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
4342 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880);
4343 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \
4344 u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25);
4345 CL_PRINTF(cliBuf);
4346
4347
4348 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
4349 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67);
4350 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
4351 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \
4352 u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]);
4353 CL_PRINTF(cliBuf);
4354
4355 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c);
4356 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
4357 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944);
4358 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \
4359 u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3);
4360 CL_PRINTF(cliBuf);
4361
4362
4363 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39);
4364 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
4365 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
4366 u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64);
4367 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \
4368 ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1);
4369 CL_PRINTF(cliBuf);
4370
4371 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
4372 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
4373 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
4374 u4Tmp[0], u1Tmp[0]);
4375 CL_PRINTF(cliBuf);
4376
4377 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
4378 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c);
4379 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \
4380 u4Tmp[0]&0xff, u1Tmp[0]);
4381 CL_PRINTF(cliBuf);
4382
4383 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0);
4384 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4);
4385 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8);
4386 u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0);
4387
4388 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
4389 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
4390
4391 faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \
4392 ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ;
4393 faCck = (u1Tmp[0] << 8) + u1Tmp[1];
4394
4395 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \
4396 u4Tmp[0]&0xffff, faOfdm, faCck);
4397 CL_PRINTF(cliBuf);
4398
4399 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \
4400 pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg);
4401 CL_PRINTF(cliBuf);
4402
4403 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \
4404 pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg);
4405 CL_PRINTF(cliBuf);
4406
4407 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
4408 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
4409 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
4410 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
4411 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
4412 u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]);
4413 CL_PRINTF(cliBuf);
4414
4415 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \
4416 pCoexSta->highPriorityRx, pCoexSta->highPriorityTx);
4417 CL_PRINTF(cliBuf);
4418 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \
4419 pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
4420 CL_PRINTF(cliBuf);
4421 #if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 1)
4422 //halbtc8703b2ant_MonitorBtCtr(pBtCoexist);
4423 #endif
4424 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
4425 }
4426
4427
4428 VOID
EXhalbtc8703b2ant_IpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4429 EXhalbtc8703b2ant_IpsNotify(
4430 IN PBTC_COEXIST pBtCoexist,
4431 IN u1Byte type
4432 )
4433 {
4434 if(BTC_IPS_ENTER == type)
4435 {
4436 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n"));
4437 pCoexSta->bUnderIps = TRUE;
4438 halbtc8703b2ant_WifiOffHwCfg(pBtCoexist);
4439 halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4440 halbtc8703b2ant_CoexAllOff(pBtCoexist);
4441 }
4442 else if(BTC_IPS_LEAVE == type)
4443 {
4444 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n"));
4445 pCoexSta->bUnderIps = FALSE;
4446 halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE);
4447 halbtc8703b2ant_InitCoexDm(pBtCoexist);
4448 halbtc8703b2ant_QueryBtInfo(pBtCoexist);
4449 }
4450 }
4451
4452 VOID
EXhalbtc8703b2ant_LpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4453 EXhalbtc8703b2ant_LpsNotify(
4454 IN PBTC_COEXIST pBtCoexist,
4455 IN u1Byte type
4456 )
4457 {
4458 if(BTC_LPS_ENABLE == type)
4459 {
4460 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n"));
4461 pCoexSta->bUnderLps = TRUE;
4462 }
4463 else if(BTC_LPS_DISABLE == type)
4464 {
4465 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n"));
4466 pCoexSta->bUnderLps = FALSE;
4467 }
4468 }
4469
4470 VOID
EXhalbtc8703b2ant_ScanNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4471 EXhalbtc8703b2ant_ScanNotify(
4472 IN PBTC_COEXIST pBtCoexist,
4473 IN u1Byte type
4474 )
4475 {
4476 u4Byte u4Tmp;
4477 u1Byte u1Tmpa, u1Tmpb;
4478
4479
4480
4481 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
4482 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
4483 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
4484
4485 if(BTC_SCAN_START == type)
4486 {
4487 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n"));
4488 }
4489 else if(BTC_SCAN_FINISH == type)
4490 {
4491 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n"));
4492 }
4493
4494 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
4495 u4Tmp, u1Tmpa, u1Tmpb));
4496 }
4497
4498 VOID
EXhalbtc8703b2ant_ConnectNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4499 EXhalbtc8703b2ant_ConnectNotify(
4500 IN PBTC_COEXIST pBtCoexist,
4501 IN u1Byte type
4502 )
4503 {
4504 if(BTC_ASSOCIATE_START == type)
4505 {
4506 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n"));
4507 }
4508 else if(BTC_ASSOCIATE_FINISH == type)
4509 {
4510 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n"));
4511 }
4512 }
4513
4514 VOID
EXhalbtc8703b2ant_MediaStatusNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4515 EXhalbtc8703b2ant_MediaStatusNotify(
4516 IN PBTC_COEXIST pBtCoexist,
4517 IN u1Byte type
4518 )
4519 {
4520 u1Byte H2C_Parameter[3] ={0};
4521 u4Byte wifiBw;
4522 u1Byte wifiCentralChnl;
4523 u1Byte apNum=0;
4524
4525 if(BTC_MEDIA_CONNECT == type)
4526 {
4527 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n"));
4528 }
4529 else
4530 {
4531 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n"));
4532 }
4533
4534 // only 2.4G we need to inform bt the chnl mask
4535 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
4536 if( (BTC_MEDIA_CONNECT == type) &&
4537 (wifiCentralChnl <= 14) )
4538 {
4539 H2C_Parameter[0] = 0x1;
4540 H2C_Parameter[1] = wifiCentralChnl;
4541 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
4542 if(BTC_WIFI_BW_HT40 == wifiBw)
4543 H2C_Parameter[2] = 0x30;
4544 else
4545 {
4546 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
4547 if(apNum < 10)
4548 H2C_Parameter[2] = 0x30;
4549 else
4550 H2C_Parameter[2] = 0x20;
4551 }
4552 }
4553
4554 pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
4555 pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
4556 pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
4557
4558 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n",
4559 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
4560
4561 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
4562 }
4563
4564 VOID
EXhalbtc8703b2ant_SpecialPacketNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4565 EXhalbtc8703b2ant_SpecialPacketNotify(
4566 IN PBTC_COEXIST pBtCoexist,
4567 IN u1Byte type
4568 )
4569 {
4570 if(type == BTC_PACKET_DHCP)
4571 {
4572 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n"));
4573 }
4574 }
4575
4576 VOID
EXhalbtc8703b2ant_BtInfoNotify(IN PBTC_COEXIST pBtCoexist,IN pu1Byte tmpBuf,IN u1Byte length)4577 EXhalbtc8703b2ant_BtInfoNotify(
4578 IN PBTC_COEXIST pBtCoexist,
4579 IN pu1Byte tmpBuf,
4580 IN u1Byte length
4581 )
4582 {
4583 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
4584 u1Byte btInfo=0;
4585 u1Byte i, rspSource=0;
4586 BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE;
4587 BOOLEAN bWifiConnected=FALSE;
4588 static BOOLEAN bPreScoExist=FALSE;
4589 u4Byte raMask=0x0;
4590
4591 pCoexSta->bC2hBtInfoReqSent = FALSE;
4592
4593 rspSource = tmpBuf[0]&0xf;
4594 if(rspSource >= BT_INFO_SRC_8703B_2ANT_MAX)
4595 rspSource = BT_INFO_SRC_8703B_2ANT_WIFI_FW;
4596 pCoexSta->btInfoC2hCnt[rspSource]++;
4597
4598 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length));
4599 for(i=0; i<length; i++)
4600 {
4601 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
4602 if(i == 1)
4603 btInfo = tmpBuf[i];
4604 if(i == length-1)
4605 {
4606 RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i]));
4607 }
4608 else
4609 {
4610 RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i]));
4611 }
4612 }
4613
4614 if(pBtCoexist->bManualControl)
4615 {
4616 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"));
4617 return;
4618 }
4619
4620 // if 0xff, it means BT is under WHCK test
4621 if (btInfo == 0xff)
4622 pCoexSta->bBtWhckTest = TRUE;
4623 else
4624 pCoexSta->bBtWhckTest = FALSE;
4625
4626 if(BT_INFO_SRC_8703B_2ANT_WIFI_FW != rspSource)
4627 {
4628 pCoexSta->btRetryCnt = // [3:0]
4629 pCoexSta->btInfoC2h[rspSource][2]&0xf;
4630
4631 pCoexSta->btRssi =
4632 pCoexSta->btInfoC2h[rspSource][3]*2+10;
4633
4634 pCoexSta->btInfoExt =
4635 pCoexSta->btInfoC2h[rspSource][4];
4636
4637 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40);
4638 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
4639 if (pCoexSta->bBtTxRxMask)
4640 {
4641 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
4642 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"));
4643 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
4644 }
4645
4646 // Here we need to resend some wifi info to BT
4647 // because bt is reset and loss of the info.
4648 if( (pCoexSta->btInfoExt & BIT1) )
4649 {
4650 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
4651 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
4652 if(bWifiConnected)
4653 {
4654 EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
4655 }
4656 else
4657 {
4658 EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4659 }
4660 }
4661
4662 if( (pCoexSta->btInfoExt & BIT3) )
4663 {
4664 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
4665 halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
4666 }
4667 else
4668 {
4669 // BT already NOT ignore Wlan active, do nothing here.
4670 }
4671 #if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0)
4672 if( (pCoexSta->btInfoExt & BIT4) )
4673 {
4674 // BT auto report already enabled, do nothing
4675 }
4676 else
4677 {
4678 halbtc8703b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
4679 }
4680 #endif
4681 }
4682
4683 // check BIT2 first ==> check if bt is under inquiry or page scan
4684 if(btInfo & BT_INFO_8703B_2ANT_B_INQ_PAGE)
4685 pCoexSta->bC2hBtInquiryPage = TRUE;
4686 else
4687 pCoexSta->bC2hBtInquiryPage = FALSE;
4688
4689 // set link exist status
4690 if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION))
4691 {
4692 pCoexSta->bBtLinkExist = FALSE;
4693 pCoexSta->bPanExist = FALSE;
4694 pCoexSta->bA2dpExist = FALSE;
4695 pCoexSta->bHidExist = FALSE;
4696 pCoexSta->bScoExist = FALSE;
4697 }
4698 else // connection exists
4699 {
4700 pCoexSta->bBtLinkExist = TRUE;
4701 if(btInfo & BT_INFO_8703B_2ANT_B_FTP)
4702 pCoexSta->bPanExist = TRUE;
4703 else
4704 pCoexSta->bPanExist = FALSE;
4705 if(btInfo & BT_INFO_8703B_2ANT_B_A2DP)
4706 pCoexSta->bA2dpExist = TRUE;
4707 else
4708 pCoexSta->bA2dpExist = FALSE;
4709 if(btInfo & BT_INFO_8703B_2ANT_B_HID)
4710 pCoexSta->bHidExist = TRUE;
4711 else
4712 pCoexSta->bHidExist = FALSE;
4713 if(btInfo & BT_INFO_8703B_2ANT_B_SCO_ESCO)
4714 pCoexSta->bScoExist = TRUE;
4715 else
4716 pCoexSta->bScoExist = FALSE;
4717
4718 if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE))
4719 {
4720 if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160)
4721 {
4722 pCoexSta->bHidExist = TRUE;
4723 btInfo = btInfo | 0x20;
4724 }
4725 }
4726 }
4727
4728 halbtc8703b2ant_UpdateBtLinkInfo(pBtCoexist);
4729
4730 if(!(btInfo&BT_INFO_8703B_2ANT_B_CONNECTION))
4731 {
4732 pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4733 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
4734 }
4735 else if(btInfo == BT_INFO_8703B_2ANT_B_CONNECTION) // connection exists but no busy
4736 {
4737 pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_CONNECTED_IDLE;
4738 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
4739 }
4740 else if((btInfo&BT_INFO_8703B_2ANT_B_SCO_ESCO) ||
4741 (btInfo&BT_INFO_8703B_2ANT_B_SCO_BUSY))
4742 {
4743 pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_SCO_BUSY;
4744 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
4745 }
4746 else if(btInfo&BT_INFO_8703B_2ANT_B_ACL_BUSY)
4747 {
4748 pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_ACL_BUSY;
4749 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
4750 }
4751 else
4752 {
4753 pCoexDm->btStatus = BT_8703B_2ANT_BT_STATUS_MAX;
4754 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
4755 }
4756
4757 if( (BT_8703B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
4758 (BT_8703B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
4759 (BT_8703B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) )
4760 {
4761 bBtBusy = TRUE;
4762 bLimitedDig = TRUE;
4763 }
4764 else
4765 {
4766 bBtBusy = FALSE;
4767 bLimitedDig = FALSE;
4768 }
4769
4770 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
4771
4772 pCoexDm->bLimitedDig = bLimitedDig;
4773 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
4774
4775 halbtc8703b2ant_RunCoexistMechanism(pBtCoexist);
4776 }
4777
4778 VOID
EXhalbtc8703b2ant_HaltNotify(IN PBTC_COEXIST pBtCoexist)4779 EXhalbtc8703b2ant_HaltNotify(
4780 IN PBTC_COEXIST pBtCoexist
4781 )
4782 {
4783 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n"));
4784
4785 halbtc8703b2ant_WifiOffHwCfg(pBtCoexist);
4786 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
4787 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0
4788 halbtc8703b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4789
4790 EXhalbtc8703b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4791 }
4792
4793 VOID
EXhalbtc8703b2ant_PnpNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte pnpState)4794 EXhalbtc8703b2ant_PnpNotify(
4795 IN PBTC_COEXIST pBtCoexist,
4796 IN u1Byte pnpState
4797 )
4798 {
4799 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n"));
4800
4801 if(BTC_WIFI_PNP_SLEEP == pnpState)
4802 {
4803 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n"));
4804 }
4805 else if(BTC_WIFI_PNP_WAKE_UP == pnpState)
4806 {
4807 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n"));
4808 halbtc8703b2ant_InitHwConfig(pBtCoexist, FALSE);
4809 halbtc8703b2ant_InitCoexDm(pBtCoexist);
4810 halbtc8703b2ant_QueryBtInfo(pBtCoexist);
4811 }
4812 }
4813
4814 VOID
EXhalbtc8703b2ant_Periodical(IN PBTC_COEXIST pBtCoexist)4815 EXhalbtc8703b2ant_Periodical(
4816 IN PBTC_COEXIST pBtCoexist
4817 )
4818 {
4819 //static u1Byte disVerInfoCnt=0;
4820 u4Byte fwVer=0, btPatchVer=0;
4821 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4822 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
4823
4824 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n"));
4825
4826 if(pCoexSta->disVerInfoCnt <= 5)
4827 {
4828 pCoexSta->disVerInfoCnt += 1;
4829 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4830 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4831 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos));
4832 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n",
4833 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion));
4834 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
4835 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4836 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4837 GLCoexVerDate8703b2Ant, GLCoexVer8703b2Ant, fwVer, btPatchVer, btPatchVer));
4838 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4839
4840 if (pCoexSta->disVerInfoCnt == 3)
4841 {
4842 //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial
4843 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n"));
4844 halbtc8703b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
4845 }
4846 }
4847
4848 #if(BT_AUTO_REPORT_ONLY_8703B_2ANT == 0)
4849 halbtc8703b2ant_QueryBtInfo(pBtCoexist);
4850 halbtc8703b2ant_MonitorBtEnableDisable(pBtCoexist);
4851 #else
4852 halbtc8703b2ant_MonitorBtCtr(pBtCoexist);
4853 halbtc8703b2ant_MonitorWiFiCtr(pBtCoexist);
4854
4855 if( halbtc8703b2ant_IsWifiStatusChanged(pBtCoexist) ||
4856 pCoexDm->bAutoTdmaAdjust)
4857 {
4858 halbtc8703b2ant_RunCoexistMechanism(pBtCoexist);
4859 }
4860 #endif
4861 }
4862
4863
4864 #endif
4865
4866