1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 16 #ifndef _RTW_IO_H_ 17 #define _RTW_IO_H_ 18 19 #define NUM_IOREQ 8 20 21 #ifdef PLATFORM_WINDOWS 22 #define MAX_PROT_SZ 64 23 #endif 24 #ifdef PLATFORM_LINUX 25 #define MAX_PROT_SZ (64-16) 26 #endif 27 28 #define _IOREADY 0 29 #define _IO_WAIT_COMPLETE 1 30 #define _IO_WAIT_RSP 2 31 32 /* IO COMMAND TYPE */ 33 #define _IOSZ_MASK_ (0x7F) 34 #define _IO_WRITE_ BIT(7) 35 #define _IO_FIXED_ BIT(8) 36 #define _IO_BURST_ BIT(9) 37 #define _IO_BYTE_ BIT(10) 38 #define _IO_HW_ BIT(11) 39 #define _IO_WORD_ BIT(12) 40 #define _IO_SYNC_ BIT(13) 41 #define _IO_CMDMASK_ (0x1F80) 42 43 44 /* 45 For prompt mode accessing, caller shall free io_req 46 Otherwise, io_handler will free io_req 47 */ 48 49 50 51 /* IO STATUS TYPE */ 52 #define _IO_ERR_ BIT(2) 53 #define _IO_SUCCESS_ BIT(1) 54 #define _IO_DONE_ BIT(0) 55 56 57 #define IO_RD32 (_IO_SYNC_ | _IO_WORD_) 58 #define IO_RD16 (_IO_SYNC_ | _IO_HW_) 59 #define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) 60 61 #define IO_RD32_ASYNC (_IO_WORD_) 62 #define IO_RD16_ASYNC (_IO_HW_) 63 #define IO_RD8_ASYNC (_IO_BYTE_) 64 65 #define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) 66 #define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) 67 #define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) 68 69 #define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) 70 #define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) 71 #define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) 72 73 /* 74 75 Only Sync. burst accessing is provided. 76 77 */ 78 79 #define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) 80 #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) 81 82 83 84 /* below is for the intf_option bit defition... */ 85 86 #define _INTF_ASYNC_ BIT(0) /* support async io */ 87 88 struct intf_priv; 89 struct intf_hdl; 90 struct io_queue; 91 92 struct _io_ops { 93 u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr); 94 u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr); 95 u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr); 96 97 int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 98 int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 99 int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 100 int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); 101 102 int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 103 int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 104 int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 105 106 void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 107 void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 108 109 void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); 110 111 u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); 112 113 u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 114 u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 115 116 u32(*_write_scsi)(struct intf_hdl *pintfhdl, u32 cnt, u8 *pmem); 117 118 void (*_read_port_cancel)(struct intf_hdl *pintfhdl); 119 void (*_write_port_cancel)(struct intf_hdl *pintfhdl); 120 121 #ifdef CONFIG_SDIO_HCI 122 u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); 123 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 124 u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); 125 u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); 126 u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); 127 int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 128 int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 129 int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 130 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 131 #endif 132 133 }; 134 135 struct io_req { 136 _list list; 137 u32 addr; 138 volatile u32 val; 139 u32 command; 140 u32 status; 141 u8 *pbuf; 142 _sema sema; 143 144 #ifdef PLATFORM_OS_CE 145 #ifdef CONFIG_USB_HCI 146 /* URB handler for rtw_write_mem */ 147 USB_TRANSFER usb_transfer_write_mem; 148 #endif 149 #endif 150 151 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); 152 u8 *cnxt; 153 154 #ifdef PLATFORM_OS_XP 155 PMDL pmdl; 156 PIRP pirp; 157 158 #ifdef CONFIG_SDIO_HCI 159 PSDBUS_REQUEST_PACKET sdrp; 160 #endif 161 162 #endif 163 164 165 }; 166 167 struct intf_hdl { 168 169 #if 0 170 u32 intf_option; 171 u32 bus_status; 172 u32 do_flush; 173 u8 *adapter; 174 u8 *intf_dev; 175 struct intf_priv *pintfpriv; 176 u8 cnt; 177 void (*intf_hdl_init)(u8 *priv); 178 void (*intf_hdl_unload)(u8 *priv); 179 void (*intf_hdl_open)(u8 *priv); 180 void (*intf_hdl_close)(u8 *priv); 181 struct _io_ops io_ops; 182 /* u8 intf_status;//moved to struct intf_priv */ 183 u16 len; 184 u16 done_len; 185 #endif 186 _adapter *padapter; 187 struct dvobj_priv *pintf_dev;/* pointer to &(padapter->dvobjpriv); */ 188 189 struct _io_ops io_ops; 190 191 }; 192 193 struct reg_protocol_rd { 194 195 #ifdef CONFIG_LITTLE_ENDIAN 196 197 /* DW1 */ 198 u32 NumOfTrans:4; 199 u32 Reserved1:4; 200 u32 Reserved2:24; 201 /* DW2 */ 202 u32 ByteCount:7; 203 u32 WriteEnable:1; /* 0:read, 1:write */ 204 u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ 205 u32 BurstMode:1; 206 u32 Byte1Access:1; 207 u32 Byte2Access:1; 208 u32 Byte4Access:1; 209 u32 Reserved3:3; 210 u32 Reserved4:16; 211 /* DW3 */ 212 u32 BusAddress; 213 /* DW4 */ 214 /* u32 Value; */ 215 #else 216 217 218 /* DW1 */ 219 u32 Reserved1:4; 220 u32 NumOfTrans:4; 221 222 u32 Reserved2:24; 223 224 /* DW2 */ 225 u32 WriteEnable:1; 226 u32 ByteCount:7; 227 228 229 u32 Reserved3:3; 230 u32 Byte4Access:1; 231 232 u32 Byte2Access:1; 233 u32 Byte1Access:1; 234 u32 BurstMode:1; 235 u32 FixOrContinuous:1; 236 237 u32 Reserved4:16; 238 239 /* DW3 */ 240 u32 BusAddress; 241 242 /* DW4 */ 243 /* u32 Value; */ 244 245 #endif 246 247 }; 248 249 250 struct reg_protocol_wt { 251 252 253 #ifdef CONFIG_LITTLE_ENDIAN 254 255 /* DW1 */ 256 u32 NumOfTrans:4; 257 u32 Reserved1:4; 258 u32 Reserved2:24; 259 /* DW2 */ 260 u32 ByteCount:7; 261 u32 WriteEnable:1; /* 0:read, 1:write */ 262 u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ 263 u32 BurstMode:1; 264 u32 Byte1Access:1; 265 u32 Byte2Access:1; 266 u32 Byte4Access:1; 267 u32 Reserved3:3; 268 u32 Reserved4:16; 269 /* DW3 */ 270 u32 BusAddress; 271 /* DW4 */ 272 u32 Value; 273 274 #else 275 /* DW1 */ 276 u32 Reserved1:4; 277 u32 NumOfTrans:4; 278 279 u32 Reserved2:24; 280 281 /* DW2 */ 282 u32 WriteEnable:1; 283 u32 ByteCount:7; 284 285 u32 Reserved3:3; 286 u32 Byte4Access:1; 287 288 u32 Byte2Access:1; 289 u32 Byte1Access:1; 290 u32 BurstMode:1; 291 u32 FixOrContinuous:1; 292 293 u32 Reserved4:16; 294 295 /* DW3 */ 296 u32 BusAddress; 297 298 /* DW4 */ 299 u32 Value; 300 301 #endif 302 303 }; 304 #ifdef CONFIG_PCI_HCI 305 #define MAX_CONTINUAL_IO_ERR 4 306 #endif 307 308 #ifdef CONFIG_USB_HCI 309 #define MAX_CONTINUAL_IO_ERR 4 310 #endif 311 312 #ifdef CONFIG_SDIO_HCI 313 #define SD_IO_TRY_CNT (8) 314 #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT 315 #endif 316 317 #ifdef CONFIG_GSPI_HCI 318 #define SD_IO_TRY_CNT (8) 319 #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT 320 #endif 321 322 323 int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); 324 void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); 325 326 /* 327 Below is the data structure used by _io_handler 328 329 */ 330 331 struct io_queue { 332 _lock lock; 333 _list free_ioreqs; 334 _list pending; /* The io_req list that will be served in the single protocol read/write. */ 335 _list processing; 336 u8 *free_ioreqs_buf; /* 4-byte aligned */ 337 u8 *pallocated_free_ioreqs_buf; 338 struct intf_hdl intf; 339 }; 340 341 struct io_priv { 342 343 _adapter *padapter; 344 345 struct intf_hdl intf; 346 347 }; 348 349 extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); 350 extern void sync_ioreq_enqueue(struct io_req *preq, struct io_queue *ioqueue); 351 extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); 352 353 354 extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); 355 extern struct io_req *alloc_ioreq(struct io_queue *pio_q); 356 357 extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); 358 extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); 359 360 extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 361 extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 362 363 extern u8 _rtw_read8(_adapter *adapter, u32 addr); 364 extern u16 _rtw_read16(_adapter *adapter, u32 addr); 365 extern u32 _rtw_read32(_adapter *adapter, u32 addr); 366 extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 367 extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 368 extern void _rtw_read_port_cancel(_adapter *adapter); 369 370 371 extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); 372 extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); 373 extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); 374 extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); 375 376 #ifdef CONFIG_SDIO_HCI 377 u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); 378 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 379 u8 _rtw_sd_iread8(_adapter *adapter, u32 addr); 380 u16 _rtw_sd_iread16(_adapter *adapter, u32 addr); 381 u32 _rtw_sd_iread32(_adapter *adapter, u32 addr); 382 int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val); 383 int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val); 384 int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val); 385 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 386 #endif /* CONFIG_SDIO_HCI */ 387 388 extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); 389 extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); 390 extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); 391 392 extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 393 extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 394 u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms); 395 extern void _rtw_write_port_cancel(_adapter *adapter); 396 397 #ifdef DBG_IO 398 bool match_read_sniff_ranges(u32 addr, u16 len); 399 bool match_write_sniff_ranges(u32 addr, u16 len); 400 bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask); 401 bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask); 402 403 extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); 404 extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); 405 extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line); 406 407 extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); 408 extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); 409 extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); 410 extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line); 411 412 #ifdef CONFIG_SDIO_HCI 413 u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line); 414 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 415 u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line); 416 u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line); 417 u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line); 418 int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); 419 int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); 420 int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); 421 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 422 #endif /* CONFIG_SDIO_HCI */ 423 424 #define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) 425 #define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) 426 #define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) 427 #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) 428 #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) 429 #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) 430 431 #define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) 432 #define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) 433 #define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) 434 #define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) 435 436 #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) 437 #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) 438 #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) 439 440 #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) 441 #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) 442 #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) 443 #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) 444 445 #ifdef CONFIG_SDIO_HCI 446 #define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__) 447 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 448 #define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__) 449 #define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__) 450 #define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__) 451 #define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__) 452 #define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__) 453 #define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__) 454 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 455 #endif /* CONFIG_SDIO_HCI */ 456 457 #else /* DBG_IO */ 458 #define match_read_sniff_ranges(addr, len) _FALSE 459 #define match_write_sniff_ranges(addr, len) _FALSE 460 #define match_rf_read_sniff_ranges(path, addr, mask) _FALSE 461 #define match_rf_write_sniff_ranges(path, addr, mask) _FALSE 462 #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) 463 #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) 464 #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) 465 #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) 466 #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) 467 #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) 468 469 #define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) 470 #define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) 471 #define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) 472 #define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) 473 474 #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) 475 #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) 476 #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) 477 478 #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) 479 #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) 480 #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) 481 #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) 482 483 #ifdef CONFIG_SDIO_HCI 484 #define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr)) 485 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 486 #define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr)) 487 #define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr)) 488 #define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr)) 489 #define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val)) 490 #define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val)) 491 #define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val)) 492 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 493 #endif /* CONFIG_SDIO_HCI */ 494 495 #endif /* DBG_IO */ 496 497 extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); 498 499 /* ioreq */ 500 extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); 501 extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); 502 extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); 503 extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); 504 extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); 505 extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); 506 507 508 extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, 509 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 510 extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, 511 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 512 extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, 513 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 514 515 extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 516 extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 517 518 extern void async_write8(_adapter *adapter, u32 addr, u8 val, 519 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 520 extern void async_write16(_adapter *adapter, u32 addr, u16 val, 521 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 522 extern void async_write32(_adapter *adapter, u32 addr, u32 val, 523 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 524 525 extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 526 extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 527 528 529 int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops)); 530 531 532 extern uint alloc_io_queue(_adapter *adapter); 533 extern void free_io_queue(_adapter *adapter); 534 extern void async_bus_io(struct io_queue *pio_q); 535 extern void bus_sync_io(struct io_queue *pio_q); 536 extern u32 _ioreq2rwmem(struct io_queue *pio_q); 537 extern void dev_power_down(_adapter *Adapter, u8 bpwrup); 538 539 /* 540 #define RTL_R8(reg) rtw_read8(padapter, reg) 541 #define RTL_R16(reg) rtw_read16(padapter, reg) 542 #define RTL_R32(reg) rtw_read32(padapter, reg) 543 #define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) 544 #define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) 545 #define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) 546 */ 547 548 /* 549 #define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) 550 #define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) 551 #define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) 552 553 #define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) 554 #define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) 555 */ 556 557 #define PlatformEFIOWrite1Byte(_a, _b, _c) \ 558 rtw_write8(_a, _b, _c) 559 #define PlatformEFIOWrite2Byte(_a, _b, _c) \ 560 rtw_write16(_a, _b, _c) 561 #define PlatformEFIOWrite4Byte(_a, _b, _c) \ 562 rtw_write32(_a, _b, _c) 563 564 #define PlatformEFIORead1Byte(_a, _b) \ 565 rtw_read8(_a, _b) 566 #define PlatformEFIORead2Byte(_a, _b) \ 567 rtw_read16(_a, _b) 568 #define PlatformEFIORead4Byte(_a, _b) \ 569 rtw_read32(_a, _b) 570 571 #endif /* _RTL8711_IO_H_ */ 572