xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8723d_xmit.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 #ifndef __RTL8723D_XMIT_H__
16 #define __RTL8723D_XMIT_H__
17 
18 
19 #define MAX_TID (15)
20 
21 
22 #ifndef __INC_HAL8723DDESC_H
23 #define __INC_HAL8723DDESC_H
24 
25 #define RX_STATUS_DESC_SIZE_8723D		24
26 #define RX_DRV_INFO_SIZE_UNIT_8723D 8
27 
28 
29 /* DWORD 0 */
30 #define SET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc, __Value) \
31 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
32 #define SET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc, __Value) \
33 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
34 #define SET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc, __Value) \
35 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
36 
37 #define GET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc) \
38 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
39 #define GET_RX_STATUS_DESC_CRC32_8723D(__pRxStatusDesc) \
40 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
41 #define GET_RX_STATUS_DESC_ICV_8723D(__pRxStatusDesc) \
42 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
43 #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723D(__pRxStatusDesc) \
44 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
45 #define GET_RX_STATUS_DESC_SECURITY_8723D(__pRxStatusDesc) \
46 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
47 #define GET_RX_STATUS_DESC_QOS_8723D(__pRxStatusDesc) \
48 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
49 #define GET_RX_STATUS_DESC_SHIFT_8723D(__pRxStatusDesc) \
50 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
51 #define GET_RX_STATUS_DESC_PHY_STATUS_8723D(__pRxStatusDesc) \
52 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
53 #define GET_RX_STATUS_DESC_SWDEC_8723D(__pRxStatusDesc) \
54 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
55 #define GET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc) \
56 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
57 #define GET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc) \
58 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
59 
60 /* DWORD 1 */
61 #define GET_RX_STATUS_DESC_MACID_8723D(__pRxDesc) \
62 	LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
63 #define GET_RX_STATUS_DESC_TID_8723D(__pRxDesc) \
64 	LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
65 #define GET_RX_STATUS_DESC_AMSDU_8723D(__pRxDesc) \
66 	LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
67 #define GET_RX_STATUS_DESC_RXID_MATCH_8723D(__pRxDesc) \
68 	LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
69 #define GET_RX_STATUS_DESC_PAGGR_8723D(__pRxDesc) \
70 	LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1)
71 #define GET_RX_STATUS_DESC_A1_FIT_8723D(__pRxDesc) \
72 	LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4)
73 #define GET_RX_STATUS_DESC_CHKERR_8723D(__pRxDesc) \
74 	LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1)
75 #define GET_RX_STATUS_DESC_IPVER_8723D(__pRxDesc) \
76 	LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1)
77 #define GET_RX_STATUS_DESC_IS_TCPUDP__8723D(__pRxDesc) \
78 	LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1)
79 #define GET_RX_STATUS_DESC_CHK_VLD_8723D(__pRxDesc) \
80 	LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1)
81 #define GET_RX_STATUS_DESC_PAM_8723D(__pRxDesc) \
82 	LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1)
83 #define GET_RX_STATUS_DESC_PWR_8723D(__pRxDesc) \
84 	LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1)
85 #define GET_RX_STATUS_DESC_MORE_DATA_8723D(__pRxDesc) \
86 	LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1)
87 #define GET_RX_STATUS_DESC_MORE_FRAG_8723D(__pRxDesc) \
88 	LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1)
89 #define GET_RX_STATUS_DESC_TYPE_8723D(__pRxDesc) \
90 	LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2)
91 #define GET_RX_STATUS_DESC_MC_8723D(__pRxDesc) \
92 	LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1)
93 #define GET_RX_STATUS_DESC_BC_8723D(__pRxDesc) \
94 	LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1)
95 
96 /* DWORD 2 */
97 #define GET_RX_STATUS_DESC_SEQ_8723D(__pRxStatusDesc) \
98 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
99 #define GET_RX_STATUS_DESC_FRAG_8723D(__pRxStatusDesc) \
100 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
101 #define GET_RX_STATUS_DESC_RX_IS_QOS_8723D(__pRxStatusDesc) \
102 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
103 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723D(__pRxStatusDesc) \
104 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
105 #define GET_RX_STATUS_DESC_RPT_SEL_8723D(__pRxStatusDesc) \
106 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
107 #define GET_RX_STATUS_DESC_FCS_OK_8723D(__pRxStatusDesc) \
108 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
109 
110 /* DWORD 3 */
111 #define GET_RX_STATUS_DESC_RX_RATE_8723D(__pRxStatusDesc) \
112 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
113 #define GET_RX_STATUS_DESC_HTC_8723D(__pRxStatusDesc) \
114 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
115 #define GET_RX_STATUS_DESC_EOSP_8723D(__pRxStatusDesc) \
116 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
117 #define GET_RX_STATUS_DESC_BSSID_FIT_8723D(__pRxStatusDesc) \
118 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
119 #ifdef CONFIG_USB_RX_AGGREGATION
120 #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723D(__pRxStatusDesc) \
121 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)
122 #endif
123 #define GET_RX_STATUS_DESC_PATTERN_MATCH_8723D(__pRxDesc) \
124 	LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
125 #define GET_RX_STATUS_DESC_UNICAST_MATCH_8723D(__pRxDesc) \
126 	LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
127 #define GET_RX_STATUS_DESC_MAGIC_MATCH_8723D(__pRxDesc) \
128 	LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
129 
130 /* DWORD 6 */
131 #define GET_RX_STATUS_DESC_MATCH_ID_8723D(__pRxDesc) \
132 	LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7)
133 
134 /* DWORD 5 */
135 #define GET_RX_STATUS_DESC_TSFL_8723D(__pRxStatusDesc) \
136 	LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
137 
138 #define GET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc) \
139 	LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32)
140 #define GET_RX_STATUS_DESC_BUFF_ADDR64_8723D(__pRxDesc) \
141 	LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
142 
143 #define SET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc, __Value) \
144 	SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value)
145 
146 
147 /* Dword 0, rsvd: bit26, bit28 */
148 #define GET_TX_DESC_OWN_8723D(__pTxDesc)\
149 	LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
150 
151 #define SET_TX_DESC_PKT_SIZE_8723D(__pTxDesc, __Value) \
152 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
153 #define SET_TX_DESC_OFFSET_8723D(__pTxDesc, __Value) \
154 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
155 #define SET_TX_DESC_BMC_8723D(__pTxDesc, __Value) \
156 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
157 #define SET_TX_DESC_HTC_8723D(__pTxDesc, __Value) \
158 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
159 #define SET_TX_DESC_AMSDU_PAD_EN_8723D(__pTxDesc, __Value) \
160 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
161 #define SET_TX_DESC_NO_ACM_8723D(__pTxDesc, __Value) \
162 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
163 #define SET_TX_DESC_GF_8723D(__pTxDesc, __Value) \
164 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
165 
166 /* Dword 1 */
167 #define SET_TX_DESC_MACID_8723D(__pTxDesc, __Value) \
168 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
169 #define SET_TX_DESC_QUEUE_SEL_8723D(__pTxDesc, __Value) \
170 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
171 #define SET_TX_DESC_RDG_NAV_EXT_8723D(__pTxDesc, __Value) \
172 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
173 #define SET_TX_DESC_LSIG_TXOP_EN_8723D(__pTxDesc, __Value) \
174 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
175 #define SET_TX_DESC_PIFS_8723D(__pTxDesc, __Value) \
176 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
177 #define SET_TX_DESC_RATE_ID_8723D(__pTxDesc, __Value) \
178 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
179 #define SET_TX_DESC_EN_DESC_ID_8723D(__pTxDesc, __Value) \
180 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
181 #define SET_TX_DESC_SEC_TYPE_8723D(__pTxDesc, __Value) \
182 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
183 #define SET_TX_DESC_PKT_OFFSET_8723D(__pTxDesc, __Value) \
184 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
185 #define SET_TX_DESC_MORE_DATA_8723D(__pTxDesc, __Value) \
186 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value)
187 
188 /* Dword 2  remove P_AID, G_ID field*/
189 #define SET_TX_DESC_CCA_RTS_8723D(__pTxDesc, __Value) \
190 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
191 #define SET_TX_DESC_AGG_ENABLE_8723D(__pTxDesc, __Value) \
192 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
193 #define SET_TX_DESC_RDG_ENABLE_8723D(__pTxDesc, __Value) \
194 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
195 #define SET_TX_DESC_NULL0_8723D(__pTxDesc, __Value) \
196 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value)
197 #define SET_TX_DESC_NULL1_8723D(__pTxDesc, __Value) \
198 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value)
199 #define SET_TX_DESC_BK_8723D(__pTxDesc, __Value) \
200 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
201 #define SET_TX_DESC_MORE_FRAG_8723D(__pTxDesc, __Value) \
202 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
203 #define SET_TX_DESC_RAW_8723D(__pTxDesc, __Value) \
204 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
205 #define SET_TX_DESC_CCX_8723D(__pTxDesc, __Value) \
206 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
207 #define SET_TX_DESC_AMPDU_DENSITY_8723D(__pTxDesc, __Value) \
208 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
209 #define SET_TX_DESC_BT_INT_8723D(__pTxDesc, __Value) \
210 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
211 #define SET_TX_DESC_FTM_EN_8723D(__pTxDesc, __Value) \
212 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value)
213 
214 /* Dword 3 */
215 #define SET_TX_DESC_NAV_USE_HDR_8723D(__pTxDesc, __Value) \
216 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value)
217 #define SET_TX_DESC_HWSEQ_SEL_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
218 #define SET_TX_DESC_USE_RATE_8723D(__pTxDesc, __Value) \
219 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
220 #define SET_TX_DESC_DISABLE_RTS_FB_8723D(__pTxDesc, __Value) \
221 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
222 #define SET_TX_DESC_DISABLE_FB_8723D(__pTxDesc, __Value) \
223 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
224 #define SET_TX_DESC_CTS2SELF_8723D(__pTxDesc, __Value) \
225 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
226 #define SET_TX_DESC_RTS_ENABLE_8723D(__pTxDesc, __Value) \
227 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
228 #define SET_TX_DESC_HW_RTS_ENABLE_8723D(__pTxDesc, __Value) \
229 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
230 #define SET_TX_DESC_PORT_ID_8723D(__pTxDesc, __Value) \
231 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value)
232 #define SET_TX_DESC_USE_MAX_LEN_8723D(__pTxDesc, __Value) \
233 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
234 #define SET_TX_DESC_MAX_AGG_NUM_8723D(__pTxDesc, __Value) \
235 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
236 #define SET_TX_DESC_AMPDU_MAX_TIME_8723D(__pTxDesc, __Value) \
237 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
238 
239 /* Dword 4 */
240 #define SET_TX_DESC_TX_RATE_8723D(__pTxDesc, __Value) \
241 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
242 #define SET_TX_DESC_TX_TRY_RATE_8723D(__pTxDesc, __Value) \
243 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value)
244 #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \
245 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
246 #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \
247 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
248 #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723D(__pTxDesc, __Value) \
249 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
250 #define SET_TX_DESC_DATA_RETRY_LIMIT_8723D(__pTxDesc, __Value) \
251 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
252 #define SET_TX_DESC_RTS_RATE_8723D(__pTxDesc, __Value) \
253 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
254 #define SET_TX_DESC_PCTS_EN_8723D(__pTxDesc, __Value) \
255 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value)
256 #define SET_TX_DESC_PCTS_MASK_IDX_8723D(__pTxDesc, __Value) \
257 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value)
258 
259 /* Dword 5 */
260 #define SET_TX_DESC_DATA_SC_8723D(__pTxDesc, __Value) \
261 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
262 #define SET_TX_DESC_DATA_SHORT_8723D(__pTxDesc, __Value) \
263 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
264 #define SET_TX_DESC_DATA_BW_8723D(__pTxDesc, __Value) \
265 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
266 #define SET_TX_DESC_DATA_STBC_8723D(__pTxDesc, __Value) \
267 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
268 #define SET_TX_DESC_RTS_STBC_8723D(__pTxDesc, __Value) \
269 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
270 #define SET_TX_DESC_RTS_SHORT_8723D(__pTxDesc, __Value) \
271 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
272 #define SET_TX_DESC_RTS_SC_8723D(__pTxDesc, __Value) \
273 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
274 #define SET_TX_DESC_PATH_A_EN_8723D(__pTxDesc, __Value) \
275 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value)
276 #define SET_TX_DESC_TXPWR_OF_SET_8723D(__pTxDesc, __Value) \
277 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value)
278 
279 /* Dword 6 */
280 #define SET_TX_DESC_SW_DEFINE_8723D(__pTxDesc, __Value) \
281 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
282 #define SET_TX_DESC_MBSSID_8723D(__pTxDesc, __Value) \
283 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
284 #define SET_TX_DESC_RF_SEL_8723D(__pTxDesc, __Value) \
285 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
286 
287 /* Dword 7 */
288 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
289 #define SET_TX_DESC_TX_BUFFER_SIZE_8723D(__pTxDesc, __Value) \
290 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
291 #elif(DEV_BUS_TYPE == RT_USB_INTERFACE)
292 #define SET_TX_DESC_TX_DESC_CHECKSUM_8723D(__pTxDesc, __Value) \
293 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
294 #else
295 #define SET_TX_DESC_TX_TIMESTAMP_8723D(__pTxDesc, __Value) \
296 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value)
297 #endif
298 
299 #define SET_TX_DESC_USB_TXAGG_NUM_8723D(__pTxDesc, __Value) \
300 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
301 
302 /* Dword 8 */
303 #define SET_TX_DESC_RTS_RC_8723D(__pTxDesc, __Value) \
304 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value)
305 #define SET_TX_DESC_BAR_RC_8723D(__pTxDesc, __Value) \
306 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value)
307 #define SET_TX_DESC_DATA_RC_8723D(__pTxDesc, __Value) \
308 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
309 #define SET_TX_DESC_HWSEQ_EN_8723D(__pTxDesc, __Value) \
310 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
311 #define SET_TX_DESC_NEXTHEADPAGE_8723D(__pTxDesc, __Value) \
312 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
313 #define SET_TX_DESC_TAILPAGE_8723D(__pTxDesc, __Value) \
314 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
315 
316 /* Dword 9 */
317 #define SET_TX_DESC_PADDING_LEN_8723D(__pTxDesc, __Value) \
318 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value)
319 #define SET_TX_DESC_SEQ_8723D(__pTxDesc, __Value) \
320 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
321 #define SET_TX_DESC_FINAL_DATA_RATE_8723D(__pTxDesc, __Value) \
322 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value)
323 
324 
325 #define SET_EARLYMODE_PKTNUM_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
326 #define SET_EARLYMODE_LEN0_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
327 #define SET_EARLYMODE_LEN1_1_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
328 #define SET_EARLYMODE_LEN1_2_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
329 #define SET_EARLYMODE_LEN2_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15,	__Value)
330 #define SET_EARLYMODE_LEN3_8723D(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
331 
332 
333 /*-----------------------------------------------------------------*/
334 /*	RTL8723D TX BUFFER DESC                                      */
335 /*-----------------------------------------------------------------*/
336 #ifdef CONFIG_64BIT_DMA
337 	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu)
338 	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu)
339 	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu)
340 	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu)
341 #else
342 	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu)
343 	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu)
344 	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu)
345 	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu)	/* 64 BIT mode only */
346 #endif
347 /* ********************************************************* */
348 
349 /* 64 bits  -- 32 bits */
350 /* =======     ======= */
351 /* Dword 0     0 */
352 #define SET_TX_BUFF_DESC_LEN_0_8723D(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu)
353 #define SET_TX_BUFF_DESC_PSB_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
354 #define SET_TX_BUFF_DESC_OWN_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
355 
356 /* Dword 1     1 */
357 #define SET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
358 #define GET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32)
359 /* Dword 2     NA */
360 #define SET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value)
361 #ifdef CONFIG_64BIT_DMA
362 	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32)
363 #else
364 	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) 0
365 #endif
366 /* Dword 3     NA */
367 /* RESERVED 0 */
368 /* Dword 4     2 */
369 #define SET_TX_BUFF_DESC_LEN_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value)
370 #define SET_TX_BUFF_DESC_AMSDU_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value)
371 /* Dword 5     3 */
372 #define SET_TX_BUFF_DESC_ADDR_LOW_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value)
373 /* Dword 6     NA */
374 #define SET_TX_BUFF_DESC_ADDR_HIGH_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value)
375 /* Dword 7     NA */
376 /*RESERVED 0 */
377 /* Dword 8     4 */
378 #define SET_TX_BUFF_DESC_LEN_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value)
379 #define SET_TX_BUFF_DESC_AMSDU_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value)
380 /* Dword 9     5 */
381 #define SET_TX_BUFF_DESC_ADDR_LOW_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value)
382 /* Dword 10    NA */
383 #define SET_TX_BUFF_DESC_ADDR_HIGH_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value)
384 /* Dword 11    NA */
385 /*RESERVED 0 */
386 /* Dword 12    6 */
387 #define SET_TX_BUFF_DESC_LEN_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value)
388 #define SET_TX_BUFF_DESC_AMSDU_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value)
389 /* Dword 13    7 */
390 #define SET_TX_BUFF_DESC_ADDR_LOW_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value)
391 /* Dword 14    NA */
392 #define SET_TX_BUFF_DESC_ADDR_HIGH_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value)
393 /* Dword 15    NA */
394 /*RESERVED 0 */
395 
396 
397 #endif
398 /* -----------------------------------------------------------
399  *
400  *	Rate
401  *
402  * -----------------------------------------------------------
403  * CCK Rates, TxHT = 0 */
404 #define DESC8723D_RATE1M				0x00
405 #define DESC8723D_RATE2M				0x01
406 #define DESC8723D_RATE5_5M				0x02
407 #define DESC8723D_RATE11M				0x03
408 
409 /* OFDM Rates, TxHT = 0 */
410 #define DESC8723D_RATE6M				0x04
411 #define DESC8723D_RATE9M				0x05
412 #define DESC8723D_RATE12M				0x06
413 #define DESC8723D_RATE18M				0x07
414 #define DESC8723D_RATE24M				0x08
415 #define DESC8723D_RATE36M				0x09
416 #define DESC8723D_RATE48M				0x0a
417 #define DESC8723D_RATE54M				0x0b
418 
419 /* MCS Rates, TxHT = 1 */
420 #define DESC8723D_RATEMCS0				0x0c
421 #define DESC8723D_RATEMCS1				0x0d
422 #define DESC8723D_RATEMCS2				0x0e
423 #define DESC8723D_RATEMCS3				0x0f
424 #define DESC8723D_RATEMCS4				0x10
425 #define DESC8723D_RATEMCS5				0x11
426 #define DESC8723D_RATEMCS6				0x12
427 #define DESC8723D_RATEMCS7				0x13
428 #define DESC8723D_RATEMCS8				0x14
429 #define DESC8723D_RATEMCS9				0x15
430 #define DESC8723D_RATEMCS10		0x16
431 #define DESC8723D_RATEMCS11		0x17
432 #define DESC8723D_RATEMCS12		0x18
433 #define DESC8723D_RATEMCS13		0x19
434 #define DESC8723D_RATEMCS14		0x1a
435 #define DESC8723D_RATEMCS15		0x1b
436 #define DESC8723D_RATEVHTSS1MCS0		0x2c
437 #define DESC8723D_RATEVHTSS1MCS1		0x2d
438 #define DESC8723D_RATEVHTSS1MCS2		0x2e
439 #define DESC8723D_RATEVHTSS1MCS3		0x2f
440 #define DESC8723D_RATEVHTSS1MCS4		0x30
441 #define DESC8723D_RATEVHTSS1MCS5		0x31
442 #define DESC8723D_RATEVHTSS1MCS6		0x32
443 #define DESC8723D_RATEVHTSS1MCS7		0x33
444 #define DESC8723D_RATEVHTSS1MCS8		0x34
445 #define DESC8723D_RATEVHTSS1MCS9		0x35
446 #define DESC8723D_RATEVHTSS2MCS0		0x36
447 #define DESC8723D_RATEVHTSS2MCS1		0x37
448 #define DESC8723D_RATEVHTSS2MCS2		0x38
449 #define DESC8723D_RATEVHTSS2MCS3		0x39
450 #define DESC8723D_RATEVHTSS2MCS4		0x3a
451 #define DESC8723D_RATEVHTSS2MCS5		0x3b
452 #define DESC8723D_RATEVHTSS2MCS6		0x3c
453 #define DESC8723D_RATEVHTSS2MCS7		0x3d
454 #define DESC8723D_RATEVHTSS2MCS8		0x3e
455 #define DESC8723D_RATEVHTSS2MCS9		0x3f
456 
457 
458 #define	RX_HAL_IS_CCK_RATE_8723D(pDesc)\
459 	(GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE1M || \
460 	 GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE2M || \
461 	 GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE5_5M || \
462 	 GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE11M)
463 
464 #ifdef CONFIG_TRX_BD_ARCH
465 	struct tx_desc;
466 #endif
467 
468 void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc);
469 void rtl8723d_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
470 void rtl8723d_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
471 void rtl8723d_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
472 void rtl8723d_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
473 void rtl8723d_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
474 
475 #if defined(CONFIG_CONCURRENT_MODE)
476 	void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
477 #endif
478 void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
479 
480 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
481 	s32 rtl8723ds_init_xmit_priv(PADAPTER padapter);
482 	void rtl8723ds_free_xmit_priv(PADAPTER padapter);
483 	s32 rtl8723ds_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
484 	s32 rtl8723ds_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
485 	s32	rtl8723ds_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
486 	s32 rtl8723ds_xmit_buf_handler(PADAPTER padapter);
487 	thread_return rtl8723ds_xmit_thread(thread_context context);
488 	#define hal_xmit_handler rtl8723ds_xmit_buf_handler
489 #endif
490 
491 #ifdef CONFIG_USB_HCI
492 	s32 rtl8723du_xmit_buf_handler(PADAPTER padapter);
493 	#define hal_xmit_handler rtl8723du_xmit_buf_handler
494 	s32 rtl8723du_init_xmit_priv(PADAPTER padapter);
495 	void rtl8723du_free_xmit_priv(PADAPTER padapter);
496 	s32 rtl8723du_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
497 	s32 rtl8723du_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
498 	s32	 rtl8723du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
499 	void rtl8723du_xmit_tasklet(void *priv);
500 	s32 rtl8723du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
501 	void _dbg_dump_tx_info(_adapter	*padapter, int frame_tag, struct tx_desc *ptxdesc);
502 #endif
503 
504 #ifdef CONFIG_PCI_HCI
505 	s32 rtl8723de_init_xmit_priv(PADAPTER padapter);
506 	void rtl8723de_free_xmit_priv(PADAPTER padapter);
507 	struct xmit_buf *rtl8723de_dequeue_xmitbuf(struct rtw_tx_ring *ring);
508 	void	rtl8723de_xmitframe_resume(_adapter *padapter);
509 	s32 rtl8723de_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
510 	s32 rtl8723de_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
511 	s32	rtl8723de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
512 	void rtl8723de_xmit_tasklet(void *priv);
513 #endif
514 
515 u8	BWMapping_8723D(PADAPTER Adapter, struct pkt_attrib *pattrib);
516 u8	SCMapping_8723D(PADAPTER Adapter, struct pkt_attrib	*pattrib);
517 
518 #endif
519