1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 16 #ifndef __HAL_PG_H__ 17 #define __HAL_PG_H__ 18 19 #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F 20 #define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 21 22 #define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F 23 #define PPG_THERMAL_OFFSET_MASK 0x1F 24 #define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 25 #define KFREE_BB_GAIN_2G_TXB_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TXB_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x10) ? ((_ppg_v) >> 5) : (-((_ppg_v) >> 5)))) 26 #define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 27 #define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 28 29 /* **************************************************** 30 * EEPROM/Efuse PG Offset for 88EE/88EU/88ES 31 * **************************************************** */ 32 #define EEPROM_TX_PWR_INX_88E 0x10 33 34 #define EEPROM_ChannelPlan_88E 0xB8 35 #define EEPROM_XTAL_88E 0xB9 36 #define EEPROM_THERMAL_METER_88E 0xBA 37 #define EEPROM_IQK_LCK_88E 0xBB 38 39 #define EEPROM_RF_BOARD_OPTION_88E 0xC1 40 #define EEPROM_RF_FEATURE_OPTION_88E 0xC2 41 #define EEPROM_RF_BT_SETTING_88E 0xC3 42 #define EEPROM_VERSION_88E 0xC4 43 #define EEPROM_CustomID_88E 0xC5 44 #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 45 #define EEPROM_COUNTRY_CODE_88E 0xCB 46 47 /* RTL88EE */ 48 #define EEPROM_MAC_ADDR_88EE 0xD0 49 #define EEPROM_VID_88EE 0xD6 50 #define EEPROM_DID_88EE 0xD8 51 #define EEPROM_SVID_88EE 0xDA 52 #define EEPROM_SMID_88EE 0xDC 53 54 /* RTL88EU */ 55 #define EEPROM_MAC_ADDR_88EU 0xD7 56 #define EEPROM_VID_88EU 0xD0 57 #define EEPROM_PID_88EU 0xD2 58 #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* 8188EU, 8192EU, 8812AU is the same */ 59 #define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 60 61 /* RTL88ES */ 62 #define EEPROM_MAC_ADDR_88ES 0x11A 63 /* **************************************************** 64 * EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES 65 * **************************************************** */ 66 #define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 67 #define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 68 69 #define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 70 #define PPG_THERMAL_OFFSET_8192E 0x1F5 71 72 /* 0x10 ~ 0x63 = TX power area. */ 73 #define EEPROM_TX_PWR_INX_8192E 0x10 74 75 #define EEPROM_ChannelPlan_8192E 0xB8 76 #define EEPROM_XTAL_8192E 0xB9 77 #define EEPROM_THERMAL_METER_8192E 0xBA 78 #define EEPROM_IQK_LCK_8192E 0xBB 79 #define EEPROM_2G_5G_PA_TYPE_8192E 0xBC 80 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD 81 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF 82 83 #define EEPROM_RF_BOARD_OPTION_8192E 0xC1 84 #define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 85 #define EEPROM_RF_BT_SETTING_8192E 0xC3 86 #define EEPROM_VERSION_8192E 0xC4 87 #define EEPROM_CustomID_8192E 0xC5 88 #define EEPROM_TX_BBSWING_2G_8192E 0xC6 89 #define EEPROM_TX_BBSWING_5G_8192E 0xC7 90 #define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 91 #define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 92 #define EEPROM_RFE_OPTION_8192E 0xCA 93 #define EEPROM_RFE_OPTION_8188E 0xCA 94 #define EEPROM_COUNTRY_CODE_8192E 0xCB 95 96 /* RTL8192EE */ 97 #define EEPROM_MAC_ADDR_8192EE 0xD0 98 #define EEPROM_VID_8192EE 0xD6 99 #define EEPROM_DID_8192EE 0xD8 100 #define EEPROM_SVID_8192EE 0xDA 101 #define EEPROM_SMID_8192EE 0xDC 102 103 /* RTL8192EU */ 104 #define EEPROM_MAC_ADDR_8192EU 0xD7 105 #define EEPROM_VID_8192EU 0xD0 106 #define EEPROM_PID_8192EU 0xD2 107 #define EEPROM_PA_TYPE_8192EU 0xBC 108 #define EEPROM_LNA_TYPE_2G_8192EU 0xBD 109 #define EEPROM_LNA_TYPE_5G_8192EU 0xBF 110 111 /* RTL8192ES */ 112 #define EEPROM_MAC_ADDR_8192ES 0x11A 113 /* **************************************************** 114 * EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS 115 * **************************************************** 116 * 0x10 ~ 0x63 = TX power area. */ 117 #define EEPROM_USB_MODE_8812 0x08 118 #define EEPROM_TX_PWR_INX_8812 0x10 119 120 #define EEPROM_ChannelPlan_8812 0xB8 121 #define EEPROM_XTAL_8812 0xB9 122 #define EEPROM_THERMAL_METER_8812 0xBA 123 #define EEPROM_IQK_LCK_8812 0xBB 124 #define EEPROM_2G_5G_PA_TYPE_8812 0xBC 125 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD 126 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF 127 128 #define EEPROM_RF_BOARD_OPTION_8812 0xC1 129 #define EEPROM_RF_FEATURE_OPTION_8812 0xC2 130 #define EEPROM_RF_BT_SETTING_8812 0xC3 131 #define EEPROM_VERSION_8812 0xC4 132 #define EEPROM_CustomID_8812 0xC5 133 #define EEPROM_TX_BBSWING_2G_8812 0xC6 134 #define EEPROM_TX_BBSWING_5G_8812 0xC7 135 #define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 136 #define EEPROM_RF_ANTENNA_OPT_8812 0xC9 137 #define EEPROM_RFE_OPTION_8812 0xCA 138 #define EEPROM_COUNTRY_CODE_8812 0xCB 139 140 /* RTL8812AE */ 141 #define EEPROM_MAC_ADDR_8812AE 0xD0 142 #define EEPROM_VID_8812AE 0xD6 143 #define EEPROM_DID_8812AE 0xD8 144 #define EEPROM_SVID_8812AE 0xDA 145 #define EEPROM_SMID_8812AE 0xDC 146 147 /* RTL8812AU */ 148 #define EEPROM_MAC_ADDR_8812AU 0xD7 149 #define EEPROM_VID_8812AU 0xD0 150 #define EEPROM_PID_8812AU 0xD2 151 #define EEPROM_PA_TYPE_8812AU 0xBC 152 #define EEPROM_LNA_TYPE_2G_8812AU 0xBD 153 #define EEPROM_LNA_TYPE_5G_8812AU 0xBF 154 155 /* RTL8814AU */ 156 #define EEPROM_MAC_ADDR_8814AU 0xD8 157 #define EEPROM_VID_8814AU 0xD0 158 #define EEPROM_PID_8814AU 0xD2 159 #define EEPROM_PA_TYPE_8814AU 0xBC 160 #define EEPROM_LNA_TYPE_2G_8814AU 0xBD 161 #define EEPROM_LNA_TYPE_5G_8814AU 0xBF 162 163 /* RTL8814AE */ 164 #define EEPROM_MAC_ADDR_8814AE 0xD0 165 #define EEPROM_VID_8814AE 0xD6 166 #define EEPROM_DID_8814AE 0xD8 167 #define EEPROM_SVID_8814AE 0xDA 168 #define EEPROM_SMID_8814AE 0xDC 169 170 /* **************************************************** 171 * EEPROM/Efuse PG Offset for 8814AU 172 * **************************************************** */ 173 #define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 174 #define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 175 #define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) 176 177 #define KFREE_GAIN_DATA_LENGTH_8814A 22 178 179 #define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE 180 181 #define PPG_THERMAL_OFFSET_8814A 0x3EF 182 183 #define EEPROM_TX_PWR_INX_8814 0x10 184 #define EEPROM_USB_MODE_8814A 0x0E 185 #define EEPROM_ChannelPlan_8814 0xB8 186 #define EEPROM_XTAL_8814 0xB9 187 #define EEPROM_THERMAL_METER_8814 0xBA 188 #define EEPROM_IQK_LCK_8814 0xBB 189 190 191 #define EEPROM_PA_TYPE_8814 0xBC 192 #define EEPROM_LNA_TYPE_AB_2G_8814 0xBD 193 #define EEPROM_LNA_TYPE_CD_2G_8814 0xBE 194 #define EEPROM_LNA_TYPE_AB_5G_8814 0xBF 195 #define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 196 #define EEPROM_RF_BOARD_OPTION_8814 0xC1 197 #define EEPROM_RF_BT_SETTING_8814 0xC3 198 #define EEPROM_VERSION_8814 0xC4 199 #define EEPROM_CustomID_8814 0xC5 200 #define EEPROM_TX_BBSWING_2G_8814 0xC6 201 #define EEPROM_TX_BBSWING_5G_8814 0xC7 202 #define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 203 #define EEPROM_RFE_OPTION_8814 0xCA 204 #define EEPROM_COUNTRY_CODE_8814 0xCB 205 206 /*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ 207 #define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 208 #define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 209 #define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 210 #define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 211 #define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 212 #define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 213 #define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 214 #define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 215 216 /* **************************************************** 217 * EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS 218 * **************************************************** */ 219 220 #define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 221 #define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 222 223 #define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 224 #define PPG_THERMAL_OFFSET_8821A 0x1F5 225 #define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 226 #define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 227 #define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 228 #define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 229 #define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 230 231 #define EEPROM_TX_PWR_INX_8821 0x10 232 233 #define EEPROM_ChannelPlan_8821 0xB8 234 #define EEPROM_XTAL_8821 0xB9 235 #define EEPROM_THERMAL_METER_8821 0xBA 236 #define EEPROM_IQK_LCK_8821 0xBB 237 238 239 #define EEPROM_RF_BOARD_OPTION_8821 0xC1 240 #define EEPROM_RF_FEATURE_OPTION_8821 0xC2 241 #define EEPROM_RF_BT_SETTING_8821 0xC3 242 #define EEPROM_VERSION_8821 0xC4 243 #define EEPROM_CustomID_8821 0xC5 244 #define EEPROM_RF_ANTENNA_OPT_8821 0xC9 245 246 /* RTL8821AE */ 247 #define EEPROM_MAC_ADDR_8821AE 0xD0 248 #define EEPROM_VID_8821AE 0xD6 249 #define EEPROM_DID_8821AE 0xD8 250 #define EEPROM_SVID_8821AE 0xDA 251 #define EEPROM_SMID_8821AE 0xDC 252 253 /* RTL8821AU */ 254 #define EEPROM_PA_TYPE_8821AU 0xBC 255 #define EEPROM_LNA_TYPE_8821AU 0xBF 256 257 /* RTL8821AS */ 258 #define EEPROM_MAC_ADDR_8821AS 0x11A 259 260 /* RTL8821AU */ 261 #define EEPROM_MAC_ADDR_8821AU 0x107 262 #define EEPROM_VID_8821AU 0x100 263 #define EEPROM_PID_8821AU 0x102 264 265 266 /* **************************************************** 267 * EEPROM/Efuse PG Offset for 8192 SE/SU 268 * **************************************************** */ 269 #define EEPROM_VID_92SE 0x0A 270 #define EEPROM_DID_92SE 0x0C 271 #define EEPROM_SVID_92SE 0x0E 272 #define EEPROM_SMID_92SE 0x10 273 274 #define EEPROM_MAC_ADDR_92S 0x12 275 276 #define EEPROM_TSSI_A_92SE 0x74 277 #define EEPROM_TSSI_B_92SE 0x75 278 279 #define EEPROM_Version_92SE 0x7C 280 281 282 #define EEPROM_VID_92SU 0x08 283 #define EEPROM_PID_92SU 0x0A 284 285 #define EEPROM_Version_92SU 0x50 286 #define EEPROM_TSSI_A_92SU 0x6b 287 #define EEPROM_TSSI_B_92SU 0x6c 288 289 /* ==================================================== 290 EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS 291 ==================================================== 292 */ 293 294 #define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 295 #define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 296 297 #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE 298 #define PPG_THERMAL_OFFSET_8188F 0xEF 299 300 /* 0x10 ~ 0x63 = TX power area. */ 301 #define EEPROM_TX_PWR_INX_8188F 0x10 302 303 #define EEPROM_ChannelPlan_8188F 0xB8 304 #define EEPROM_XTAL_8188F 0xB9 305 #define EEPROM_THERMAL_METER_8188F 0xBA 306 #define EEPROM_IQK_LCK_8188F 0xBB 307 #define EEPROM_2G_5G_PA_TYPE_8188F 0xBC 308 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD 309 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF 310 311 #define EEPROM_RF_BOARD_OPTION_8188F 0xC1 312 #define EEPROM_FEATURE_OPTION_8188F 0xC2 313 #define EEPROM_RF_BT_SETTING_8188F 0xC3 314 #define EEPROM_VERSION_8188F 0xC4 315 #define EEPROM_CustomID_8188F 0xC5 316 #define EEPROM_TX_BBSWING_2G_8188F 0xC6 317 #define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 318 #define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 319 #define EEPROM_RFE_OPTION_8188F 0xCA 320 #define EEPROM_COUNTRY_CODE_8188F 0xCB 321 #define EEPROM_CUSTOMER_ID_8188F 0x7F 322 #define EEPROM_SUBCUSTOMER_ID_8188F 0x59 323 324 /* RTL8188FU */ 325 #define EEPROM_MAC_ADDR_8188FU 0xD7 326 #define EEPROM_VID_8188FU 0xD0 327 #define EEPROM_PID_8188FU 0xD2 328 #define EEPROM_PA_TYPE_8188FU 0xBC 329 #define EEPROM_LNA_TYPE_2G_8188FU 0xBD 330 #define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 331 332 /* RTL8188FS */ 333 #define EEPROM_MAC_ADDR_8188FS 0x11A 334 #define EEPROM_Voltage_ADDR_8188F 0x8 335 336 /* **************************************************** 337 * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS 338 * **************************************************** 339 * 0x10 ~ 0x63 = TX power area. */ 340 #define EEPROM_TX_PWR_INX_8723B 0x10 341 342 #define EEPROM_ChannelPlan_8723B 0xB8 343 #define EEPROM_XTAL_8723B 0xB9 344 #define EEPROM_THERMAL_METER_8723B 0xBA 345 #define EEPROM_IQK_LCK_8723B 0xBB 346 #define EEPROM_2G_5G_PA_TYPE_8723B 0xBC 347 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD 348 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF 349 350 #define EEPROM_RF_BOARD_OPTION_8723B 0xC1 351 #define EEPROM_FEATURE_OPTION_8723B 0xC2 352 #define EEPROM_RF_BT_SETTING_8723B 0xC3 353 #define EEPROM_VERSION_8723B 0xC4 354 #define EEPROM_CustomID_8723B 0xC5 355 #define EEPROM_TX_BBSWING_2G_8723B 0xC6 356 #define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 357 #define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 358 #define EEPROM_RFE_OPTION_8723B 0xCA 359 #define EEPROM_COUNTRY_CODE_8723B 0xCB 360 361 /* RTL8723BE */ 362 #define EEPROM_MAC_ADDR_8723BE 0xD0 363 #define EEPROM_VID_8723BE 0xD6 364 #define EEPROM_DID_8723BE 0xD8 365 #define EEPROM_SVID_8723BE 0xDA 366 #define EEPROM_SMID_8723BE 0xDC 367 368 /* RTL8723BU */ 369 #define EEPROM_MAC_ADDR_8723BU 0x107 370 #define EEPROM_VID_8723BU 0x100 371 #define EEPROM_PID_8723BU 0x102 372 #define EEPROM_PA_TYPE_8723BU 0xBC 373 #define EEPROM_LNA_TYPE_2G_8723BU 0xBD 374 375 376 /* RTL8723BS */ 377 #define EEPROM_MAC_ADDR_8723BS 0x11A 378 #define EEPROM_Voltage_ADDR_8723B 0x8 379 380 /* **************************************************** 381 * EEPROM/Efuse PG Offset for 8703B 382 * **************************************************** */ 383 #define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 384 #define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 385 386 #define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE 387 #define PPG_THERMAL_OFFSET_8703B 0xEF 388 389 #define EEPROM_TX_PWR_INX_8703B 0x10 390 391 #define EEPROM_ChannelPlan_8703B 0xB8 392 #define EEPROM_XTAL_8703B 0xB9 393 #define EEPROM_THERMAL_METER_8703B 0xBA 394 #define EEPROM_IQK_LCK_8703B 0xBB 395 #define EEPROM_2G_5G_PA_TYPE_8703B 0xBC 396 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD 397 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF 398 399 #define EEPROM_RF_BOARD_OPTION_8703B 0xC1 400 #define EEPROM_FEATURE_OPTION_8703B 0xC2 401 #define EEPROM_RF_BT_SETTING_8703B 0xC3 402 #define EEPROM_VERSION_8703B 0xC4 403 #define EEPROM_CustomID_8703B 0xC5 404 #define EEPROM_TX_BBSWING_2G_8703B 0xC6 405 #define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 406 #define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 407 #define EEPROM_RFE_OPTION_8703B 0xCA 408 #define EEPROM_COUNTRY_CODE_8703B 0xCB 409 410 /* RTL8703BU */ 411 #define EEPROM_MAC_ADDR_8703BU 0x107 412 #define EEPROM_VID_8703BU 0x100 413 #define EEPROM_PID_8703BU 0x102 414 #define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 415 #define EEPROM_PA_TYPE_8703BU 0xBC 416 #define EEPROM_LNA_TYPE_2G_8703BU 0xBD 417 418 /* RTL8703BS */ 419 #define EEPROM_MAC_ADDR_8703BS 0x11A 420 #define EEPROM_Voltage_ADDR_8703B 0x8 421 422 /* 423 * ==================================================== 424 * EEPROM/Efuse PG Offset for 8822B 425 * ==================================================== 426 */ 427 #define EEPROM_TX_PWR_INX_8822B 0x10 428 429 #define EEPROM_ChannelPlan_8822B 0xB8 430 #define EEPROM_XTAL_8822B 0xB9 431 #define EEPROM_THERMAL_METER_8822B 0xBA 432 #define EEPROM_IQK_LCK_8822B 0xBB 433 #define EEPROM_2G_5G_PA_TYPE_8822B 0xBC 434 /* PATH A & PATH B */ 435 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBD 436 /* PATH C & PATH D */ 437 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822B 0xBE 438 /* PATH A & PATH B */ 439 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBF 440 /* PATH C & PATH D */ 441 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822B 0xC0 442 443 #define EEPROM_RF_BOARD_OPTION_8822B 0xC1 444 #define EEPROM_FEATURE_OPTION_8822B 0xC2 445 #define EEPROM_RF_BT_SETTING_8822B 0xC3 446 #define EEPROM_VERSION_8822B 0xC4 447 #define EEPROM_CustomID_8822B 0xC5 448 #define EEPROM_TX_BBSWING_2G_8822B 0xC6 449 #define EEPROM_TX_PWR_CALIBRATE_RATE_8822B 0xC8 450 #define EEPROM_RF_ANTENNA_OPT_8822B 0xC9 451 #define EEPROM_RFE_OPTION_8822B 0xCA 452 #define EEPROM_COUNTRY_CODE_8822B 0xCB 453 454 /* RTL8822BU */ 455 #define EEPROM_MAC_ADDR_8822BU 0x107 456 #define EEPROM_VID_8822BU 0x100 457 #define EEPROM_PID_8822BU 0x102 458 #define EEPROM_USB_OPTIONAL_FUNCTION0_8822BU 0x104 459 #define EEPROM_USB_MODE_8822BU 0x06 460 461 /* RTL8822BS */ 462 #define EEPROM_MAC_ADDR_8822BS 0x11A 463 464 /* RTL8822BE */ 465 #define EEPROM_MAC_ADDR_8822BE 0xD0 466 /* 467 * ==================================================== 468 * EEPROM/Efuse PG Offset for 8821C 469 * ==================================================== 470 */ 471 #define EEPROM_TX_PWR_INX_8821C 0x10 472 473 #define EEPROM_CHANNEL_PLAN_8821C 0xB8 474 #define EEPROM_XTAL_8821C 0xB9 475 #define EEPROM_THERMAL_METER_8821C 0xBA 476 #define EEPROM_IQK_LCK_8821C 0xBB 477 #define EEPROM_2G_5G_PA_TYPE_8821C 0xBC 478 /* PATH A & PATH B */ 479 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBD 480 /* PATH C & PATH D */ 481 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8821C 0xBE 482 /* PATH A & PATH B */ 483 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBF 484 /* PATH C & PATH D */ 485 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8821C 0xC0 486 487 #define EEPROM_RF_BOARD_OPTION_8821C 0xC1 488 #define EEPROM_FEATURE_OPTION_8821C 0xC2 489 #define EEPROM_RF_BT_SETTING_8821C 0xC3 490 #define EEPROM_VERSION_8821C 0xC4 491 #define EEPROM_CUSTOMER_ID_8821C 0xC5 492 #define EEPROM_TX_BBSWING_2G_8821C 0xC6 493 #define EEPROM_TX_BBSWING_5G_8821C 0xC7 494 #define EEPROM_TX_PWR_CALIBRATE_RATE_8821C 0xC8 495 #define EEPROM_RF_ANTENNA_OPT_8821C 0xC9 496 #define EEPROM_RFE_OPTION_8821C 0xCA 497 #define EEPROM_COUNTRY_CODE_8821C 0xCB 498 499 /* RTL8821CU */ 500 #define EEPROM_MAC_ADDR_8821CU 0x107 501 #define EEPROM_VID_8821CU 0x100 502 #define EEPROM_PID_8821CU 0x102 503 #define EEPROM_USB_OPTIONAL_FUNCTION0_8821CU 0x104 504 #define EEPROM_USB_MODE_8821CU 0x06 505 506 /* RTL8821CS */ 507 #define EEPROM_MAC_ADDR_8821CS 0x11A 508 509 /* RTL8821CE */ 510 #define EEPROM_MAC_ADDR_8821CE 0xD0 511 /* **************************************************** 512 * EEPROM/Efuse PG Offset for 8723D 513 * **************************************************** */ 514 #define GET_PG_KFREE_ON_8723D(_pg_m) \ 515 LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 516 #define GET_PG_KFREE_THERMAL_K_ON_8723D(_pg_m) \ 517 LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 518 519 #define PPG_8723D_S1 0 520 #define PPG_8723D_S0 1 521 522 #define PPG_BB_GAIN_2G_TXA_OFFSET_8723D 0xEE 523 #define PPG_BB_GAIN_2G_TX_OFFSET_8723D 0x1EE 524 #define PPG_THERMAL_OFFSET_8723D 0xEF 525 526 #define EEPROM_TX_PWR_INX_8723D 0x10 527 528 #define EEPROM_ChannelPlan_8723D 0xB8 529 #define EEPROM_XTAL_8723D 0xB9 530 #define EEPROM_THERMAL_METER_8723D 0xBA 531 #define EEPROM_IQK_LCK_8723D 0xBB 532 #define EEPROM_2G_5G_PA_TYPE_8723D 0xBC 533 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723D 0xBD 534 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723D 0xBF 535 536 #define EEPROM_RF_BOARD_OPTION_8723D 0xC1 537 #define EEPROM_FEATURE_OPTION_8723D 0xC2 538 #define EEPROM_RF_BT_SETTING_8723D 0xC3 539 #define EEPROM_VERSION_8723D 0xC4 540 #define EEPROM_CustomID_8723D 0xC5 541 #define EEPROM_TX_BBSWING_2G_8723D 0xC6 542 #define EEPROM_TX_PWR_CALIBRATE_RATE_8723D 0xC8 543 #define EEPROM_RF_ANTENNA_OPT_8723D 0xC9 544 #define EEPROM_RFE_OPTION_8723D 0xCA 545 #define EEPROM_COUNTRY_CODE_8723D 0xCB 546 547 /* RTL8723DE */ 548 #define EEPROM_MAC_ADDR_8723DE 0xD0 549 #define EEPROM_VID_8723DE 0xD6 550 #define EEPROM_DID_8723DE 0xD8 551 #define EEPROM_SVID_8723DE 0xDA 552 #define EEPROM_SMID_8723DE 0xDC 553 554 /* RTL8723DU */ 555 #define EEPROM_MAC_ADDR_8723DU 0x107 556 #define EEPROM_VID_8723DU 0x100 557 #define EEPROM_PID_8723DU 0x102 558 #define EEPROM_USB_OPTIONAL_FUNCTION0_8723DU 0x104 559 560 /* RTL8723BS */ 561 #define EEPROM_MAC_ADDR_8723DS 0x11A 562 #define EEPROM_Voltage_ADDR_8723D 0x8 563 564 /* **************************************************** 565 * EEPROM/Efuse Value Type 566 * **************************************************** */ 567 #define EETYPE_TX_PWR 0x0 568 /* **************************************************** 569 * EEPROM/Efuse Default Value 570 * **************************************************** */ 571 #define EEPROM_CID_DEFAULT 0x0 572 #define EEPROM_CID_DEFAULT_EXT 0xFF /* Reserved for Realtek */ 573 #define EEPROM_CID_TOSHIBA 0x4 574 #define EEPROM_CID_CCX 0x10 575 #define EEPROM_CID_QMI 0x0D 576 #define EEPROM_CID_WHQL 0xFE 577 578 #define EEPROM_CHANNEL_PLAN_FCC 0x0 579 #define EEPROM_CHANNEL_PLAN_IC 0x1 580 #define EEPROM_CHANNEL_PLAN_ETSI 0x2 581 #define EEPROM_CHANNEL_PLAN_SPAIN 0x3 582 #define EEPROM_CHANNEL_PLAN_FRANCE 0x4 583 #define EEPROM_CHANNEL_PLAN_MKK 0x5 584 #define EEPROM_CHANNEL_PLAN_MKK1 0x6 585 #define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 586 #define EEPROM_CHANNEL_PLAN_TELEC 0x8 587 #define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 588 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA 589 #define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB 590 #define EEPROM_CHANNEL_PLAN_CHIAN 0XC 591 #define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD 592 #define EEPROM_CHANNEL_PLAN_KOREA 0xE 593 #define EEPROM_CHANNEL_PLAN_TURKEY 0xF 594 #define EEPROM_CHANNEL_PLAN_JAPAN 0x10 595 #define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 596 #define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 597 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 598 #define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 599 600 #define EEPROM_USB_OPTIONAL1 0xE 601 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 602 603 #define RTL_EEPROM_ID 0x8129 604 #define EEPROM_Default_TSSI 0x0 605 #define EEPROM_Default_BoardType 0x02 606 #define EEPROM_Default_ThermalMeter 0x12 607 #define EEPROM_Default_ThermalMeter_92SU 0x7 608 #define EEPROM_Default_ThermalMeter_88E 0x18 609 #define EEPROM_Default_ThermalMeter_8812 0x18 610 #define EEPROM_Default_ThermalMeter_8192E 0x1A 611 #define EEPROM_Default_ThermalMeter_8723B 0x18 612 #define EEPROM_Default_ThermalMeter_8703B 0x18 613 #define EEPROM_Default_ThermalMeter_8723D 0x18 614 #define EEPROM_Default_ThermalMeter_8188F 0x18 615 #define EEPROM_Default_ThermalMeter_8814A 0x18 616 617 618 #define EEPROM_Default_CrystalCap 0x0 619 #define EEPROM_Default_CrystalCap_8723A 0x20 620 #define EEPROM_Default_CrystalCap_88E 0x20 621 #define EEPROM_Default_CrystalCap_8812 0x20 622 #define EEPROM_Default_CrystalCap_8814 0x20 623 #define EEPROM_Default_CrystalCap_8192E 0x20 624 #define EEPROM_Default_CrystalCap_8723B 0x20 625 #define EEPROM_Default_CrystalCap_8703B 0x20 626 #define EEPROM_Default_CrystalCap_8723D 0x20 627 #define EEPROM_Default_CrystalCap_8188F 0x20 628 #define EEPROM_Default_CrystalFreq 0x0 629 #define EEPROM_Default_TxPowerLevel_92C 0x22 630 #define EEPROM_Default_TxPowerLevel_2G 0x2C 631 #define EEPROM_Default_TxPowerLevel_5G 0x22 632 #define EEPROM_Default_TxPowerLevel 0x22 633 #define EEPROM_Default_HT40_2SDiff 0x0 634 #define EEPROM_Default_HT20_Diff 2 635 #define EEPROM_Default_LegacyHTTxPowerDiff 0x3 636 #define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 637 #define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 638 #define EEPROM_Default_HT40_PwrMaxOffset 0 639 #define EEPROM_Default_HT20_PwrMaxOffset 0 640 641 #define EEPROM_Default_PID 0x1234 642 #define EEPROM_Default_VID 0x5678 643 #define EEPROM_Default_CustomerID 0xAB 644 #define EEPROM_Default_CustomerID_8188E 0x00 645 #define EEPROM_Default_SubCustomerID 0xCD 646 #define EEPROM_Default_Version 0 647 648 #define EEPROM_Default_externalPA_C9 0x00 649 #define EEPROM_Default_externalPA_CC 0xFF 650 #define EEPROM_Default_internalPA_SP3T_C9 0xAA 651 #define EEPROM_Default_internalPA_SP3T_CC 0xAF 652 #define EEPROM_Default_internalPA_SPDT_C9 0xAA 653 #ifdef CONFIG_PCI_HCI 654 #define EEPROM_Default_internalPA_SPDT_CC 0xA0 655 #else 656 #define EEPROM_Default_internalPA_SPDT_CC 0xFA 657 #endif 658 #define EEPROM_Default_PAType 0 659 #define EEPROM_Default_LNAType 0 660 661 /* New EFUSE default value */ 662 #define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F 663 #define EEPROM_DEFAULT_BOARD_OPTION 0x00 664 #define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF 665 #define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF 666 #define EEPROM_DEFAULT_RFE_OPTION 0x04 667 #define EEPROM_DEFAULT_FEATURE_OPTION 0x00 668 #define EEPROM_DEFAULT_BT_OPTION 0x10 669 670 671 #define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 672 673 /* PCIe related */ 674 #define EEPROM_PCIE_DEV_CAP_01 0xE0 /* Express device capability in PCIe configuration space, i.e., map to offset 0x74 */ 675 #define EEPROM_PCIE_DEV_CAP_02 0xE1 /* Express device capability in PCIe configuration space, i.e., map to offset 0x75 */ 676 677 678 /* 679 * For VHT series TX power by rate table. 680 * VHT TX power by rate off setArray = 681 * Band:-2G&5G = 0 / 1 682 * RF: at most 4*4 = ABCD=0/1/2/3 683 * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 684 * */ 685 #define TX_PWR_BY_RATE_NUM_BAND 2 686 #define TX_PWR_BY_RATE_NUM_RF 4 687 #define TX_PWR_BY_RATE_NUM_RATE 84 688 689 #define TXPWR_LMT_MAX_RF 4 690 691 /* ---------------------------------------------------------------------------- 692 * EEPROM/EFUSE data structure definition. 693 * ---------------------------------------------------------------------------- */ 694 695 /* For 88E new structure */ 696 697 /* 698 2.4G: 699 { 700 {1,2}, 701 {3,4,5}, 702 {6,7,8}, 703 {9,10,11}, 704 {12,13}, 705 {14} 706 } 707 708 5G: 709 { 710 {36,38,40}, 711 {44,46,48}, 712 {52,54,56}, 713 {60,62,64}, 714 {100,102,104}, 715 {108,110,112}, 716 {116,118,120}, 717 {124,126,128}, 718 {132,134,136}, 719 {140,142,144}, 720 {149,151,153}, 721 {157,159,161}, 722 {173,175,177}, 723 } 724 */ 725 #define MAX_RF_PATH 4 726 #define RF_PATH_MAX MAX_RF_PATH 727 #define MAX_CHNL_GROUP_24G 6 728 #define MAX_CHNL_GROUP_5G 14 729 730 /* It must always set to 4, otherwise read efuse table sequence will be wrong. */ 731 #define MAX_TX_COUNT 4 732 733 typedef struct _TxPowerInfo24G { 734 u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; 735 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; 736 /* If only one tx, only BW20 and OFDM are used. */ 737 s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 738 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 739 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 740 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 741 } TxPowerInfo24G, *PTxPowerInfo24G; 742 743 typedef struct _TxPowerInfo5G { 744 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; 745 /* If only one tx, only BW20, OFDM, BW80 and BW160 are used. */ 746 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 747 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 748 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 749 s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 750 s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 751 } TxPowerInfo5G, *PTxPowerInfo5G; 752 753 754 typedef enum _BT_Ant_NUM { 755 Ant_x2 = 0, 756 Ant_x1 = 1 757 } BT_Ant_NUM, *PBT_Ant_NUM; 758 759 typedef enum _BT_CoType { 760 BT_2WIRE = 0, 761 BT_ISSC_3WIRE = 1, 762 BT_ACCEL = 2, 763 BT_CSR_BC4 = 3, 764 BT_CSR_BC8 = 4, 765 BT_RTL8756 = 5, 766 BT_RTL8723A = 6, 767 BT_RTL8821 = 7, 768 BT_RTL8723B = 8, 769 BT_RTL8192E = 9, 770 BT_RTL8814A = 10, 771 BT_RTL8812A = 11, 772 BT_RTL8703B = 12, 773 BT_RTL8822B = 13, 774 BT_RTL8723D = 14, 775 BT_RTL8821C = 15 776 } BT_CoType, *PBT_CoType; 777 778 typedef enum _BT_RadioShared { 779 BT_Radio_Shared = 0, 780 BT_Radio_Individual = 1, 781 } BT_RadioShared, *PBT_RadioShared; 782 783 784 #endif 785