1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __HAL_INTF_H__ 16 #define __HAL_INTF_H__ 17 18 19 enum RTL871X_HCI_TYPE { 20 RTW_PCIE = BIT0, 21 RTW_USB = BIT1, 22 RTW_SDIO = BIT2, 23 RTW_GSPI = BIT3, 24 }; 25 26 enum _CHIP_TYPE { 27 28 NULL_CHIP_TYPE, 29 RTL8188E, 30 RTL8192E, 31 RTL8812, 32 RTL8821, /* RTL8811 */ 33 RTL8723B, 34 RTL8814A, 35 RTL8703B, 36 RTL8188F, 37 RTL8822B, 38 RTL8723D, 39 RTL8821C, 40 MAX_CHIP_TYPE 41 }; 42 43 #ifdef RTW_HALMAC 44 enum fw_mem { 45 FW_EMEM, 46 FW_IMEM, 47 FW_DMEM, 48 }; 49 #endif 50 51 extern const u32 _chip_type_to_odm_ic_type[]; 52 #define chip_type_to_odm_ic_type(chip_type) (((chip_type) >= MAX_CHIP_TYPE) ? _chip_type_to_odm_ic_type[MAX_CHIP_TYPE] : _chip_type_to_odm_ic_type[(chip_type)]) 53 54 typedef enum _HAL_HW_TIMER_TYPE { 55 HAL_TIMER_NONE = 0, 56 HAL_TIMER_TXBF = 1, 57 HAL_TIMER_EARLYMODE = 2, 58 } HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE; 59 60 61 typedef enum _HW_VARIABLES { 62 HW_VAR_MEDIA_STATUS, 63 HW_VAR_SET_OPMODE, 64 HW_VAR_MAC_ADDR, 65 HW_VAR_BSSID, 66 HW_VAR_INIT_RTS_RATE, 67 HW_VAR_BASIC_RATE, 68 HW_VAR_TXPAUSE, 69 HW_VAR_BCN_FUNC, 70 HW_VAR_CORRECT_TSF, 71 HW_VAR_RCR, 72 HW_VAR_MLME_DISCONNECT, 73 HW_VAR_MLME_SITESURVEY, 74 HW_VAR_MLME_JOIN, 75 HW_VAR_ON_RCR_AM, 76 HW_VAR_OFF_RCR_AM, 77 HW_VAR_BEACON_INTERVAL, 78 HW_VAR_SLOT_TIME, 79 HW_VAR_RESP_SIFS, 80 HW_VAR_ACK_PREAMBLE, 81 HW_VAR_SEC_CFG, 82 HW_VAR_SEC_DK_CFG, 83 HW_VAR_BCN_VALID, 84 HW_VAR_RF_TYPE, 85 /* PHYDM odm->SupportAbility */ 86 HW_VAR_CAM_EMPTY_ENTRY, 87 HW_VAR_CAM_INVALID_ALL, 88 HW_VAR_AC_PARAM_VO, 89 HW_VAR_AC_PARAM_VI, 90 HW_VAR_AC_PARAM_BE, 91 HW_VAR_AC_PARAM_BK, 92 HW_VAR_ACM_CTRL, 93 #ifdef CONFIG_WMMPS_STA 94 HW_VAR_UAPSD_TID, 95 #endif /* CONFIG_WMMPS_STA */ 96 HW_VAR_AMPDU_MIN_SPACE, 97 HW_VAR_AMPDU_FACTOR, 98 HW_VAR_RXDMA_AGG_PG_TH, 99 HW_VAR_SET_RPWM, 100 HW_VAR_CPWM, 101 HW_VAR_H2C_FW_PWRMODE, 102 HW_VAR_H2C_PS_TUNE_PARAM, 103 HW_VAR_H2C_FW_JOINBSSRPT, 104 HW_VAR_FWLPS_RF_ON, 105 HW_VAR_H2C_FW_P2P_PS_OFFLOAD, 106 #ifdef CONFIG_LPS_POFF 107 HW_VAR_LPS_POFF_INIT, 108 HW_VAR_LPS_POFF_DEINIT, 109 HW_VAR_LPS_POFF_SET_MODE, 110 HW_VAR_LPS_POFF_WOW_EN, 111 #endif 112 #ifdef CONFIG_LPS_PG 113 HW_VAR_LPS_PG_HANDLE, 114 #endif 115 HW_VAR_TRIGGER_GPIO_0, 116 HW_VAR_BT_SET_COEXIST, 117 HW_VAR_BT_ISSUE_DELBA, 118 HW_VAR_SWITCH_EPHY_WoWLAN, 119 HW_VAR_EFUSE_USAGE, 120 HW_VAR_EFUSE_BYTES, 121 HW_VAR_EFUSE_BT_USAGE, 122 HW_VAR_EFUSE_BT_BYTES, 123 HW_VAR_FIFO_CLEARN_UP, 124 HW_VAR_RESTORE_HW_SEQ, 125 HW_VAR_CHECK_TXBUF, 126 HW_VAR_PCIE_STOP_TX_DMA, 127 HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ 128 HW_VAR_HCI_SUS_STATE, 129 /* The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. */ 130 /* Unit in microsecond. 0 means disable this function. */ 131 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 132 HW_VAR_WOWLAN, 133 HW_VAR_WAKEUP_REASON, 134 #endif 135 HW_VAR_RPWM_TOG, 136 #ifdef CONFIG_GPIO_WAKEUP 137 HW_SET_GPIO_WL_CTRL, 138 #endif 139 HW_VAR_SYS_CLKR, 140 HW_VAR_NAV_UPPER, 141 HW_VAR_RPT_TIMER_SETTING, 142 HW_VAR_TX_RPT_MAX_MACID, 143 HW_VAR_CHK_HI_QUEUE_EMPTY, 144 HW_VAR_CHK_MGQ_CPU_EMPTY, 145 HW_VAR_DL_BCN_SEL, 146 HW_VAR_AMPDU_MAX_TIME, 147 HW_VAR_WIRELESS_MODE, 148 HW_VAR_USB_MODE, 149 HW_VAR_PORT_SWITCH, 150 HW_VAR_PORT_CFG, 151 HW_VAR_DO_IQK, 152 HW_VAR_DM_IN_LPS_LCLK,/*flag CONFIG_LPS_LCLK_WD_TIMER*/ 153 HW_VAR_SET_REQ_FW_PS, 154 HW_VAR_FW_PS_STATE, 155 HW_VAR_SOUNDING_ENTER, 156 HW_VAR_SOUNDING_LEAVE, 157 HW_VAR_SOUNDING_RATE, 158 HW_VAR_SOUNDING_STATUS, 159 HW_VAR_SOUNDING_FW_NDPA, 160 HW_VAR_SOUNDING_CLK, 161 HW_VAR_SOUNDING_SET_GID_TABLE, 162 HW_VAR_SOUNDING_CSI_REPORT, 163 /*Add by YuChen for TXBF HW timer*/ 164 HW_VAR_HW_REG_TIMER_INIT, 165 HW_VAR_HW_REG_TIMER_RESTART, 166 HW_VAR_HW_REG_TIMER_START, 167 HW_VAR_HW_REG_TIMER_STOP, 168 /*Add by YuChen for TXBF HW timer*/ 169 HW_VAR_DL_RSVD_PAGE, 170 HW_VAR_MACID_LINK, 171 HW_VAR_MACID_NOLINK, 172 HW_VAR_MACID_SLEEP, 173 HW_VAR_MACID_WAKEUP, 174 HW_VAR_DUMP_MAC_QUEUE_INFO, 175 HW_VAR_ASIX_IOT, 176 #ifdef CONFIG_MBSSID_CAM 177 HW_VAR_MBSSID_CAM_WRITE, 178 HW_VAR_MBSSID_CAM_CLEAR, 179 HW_VAR_RCR_MBSSID_EN, 180 #endif 181 HW_VAR_EN_HW_UPDATE_TSF, 182 HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, 183 HW_VAR_CH_SW_IQK_INFO_BACKUP, 184 HW_VAR_CH_SW_IQK_INFO_RESTORE, 185 186 HW_VAR_DBI, 187 HW_VAR_MDIO, 188 HW_VAR_L1OFF_CAPABILITY, 189 HW_VAR_L1OFF_NIC_SUPPORT, 190 #ifdef CONFIG_TDLS 191 #ifdef CONFIG_TDLS_CH_SW 192 HW_VAR_TDLS_BCN_EARLY_C2H_RPT, 193 #endif 194 #endif 195 HW_VAR_DUMP_MAC_TXFIFO, 196 HW_VAR_PWR_CMD, 197 } HW_VARIABLES; 198 199 typedef enum _HAL_DEF_VARIABLE { 200 HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, 201 HAL_DEF_IS_SUPPORT_ANT_DIV, 202 HAL_DEF_DRVINFO_SZ, 203 HAL_DEF_MAX_RECVBUF_SZ, 204 HAL_DEF_RX_PACKET_OFFSET, 205 HAL_DEF_RX_DMA_SZ_WOW, 206 HAL_DEF_RX_DMA_SZ, 207 HAL_DEF_RX_PAGE_SIZE, 208 HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */ 209 HAL_DEF_RA_DECISION_RATE, 210 HAL_DEF_RA_SGI, 211 HAL_DEF_PT_PWR_STATUS, 212 HAL_DEF_TX_LDPC, /* LDPC support */ 213 HAL_DEF_RX_LDPC, /* LDPC support */ 214 HAL_DEF_TX_STBC, /* TX STBC support */ 215 HAL_DEF_RX_STBC, /* RX STBC support */ 216 HAL_DEF_EXPLICIT_BEAMFORMER,/* Explicit Compressed Steering Capable */ 217 HAL_DEF_EXPLICIT_BEAMFORMEE,/* Explicit Compressed Beamforming Feedback Capable */ 218 HAL_DEF_VHT_MU_BEAMFORMER, /* VHT MU Beamformer support */ 219 HAL_DEF_VHT_MU_BEAMFORMEE, /* VHT MU Beamformee support */ 220 HAL_DEF_BEAMFORMER_CAP, 221 HAL_DEF_BEAMFORMEE_CAP, 222 HW_VAR_MAX_RX_AMPDU_FACTOR, 223 HW_DEF_RA_INFO_DUMP, 224 HAL_DEF_DBG_DUMP_TXPKT, 225 226 HAL_DEF_TX_PAGE_SIZE, 227 HAL_DEF_TX_PAGE_BOUNDARY, 228 HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, 229 HAL_DEF_ANT_DETECT,/* to do for 8723a */ 230 HAL_DEF_PCI_SUUPORT_L1_BACKDOOR, /* Determine if the L1 Backdoor setting is turned on. */ 231 HAL_DEF_PCI_AMD_L1_SUPPORT, 232 HAL_DEF_PCI_ASPM_OSC, /* Support for ASPM OSC, added by Roger, 2013.03.27. */ 233 HAL_DEF_MACID_SLEEP, /* Support for MACID sleep */ 234 HAL_DEF_DBG_DIS_PWT, /* disable Tx power training or not. */ 235 HAL_DEF_EFUSE_USAGE, /* Get current EFUSE utilization. 2008.12.19. Added by Roger. */ 236 HAL_DEF_EFUSE_BYTES, 237 HW_VAR_BEST_AMPDU_DENSITY, 238 } HAL_DEF_VARIABLE; 239 240 typedef enum _HAL_ODM_VARIABLE { 241 HAL_ODM_STA_INFO, 242 HAL_ODM_P2P_STATE, 243 HAL_ODM_WIFI_DISPLAY_STATE, 244 HAL_ODM_REGULATION, 245 HAL_ODM_INITIAL_GAIN, 246 HAL_ODM_RX_INFO_DUMP, 247 HAL_ODM_RX_Dframe_INFO, 248 #ifdef CONFIG_ANTENNA_DIVERSITY 249 HAL_ODM_ANTDIV_SELECT 250 #endif 251 } HAL_ODM_VARIABLE; 252 253 typedef enum _HAL_INTF_PS_FUNC { 254 HAL_USB_SELECT_SUSPEND, 255 HAL_MAX_ID, 256 } HAL_INTF_PS_FUNC; 257 258 typedef s32(*c2h_id_filter)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); 259 260 struct txpwr_idx_comp; 261 262 struct hal_ops { 263 /*** initialize section ***/ 264 void (*read_chip_version)(_adapter *padapter); 265 void (*init_default_value)(_adapter *padapter); 266 void (*intf_chip_configure)(_adapter *padapter); 267 u8 (*read_adapter_info)(_adapter *padapter); 268 u32(*hal_power_on)(_adapter *padapter); 269 void (*hal_power_off)(_adapter *padapter); 270 u32(*hal_init)(_adapter *padapter); 271 u32(*hal_deinit)(_adapter *padapter); 272 void (*dm_init)(_adapter *padapter); 273 void (*dm_deinit)(_adapter *padapter); 274 275 /*** xmit section ***/ 276 s32(*init_xmit_priv)(_adapter *padapter); 277 void (*free_xmit_priv)(_adapter *padapter); 278 s32(*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe); 279 /* 280 * mgnt_xmit should be implemented to run in interrupt context 281 */ 282 s32(*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe); 283 s32(*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); 284 #ifdef CONFIG_XMIT_THREAD_MODE 285 s32(*xmit_thread_handler)(_adapter *padapter); 286 #endif 287 void (*run_thread)(_adapter *padapter); 288 void (*cancel_thread)(_adapter *padapter); 289 290 /*** recv section ***/ 291 s32(*init_recv_priv)(_adapter *padapter); 292 void (*free_recv_priv)(_adapter *padapter); 293 #ifdef CONFIG_RECV_THREAD_MODE 294 s32 (*recv_hdl)(_adapter *adapter); 295 #endif 296 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) 297 u32(*inirp_init)(_adapter *padapter); 298 u32(*inirp_deinit)(_adapter *padapter); 299 #endif 300 /*** interrupt hdl section ***/ 301 void (*enable_interrupt)(_adapter *padapter); 302 void (*disable_interrupt)(_adapter *padapter); 303 u8(*check_ips_status)(_adapter *padapter); 304 #if defined(CONFIG_PCI_HCI) 305 s32(*interrupt_handler)(_adapter *padapter); 306 #endif 307 308 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) 309 void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf); 310 #endif 311 312 #if defined(CONFIG_PCI_HCI) 313 void (*irp_reset)(_adapter *padapter); 314 #endif 315 316 /*** DM section ***/ 317 #ifdef CONFIG_RTW_SW_LED 318 void (*InitSwLeds)(_adapter *padapter); 319 void (*DeInitSwLeds)(_adapter *padapter); 320 #endif 321 void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); 322 323 void (*set_tx_power_level_handler)(_adapter *padapter, u8 channel); 324 void (*get_tx_power_level_handler)(_adapter *padapter, s32 *powerlevel); 325 326 void (*set_tx_power_index_handler)(_adapter *padapter, u32 powerindex, enum rf_path rfpath, u8 rate); 327 u8 (*get_tx_power_index_handler)(_adapter *padapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); 328 329 void (*hal_dm_watchdog)(_adapter *padapter); 330 331 u8 (*set_hw_reg_handler)(_adapter *padapter, u8 variable, u8 *val); 332 333 void (*GetHwRegHandler)(_adapter *padapter, u8 variable, u8 *val); 334 335 336 337 u8 (*get_hal_def_var_handler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); 338 339 u8(*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); 340 341 void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2); 342 void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet); 343 344 void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter); 345 346 u8(*interface_ps_func)(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); 347 348 u32(*read_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask); 349 void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); 350 u32 (*read_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask); 351 void (*write_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); 352 353 #ifdef CONFIG_HOSTAPD_MLME 354 s32(*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt); 355 #endif 356 357 void (*EfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); 358 void (*BTEfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); 359 void (*ReadEFuse)(_adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest); 360 void (*EFUSEGetEfuseDefinition)(_adapter *padapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); 361 u16(*EfuseGetCurrentSize)(_adapter *padapter, u8 efuseType, BOOLEAN bPseudoTest); 362 int (*Efuse_PgPacketRead)(_adapter *padapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); 363 int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); 364 u8(*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); 365 BOOLEAN(*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); 366 367 #ifdef DBG_CONFIG_ERROR_DETECT 368 void (*sreset_init_value)(_adapter *padapter); 369 void (*sreset_reset_value)(_adapter *padapter); 370 void (*silentreset)(_adapter *padapter); 371 void (*sreset_xmit_status_check)(_adapter *padapter); 372 void (*sreset_linked_status_check)(_adapter *padapter); 373 u8(*sreset_get_wifi_status)(_adapter *padapter); 374 bool (*sreset_inprogress)(_adapter *padapter); 375 #endif 376 377 #ifdef CONFIG_IOL 378 int (*IOL_exec_cmds_sync)(_adapter *padapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); 379 #endif 380 381 void (*hal_notch_filter)(_adapter *adapter, bool enable); 382 #ifdef RTW_HALMAC 383 void (*hal_mac_c2h_handler)(_adapter *adapter, u8 *pbuf, u16 length); 384 #else 385 s32(*c2h_handler)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); 386 #endif 387 void (*reqtxrpt)(_adapter *padapter, u8 macid); 388 s32(*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 389 void (*fill_fake_txdesc)(PADAPTER, u8 *pDesc, u32 BufferLen, 390 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); 391 s32(*fw_dl)(_adapter *adapter, u8 wowlan); 392 #ifdef RTW_HALMAC 393 s32 (*fw_mem_dl)(_adapter *adapter, enum fw_mem mem); 394 #endif 395 396 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI) 397 void (*clear_interrupt)(_adapter *padapter); 398 #endif 399 u8(*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan); 400 #ifdef CONFIG_GPIO_API 401 void (*update_hisr_hsisr_ind)(PADAPTER padapter, u32 flag); 402 int (*hal_gpio_func_check)(_adapter *padapter, u8 gpio_num); 403 void (*hal_gpio_multi_func_reset)(_adapter *padapter, u8 gpio_num); 404 #endif 405 void (*fw_correct_bcn)(PADAPTER padapter); 406 407 #ifdef RTW_HALMAC 408 u8(*init_mac_register)(PADAPTER); 409 u8(*init_phy)(PADAPTER); 410 #endif /* RTW_HALMAC */ 411 412 #ifdef CONFIG_PCI_HCI 413 void (*hal_set_l1ssbackdoor_handler)(_adapter *padapter, u8 enable); 414 #endif 415 416 #ifdef CONFIG_RFKILL_POLL 417 bool (*hal_radio_onoff_check)(_adapter *adapter, u8 *valid); 418 #endif 419 420 }; 421 422 typedef enum _RT_EEPROM_TYPE { 423 EEPROM_93C46, 424 EEPROM_93C56, 425 EEPROM_BOOT_EFUSE, 426 } RT_EEPROM_TYPE, *PRT_EEPROM_TYPE; 427 428 429 430 #define RF_CHANGE_BY_INIT 0 431 #define RF_CHANGE_BY_IPS BIT28 432 #define RF_CHANGE_BY_PS BIT29 433 #define RF_CHANGE_BY_HW BIT30 434 #define RF_CHANGE_BY_SW BIT31 435 436 typedef enum _HARDWARE_TYPE { 437 HARDWARE_TYPE_RTL8188EE, 438 HARDWARE_TYPE_RTL8188EU, 439 HARDWARE_TYPE_RTL8188ES, 440 /* NEW_GENERATION_IC */ 441 HARDWARE_TYPE_RTL8192EE, 442 HARDWARE_TYPE_RTL8192EU, 443 HARDWARE_TYPE_RTL8192ES, 444 HARDWARE_TYPE_RTL8812E, 445 HARDWARE_TYPE_RTL8812AU, 446 HARDWARE_TYPE_RTL8811AU, 447 HARDWARE_TYPE_RTL8821E, 448 HARDWARE_TYPE_RTL8821U, 449 HARDWARE_TYPE_RTL8821S, 450 HARDWARE_TYPE_RTL8723BE, 451 HARDWARE_TYPE_RTL8723BU, 452 HARDWARE_TYPE_RTL8723BS, 453 HARDWARE_TYPE_RTL8814AE, 454 HARDWARE_TYPE_RTL8814AU, 455 HARDWARE_TYPE_RTL8814AS, 456 HARDWARE_TYPE_RTL8821BE, 457 HARDWARE_TYPE_RTL8821BU, 458 HARDWARE_TYPE_RTL8821BS, 459 HARDWARE_TYPE_RTL8822BE, 460 HARDWARE_TYPE_RTL8822BU, 461 HARDWARE_TYPE_RTL8822BS, 462 HARDWARE_TYPE_RTL8703BE, 463 HARDWARE_TYPE_RTL8703BU, 464 HARDWARE_TYPE_RTL8703BS, 465 HARDWARE_TYPE_RTL8188FE, 466 HARDWARE_TYPE_RTL8188FU, 467 HARDWARE_TYPE_RTL8188FS, 468 HARDWARE_TYPE_RTL8723DE, 469 HARDWARE_TYPE_RTL8723DU, 470 HARDWARE_TYPE_RTL8723DS, 471 HARDWARE_TYPE_RTL8821CE, 472 HARDWARE_TYPE_RTL8821CU, 473 HARDWARE_TYPE_RTL8821CS, 474 HARDWARE_TYPE_MAX, 475 } HARDWARE_TYPE; 476 477 #define IS_NEW_GENERATION_IC(_Adapter) (rtw_get_hw_type(_Adapter) >= HARDWARE_TYPE_RTL8192EE) 478 /* 479 * RTL8188E Series 480 * */ 481 #define IS_HARDWARE_TYPE_8188EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EE) 482 #define IS_HARDWARE_TYPE_8188EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EU) 483 #define IS_HARDWARE_TYPE_8188ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188ES) 484 #define IS_HARDWARE_TYPE_8188E(_Adapter) \ 485 (IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) 486 487 /* RTL8812 Series */ 488 #define IS_HARDWARE_TYPE_8812E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812E) 489 #define IS_HARDWARE_TYPE_8812AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812AU) 490 #define IS_HARDWARE_TYPE_8812(_Adapter) \ 491 (IS_HARDWARE_TYPE_8812E(_Adapter) || IS_HARDWARE_TYPE_8812AU(_Adapter)) 492 493 /* RTL8821 Series */ 494 #define IS_HARDWARE_TYPE_8821E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821E) 495 #define IS_HARDWARE_TYPE_8811AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) 496 #define IS_HARDWARE_TYPE_8821U(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821U || \ 497 rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) 498 #define IS_HARDWARE_TYPE_8821S(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821S) 499 #define IS_HARDWARE_TYPE_8821(_Adapter) \ 500 (IS_HARDWARE_TYPE_8821E(_Adapter) || IS_HARDWARE_TYPE_8821U(_Adapter) || IS_HARDWARE_TYPE_8821S(_Adapter)) 501 502 #define IS_HARDWARE_TYPE_JAGUAR(_Adapter) \ 503 (IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter)) 504 505 /* RTL8192E Series */ 506 #define IS_HARDWARE_TYPE_8192EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EE) 507 #define IS_HARDWARE_TYPE_8192EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EU) 508 #define IS_HARDWARE_TYPE_8192ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192ES) 509 510 #define IS_HARDWARE_TYPE_8192E(_Adapter) \ 511 (IS_HARDWARE_TYPE_8192EE(_Adapter) || IS_HARDWARE_TYPE_8192EU(_Adapter) || IS_HARDWARE_TYPE_8192ES(_Adapter)) 512 513 #define IS_HARDWARE_TYPE_8723BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BE) 514 #define IS_HARDWARE_TYPE_8723BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BU) 515 #define IS_HARDWARE_TYPE_8723BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BS) 516 517 #define IS_HARDWARE_TYPE_8723B(_Adapter) \ 518 (IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) || IS_HARDWARE_TYPE_8723BS(_Adapter)) 519 520 /* RTL8814A Series */ 521 #define IS_HARDWARE_TYPE_8814AE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AE) 522 #define IS_HARDWARE_TYPE_8814AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AU) 523 #define IS_HARDWARE_TYPE_8814AS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AS) 524 525 #define IS_HARDWARE_TYPE_8814A(_Adapter) \ 526 (IS_HARDWARE_TYPE_8814AE(_Adapter) || IS_HARDWARE_TYPE_8814AU(_Adapter) || IS_HARDWARE_TYPE_8814AS(_Adapter)) 527 528 /* RTL8703B Series */ 529 #define IS_HARDWARE_TYPE_8703BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BE) 530 #define IS_HARDWARE_TYPE_8703BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BS) 531 #define IS_HARDWARE_TYPE_8703BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BU) 532 #define IS_HARDWARE_TYPE_8703B(_Adapter) \ 533 (IS_HARDWARE_TYPE_8703BE(_Adapter) || IS_HARDWARE_TYPE_8703BU(_Adapter) || IS_HARDWARE_TYPE_8703BS(_Adapter)) 534 535 /* RTL8723D Series */ 536 #define IS_HARDWARE_TYPE_8723DE(_Adapter)\ 537 (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DE) 538 #define IS_HARDWARE_TYPE_8723DS(_Adapter)\ 539 (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DS) 540 #define IS_HARDWARE_TYPE_8723DU(_Adapter)\ 541 (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DU) 542 #define IS_HARDWARE_TYPE_8723D(_Adapter)\ 543 (IS_HARDWARE_TYPE_8723DE(_Adapter) || \ 544 IS_HARDWARE_TYPE_8723DU(_Adapter) || \ 545 IS_HARDWARE_TYPE_8723DS(_Adapter)) 546 547 /* RTL8188F Series */ 548 #define IS_HARDWARE_TYPE_8188FE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE) 549 #define IS_HARDWARE_TYPE_8188FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS) 550 #define IS_HARDWARE_TYPE_8188FU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FU) 551 #define IS_HARDWARE_TYPE_8188F(_Adapter) \ 552 (IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter)) 553 554 #define IS_HARDWARE_TYPE_8821BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE) 555 #define IS_HARDWARE_TYPE_8821BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU) 556 #define IS_HARDWARE_TYPE_8821BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS) 557 558 #define IS_HARDWARE_TYPE_8821B(_Adapter) \ 559 (IS_HARDWARE_TYPE_8821BE(_Adapter) || IS_HARDWARE_TYPE_8821BU(_Adapter) || IS_HARDWARE_TYPE_8821BS(_Adapter)) 560 561 #define IS_HARDWARE_TYPE_8822BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BE) 562 #define IS_HARDWARE_TYPE_8822BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BU) 563 #define IS_HARDWARE_TYPE_8822BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BS) 564 #define IS_HARDWARE_TYPE_8822B(_Adapter) \ 565 (IS_HARDWARE_TYPE_8822BE(_Adapter) || IS_HARDWARE_TYPE_8822BU(_Adapter) || IS_HARDWARE_TYPE_8822BS(_Adapter)) 566 567 #define IS_HARDWARE_TYPE_8821CE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CE) 568 #define IS_HARDWARE_TYPE_8821CU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CU) 569 #define IS_HARDWARE_TYPE_8821CS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CS) 570 #define IS_HARDWARE_TYPE_8821C(_Adapter) \ 571 (IS_HARDWARE_TYPE_8821CE(_Adapter) || IS_HARDWARE_TYPE_8821CU(_Adapter) || IS_HARDWARE_TYPE_8821CS(_Adapter)) 572 573 #define IS_HARDWARE_TYPE_JAGUAR2(_Adapter) \ 574 (IS_HARDWARE_TYPE_8814A(_Adapter) || IS_HARDWARE_TYPE_8821B(_Adapter) || IS_HARDWARE_TYPE_8822B(_Adapter) || IS_HARDWARE_TYPE_8821C(_Adapter)) 575 576 #define IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) \ 577 (IS_HARDWARE_TYPE_JAGUAR(_Adapter) || IS_HARDWARE_TYPE_JAGUAR2(_Adapter)) 578 579 580 581 typedef enum _wowlan_subcode { 582 WOWLAN_ENABLE = 0, 583 WOWLAN_DISABLE = 1, 584 WOWLAN_AP_ENABLE = 2, 585 WOWLAN_AP_DISABLE = 3, 586 WOWLAN_PATTERN_CLEAN = 4 587 } wowlan_subcode; 588 589 struct wowlan_ioctl_param { 590 unsigned int subcode; 591 unsigned int subcode_value; 592 unsigned int wakeup_reason; 593 }; 594 595 u8 rtw_hal_data_init(_adapter *padapter); 596 void rtw_hal_data_deinit(_adapter *padapter); 597 598 void rtw_hal_def_value_init(_adapter *padapter); 599 600 void rtw_hal_free_data(_adapter *padapter); 601 602 void rtw_hal_dm_init(_adapter *padapter); 603 void rtw_hal_dm_deinit(_adapter *padapter); 604 #ifdef CONFIG_RTW_SW_LED 605 void rtw_hal_sw_led_init(_adapter *padapter); 606 void rtw_hal_sw_led_deinit(_adapter *padapter); 607 #endif 608 u32 rtw_hal_power_on(_adapter *padapter); 609 void rtw_hal_power_off(_adapter *padapter); 610 611 uint rtw_hal_init(_adapter *padapter); 612 uint rtw_hal_deinit(_adapter *padapter); 613 void rtw_hal_stop(_adapter *padapter); 614 u8 rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val); 615 void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val); 616 617 void rtw_hal_chip_configure(_adapter *padapter); 618 u8 rtw_hal_read_chip_info(_adapter *padapter); 619 void rtw_hal_read_chip_version(_adapter *padapter); 620 621 u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); 622 u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); 623 624 void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet); 625 void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2); 626 627 void rtw_hal_enable_interrupt(_adapter *padapter); 628 void rtw_hal_disable_interrupt(_adapter *padapter); 629 630 u8 rtw_hal_check_ips_status(_adapter *padapter); 631 632 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) 633 u32 rtw_hal_inirp_init(_adapter *padapter); 634 u32 rtw_hal_inirp_deinit(_adapter *padapter); 635 #endif 636 637 #if defined(CONFIG_PCI_HCI) 638 void rtw_hal_irp_reset(_adapter *padapter); 639 void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data); 640 u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr); 641 void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data); 642 u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr); 643 u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter); 644 u8 rtw_hal_pci_l1off_capability(_adapter *padapter); 645 #endif 646 647 u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); 648 649 s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 650 s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); 651 s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); 652 653 s32 rtw_hal_init_xmit_priv(_adapter *padapter); 654 void rtw_hal_free_xmit_priv(_adapter *padapter); 655 656 s32 rtw_hal_init_recv_priv(_adapter *padapter); 657 void rtw_hal_free_recv_priv(_adapter *padapter); 658 659 void rtw_hal_update_ra_mask(struct sta_info *psta); 660 661 void rtw_hal_start_thread(_adapter *padapter); 662 void rtw_hal_stop_thread(_adapter *padapter); 663 664 void rtw_hal_bcn_related_reg_setting(_adapter *padapter); 665 666 u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask); 667 void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); 668 u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask); 669 void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); 670 671 672 #define phy_query_bb_reg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask)) 673 #define phy_set_bb_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data)) 674 #define phy_query_rf_reg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask)) 675 #define phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) 676 677 #define phy_set_mac_reg phy_set_bb_reg 678 #define phy_query_mac_reg phy_query_bb_reg 679 680 681 #if defined(CONFIG_PCI_HCI) 682 s32 rtw_hal_interrupt_handler(_adapter *padapter); 683 #endif 684 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) 685 void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); 686 #endif 687 688 void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); 689 void rtw_hal_dm_watchdog(_adapter *padapter); 690 void rtw_hal_dm_watchdog_in_lps(_adapter *padapter); 691 692 void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel); 693 void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel); 694 695 #ifdef CONFIG_HOSTAPD_MLME 696 s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); 697 #endif 698 699 #ifdef DBG_CONFIG_ERROR_DETECT 700 void rtw_hal_sreset_init(_adapter *padapter); 701 void rtw_hal_sreset_reset(_adapter *padapter); 702 void rtw_hal_sreset_reset_value(_adapter *padapter); 703 void rtw_hal_sreset_xmit_status_check(_adapter *padapter); 704 void rtw_hal_sreset_linked_status_check(_adapter *padapter); 705 u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter); 706 bool rtw_hal_sreset_inprogress(_adapter *padapter); 707 #endif 708 709 #ifdef CONFIG_IOL 710 int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); 711 #endif 712 713 #ifdef CONFIG_XMIT_THREAD_MODE 714 s32 rtw_hal_xmit_thread_handler(_adapter *padapter); 715 #endif 716 717 #ifdef CONFIG_RECV_THREAD_MODE 718 s32 rtw_hal_recv_hdl(_adapter *adapter); 719 #endif 720 721 void rtw_hal_notch_filter(_adapter *adapter, bool enable); 722 723 #ifdef CONFIG_FW_C2H_REG 724 bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload); 725 bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf); 726 s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf); 727 #endif 728 729 #ifdef CONFIG_FW_C2H_PKT 730 bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload); 731 #endif 732 733 s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); 734 #ifndef RTW_HALMAC 735 s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); 736 s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); 737 #endif 738 739 s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter); 740 741 s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid); 742 s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid); 743 744 s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 745 void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen, 746 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); 747 u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan); 748 749 #ifdef CONFIG_GPIO_API 750 void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag); 751 int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num); 752 void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num); 753 #endif 754 755 void rtw_hal_fw_correct_bcn(_adapter *padapter); 756 s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan); 757 758 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 759 void rtw_hal_clear_interrupt(_adapter *padapter); 760 #endif 761 762 void rtw_hal_set_tx_power_index(PADAPTER adapter, u32 powerindex, enum rf_path rfpath, u8 rate); 763 u8 rtw_hal_get_tx_power_index(PADAPTER adapter, enum rf_path 764 rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic); 765 766 u8 rtw_hal_ops_check(_adapter *padapter); 767 768 #ifdef RTW_HALMAC 769 u8 rtw_hal_init_mac_register(PADAPTER); 770 u8 rtw_hal_init_phy(PADAPTER); 771 s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem); 772 #endif /* RTW_HALMAC */ 773 774 #ifdef CONFIG_RFKILL_POLL 775 bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid); 776 #endif 777 778 #endif /* __HAL_INTF_H__ */ 779