1 /******************************************************************************
2 *
3 * Copyright(c) 2015 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #ifdef CONFIG_MCC_MODE
16 #define _HAL_MCC_C_
17
18 #include <drv_types.h> /* PADAPTER */
19 #include <rtw_mcc.h> /* mcc structure */
20 #include <hal_data.h> /* HAL_DATA */
21 #include <rtw_pwrctrl.h> /* power control */
22
23 #define MCC_DURATION_IDX 0
24 #define MCC_TSF_SYNC_OFFSET_IDX 1
25 #define MCC_START_TIME_OFFSET_IDX 2
26 #define MCC_INTERVAL_IDX 3
27 #define MCC_GUARD_OFFSET0_IDX 4
28 #define MCC_GUARD_OFFSET1_IDX 5
29 #define TU 1024 /* 1 TU equals 1024 microseconds */
30 /* port 1 druration, TSF sync offset, start time offset, interval (unit:TU (1024 microseconds))*/
31 u8 mcc_switch_channel_policy_table[][6]={
32 {35, 50, 30, 100, 0, 0},
33 {19, 50, 40, 100, 2, 2},
34 {25, 50, 30, 100, 5, 5},
35 };
36
37 const int mcc_max_policy_num = sizeof(mcc_switch_channel_policy_table) /sizeof(u8) /6;
38
dump_iqk_val_table(PADAPTER padapter)39 static void dump_iqk_val_table(PADAPTER padapter)
40 {
41 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
42 struct hal_iqk_reg_backup *iqk_reg_backup = pHalData->iqk_reg_backup;
43 u8 total_rf_path = pHalData->NumTotalRFPath;
44 u8 rf_path_idx = 0;
45 u8 backup_chan_idx = 0;
46 u8 backup_reg_idx = 0;
47
48 RTW_INFO("=============dump IQK backup table================\n");
49 for (backup_chan_idx = 0; backup_chan_idx < MAX_IQK_INFO_BACKUP_CHNL_NUM; backup_chan_idx++) {
50 for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx++) {
51 for(backup_reg_idx = 0; backup_reg_idx < MAX_IQK_INFO_BACKUP_REG_NUM; backup_reg_idx++) {
52 RTW_INFO("ch:%d. bw:%d. rf path:%d. reg[%d] = 0x%02x \n"
53 , iqk_reg_backup[backup_chan_idx].central_chnl
54 , iqk_reg_backup[backup_chan_idx].bw_mode
55 , rf_path_idx
56 , backup_reg_idx
57 , iqk_reg_backup[backup_chan_idx].reg_backup[rf_path_idx][backup_reg_idx]
58 );
59 }
60 }
61 }
62 RTW_INFO("=============================================\n");
63 }
64
rtw_hal_mcc_build_p2p_noa_attr(PADAPTER padapter,u8 * ie,u32 * ie_len)65 static void rtw_hal_mcc_build_p2p_noa_attr(PADAPTER padapter, u8 *ie, u32 *ie_len)
66 {
67 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
68 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
69 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
70 u8 p2p_noa_attr_ie[MAX_P2P_IE_LEN] = {0x00};
71 u32 p2p_noa_attr_len = 0;
72 u8 noa_desc_num = 1;
73 u8 opp_ps = 0; /* Disable OppPS */
74 u8 noa_count = 255;
75 u32 noa_duration = 0x20;
76 u32 noa_interval = 0x64;
77 u8 noa_index = 0;
78 u8 mcc_policy_idx = 0;
79
80 mcc_policy_idx = pmccobjpriv->policy_index;
81 noa_duration = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_DURATION_IDX];
82 noa_interval = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_INTERVAL_IDX];
83
84 /* P2P OUI(4 bytes) */
85 _rtw_memcpy(p2p_noa_attr_ie, P2P_OUI, 4);
86 p2p_noa_attr_len = p2p_noa_attr_len + 4;
87
88 /* attrute ID(1 byte) */
89 p2p_noa_attr_ie[p2p_noa_attr_len] = P2P_ATTR_NOA;
90 p2p_noa_attr_len = p2p_noa_attr_len + 1;
91
92 /* attrute length(2 bytes) length = noa_desc_num*13 + 2 */
93 RTW_PUT_LE16(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_desc_num*13 + 2));
94 p2p_noa_attr_len = p2p_noa_attr_len + 2;
95
96 /* Index (1 byte) */
97 p2p_noa_attr_ie[p2p_noa_attr_len] = noa_index;
98 p2p_noa_attr_len = p2p_noa_attr_len + 1;
99
100 /* CTWindow and OppPS Parameters (1 byte) */
101 p2p_noa_attr_ie[p2p_noa_attr_len] = opp_ps;
102 p2p_noa_attr_len = p2p_noa_attr_len+ 1;
103
104 /* NoA Count (1 byte) */
105 p2p_noa_attr_ie[p2p_noa_attr_len] = noa_count;
106 p2p_noa_attr_len = p2p_noa_attr_len + 1;
107
108 /* NoA Duration (4 bytes) unit: microseconds */
109 RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_duration * TU));
110 p2p_noa_attr_len = p2p_noa_attr_len + 4;
111
112 /* NoA Interval (4 bytes) unit: microseconds */
113 RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_interval * TU));
114 p2p_noa_attr_len = p2p_noa_attr_len + 4;
115
116 /* NoA Start Time (4 bytes) unit: microseconds */
117 RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, pmccadapriv->noa_start_time);
118 if (0)
119 RTW_INFO("indxe:%d, start_time=0x%02x:0x%02x:0x%02x:0x%02x\n"
120 , noa_index
121 , p2p_noa_attr_ie[p2p_noa_attr_len]
122 , p2p_noa_attr_ie[p2p_noa_attr_len + 1]
123 , p2p_noa_attr_ie[p2p_noa_attr_len + 2]
124 , p2p_noa_attr_ie[p2p_noa_attr_len + 3]);
125
126 p2p_noa_attr_len = p2p_noa_attr_len + 4;
127 rtw_set_ie(ie, _VENDOR_SPECIFIC_IE_, p2p_noa_attr_len, (u8 *)p2p_noa_attr_ie, ie_len);
128 }
129
130
131 /**
132 * rtw_hal_mcc_update_go_p2p_ie - update go p2p ie(add NoA attribute)
133 * @padapter: the adapter to be update go p2p ie
134 */
rtw_hal_mcc_update_go_p2p_ie(PADAPTER padapter)135 static void rtw_hal_mcc_update_go_p2p_ie(PADAPTER padapter)
136 {
137 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
138 u8 *pos = NULL;
139
140
141 /* no noa attribute, build it */
142 if (pmccadapriv->p2p_go_noa_ie_len == 0)
143 rtw_hal_mcc_build_p2p_noa_attr(padapter, pmccadapriv->p2p_go_noa_ie, &pmccadapriv->p2p_go_noa_ie_len);
144 else {
145 /* has noa attribut, modify it */
146 /* update index */
147 pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 15;
148 /* 0~255 */
149 (*pos) = ((*pos) + 1) % 256;
150 if (1)
151 RTW_INFO("indxe:%d\n", (*pos));
152
153 /* update start time */
154 pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 4;
155 RTW_PUT_LE32(pos, pmccadapriv->noa_start_time);
156 if (0)
157 RTW_INFO("start_time=0x%02x:0x%02x:0x%02x:0x%02x\n"
158 , ((u8*)(pos))[0]
159 , ((u8*)(pos))[1]
160 , ((u8*)(pos))[2]
161 , ((u8*)(pos))[3]);
162
163 }
164
165 if (0) {
166 u8 i = 0;
167 RTW_INFO("p2p_go_noa_ie_len:%d\n", pmccadapriv->p2p_go_noa_ie_len);
168
169 for (i = 0;i < pmccadapriv->p2p_go_noa_ie_len; i++) {
170 if ((i+1)%8 != 0)
171 printk("0x%02x ", pmccadapriv->p2p_go_noa_ie[i]);
172 else
173 printk("0x%02x\n", pmccadapriv->p2p_go_noa_ie[i]);
174 }
175 printk("\n");
176 }
177 update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE);
178 }
179
180 /**
181 * rtw_hal_mcc_remove_go_p2p_ie - remove go p2p ie(add NoA attribute)
182 * @padapter: the adapter to be update go p2p ie
183 */
rtw_hal_mcc_remove_go_p2p_ie(PADAPTER padapter)184 static void rtw_hal_mcc_remove_go_p2p_ie(PADAPTER padapter)
185 {
186 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
187 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
188
189 /* chech has noa ie or not */
190 if (pmccadapriv->p2p_go_noa_ie_len == 0)
191 return;
192
193 pmccadapriv->p2p_go_noa_ie_len = 0;
194 update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE);
195 }
196
197 /* restore IQK value for all interface */
rtw_hal_mcc_restore_iqk_val(PADAPTER padapter)198 void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter)
199 {
200 u8 take_care_iqk = _FALSE;
201 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
202 _adapter *iface = NULL;
203 u8 i = 0;
204
205 rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk);
206 if (take_care_iqk == _TRUE && MCC_EN(padapter)) {
207 for (i = 0; i < dvobj->iface_nums; i++) {
208 iface = dvobj->padapters[i];
209 if (iface == NULL)
210 continue;
211
212 rtw_hal_ch_sw_iqk_info_restore(iface, CH_SW_USE_CASE_MCC);
213 }
214 }
215
216 if (0)
217 dump_iqk_val_table(padapter);
218 }
219
rtw_hal_check_mcc_status(PADAPTER padapter,u8 mcc_status)220 u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status)
221 {
222 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
223
224 if (pmccobjpriv->mcc_status & (mcc_status))
225 return _TRUE;
226 else
227 return _FALSE;
228 }
229
rtw_hal_set_mcc_status(PADAPTER padapter,u8 mcc_status)230 void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status)
231 {
232 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
233
234 pmccobjpriv->mcc_status |= (mcc_status);
235 }
236
rtw_hal_clear_mcc_status(PADAPTER padapter,u8 mcc_status)237 void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status)
238 {
239 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
240
241 pmccobjpriv->mcc_status &= (~mcc_status);
242 }
243
rtw_hal_mcc_update_switch_channel_policy_table(PADAPTER padapter)244 void rtw_hal_mcc_update_switch_channel_policy_table(PADAPTER padapter)
245 {
246 struct registry_priv *registry_par = &padapter->registrypriv;
247 u8 idx = 0;
248
249 if (registry_par->rtw_mcc_policy_table_idx < 0)
250 return;
251
252 if (registry_par->rtw_mcc_policy_table_idx >= mcc_max_policy_num) {
253 RTW_INFO("[MCC] mcc_policy_table_idx error, do not update policy table\n");
254 return;
255 }
256
257 idx = registry_par->rtw_mcc_policy_table_idx;
258
259 if (registry_par->rtw_mcc_duration > 0)
260 mcc_switch_channel_policy_table[idx][MCC_DURATION_IDX] = registry_par->rtw_mcc_duration;
261
262 if (registry_par->rtw_mcc_tsf_sync_offset > 0)
263 mcc_switch_channel_policy_table[idx][MCC_TSF_SYNC_OFFSET_IDX] = registry_par->rtw_mcc_tsf_sync_offset;
264
265 if (registry_par->rtw_mcc_start_time_offset > 0)
266 mcc_switch_channel_policy_table[idx][MCC_START_TIME_OFFSET_IDX] = registry_par->rtw_mcc_start_time_offset;
267
268 if (registry_par->rtw_mcc_interval > 0)
269 mcc_switch_channel_policy_table[idx][MCC_INTERVAL_IDX] = registry_par->rtw_mcc_interval;
270
271 if (registry_par->rtw_mcc_guard_offset0 >= 0)
272 mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET0_IDX] = registry_par->rtw_mcc_guard_offset0;
273
274 if (registry_par->rtw_mcc_guard_offset1 >= 0)
275 mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET1_IDX] = registry_par->rtw_mcc_guard_offset1;
276
277 }
278
rtw_hal_config_mcc_switch_channel_setting(PADAPTER padapter)279 static void rtw_hal_config_mcc_switch_channel_setting(PADAPTER padapter)
280 {
281 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
282 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
283 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
284 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
285 struct registry_priv *registry_par = &padapter->registrypriv;
286 u8 interval = pmlmepriv->cur_network.network.Configuration.BeaconPeriod;
287 u8 i = 0;
288 s8 mcc_policy_idx = 0;
289
290 rtw_hal_mcc_update_switch_channel_policy_table(padapter);
291 mcc_policy_idx = registry_par->rtw_mcc_policy_table_idx;
292
293 if (mcc_policy_idx < 0 || mcc_policy_idx >= mcc_max_policy_num) {
294 pmccobjpriv->policy_index = 0;
295 RTW_INFO("[MCC] can't find table(%d,%d,%d), use default policy(%d)\n"
296 , pmccobjpriv->duration, interval, mcc_policy_idx, pmccobjpriv->policy_index);
297 } else
298 pmccobjpriv->policy_index = mcc_policy_idx;
299
300 RTW_INFO("[MCC] policy(%d): %d,%d,%d,%d,%d,%d\n"
301 , pmccobjpriv->policy_index
302 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX]
303 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_TSF_SYNC_OFFSET_IDX]
304 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_START_TIME_OFFSET_IDX]
305 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX]
306 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX]
307 , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX]);
308
309 }
310
rtw_hal_config_mcc_role_setting(PADAPTER padapter)311 static void rtw_hal_config_mcc_role_setting(PADAPTER padapter)
312 {
313 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
314 struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
315 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
316 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
317 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
318 struct wlan_network *cur_network = &(pmlmepriv->cur_network);
319 struct sta_priv *pstapriv = &padapter->stapriv;
320 struct sta_info *psta = NULL;
321 struct registry_priv *preg = &padapter->registrypriv;
322 u8 policy_index = 0;
323 u8 mcc_duration = 0;
324 u8 mcc_interval = 0;
325
326 policy_index = pmccobjpriv->policy_index;
327 mcc_duration = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX]
328 - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX]
329 - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX];
330 mcc_interval = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX];
331
332 /* GO/AP is 1nd order GC/STA is 2nd order */
333 switch (pmccadapriv->role) {
334 case MCC_ROLE_STA:
335 case MCC_ROLE_GC:
336 pmccadapriv->order = 1;
337 pmccadapriv->mcc_duration = mcc_duration;
338
339 switch (pmlmeext->cur_bwmode) {
340 case CHANNEL_WIDTH_20:
341 /*
342 * target tx byte(bytes) = target tx tp(Mbits/sec) * 1024 * 1024 / 8 * (duration(ms) / 1024)
343 * = target tx tp(Mbits/sec) * 128 * duration(ms)
344 * note:
345 * target tx tp(Mbits/sec) * 1024 * 1024 / 8 ==> Mbits to bytes
346 * duration(ms) / 1024 ==> msec to sec
347 */
348 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
349 break;
350 case CHANNEL_WIDTH_40:
351 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
352 break;
353 case CHANNEL_WIDTH_80:
354 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
355 break;
356 case CHANNEL_WIDTH_160:
357 case CHANNEL_WIDTH_80_80:
358 RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
359 , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
360 break;
361 }
362
363 /* assign used mac to avoid affecting RA */
364 pmccadapriv->mgmt_queue_macid = MCC_ROLE_STA_GC_MGMT_QUEUE_MACID;
365
366 psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
367 if (psta) {
368 /* combine AP/GO macid and mgmt queue macid to bitmap */
369 pmccadapriv->mcc_macid_bitmap = BIT(psta->cmn.mac_id) | BIT(pmccadapriv->mgmt_queue_macid);
370 } else {
371 RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter));
372 rtw_warn_on(1);
373 }
374 break;
375 case MCC_ROLE_AP:
376 case MCC_ROLE_GO:
377 pmccadapriv->order = 0;
378 /* total druation value equals interval */
379 pmccadapriv->mcc_duration = mcc_interval - mcc_duration;
380 pmccadapriv->p2p_go_noa_ie_len = 0; /* not NoA attribute at init time */
381
382 switch (pmlmeext->cur_bwmode) {
383 case CHANNEL_WIDTH_20:
384 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
385 break;
386 case CHANNEL_WIDTH_40:
387 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
388 break;
389 case CHANNEL_WIDTH_80:
390 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
391 break;
392 case CHANNEL_WIDTH_160:
393 case CHANNEL_WIDTH_80_80:
394 RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
395 , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
396 break;
397 }
398
399
400 psta = rtw_get_bcmc_stainfo(padapter);
401
402 if (psta != NULL)
403 pmccadapriv->mgmt_queue_macid = psta->cmn.mac_id;
404 else {
405 pmccadapriv->mgmt_queue_macid = MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID;
406 RTW_INFO(FUNC_ADPT_FMT":bcmc station is NULL, use macid %d\n"
407 , FUNC_ADPT_ARG(padapter), pmccadapriv->mgmt_queue_macid);
408 }
409
410 /* combine client macid and mgmt queue macid to bitmap */
411 pmccadapriv->mcc_macid_bitmap = (0xff << 8) | BIT(pmccadapriv->mgmt_queue_macid);
412 break;
413 default:
414 RTW_INFO("Unknown role\n");
415 rtw_warn_on(1);
416 break;
417 }
418
419 pmccobjpriv->iface[pmccadapriv->order] = padapter;
420 RTW_INFO(FUNC_ADPT_FMT": order:%d, role:%d, mcc duration:%d, target tx bytes:%d, mgmt queue macid:%d, bitmap:0x%02x\n"
421 , FUNC_ADPT_ARG(padapter), pmccadapriv->order, pmccadapriv->role, pmccadapriv->mcc_duration
422 , pmccadapriv->mcc_target_tx_bytes_to_port, pmccadapriv->mgmt_queue_macid, pmccadapriv->mcc_macid_bitmap);
423 }
424
rtw_hal_clear_mcc_macid(PADAPTER padapter)425 static void rtw_hal_clear_mcc_macid(PADAPTER padapter)
426 {
427 u16 media_status_rpt;
428 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
429
430 switch (pmccadapriv->role) {
431 case MCC_ROLE_STA:
432 case MCC_ROLE_GC:
433 break;
434 case MCC_ROLE_AP:
435 case MCC_ROLE_GO:
436 /* nothing to do */
437 break;
438 default:
439 RTW_INFO("Unknown role\n");
440 rtw_warn_on(1);
441 break;
442 }
443 }
rtw_hal_decide_mcc_role(PADAPTER padapter)444 static u8 rtw_hal_decide_mcc_role(PADAPTER padapter)
445 {
446 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
447 _adapter *iface = NULL;
448 struct mcc_adapter_priv *pmccadapriv = NULL;
449 struct wifidirect_info *pwdinfo = NULL;
450 struct mlme_priv *pmlmepriv = NULL;
451 u8 ret = _SUCCESS, i = 0;
452
453 for (i = 0; i < dvobj->iface_nums; i++) {
454 iface = dvobj->padapters[i];
455 if (iface == NULL)
456 continue;
457
458 pmccadapriv = &iface->mcc_adapterpriv;
459
460 if (MLME_IS_GO(iface))
461 pmccadapriv->role = MCC_ROLE_GO;
462 else if (MLME_IS_AP(iface))
463 pmccadapriv->role = MCC_ROLE_AP;
464 else if (MLME_IS_GC(iface))
465 pmccadapriv->role = MCC_ROLE_GC;
466 else if (MLME_IS_STA(iface))
467 pmccadapriv->role = MCC_ROLE_STA;
468 else {
469 pwdinfo = &iface->wdinfo;
470 pmlmepriv = &iface->mlmepriv;
471
472 RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(iface));
473 RTW_INFO("Unknown:P2P state:%d, mlme state:0x%2x, mlmext info state:0x%02x\n",
474 pwdinfo->role, pmlmepriv->fw_state, iface->mlmeextpriv.mlmext_info.state);
475 rtw_warn_on(1);
476 ret = _FAIL;
477 goto exit;
478 }
479
480 if (ret == _SUCCESS)
481 rtw_hal_config_mcc_role_setting(iface);
482 }
483
484 exit:
485 return ret;
486 }
487
rtw_hal_init_mcc_parameter(PADAPTER padapter)488 static void rtw_hal_init_mcc_parameter(PADAPTER padapter)
489 {
490 }
491
rtw_hal_construct_CTS(PADAPTER padapter,u8 * pframe,u32 * pLength)492 static void rtw_hal_construct_CTS(PADAPTER padapter, u8 *pframe, u32 *pLength)
493 {
494 u8 broadcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
495
496 /* frame type, length = 1*/
497 set_frame_sub_type(pframe, WIFI_RTS);
498
499 /* frame control flag, length = 1 */
500 *(pframe + 1) = 0;
501
502 /* frame duration, length = 2 */
503 *(pframe + 2) = 0x00;
504 *(pframe + 3) = 0x78;
505
506 /* frame recvaddr, length = 6 */
507 _rtw_memcpy((pframe + 4), broadcast_addr, ETH_ALEN);
508 _rtw_memcpy((pframe + 4 + ETH_ALEN), adapter_mac_addr(padapter), ETH_ALEN);
509 _rtw_memcpy((pframe + 4 + ETH_ALEN*2), adapter_mac_addr(padapter), ETH_ALEN);
510 *pLength = 22;
511 }
512
rtw_hal_dl_mcc_fw_rsvd_page(_adapter * adapter,u8 * pframe,u16 * index,u8 tx_desc,u32 page_size,u8 * page_num,u32 * total_pkt_len,RSVDPAGE_LOC * rsvd_page_loc)513 u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
514 u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
515 RSVDPAGE_LOC *rsvd_page_loc)
516 {
517 u32 len = 0;
518 _adapter *iface = NULL;
519 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
520 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
521 struct mlme_ext_info *pmlmeinfo = NULL;
522 struct mlme_ext_priv *pmlmeext = NULL;
523 u8 ret = _SUCCESS, i = 0, order = 0, CurtPktPageNum = 0;
524 u8 bssid[ETH_ALEN] = {0};
525
526 /* check proccess mcc start setting */
527 if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
528 ret = _FAIL;
529 goto exit;
530 }
531
532 for (i = 0; i < dvobj->iface_nums; i++) {
533 iface = dvobj->padapters[i];
534 if (iface == NULL)
535 continue;
536
537 order = iface->mcc_adapterpriv.order;
538 dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order] = *page_num;
539
540 switch (iface->mcc_adapterpriv.role) {
541 case MCC_ROLE_STA:
542 case MCC_ROLE_GC:
543 /* Build NULL DATA */
544 RTW_INFO("LocNull(order:%d): %d\n"
545 , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
546 len = 0;
547 pmlmeext = &iface->mlmeextpriv;
548 pmlmeinfo = &pmlmeext->mlmext_info;
549
550 _rtw_memcpy(bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
551 rtw_hal_construct_NullFunctionData(iface
552 , &pframe[*index], &len, bssid, _FALSE, 0, 0, _FALSE);
553 rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc],
554 len, _FALSE, _FALSE, _FALSE);
555
556 CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
557 *page_num += CurtPktPageNum;
558 *index += (CurtPktPageNum * page_size);
559 *total_pkt_len = *index + len;
560 break;
561 case MCC_ROLE_AP:
562 /* Bulid CTS */
563 RTW_INFO("LocCTS(order:%d): %d\n"
564 , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
565
566 len = 0;
567 rtw_hal_construct_CTS(iface, &pframe[*index], &len);
568 rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc],
569 len, _FALSE, _FALSE, _FALSE);
570
571 CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
572 *page_num += CurtPktPageNum;
573 *index += (CurtPktPageNum * page_size);
574 *total_pkt_len = *index + len;
575 break;
576 case MCC_ROLE_GO:
577 /* To DO */
578 break;
579 }
580 }
581 exit:
582 return ret;
583 }
584
585 /*
586 * 1. Download MCC rsvd page
587 * 2. Re-Download beacon after download rsvd page
588 */
rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)589 static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)
590 {
591 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
592 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
593 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
594 PADAPTER port0_iface = dvobj_get_port0_adapter(dvobj);
595 PADAPTER iface = NULL;
596 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
597 u8 mstatus = RT_MEDIA_CONNECT, i = 0;
598
599 RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
600
601 rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
602
603 /* Re-Download beacon */
604 for (i = 0; i < dvobj->iface_nums; i++) {
605 iface = pmccobjpriv->iface[i];
606 pmccadapriv = &iface->mcc_adapterpriv;
607 if (pmccadapriv->role == MCC_ROLE_AP
608 || pmccadapriv->role == MCC_ROLE_GO)
609 tx_beacon_hdl(iface, NULL);
610 }
611 }
612
rtw_hal_set_mcc_rsvdpage_cmd(_adapter * padapter)613 static void rtw_hal_set_mcc_rsvdpage_cmd(_adapter *padapter)
614 {
615 u8 cmd[H2C_MCC_LOCATION_LEN] = {0}, i = 0, order = 0;
616 _adapter *iface = NULL;
617 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
618 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
619
620
621 for (i = 0; i < dvobj->iface_nums; i++) {
622 iface = dvobj->padapters[i];
623 if (iface == NULL)
624 continue;
625
626 order = iface->mcc_adapterpriv.order;
627 if (order >= H2C_MCC_LOCATION_LEN) {
628 RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
629 , FUNC_ADPT_ARG(padapter), order);
630 continue;
631 }
632
633 SET_H2CCMD_MCC_RSVDPAGE_LOC((cmd + order), (pmccobjpriv->mcc_loc_rsvd_paga[order]));
634 }
635
636 #ifdef CONFIG_MCC_MODE_DEBUG
637 RTW_INFO("=========================\n");
638 RTW_INFO("MCC RSVD PAGE LOC:\n");
639 for (i = 0; i < H2C_MCC_LOCATION_LEN; i++)
640 pr_dbg("0x%x ", cmd[i]);
641 pr_dbg("\n");
642 RTW_INFO("=========================\n");
643 #endif /* CONFIG_MCC_MODE_DEBUG */
644
645 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_LOCATION, H2C_MCC_LOCATION_LEN, cmd);
646 }
647
rtw_hal_set_mcc_noa_cmd(PADAPTER padapter)648 static void rtw_hal_set_mcc_noa_cmd(PADAPTER padapter)
649 {
650 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
651 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
652 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
653 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
654 u8 cmd[H2C_MCC_NOA_PARAM_LEN] = {0};
655 u8 policy_idx = pmccobjpriv->policy_index;
656 u8 noa_fw_eable = 1;
657 u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
658 u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
659 u8 noa_interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX];
660 u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX];
661 u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX];
662 u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME;
663 u8 i = 0;
664
665 /* FW set NOA enable */
666 SET_H2CCMD_MCC_NOA_FW_EN(cmd, noa_fw_eable);
667 /* TSF Sync offset */
668 SET_H2CCMD_MCC_NOA_TSF_SYNC_OFFSET(cmd, noa_tsf_sync_offset);
669 /* NoA start time offset */
670 SET_H2CCMD_MCC_NOA_START_TIME(cmd, (noa_start_time_offset + guard_offset0));
671 /* NoA interval */
672 SET_H2CCMD_MCC_NOA_INTERVAL(cmd, noa_interval);
673 /* Early time to inform driver by C2H before switch channel */
674 SET_H2CCMD_MCC_EARLY_TIME(cmd, swchannel_early_time);
675
676 #ifdef CONFIG_MCC_MODE_DEBUG
677 RTW_INFO("=========================\n");
678 RTW_INFO("NoA:\n");
679 for (i = 0; i < H2C_MCC_NOA_PARAM_LEN; i++)
680 pr_dbg("0x%x ", cmd[i]);
681 pr_dbg("\n");
682 RTW_INFO("=========================\n");
683 #endif /* CONFIG_MCC_MODE_DEBUG */
684
685 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_NOA_PARAM, H2C_MCC_NOA_PARAM_LEN, cmd);
686 }
687
rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)688 static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)
689 {
690 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
691 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
692 struct mcc_adapter_priv *pmccadapriv = NULL;
693 _adapter *iface = NULL;
694 u8 cmd[H2C_MCC_IQK_PARAM_LEN] = {0}, bready = 0, i = 0, order = 0;
695 u16 TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0;
696 u8 total_rf_path = GET_HAL_DATA(padapter)->NumTotalRFPath;
697 u8 rf_path_idx = 0, last_order = MAX_MCC_NUM - 1, last_rf_path_index = total_rf_path - 1;
698
699 /* by order, last order & last_rf_path_index must set ready bit = 1 */
700 for (i = 0; i < dvobj->iface_nums; i++) {
701 iface = pmccobjpriv->iface[i];
702 if (iface == NULL)
703 continue;
704
705 pmccadapriv = &iface->mcc_adapterpriv;
706 order = pmccadapriv->order;
707
708 for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx ++) {
709
710 _rtw_memset(cmd, 0, H2C_MCC_IQK_PARAM_LEN);
711 TX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_X & 0x7ff;/* [10:0] */
712 TX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_Y & 0x7ff;/* [10:0] */
713 RX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_X & 0x3ff;/* [9:0] */
714 RX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_Y & 0x3ff;/* [9:0] */
715
716 /* ready or not */
717 if (order == last_order && rf_path_idx == last_rf_path_index)
718 bready = 1;
719 else
720 bready = 0;
721
722 SET_H2CCMD_MCC_IQK_READY(cmd, bready);
723 SET_H2CCMD_MCC_IQK_ORDER(cmd, order);
724 SET_H2CCMD_MCC_IQK_PATH(cmd, rf_path_idx);
725
726 /* fill RX_X[7:0] to (cmd+1)[7:0] bitlen=8 */
727 SET_H2CCMD_MCC_IQK_RX_L(cmd, (u8)(RX_X & 0xff));
728 /* fill RX_X[9:8] to (cmd+2)[1:0] bitlen=2 */
729 SET_H2CCMD_MCC_IQK_RX_M1(cmd, (u8)((RX_X >> 8) & 0x03));
730 /* fill RX_Y[5:0] to (cmd+2)[7:2] bitlen=6 */
731 SET_H2CCMD_MCC_IQK_RX_M2(cmd, (u8)(RX_Y & 0x3f));
732 /* fill RX_Y[9:6] to (cmd+3)[3:0] bitlen=4 */
733 SET_H2CCMD_MCC_IQK_RX_H(cmd, (u8)((RX_Y >> 6) & 0x0f));
734
735
736 /* fill TX_X[7:0] to (cmd+4)[7:0] bitlen=8 */
737 SET_H2CCMD_MCC_IQK_TX_L(cmd, (u8)(TX_X & 0xff));
738 /* fill TX_X[10:8] to (cmd+5)[2:0] bitlen=3 */
739 SET_H2CCMD_MCC_IQK_TX_M1(cmd, (u8)((TX_X >> 8) & 0x07));
740 /* fill TX_Y[4:0] to (cmd+5)[7:3] bitlen=5 */
741 SET_H2CCMD_MCC_IQK_TX_M2(cmd, (u8)(TX_Y & 0x1f));
742 /* fill TX_Y[10:5] to (cmd+6)[5:0] bitlen=6 */
743 SET_H2CCMD_MCC_IQK_TX_H(cmd, (u8)((TX_Y >> 5) & 0x3f));
744
745 #ifdef CONFIG_MCC_MODE_DEBUG
746 RTW_INFO("=========================\n");
747 RTW_INFO(FUNC_ADPT_FMT" IQK:\n", FUNC_ADPT_ARG(iface));
748 RTW_INFO("TX_X: 0x%02x\n", TX_X);
749 RTW_INFO("TX_Y: 0x%02x\n", TX_Y);
750 RTW_INFO("RX_X: 0x%02x\n", RX_X);
751 RTW_INFO("RX_Y: 0x%02x\n", RX_Y);
752 RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
753 RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
754 RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
755 RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
756 RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
757 RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
758 RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
759 RTW_INFO("=========================\n");
760 #endif /* CONFIG_MCC_MODE_DEBUG */
761
762 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_IQK_PARAM, H2C_MCC_IQK_PARAM_LEN, cmd);
763 }
764 }
765 }
766
767
rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)768 static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)
769 {
770 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
771 struct mcc_adapter_priv *pmccadapriv = NULL;
772 _adapter *iface = NULL;
773 u8 cmd[H2C_MCC_MACID_BITMAP_LEN] = {0}, i = 0, order = 0;
774 u16 bitmap = 0;
775
776 for (i = 0; i < dvobj->iface_nums; i++) {
777 iface = dvobj->padapters[i];
778 if (iface == NULL)
779 continue;
780
781 pmccadapriv = &iface->mcc_adapterpriv;
782 order = pmccadapriv->order;
783 bitmap = pmccadapriv->mcc_macid_bitmap;
784
785 if (order >= (H2C_MCC_MACID_BITMAP_LEN/2)) {
786 RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
787 , FUNC_ADPT_ARG(padapter), order);
788 continue;
789 }
790 SET_H2CCMD_MCC_MACID_BITMAP_L((cmd + order * 2), (u8)(bitmap & 0xff));
791 SET_H2CCMD_MCC_MACID_BITMAP_H((cmd + order * 2), (u8)((bitmap >> 8) & 0xff));
792 }
793
794 #ifdef CONFIG_MCC_MODE_DEBUG
795 RTW_INFO("=========================\n");
796 RTW_INFO("MACID BITMAP: ");
797 for (i = 0; i < H2C_MCC_MACID_BITMAP_LEN; i++)
798 pr_dbg("0x%x ", cmd[i]);
799 pr_dbg("\n");
800 RTW_INFO("=========================\n");
801 #endif /* CONFIG_MCC_MODE_DEBUG */
802 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_MACID_BITMAP, H2C_MCC_MACID_BITMAP_LEN, cmd);
803 }
804
rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter,u8 stop)805 static void rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter, u8 stop)
806 {
807 u8 cmd[H2C_MCC_CTRL_LEN] = {0}, i = 0;
808 u8 order = 0, totalnum = 0, chidx = 0, bw = 0, bw40sc = 0, bw80sc = 0;
809 u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0;
810 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
811 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
812 struct mlme_ext_priv *pmlmeext = NULL;
813 struct mlme_ext_info *pmlmeinfo = NULL;
814 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
815 _adapter *iface = NULL;
816
817 RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop);
818
819 for (i = 0; i < dvobj->iface_nums; i++) {
820 iface = pmccobjpriv->iface[i];
821 if (iface == NULL)
822 continue;
823
824 if (stop) {
825 if (iface != padapter)
826 continue;
827 }
828
829
830 order = iface->mcc_adapterpriv.order;
831 if (!stop)
832 totalnum = dvobj->iface_nums;
833 else
834 totalnum = 0xff; /* 0xff means stop */
835
836 pmlmeext = &iface->mlmeextpriv;
837 chidx = pmlmeext->cur_channel;
838 bw = pmlmeext->cur_bwmode;
839 bw40sc = pmlmeext->cur_ch_offset;
840
841 /* decide 80 band width offset */
842 if (bw == CHANNEL_WIDTH_80) {
843 u8 center_ch = rtw_get_center_ch(chidx, bw, bw40sc);
844
845 if (center_ch > chidx)
846 bw80sc = HAL_PRIME_CHNL_OFFSET_LOWER;
847 else if (center_ch < chidx)
848 bw80sc = HAL_PRIME_CHNL_OFFSET_UPPER;
849 else
850 bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
851 } else
852 bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
853
854 duration = iface->mcc_adapterpriv.mcc_duration;
855 role = iface->mcc_adapterpriv.role;
856
857 incurch = _FALSE;
858
859 if (IS_HARDWARE_TYPE_8812(padapter))
860 rfetype = pHalData->rfe_type; /* RFETYPE (only for 8812)*/
861 else
862 rfetype = 0;
863
864 /* STA/GC TX NULL data to inform AP/GC for ps mode */
865 switch (role) {
866 case MCC_ROLE_GO:
867 case MCC_ROLE_AP:
868 distxnull = MCC_DISABLE_TX_NULL;
869 break;
870 case MCC_ROLE_GC:
871 case MCC_ROLE_STA:
872 distxnull = MCC_ENABLE_TX_NULL;
873 break;
874 }
875
876 c2hrpt = MCC_C2H_REPORT_ALL_STATUS;
877 chscan = MCC_CHIDX;
878
879 SET_H2CCMD_MCC_CTRL_ORDER(cmd, order);
880 SET_H2CCMD_MCC_CTRL_TOTALNUM(cmd, totalnum);
881 SET_H2CCMD_MCC_CTRL_CHIDX(cmd, chidx);
882 SET_H2CCMD_MCC_CTRL_BW(cmd, bw);
883 SET_H2CCMD_MCC_CTRL_BW40SC(cmd, bw40sc);
884 SET_H2CCMD_MCC_CTRL_BW80SC(cmd, bw80sc);
885 SET_H2CCMD_MCC_CTRL_DURATION(cmd, duration);
886 SET_H2CCMD_MCC_CTRL_ROLE(cmd, role);
887 SET_H2CCMD_MCC_CTRL_INCURCH(cmd, incurch);
888 SET_H2CCMD_MCC_CTRL_RFETYPE(cmd, rfetype);
889 SET_H2CCMD_MCC_CTRL_DISTXNULL(cmd, distxnull);
890 SET_H2CCMD_MCC_CTRL_C2HRPT(cmd, c2hrpt);
891 SET_H2CCMD_MCC_CTRL_CHSCAN(cmd, chscan);
892
893 #ifdef CONFIG_MCC_MODE_DEBUG
894 RTW_INFO("=========================\n");
895 RTW_INFO(FUNC_ADPT_FMT" MCC INFO:\n", FUNC_ADPT_ARG(iface));
896 RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
897 RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
898 RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
899 RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
900 RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
901 RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
902 RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
903 RTW_INFO("=========================\n");
904 #endif /* CONFIG_MCC_MODE_DEBUG */
905
906 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_CTRL, H2C_MCC_CTRL_LEN, cmd);
907 }
908 }
909
rtw_hal_set_mcc_start_setting(PADAPTER padapter,u8 status)910 static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
911 {
912 u8 ret = _SUCCESS;
913 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
914 struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
915
916 if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
917 rtw_warn_on(1);
918 RTW_INFO("PS mode is not active before start mcc, force exit ps mode\n");
919 LeaveAllPowerSaveModeDirect(padapter);
920 }
921
922 if (dvobj->iface_nums > MAX_MCC_NUM) {
923 RTW_INFO("%s: current iface num(%d) > MAX_MCC_NUM(%d)\n", __func__, dvobj->iface_nums, MAX_MCC_NUM);
924 ret = _FAIL;
925 goto exit;
926 }
927
928 /* configure mcc switch channel setting */
929 rtw_hal_config_mcc_switch_channel_setting(padapter);
930
931 if (rtw_hal_decide_mcc_role(padapter) == _FAIL) {
932 ret = _FAIL;
933 goto exit;
934 }
935
936 /* set mcc status to indicate process mcc start setting */
937 rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_START_SETTING);
938
939 /* only download rsvd page for connect */
940 if (status == MCC_SETCMD_STATUS_START_CONNECT) {
941 /* download mcc rsvd page */
942 rtw_hal_set_fw_mcc_rsvd_page(padapter);
943 rtw_hal_set_mcc_rsvdpage_cmd(padapter);
944 }
945
946 /* configure NoA setting */
947 rtw_hal_set_mcc_noa_cmd(padapter);
948
949 /* IQK value offload */
950 rtw_hal_set_mcc_IQK_offload_cmd(padapter);
951
952 /* set mac id to fw */
953 rtw_hal_set_mcc_macid_cmd(padapter);
954
955 /* set mcc parameter */
956 rtw_hal_set_mcc_ctrl_cmd(padapter, _FALSE);
957
958 exit:
959 return ret;
960 }
961
rtw_hal_set_mcc_stop_setting(PADAPTER padapter,u8 status)962 static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status)
963 {
964 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
965 _adapter *iface = NULL;
966 u8 i = 0;
967 /*
968 * when adapter disconnect, stop mcc mod
969 * total=0xf means stop mcc mode
970 */
971
972 switch (status) {
973 default:
974 /* let fw switch to other interface channel */
975 for (i = 0; i < dvobj->iface_nums; i++) {
976 iface = dvobj->padapters[i];
977 if (iface == NULL)
978 continue;
979 /* use other interface to set cmd */
980 if (iface != padapter) {
981 rtw_hal_set_mcc_ctrl_cmd(iface, _TRUE);
982 break;
983 }
984 }
985 break;
986 }
987 }
988
rtw_hal_mcc_status_hdl(PADAPTER padapter,u8 status)989 static void rtw_hal_mcc_status_hdl(PADAPTER padapter, u8 status)
990 {
991 switch (status) {
992 case MCC_SETCMD_STATUS_STOP_DISCONNECT:
993 rtw_hal_clear_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
994 break;
995 case MCC_SETCMD_STATUS_STOP_SCAN_START:
996 rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC);
997 rtw_hal_clear_mcc_status(padapter, MCC_STATUS_DOING_MCC);
998 break;
999
1000 case MCC_SETCMD_STATUS_START_CONNECT:
1001 case MCC_SETCMD_STATUS_START_SCAN_DONE:
1002 rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
1003 break;
1004 default:
1005 RTW_INFO(FUNC_ADPT_FMT" error status(%d)\n", FUNC_ADPT_ARG(padapter), status);
1006 break;
1007 }
1008 }
1009
rtw_hal_mcc_stop_posthdl(PADAPTER padapter)1010 static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter)
1011 {
1012 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1013 _adapter *iface = NULL;
1014 u8 i = 0;
1015
1016 for (i = 0; i < dvobj->iface_nums; i++) {
1017 iface = dvobj->padapters[i];
1018 if (iface == NULL)
1019 continue;
1020 /* release network queue */
1021 rtw_netif_wake_queue(iface->pnetdev);
1022 iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
1023 iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
1024 iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
1025
1026 if (iface->mcc_adapterpriv.role == MCC_ROLE_GO)
1027 rtw_hal_mcc_remove_go_p2p_ie(iface);
1028 }
1029 }
1030
rtw_hal_mcc_start_posthdl(PADAPTER padapter)1031 static void rtw_hal_mcc_start_posthdl(PADAPTER padapter)
1032 {
1033 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1034 _adapter *iface = NULL;
1035 u8 i = 0;
1036
1037 for (i = 0; i < dvobj->iface_nums; i++) {
1038 iface = dvobj->padapters[i];
1039 if (iface == NULL)
1040 continue;
1041 iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
1042 iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
1043 iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
1044 }
1045 }
1046
1047 /*
1048 * rtw_hal_set_mcc_setting - set mcc setting
1049 * @padapter: currnet padapter to stop/start MCC
1050 * @stop: stop mcc or not
1051 * @return val: 1 for SUCCESS, 0 for fail
1052 */
rtw_hal_set_mcc_setting(PADAPTER padapter,u8 status)1053 static u8 rtw_hal_set_mcc_setting(PADAPTER padapter, u8 status)
1054 {
1055 u8 ret = _FAIL;
1056 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1057 u8 stop = (status < MCC_SETCMD_STATUS_START_CONNECT) ? _TRUE : _FALSE;
1058 systime start_time = rtw_get_current_time();
1059
1060 RTW_INFO("===> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
1061
1062 rtw_sctx_init(&pmccobjpriv->mcc_sctx, MCC_EXPIRE_TIME);
1063 pmccobjpriv->mcc_c2h_status = MCC_RPT_MAX;
1064
1065 if (stop == _FALSE) {
1066 /* handle mcc start */
1067 if (rtw_hal_set_mcc_start_setting(padapter, status) == _FAIL)
1068 goto exit;
1069
1070 /* wait for C2H */
1071 if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
1072 RTW_INFO(FUNC_ADPT_FMT": wait for mcc start C2H time out\n", FUNC_ADPT_ARG(padapter));
1073 else
1074 ret = _SUCCESS;
1075
1076 if (ret == _SUCCESS) {
1077 RTW_INFO(FUNC_ADPT_FMT": mcc start sucecssfully\n", FUNC_ADPT_ARG(padapter));
1078 rtw_hal_mcc_start_posthdl(padapter);
1079 }
1080 } else {
1081
1082 /* set mcc status to indicate process mcc start setting */
1083 rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_STOP_SETTING);
1084
1085 /* handle mcc stop */
1086 rtw_hal_set_mcc_stop_setting(padapter, status);
1087
1088 /* wait for C2H */
1089 if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
1090 RTW_INFO(FUNC_ADPT_FMT": wait for mcc stop C2H time out\n", FUNC_ADPT_ARG(padapter));
1091 else {
1092 ret = _SUCCESS;
1093 rtw_hal_mcc_stop_posthdl(padapter);
1094 }
1095 }
1096
1097 exit:
1098
1099 rtw_hal_mcc_status_hdl(padapter, status);
1100 /* clear mcc status */
1101 rtw_hal_clear_mcc_status(padapter
1102 , MCC_STATUS_PROCESS_MCC_START_SETTING | MCC_STATUS_PROCESS_MCC_STOP_SETTING);
1103
1104 RTW_INFO(FUNC_ADPT_FMT" in %dms <===\n"
1105 , FUNC_ADPT_ARG(padapter), rtw_get_passing_time_ms(start_time));
1106 return ret;
1107 }
1108
1109 /**
1110 * rtw_hal_mcc_check_case_not_limit_traffic - handler flow ctrl for special case
1111 * @cur_iface: fw stay channel setting of this iface
1112 * @next_iface: fw will swich channel setting of this iface
1113 */
rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface,PADAPTER next_iface)1114 static void rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface, PADAPTER next_iface)
1115 {
1116 u8 cur_bw = cur_iface->mlmeextpriv.cur_bwmode;
1117 u8 next_bw = next_iface->mlmeextpriv.cur_bwmode;
1118
1119 /* for both interface are VHT80, doesn't limit_traffic according to iperf results */
1120 if (cur_bw == CHANNEL_WIDTH_80 && next_bw == CHANNEL_WIDTH_80) {
1121 cur_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
1122 next_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
1123 }
1124 }
1125
1126
1127 /**
1128 * rtw_hal_mcc_sw_ch_fw_notify_hdl - handler flow ctrl
1129 */
rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)1130 static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)
1131 {
1132 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
1133 struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
1134 struct mcc_adapter_priv *cur_mccadapriv = NULL, *next_mccadapriv = NULL;
1135 _adapter *iface = NULL, *cur_iface = NULL, *next_iface = NULL;
1136 struct registry_priv *preg = &padapter->registrypriv;
1137 u8 cur_op_ch = pdvobjpriv->oper_channel;
1138 u8 i = 0, iface_num = pdvobjpriv->iface_nums, cur_order = 0, next_order = 0;
1139 static u8 cnt = 1;
1140 u32 single_tx_cri = preg->rtw_mcc_single_tx_cri;
1141
1142 for (i = 0; i < iface_num; i++) {
1143 iface = pdvobjpriv->padapters[i];
1144 if (cur_op_ch == iface->mlmeextpriv.cur_channel) {
1145 cur_iface = iface;
1146 cur_mccadapriv = &cur_iface->mcc_adapterpriv;
1147 cur_order = cur_mccadapriv->order;
1148 next_order = (cur_order + 1) % iface_num;
1149 next_iface = pmccobjpriv->iface[next_order];
1150 next_mccadapriv = &next_iface->mcc_adapterpriv;
1151 break;
1152 }
1153 }
1154
1155 /* check other interface tx busy traffic or not under every 2 switch channel notify(Mbits/100ms) */
1156 if (cnt == 2) {
1157 cur_mccadapriv->mcc_tp = (cur_mccadapriv->mcc_tx_bytes_from_kernel
1158 - cur_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
1159 cur_mccadapriv->mcc_last_tx_bytes_from_kernel = cur_mccadapriv->mcc_tx_bytes_from_kernel;
1160
1161 next_mccadapriv->mcc_tp = (next_mccadapriv->mcc_tx_bytes_from_kernel
1162 - next_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
1163 next_mccadapriv->mcc_last_tx_bytes_from_kernel = next_mccadapriv->mcc_tx_bytes_from_kernel;
1164
1165 cnt = 1;
1166 } else
1167 cnt = 2;
1168
1169 /* check single TX or cuncurrnet TX */
1170 if (next_mccadapriv->mcc_tp < single_tx_cri) {
1171 /* single TX, does not stop */
1172 cur_mccadapriv->mcc_tx_stop = _FALSE;
1173 cur_mccadapriv->mcc_tp_limit = _FALSE;
1174 } else {
1175 /* concurrent TX, stop */
1176 cur_mccadapriv->mcc_tx_stop = _TRUE;
1177 cur_mccadapriv->mcc_tp_limit = _TRUE;
1178 }
1179
1180 if (cur_mccadapriv->mcc_tp < single_tx_cri) {
1181 next_mccadapriv->mcc_tx_stop = _FALSE;
1182 next_mccadapriv->mcc_tp_limit = _FALSE;
1183 } else {
1184 next_mccadapriv->mcc_tx_stop = _FALSE;
1185 next_mccadapriv->mcc_tp_limit = _TRUE;
1186 next_mccadapriv->mcc_tx_bytes_to_port = 0;
1187 }
1188
1189 /* stop current iface kernel queue or not */
1190 if (cur_mccadapriv->mcc_tx_stop)
1191 rtw_netif_stop_queue(cur_iface->pnetdev);
1192 else
1193 rtw_netif_wake_queue(cur_iface->pnetdev);
1194
1195 /* stop next iface kernel queue or not */
1196 if (next_mccadapriv->mcc_tx_stop)
1197 rtw_netif_stop_queue(next_iface->pnetdev);
1198 else
1199 rtw_netif_wake_queue(next_iface->pnetdev);
1200
1201 /* start xmit tasklet */
1202 rtw_os_xmit_schedule(next_iface);
1203
1204 rtw_hal_mcc_check_case_not_limit_traffic(cur_iface, next_iface);
1205
1206 if (0) {
1207 RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
1208 cur_mccadapriv->order, cur_mccadapriv->mcc_tx_stop, cur_mccadapriv->mcc_tp);
1209 dump_os_queue(0, cur_iface);
1210 RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
1211 next_mccadapriv->order, next_mccadapriv->mcc_tx_stop, next_mccadapriv->mcc_tp);
1212 dump_os_queue(0, next_iface);
1213 }
1214 }
1215
rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter,u8 buflen,u8 * tmpBuf)1216 static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
1217 {
1218 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
1219 struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
1220 struct mcc_adapter_priv *pmccadapriv = NULL;
1221 PADAPTER iface = NULL;
1222 u8 i = 0;
1223 u8 policy_idx = pmccobjpriv->policy_index;
1224 u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
1225 u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
1226
1227 for (i = 0; i < pdvobjpriv->iface_nums; i++) {
1228 iface = pdvobjpriv->padapters[i];
1229 if (iface == NULL)
1230 continue;
1231
1232 pmccadapriv = &iface->mcc_adapterpriv;
1233 /* GO & channel match */
1234 if (pmccadapriv->role == MCC_ROLE_GO) {
1235 /* convert GO TBTT from FW to noa_start_time(TU convert to mircosecond) */
1236 pmccadapriv->noa_start_time = RTW_GET_LE32(tmpBuf + 2) + noa_start_time_offset * TU;
1237
1238 if (0) {
1239 RTW_INFO("TBTT:0x%02x\n", RTW_GET_LE32(tmpBuf + 2));
1240 RTW_INFO("noa_tsf_sync_offset:%d, noa_start_time_offset:%d\n", noa_tsf_sync_offset, noa_start_time_offset);
1241 RTW_INFO(FUNC_ADPT_FMT"buf=0x%02x:0x%02x:0x%02x:0x%02x, noa_start_time=0x%02x\n"
1242 , FUNC_ADPT_ARG(iface)
1243 , tmpBuf[2]
1244 , tmpBuf[3]
1245 , tmpBuf[4]
1246 , tmpBuf[5]
1247 ,pmccadapriv->noa_start_time);
1248 }
1249
1250 rtw_hal_mcc_update_go_p2p_ie(iface);
1251
1252 break;
1253 }
1254 }
1255
1256 }
1257
1258 /**
1259 * rtw_hal_mcc_c2h_handler - mcc c2h handler
1260 */
rtw_hal_mcc_c2h_handler(PADAPTER padapter,u8 buflen,u8 * tmpBuf)1261 void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
1262 {
1263 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
1264 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1265 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1266 struct submit_ctx *mcc_sctx = &pmccobjpriv->mcc_sctx;
1267 _irqL irqL;
1268
1269 /* RTW_INFO("[length]=%d, [C2H data]="MAC_FMT"\n", buflen, MAC_ARG(tmpBuf)); */
1270 /* To avoid reg is set, but driver recive c2h to set wrong oper_channel */
1271 if (MCC_RPT_STOPMCC == pmccobjpriv->mcc_c2h_status) {
1272 RTW_INFO(FUNC_ADPT_FMT" MCC alread stops return\n", FUNC_ADPT_ARG(padapter));
1273 return;
1274 }
1275
1276 pmccobjpriv->mcc_c2h_status = tmpBuf[0];
1277 switch (pmccobjpriv->mcc_c2h_status) {
1278 case MCC_RPT_SUCCESS:
1279 pdvobjpriv->oper_channel = tmpBuf[1];
1280 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1281 pmccobjpriv->cur_mcc_success_cnt++;
1282 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1283 break;
1284 case MCC_RPT_TXNULL_FAIL:
1285 RTW_INFO("[MCC] TXNULL FAIL\n");
1286 break;
1287 case MCC_RPT_STOPMCC:
1288 RTW_INFO("[MCC] MCC stop (time:%d)\n", rtw_get_current_time());
1289 pmccobjpriv->mcc_c2h_status = MCC_RPT_STOPMCC;
1290 rtw_sctx_done(&mcc_sctx);
1291 break;
1292 case MCC_RPT_READY:
1293 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1294 /* initialize counter & time */
1295 pmccobjpriv->mcc_launch_time = rtw_get_current_time();
1296 pmccobjpriv->mcc_c2h_status = MCC_RPT_READY;
1297 pmccobjpriv->cur_mcc_success_cnt = 0;
1298 pmccobjpriv->prev_mcc_success_cnt = 0;
1299 pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
1300 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1301
1302 RTW_INFO("[MCC] MCC ready (time:%d)\n", pmccobjpriv->mcc_launch_time);
1303 rtw_sctx_done(&mcc_sctx);
1304 break;
1305 case MCC_RPT_SWICH_CHANNEL_NOTIFY:
1306 pdvobjpriv->oper_channel = tmpBuf[1];
1307 rtw_hal_mcc_sw_ch_fw_notify_hdl(padapter);
1308 break;
1309 case MCC_RPT_UPDATE_NOA_START_TIME:
1310 rtw_hal_mcc_update_noa_start_time_hdl(padapter, buflen, tmpBuf);
1311 break;
1312 default:
1313 /* RTW_INFO("[MCC] Other MCC status(%d)\n", pmccobjpriv->mcc_c2h_status); */
1314 break;
1315 }
1316 }
1317
1318
1319 /**
1320 * rtw_hal_mcc_sw_status_check - check mcc swich channel status
1321 * @padapter: primary adapter
1322 */
rtw_hal_mcc_sw_status_check(PADAPTER padapter)1323 void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
1324 {
1325 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1326 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
1327 struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
1328 u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL;
1329 _irqL irqL;
1330
1331 /* #define MCC_RESTART 1 */
1332
1333 if (!MCC_EN(padapter))
1334 return;
1335
1336 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1337
1338 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1339
1340 if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
1341 rtw_warn_on(1);
1342 RTW_INFO("PS mode is not active under mcc, force exit ps mode\n");
1343 LeaveAllPowerSaveModeDirect(padapter);
1344 }
1345
1346 if (rtw_get_passing_time_ms(pmccobjpriv->mcc_launch_time) > 2000) {
1347 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1348
1349 cur_cnt = pmccobjpriv->cur_mcc_success_cnt;
1350 prev_cnt = pmccobjpriv->prev_mcc_success_cnt;
1351 if (cur_cnt < prev_cnt)
1352 diff_cnt = (cur_cnt + 255) - prev_cnt;
1353 else
1354 diff_cnt = cur_cnt - prev_cnt;
1355
1356 if (diff_cnt < 30) {
1357 pmccobjpriv->mcc_tolerance_time--;
1358 RTW_INFO("%s: diff_cnt:%d, tolerance_time:%d\n",
1359 __func__, diff_cnt, pmccobjpriv->mcc_tolerance_time);
1360 } else
1361 pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
1362
1363 pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
1364
1365 if (pmccobjpriv->mcc_tolerance_time != 0)
1366 check_ret = _SUCCESS;
1367
1368 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1369
1370 if (check_ret != _SUCCESS) {
1371 RTW_INFO("============ MCC swich channel check fail (%d)=============\n", diff_cnt);
1372 /* restart MCC */
1373 #ifdef MCC_RESTART
1374 rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
1375 rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1376 #endif /* MCC_RESTART */
1377 }
1378 } else {
1379 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1380 pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
1381 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1382 }
1383
1384 }
1385 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1386 }
1387
1388 /**
1389 * rtw_hal_mcc_change_scan_flag - change scan flag under mcc
1390 *
1391 * MCC mode under sitesurvey goto AP channel to tx bcn & data
1392 * MCC mode under sitesurvey doesn't support TX data for station mode (FW not support)
1393 *
1394 * @padapter: the adapter to be change scan flag
1395 * @ch: pointer to rerurn ch
1396 * @bw: pointer to rerurn bw
1397 * @offset: pointer to rerurn offset
1398 */
rtw_hal_mcc_change_scan_flag(PADAPTER padapter,u8 * ch,u8 * bw,u8 * offset)1399 u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset)
1400 {
1401 u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, role = 0;
1402 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1403 struct mcc_adapter_priv *pmccadapriv = NULL;
1404 struct mlme_ext_priv *pmlmeext = NULL;
1405
1406 if (!MCC_EN(padapter))
1407 goto exit;
1408
1409 if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
1410 goto exit;
1411
1412 for (i = 0; i < dvobj->iface_nums; i++) {
1413 if (!dvobj->padapters[i])
1414 continue;
1415
1416 pmlmeext = &dvobj->padapters[i]->mlmeextpriv;
1417 pmccadapriv = &dvobj->padapters[i]->mcc_adapterpriv;
1418 role = pmccadapriv->role;
1419
1420 switch (role) {
1421 case MCC_ROLE_AP:
1422 case MCC_ROLE_GO:
1423 *ch = pmlmeext->cur_channel;
1424 *bw = pmlmeext->cur_bwmode;
1425 *offset = pmlmeext->cur_ch_offset;
1426 need_ch_setting_union = _FALSE;
1427 break;
1428 case MCC_ROLE_STA:
1429 case MCC_ROLE_GC:
1430 break;
1431 default:
1432 RTW_INFO("unknown role\n");
1433 rtw_warn_on(1);
1434 break;
1435 }
1436
1437 /* check other scan flag */
1438 flags = mlmeext_scan_backop_flags(pmlmeext);
1439 if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC))
1440 flags &= ~SS_BACKOP_PS_ANNC;
1441
1442 if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME))
1443 flags &= ~SS_BACKOP_TX_RESUME;
1444
1445 mlmeext_assign_scan_backop_flags(pmlmeext, flags);
1446
1447 }
1448 exit:
1449 return need_ch_setting_union;
1450 }
1451
1452 /**
1453 * rtw_hal_mcc_calc_tx_bytes_from_kernel - calculte tx bytes from kernel to check concurrent tx or not
1454 * @padapter: the adapter to be record tx bytes
1455 * @len: data len
1456 */
rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter,u32 len)1457 inline void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len)
1458 {
1459 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1460
1461 if (MCC_EN(padapter)) {
1462 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1463 pmccadapriv->mcc_tx_bytes_from_kernel += len;
1464 if (0)
1465 RTW_INFO("%s(order:%d): mcc tx bytes from kernel:%lld\n"
1466 , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_from_kernel);
1467 }
1468 }
1469 }
1470
1471 /**
1472 * rtw_hal_mcc_calc_tx_bytes_to_port - calculte tx bytes to write port in order to flow crtl
1473 * @padapter: the adapter to be record tx bytes
1474 * @len: data len
1475 */
rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter,u32 len)1476 inline void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len)
1477 {
1478 if (MCC_EN(padapter)) {
1479 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1480 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1481
1482 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1483 pmccadapriv->mcc_tx_bytes_to_port += len;
1484 if (0)
1485 RTW_INFO("%s(order:%d): mcc tx bytes to port:%d, mcc target tx bytes to port:%d\n"
1486 , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_to_port
1487 , pmccadapriv->mcc_target_tx_bytes_to_port);
1488 }
1489 }
1490
1491 /**
1492 * rtw_hal_mcc_stop_tx_bytes_to_port - stop write port to hw or not
1493 * @padapter: the adapter to be stopped
1494 */
rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)1495 inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)
1496 {
1497 if (MCC_EN(padapter)) {
1498 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1499 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1500
1501 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1502 if (pmccadapriv->mcc_tp_limit) {
1503 if (pmccadapriv->mcc_tx_bytes_to_port >= pmccadapriv->mcc_target_tx_bytes_to_port) {
1504 pmccadapriv->mcc_tx_stop = _TRUE;
1505 rtw_netif_stop_queue(padapter->pnetdev);
1506 return _TRUE;
1507 }
1508 }
1509 }
1510 }
1511
1512 return _FALSE;
1513 }
1514
1515 /**
1516 * rtw_hal_set_mcc_setting_scan_start - setting mcc under scan start
1517 * @padapter: the adapter to be setted
1518 * @ch_setting_changed: softap channel setting to be changed or not
1519 */
rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter)1520 u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter)
1521 {
1522 u8 ret = _FAIL;
1523
1524 if (MCC_EN(padapter)) {
1525 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1526
1527 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1528 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1529 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1530 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_SCAN_START);
1531 /* issue null data to all station connected to AP before scan */
1532 rtw_hal_mcc_issue_null_data(padapter, 0, 1);
1533 }
1534 }
1535 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1536 }
1537
1538 return ret;
1539 }
1540
1541 /**
1542 * rtw_hal_set_mcc_setting_scan_complete - setting mcc after scan commplete
1543 * @padapter: the adapter to be setted
1544 * @ch_setting_changed: softap channel setting to be changed or not
1545 */
rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter)1546 u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter)
1547 {
1548 u8 ret = _FAIL;
1549
1550 if (MCC_EN(padapter)) {
1551 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1552
1553 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1554
1555 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
1556 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE);
1557
1558 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1559 }
1560
1561 return ret;
1562 }
1563
1564
1565 /**
1566 * rtw_hal_set_mcc_setting_start_bss_network - setting mcc under softap start
1567 * @padapter: the adapter to be setted
1568 * @chbw_grouped: channel bw offset can not be allowed or not
1569 */
rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter,u8 chbw_allow)1570 u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_allow)
1571 {
1572 u8 ret = _FAIL;
1573
1574 if (MCC_EN(padapter)) {
1575 /* channel bw offset can not be allowed, start MCC */
1576 if (chbw_allow == _FALSE) {
1577 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1578
1579 rtw_hal_mcc_restore_iqk_val(padapter);
1580 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1581 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1582 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1583 }
1584 }
1585
1586 return ret;
1587 }
1588
1589 /**
1590 * rtw_hal_set_mcc_setting_disconnect - setting mcc under mlme disconnect(stop softap/disconnect from AP)
1591 * @padapter: the adapter to be setted
1592 */
rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter)1593 u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter)
1594 {
1595 u8 ret = _FAIL;
1596
1597 if (MCC_EN(padapter)) {
1598 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1599
1600 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1601 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1602 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1603 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
1604 }
1605 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1606 }
1607
1608 return ret;
1609 }
1610
1611 /**
1612 * rtw_hal_set_mcc_setting_join_done_chk_ch - setting mcc under join done
1613 * @padapter: the adapter to be checked
1614 */
rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter)1615 u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter)
1616 {
1617 u8 ret = _FAIL;
1618
1619 if (MCC_EN(padapter)) {
1620 struct mi_state mstate;
1621
1622 rtw_mi_status_no_self(padapter, &mstate);
1623
1624 if (MSTATE_STA_LD_NUM(&mstate) || MSTATE_STA_LG_NUM(&mstate) || MSTATE_AP_NUM(&mstate)) {
1625 bool chbw_allow = _TRUE;
1626 u8 u_ch, u_offset, u_bw;
1627 struct mlme_ext_priv *cur_mlmeext = &padapter->mlmeextpriv;
1628 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1629
1630 if (rtw_mi_get_ch_setting_union_no_self(padapter, &u_ch, &u_bw, &u_offset) <= 0) {
1631 dump_adapters_status(RTW_DBGDUMP , dvobj);
1632 rtw_warn_on(1);
1633 }
1634
1635 RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n"
1636 , FUNC_ADPT_ARG(padapter), u_ch, u_bw, u_offset);
1637
1638 /* chbw_allow? */
1639 chbw_allow = rtw_is_chbw_grouped(cur_mlmeext->cur_channel
1640 , cur_mlmeext->cur_bwmode, cur_mlmeext->cur_ch_offset
1641 , u_ch, u_bw, u_offset);
1642
1643 RTW_INFO(FUNC_ADPT_FMT" chbw_allow:%d\n"
1644 , FUNC_ADPT_ARG(padapter), chbw_allow);
1645
1646 /* if chbw_allow = false, start MCC setting */
1647 if (chbw_allow == _FALSE) {
1648 struct mcc_obj_priv *pmccobjpriv = &dvobj->mcc_objpriv;
1649
1650 rtw_hal_mcc_restore_iqk_val(padapter);
1651 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1652 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1653 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1654 }
1655 }
1656 }
1657
1658 return ret;
1659 }
1660
1661 /**
1662 * rtw_hal_set_mcc_setting_chk_start_clnt_join - check change channel under start clnt join
1663 * @padapter: the adapter to be checked
1664 * @ch: pointer to rerurn ch
1665 * @bw: pointer to rerurn bw
1666 * @offset: pointer to rerurn offset
1667 * @chbw_allow: allow to use adapter's channel setting
1668 */
rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter,u8 * ch,u8 * bw,u8 * offset,u8 chbw_allow)1669 u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow)
1670 {
1671 u8 ret = _FAIL;
1672
1673 /* if chbw_allow = false under en_mcc = TRUE, we do not change channel related setting */
1674 if (MCC_EN(padapter)) {
1675 /* restore union channel related setting to current channel related setting */
1676 if (chbw_allow == _FALSE) {
1677 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
1678
1679 *ch = pmlmeext->cur_channel;
1680 *bw = pmlmeext->cur_bwmode;
1681 *offset = pmlmeext->cur_ch_offset;
1682
1683 RTW_INFO(FUNC_ADPT_FMT" en_mcc:%d(%d,%d,%d,)\n"
1684 , FUNC_ADPT_ARG(padapter), padapter->registrypriv.en_mcc
1685 , *ch, *bw, *offset);
1686 ret = _SUCCESS;
1687 }
1688 }
1689
1690 return ret;
1691 }
1692
rtw_hal_mcc_dump_noa_content(void * sel,PADAPTER padapter)1693 static void rtw_hal_mcc_dump_noa_content(void *sel, PADAPTER padapter)
1694 {
1695 struct mcc_adapter_priv *pmccadapriv = NULL;
1696 u8 *pos = NULL;
1697 pmccadapriv = &padapter->mcc_adapterpriv;
1698 /* last position for NoA attribute */
1699 pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len;
1700
1701
1702 RTW_PRINT_SEL(sel, "\nStart to dump NoA Content\n");
1703 RTW_PRINT_SEL(sel, "NoA Counts:%d\n", *(pos - 13));
1704 RTW_PRINT_SEL(sel, "NoA Duration(TU):%d\n", (RTW_GET_LE32(pos - 12))/TU);
1705 RTW_PRINT_SEL(sel, "NoA Interval(TU):%d\n", (RTW_GET_LE32(pos - 8))/TU);
1706 RTW_PRINT_SEL(sel, "NoA Start time(microseconds):0x%02x\n", RTW_GET_LE32(pos - 4));
1707 RTW_PRINT_SEL(sel, "End to dump NoA Content\n");
1708 }
1709
rtw_hal_dump_mcc_info(void * sel,struct dvobj_priv * dvobj)1710 void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj)
1711 {
1712 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
1713 struct mcc_adapter_priv *pmccadapriv = NULL;
1714 _adapter *iface = NULL, *adapter = NULL;
1715 struct registry_priv *regpriv = NULL;
1716 u8 i = 0;
1717
1718 /* regpriv is common for all adapter */
1719 adapter = dvobj->padapters[IFACE_ID0];
1720
1721 RTW_PRINT_SEL(sel, "**********************************************\n");
1722 for (i = 0; i < dvobj->iface_nums; i++) {
1723 iface = dvobj->padapters[i];
1724 if (!iface)
1725 continue;
1726
1727 regpriv = &iface->registrypriv;
1728 pmccadapriv = &iface->mcc_adapterpriv;
1729 if (pmccadapriv) {
1730 RTW_PRINT_SEL(sel, "adapter mcc info:\n");
1731 RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface));
1732 RTW_PRINT_SEL(sel, "order:%d\n", pmccadapriv->order);
1733 RTW_PRINT_SEL(sel, "duration:%d\n", pmccadapriv->mcc_duration);
1734 RTW_PRINT_SEL(sel, "target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port);
1735 RTW_PRINT_SEL(sel, "current TP:%d\n", pmccadapriv->mcc_tp);
1736 RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid);
1737 RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n\n", pmccadapriv->mcc_macid_bitmap);
1738 RTW_PRINT_SEL(sel, "registry data:\n");
1739 RTW_PRINT_SEL(sel, "en_mcc:%d\n", regpriv->en_mcc);
1740 RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp);
1741 RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp);
1742 RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp);
1743 RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp);
1744 RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp);
1745 RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp);
1746 RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri);
1747 if (MLME_IS_GO(iface))
1748 rtw_hal_mcc_dump_noa_content(sel, iface);
1749 RTW_PRINT_SEL(sel, "**********************************************\n");
1750 }
1751 }
1752 RTW_PRINT_SEL(sel, "------------------------------------------\n");
1753 RTW_PRINT_SEL(sel, "policy index:%d\n", pmccobjpriv->policy_index);
1754 RTW_PRINT_SEL(sel, "------------------------------------------\n");
1755 RTW_PRINT_SEL(sel, "define data:\n");
1756 RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP);
1757 RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", MCC_AP_BW40_TARGET_TX_TP);
1758 RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", MCC_AP_BW80_TARGET_TX_TP);
1759 RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", MCC_STA_BW20_TARGET_TX_TP);
1760 RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M):%d Mbps\n", MCC_STA_BW40_TARGET_TX_TP);
1761 RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", MCC_STA_BW80_TARGET_TX_TP);
1762 RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", MCC_SINGLE_TX_CRITERIA);
1763 RTW_PRINT_SEL(sel, "------------------------------------------\n");
1764 }
1765
update_mcc_mgntframe_attrib(_adapter * padapter,struct pkt_attrib * pattrib)1766 inline void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
1767 {
1768 if (MCC_EN(padapter)) {
1769 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1770 /* use QSLT_MGNT to check mgnt queue or bcn queue */
1771 if (pattrib->qsel == QSLT_MGNT) {
1772 pattrib->mac_id = padapter->mcc_adapterpriv.mgmt_queue_macid;
1773 pattrib->qsel = QSLT_VO;
1774 }
1775 }
1776 }
1777 }
1778
rtw_hal_mcc_link_status_chk(_adapter * padapter,const char * msg)1779 inline u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg)
1780 {
1781 u8 ret = _TRUE, i = 0;
1782 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1783 _adapter *iface;
1784 struct mlme_ext_priv *mlmeext;
1785
1786 if (MCC_EN(padapter)) {
1787 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1788 for (i = 0; i < dvobj->iface_nums; i++) {
1789 iface = dvobj->padapters[i];
1790 mlmeext = &iface->mlmeextpriv;
1791 if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE) {
1792 #ifdef DBG_EXPIRATION_CHK
1793 RTW_INFO(FUNC_ADPT_FMT" don't enter %s under scan for MCC mode\n", FUNC_ADPT_ARG(padapter), msg);
1794 #endif
1795 ret = _FALSE;
1796 goto exit;
1797 }
1798 }
1799 }
1800 }
1801
1802 exit:
1803 return ret;
1804 }
1805
rtw_hal_mcc_issue_null_data(_adapter * padapter,u8 chbw_allow,u8 ps_mode)1806 void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode)
1807 {
1808 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1809 _adapter *iface = NULL;
1810 systime start = rtw_get_current_time();
1811 u8 i = 0;
1812
1813 if (!MCC_EN(padapter))
1814 return;
1815
1816 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1817 return;
1818
1819 if (chbw_allow == _TRUE)
1820 return;
1821
1822 for (i = 0; i < dvobj->iface_nums; i++) {
1823 iface = dvobj->padapters[i];
1824 /* issue null data to inform ap station will leave */
1825 if (is_client_associated_to_ap(iface)) {
1826 struct mlme_ext_priv *mlmeext = &iface->mlmeextpriv;
1827 u8 ch = mlmeext->cur_channel;
1828 u8 bw = mlmeext->cur_bwmode;
1829 u8 offset = mlmeext->cur_ch_offset;
1830
1831 set_channel_bwmode(iface, ch, bw, offset);
1832 issue_nulldata(iface, NULL, ps_mode, 3, 50);
1833 }
1834 }
1835 RTW_INFO("%s(%d ms)\n", __func__, rtw_get_passing_time_ms(start));
1836 }
1837
rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter,u8 * pframe,u32 * len)1838 u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len)
1839 {
1840 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1841
1842 if (!MCC_EN(padapter))
1843 return pframe;
1844
1845 if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1846 return pframe;
1847
1848 if (pmccadapriv->p2p_go_noa_ie_len == 0)
1849 return pframe;
1850
1851 _rtw_memcpy(pframe, pmccadapriv->p2p_go_noa_ie, pmccadapriv->p2p_go_noa_ie_len);
1852 *len = *len + pmccadapriv->p2p_go_noa_ie_len;
1853
1854 return pframe + pmccadapriv->p2p_go_noa_ie_len;
1855 }
1856
rtw_hal_dump_mcc_policy_table(void * sel)1857 void rtw_hal_dump_mcc_policy_table(void *sel)
1858 {
1859 u8 idx = 0;
1860 RTW_PRINT_SEL(sel, "duration\t,tsf sync offset\t,start time offset\t,interval\t,guard offset0\t,guard offset1\n");
1861
1862 for (idx = 0; idx < mcc_max_policy_num; idx ++) {
1863 RTW_PRINT_SEL(sel, "%d\t\t,%d\t\t\t,%d\t\t\t,%d\t\t,%d\t\t,%d\n"
1864 , mcc_switch_channel_policy_table[idx][MCC_DURATION_IDX]
1865 , mcc_switch_channel_policy_table[idx][MCC_TSF_SYNC_OFFSET_IDX]
1866 , mcc_switch_channel_policy_table[idx][MCC_START_TIME_OFFSET_IDX]
1867 , mcc_switch_channel_policy_table[idx][MCC_INTERVAL_IDX]
1868 , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET0_IDX]
1869 , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET1_IDX]);
1870 }
1871 }
1872
1873 #endif /* CONFIG_MCC_MODE */
1874