1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15
16 #define _HAL_INTF_C_
17
18 #include <drv_types.h>
19 #include <hal_data.h>
20
21 const u32 _chip_type_to_odm_ic_type[] = {
22 0,
23 ODM_RTL8188E,
24 ODM_RTL8192E,
25 ODM_RTL8812,
26 ODM_RTL8821,
27 ODM_RTL8723B,
28 ODM_RTL8814A,
29 ODM_RTL8703B,
30 ODM_RTL8188F,
31 ODM_RTL8822B,
32 ODM_RTL8723D,
33 ODM_RTL8821C,
34 0,
35 };
36
rtw_hal_chip_configure(_adapter * padapter)37 void rtw_hal_chip_configure(_adapter *padapter)
38 {
39 padapter->hal_func.intf_chip_configure(padapter);
40 }
41
42 /*
43 * Description:
44 * Read chip internal ROM data
45 *
46 * Return:
47 * _SUCCESS success
48 * _FAIL fail
49 */
rtw_hal_read_chip_info(_adapter * padapter)50 u8 rtw_hal_read_chip_info(_adapter *padapter)
51 {
52 u8 rtn = _SUCCESS;
53 u8 hci_type = rtw_get_intf_type(padapter);
54 systime start = rtw_get_current_time();
55
56 /* before access eFuse, make sure card enable has been called */
57 if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
58 && !rtw_is_hw_init_completed(padapter))
59 rtw_hal_power_on(padapter);
60
61 rtn = padapter->hal_func.read_adapter_info(padapter);
62
63 if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
64 && !rtw_is_hw_init_completed(padapter))
65 rtw_hal_power_off(padapter);
66
67 RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
68
69 return rtn;
70 }
71
rtw_hal_read_chip_version(_adapter * padapter)72 void rtw_hal_read_chip_version(_adapter *padapter)
73 {
74 padapter->hal_func.read_chip_version(padapter);
75 rtw_odm_init_ic_type(padapter);
76 }
77
rtw_hal_def_value_init(_adapter * padapter)78 void rtw_hal_def_value_init(_adapter *padapter)
79 {
80 if (is_primary_adapter(padapter)) {
81 padapter->hal_func.init_default_value(padapter);
82
83 rtw_init_hal_com_default_value(padapter);
84
85 {
86 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
87 struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
88
89 /* hal_spec is ready here */
90 dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT);
91
92 dvobj->cam_ctl.sec_cap = hal_spec->sec_cap;
93 dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT);
94 }
95 }
96 }
97
rtw_hal_data_init(_adapter * padapter)98 u8 rtw_hal_data_init(_adapter *padapter)
99 {
100 if (is_primary_adapter(padapter)) {
101 padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
102 padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz);
103 if (padapter->HalData == NULL) {
104 RTW_INFO("cant not alloc memory for HAL DATA\n");
105 return _FAIL;
106 }
107 }
108 return _SUCCESS;
109 }
110
rtw_hal_data_deinit(_adapter * padapter)111 void rtw_hal_data_deinit(_adapter *padapter)
112 {
113 if (is_primary_adapter(padapter)) {
114 if (padapter->HalData) {
115 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
116 phy_free_filebuf(padapter);
117 #endif
118 rtw_vmfree(padapter->HalData, padapter->hal_data_sz);
119 padapter->HalData = NULL;
120 padapter->hal_data_sz = 0;
121 }
122 }
123 }
124
rtw_hal_free_data(_adapter * padapter)125 void rtw_hal_free_data(_adapter *padapter)
126 {
127 /* free HAL Data */
128 rtw_hal_data_deinit(padapter);
129 }
rtw_hal_dm_init(_adapter * padapter)130 void rtw_hal_dm_init(_adapter *padapter)
131 {
132 if (is_primary_adapter(padapter)) {
133 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
134
135 padapter->hal_func.dm_init(padapter);
136
137 _rtw_spinlock_init(&pHalData->IQKSpinLock);
138
139 phy_load_tx_power_ext_info(padapter, 1);
140 }
141 }
rtw_hal_dm_deinit(_adapter * padapter)142 void rtw_hal_dm_deinit(_adapter *padapter)
143 {
144 if (is_primary_adapter(padapter)) {
145 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
146
147 padapter->hal_func.dm_deinit(padapter);
148
149 _rtw_spinlock_free(&pHalData->IQKSpinLock);
150 }
151 }
152 #ifdef CONFIG_RTW_SW_LED
rtw_hal_sw_led_init(_adapter * padapter)153 void rtw_hal_sw_led_init(_adapter *padapter)
154 {
155 if (padapter->hal_func.InitSwLeds)
156 padapter->hal_func.InitSwLeds(padapter);
157 }
158
rtw_hal_sw_led_deinit(_adapter * padapter)159 void rtw_hal_sw_led_deinit(_adapter *padapter)
160 {
161 if (padapter->hal_func.DeInitSwLeds)
162 padapter->hal_func.DeInitSwLeds(padapter);
163 }
164 #endif
165
rtw_hal_power_on(_adapter * padapter)166 u32 rtw_hal_power_on(_adapter *padapter)
167 {
168 u32 ret = 0;
169
170 ret = padapter->hal_func.hal_power_on(padapter);
171
172 #ifdef CONFIG_BT_COEXIST
173 if (ret == _SUCCESS)
174 rtw_btcoex_PowerOnSetting(padapter);
175 #endif
176
177 return ret;
178 }
rtw_hal_power_off(_adapter * padapter)179 void rtw_hal_power_off(_adapter *padapter)
180 {
181 struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl;
182
183 _rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT);
184
185 #ifdef CONFIG_BT_COEXIST
186 rtw_btcoex_PowerOffSetting(padapter);
187 #endif
188
189 padapter->hal_func.hal_power_off(padapter);
190 }
191
192
rtw_hal_init_opmode(_adapter * padapter)193 void rtw_hal_init_opmode(_adapter *padapter)
194 {
195 NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax;
196 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
197 sint fw_state;
198
199 fw_state = get_fwstate(pmlmepriv);
200
201 if (fw_state & WIFI_ADHOC_STATE)
202 networkType = Ndis802_11IBSS;
203 else if (fw_state & WIFI_STATION_STATE)
204 networkType = Ndis802_11Infrastructure;
205 #ifdef CONFIG_AP_MODE
206 else if (fw_state & WIFI_AP_STATE)
207 networkType = Ndis802_11APMode;
208 #endif
209 else
210 return;
211
212 rtw_setopmode_cmd(padapter, networkType, _FALSE);
213 }
214
rtw_hal_init(_adapter * padapter)215 uint rtw_hal_init(_adapter *padapter)
216 {
217 uint status = _SUCCESS;
218 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
219 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
220 int i;
221
222 status = padapter->hal_func.hal_init(padapter);
223
224 if (status == _SUCCESS) {
225 pHalData->hw_init_completed = _TRUE;
226 rtw_restore_mac_addr(padapter);
227 #ifdef RTW_HALMAC
228 rtw_restore_hw_port_cfg(padapter);
229 #endif
230 if (padapter->registrypriv.notch_filter == 1)
231 rtw_hal_notch_filter(padapter, 1);
232
233 for (i = 0; i < dvobj->iface_nums; i++)
234 rtw_sec_restore_wep_key(dvobj->padapters[i]);
235
236 rtw_led_control(padapter, LED_CTL_POWER_ON);
237
238 init_hw_mlme_ext(padapter);
239
240 rtw_hal_init_opmode(padapter);
241
242 #ifdef CONFIG_RF_POWER_TRIM
243 rtw_bb_rf_gain_offset(padapter);
244 #endif /*CONFIG_RF_POWER_TRIM*/
245
246 } else {
247 pHalData->hw_init_completed = _FALSE;
248 RTW_INFO("rtw_hal_init: hal_init fail\n");
249 }
250
251
252 return status;
253
254 }
255
rtw_hal_deinit(_adapter * padapter)256 uint rtw_hal_deinit(_adapter *padapter)
257 {
258 uint status = _SUCCESS;
259 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
260 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
261 int i;
262
263 status = padapter->hal_func.hal_deinit(padapter);
264
265 if (status == _SUCCESS) {
266 rtw_led_control(padapter, LED_CTL_POWER_OFF);
267 pHalData->hw_init_completed = _FALSE;
268 } else
269 RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
270
271
272 return status;
273 }
274
rtw_hal_set_hwreg(_adapter * padapter,u8 variable,u8 * val)275 u8 rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
276 {
277 return padapter->hal_func.set_hw_reg_handler(padapter, variable, val);
278 }
279
rtw_hal_get_hwreg(_adapter * padapter,u8 variable,u8 * val)280 void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
281 {
282 padapter->hal_func.GetHwRegHandler(padapter, variable, val);
283 }
284
rtw_hal_set_def_var(_adapter * padapter,HAL_DEF_VARIABLE eVariable,PVOID pValue)285 u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
286 {
287 return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue);
288 }
rtw_hal_get_def_var(_adapter * padapter,HAL_DEF_VARIABLE eVariable,PVOID pValue)289 u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
290 {
291 return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue);
292 }
293
rtw_hal_set_odm_var(_adapter * padapter,HAL_ODM_VARIABLE eVariable,PVOID pValue1,BOOLEAN bSet)294 void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet)
295 {
296 padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet);
297 }
rtw_hal_get_odm_var(_adapter * padapter,HAL_ODM_VARIABLE eVariable,PVOID pValue1,PVOID pValue2)298 void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2)
299 {
300 padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2);
301 }
302
303 /* FOR SDIO & PCIE */
rtw_hal_enable_interrupt(_adapter * padapter)304 void rtw_hal_enable_interrupt(_adapter *padapter)
305 {
306 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
307 padapter->hal_func.enable_interrupt(padapter);
308 #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
309 }
310
311 /* FOR SDIO & PCIE */
rtw_hal_disable_interrupt(_adapter * padapter)312 void rtw_hal_disable_interrupt(_adapter *padapter)
313 {
314 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
315 padapter->hal_func.disable_interrupt(padapter);
316 #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
317 }
318
319
rtw_hal_check_ips_status(_adapter * padapter)320 u8 rtw_hal_check_ips_status(_adapter *padapter)
321 {
322 u8 val = _FALSE;
323 if (padapter->hal_func.check_ips_status)
324 val = padapter->hal_func.check_ips_status(padapter);
325 else
326 RTW_INFO("%s: hal_func.check_ips_status is NULL!\n", __FUNCTION__);
327
328 return val;
329 }
330
rtw_hal_fw_dl(_adapter * padapter,u8 wowlan)331 s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan)
332 {
333 return padapter->hal_func.fw_dl(padapter, wowlan);
334 }
335
336 #ifdef RTW_HALMAC
rtw_hal_fw_mem_dl(_adapter * padapter,enum fw_mem mem)337 s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem)
338 {
339 systime dlfw_start_time = rtw_get_current_time();
340 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
341 struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
342 s32 rst = _FALSE;
343
344 rst = padapter->hal_func.fw_mem_dl(padapter, mem);
345 RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(dlfw_start_time));
346
347 if (rst == _FALSE)
348 pdbgpriv->dbg_fw_mem_dl_error_cnt++;
349 if (1)
350 RTW_INFO("%s dbg_fw_mem_dl_error_cnt:%d\n", __func__, pdbgpriv->dbg_fw_mem_dl_error_cnt);
351 return rst;
352 }
353 #endif
354
355 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
rtw_hal_clear_interrupt(_adapter * padapter)356 void rtw_hal_clear_interrupt(_adapter *padapter)
357 {
358 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
359 padapter->hal_func.clear_interrupt(padapter);
360 #endif
361 }
362 #endif
363
364 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
rtw_hal_inirp_init(_adapter * padapter)365 u32 rtw_hal_inirp_init(_adapter *padapter)
366 {
367 if (is_primary_adapter(padapter))
368 return padapter->hal_func.inirp_init(padapter);
369 return _SUCCESS;
370 }
rtw_hal_inirp_deinit(_adapter * padapter)371 u32 rtw_hal_inirp_deinit(_adapter *padapter)
372 {
373
374 if (is_primary_adapter(padapter))
375 return padapter->hal_func.inirp_deinit(padapter);
376
377 return _SUCCESS;
378 }
379 #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
380
381 #if defined(CONFIG_PCI_HCI)
rtw_hal_irp_reset(_adapter * padapter)382 void rtw_hal_irp_reset(_adapter *padapter)
383 {
384 padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter));
385 }
386
rtw_hal_pci_dbi_write(_adapter * padapter,u16 addr,u8 data)387 void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data)
388 {
389 u16 cmd[2];
390
391 cmd[0] = addr;
392 cmd[1] = data;
393
394 padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd);
395 }
396
rtw_hal_pci_dbi_read(_adapter * padapter,u16 addr)397 u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr)
398 {
399 padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr));
400
401 return (u8)addr;
402 }
403
rtw_hal_pci_mdio_write(_adapter * padapter,u8 addr,u16 data)404 void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data)
405 {
406 u16 cmd[2];
407
408 cmd[0] = (u16)addr;
409 cmd[1] = data;
410
411 padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd);
412 }
413
rtw_hal_pci_mdio_read(_adapter * padapter,u8 addr)414 u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr)
415 {
416 padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr);
417
418 return (u8)addr;
419 }
420
rtw_hal_pci_l1off_nic_support(_adapter * padapter)421 u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter)
422 {
423 u8 l1off;
424
425 padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off);
426 return l1off;
427 }
428
rtw_hal_pci_l1off_capability(_adapter * padapter)429 u8 rtw_hal_pci_l1off_capability(_adapter *padapter)
430 {
431 u8 l1off;
432
433 padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off);
434 return l1off;
435 }
436
437
438 #endif /* #if defined(CONFIG_PCI_HCI) */
439
440 /* for USB Auto-suspend */
rtw_hal_intf_ps_func(_adapter * padapter,HAL_INTF_PS_FUNC efunc_id,u8 * val)441 u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
442 {
443 if (padapter->hal_func.interface_ps_func)
444 return padapter->hal_func.interface_ps_func(padapter, efunc_id, val);
445 return _FAIL;
446 }
447
rtw_hal_xmitframe_enqueue(_adapter * padapter,struct xmit_frame * pxmitframe)448 s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
449 {
450 return padapter->hal_func.hal_xmitframe_enqueue(padapter, pxmitframe);
451 }
452
rtw_hal_xmit(_adapter * padapter,struct xmit_frame * pxmitframe)453 s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
454 {
455 return padapter->hal_func.hal_xmit(padapter, pxmitframe);
456 }
457
458 /*
459 * [IMPORTANT] This function would be run in interrupt context.
460 */
rtw_hal_mgnt_xmit(_adapter * padapter,struct xmit_frame * pmgntframe)461 s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
462 {
463 s32 ret = _FAIL;
464 u8 *pframe, subtype;
465 struct rtw_ieee80211_hdr *pwlanhdr;
466 struct sta_info *psta;
467 struct sta_priv *pstapriv = &padapter->stapriv;
468
469 update_mgntframe_attrib_addr(padapter, pmgntframe);
470 pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
471 subtype = get_frame_sub_type(pframe); /* bit(7)~bit(2) */
472
473 /* pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; */
474 /* _rtw_memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); */
475
476 #ifdef CONFIG_IEEE80211W
477 if (padapter->securitypriv.binstallBIPkey == _TRUE && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC ||
478 subtype == WIFI_ACTION)) {
479 if (IS_MCAST(pmgntframe->attrib.ra) && pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) {
480 pmgntframe->attrib.encrypt = _BIP_;
481 /* pmgntframe->attrib.bswenc = _TRUE; */
482 } else if (pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) {
483 psta = rtw_get_stainfo(pstapriv, pmgntframe->attrib.ra);
484 if (psta && psta->bpairwise_key_installed == _TRUE) {
485 pmgntframe->attrib.encrypt = _AES_;
486 pmgntframe->attrib.bswenc = _TRUE;
487 } else {
488 RTW_INFO("%s, %d, bpairwise_key_installed is FALSE\n", __func__, __LINE__);
489 goto no_mgmt_coalesce;
490 }
491 }
492 RTW_INFO("encrypt=%d, bswenc=%d\n", pmgntframe->attrib.encrypt, pmgntframe->attrib.bswenc);
493 rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
494 }
495 #endif /* CONFIG_IEEE80211W */
496 no_mgmt_coalesce:
497 ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe);
498 return ret;
499 }
500
rtw_hal_init_xmit_priv(_adapter * padapter)501 s32 rtw_hal_init_xmit_priv(_adapter *padapter)
502 {
503 return padapter->hal_func.init_xmit_priv(padapter);
504 }
rtw_hal_free_xmit_priv(_adapter * padapter)505 void rtw_hal_free_xmit_priv(_adapter *padapter)
506 {
507 padapter->hal_func.free_xmit_priv(padapter);
508 }
509
rtw_hal_init_recv_priv(_adapter * padapter)510 s32 rtw_hal_init_recv_priv(_adapter *padapter)
511 {
512 return padapter->hal_func.init_recv_priv(padapter);
513 }
rtw_hal_free_recv_priv(_adapter * padapter)514 void rtw_hal_free_recv_priv(_adapter *padapter)
515 {
516 padapter->hal_func.free_recv_priv(padapter);
517 }
518
rtw_sta_ra_registed(_adapter * padapter,struct sta_info * psta)519 void rtw_sta_ra_registed(_adapter *padapter, struct sta_info *psta)
520 {
521 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
522 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
523
524 if (psta == NULL) {
525 RTW_ERR(FUNC_ADPT_FMT" sta is NULL\n", FUNC_ADPT_ARG(padapter));
526 rtw_warn_on(1);
527 return;
528 }
529
530 #ifdef CONFIG_AP_MODE
531 if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
532 if (psta->cmn.aid >= NUM_STA) {
533 RTW_ERR("station aid %d exceed the max number\n", psta->cmn.aid);
534 rtw_warn_on(1);
535 return;
536 }
537 rtw_ap_update_sta_ra_info(padapter, psta);
538 }
539 #endif
540
541 psta->cmn.ra_info.ra_bw_mode = rtw_get_tx_bw_mode(padapter, psta);
542 /*set correct initial date rate for each mac_id */
543 hal_data->INIDATA_RATE[psta->cmn.mac_id] = psta->init_rate;
544
545 rtw_phydm_ra_registed(padapter, psta);
546 }
547
rtw_hal_update_ra_mask(struct sta_info * psta)548 void rtw_hal_update_ra_mask(struct sta_info *psta)
549 {
550 _adapter *padapter;
551
552 if (!psta)
553 return;
554
555 padapter = psta->padapter;
556 rtw_sta_ra_registed(padapter, psta);
557 }
558
559 /* Start specifical interface thread */
rtw_hal_start_thread(_adapter * padapter)560 void rtw_hal_start_thread(_adapter *padapter)
561 {
562 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
563 #ifndef CONFIG_SDIO_TX_TASKLET
564 padapter->hal_func.run_thread(padapter);
565 #endif
566 #endif
567 }
568 /* Start specifical interface thread */
rtw_hal_stop_thread(_adapter * padapter)569 void rtw_hal_stop_thread(_adapter *padapter)
570 {
571 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
572 #ifndef CONFIG_SDIO_TX_TASKLET
573
574 padapter->hal_func.cancel_thread(padapter);
575
576 #endif
577 #endif
578 }
579
rtw_hal_read_bbreg(_adapter * padapter,u32 RegAddr,u32 BitMask)580 u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
581 {
582 u32 data = 0;
583 if (padapter->hal_func.read_bbreg)
584 data = padapter->hal_func.read_bbreg(padapter, RegAddr, BitMask);
585 return data;
586 }
rtw_hal_write_bbreg(_adapter * padapter,u32 RegAddr,u32 BitMask,u32 Data)587 void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
588 {
589 if (padapter->hal_func.write_bbreg)
590 padapter->hal_func.write_bbreg(padapter, RegAddr, BitMask, Data);
591 }
592
rtw_hal_read_rfreg(_adapter * padapter,enum rf_path eRFPath,u32 RegAddr,u32 BitMask)593 u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask)
594 {
595 u32 data = 0;
596
597 if (padapter->hal_func.read_rfreg) {
598 data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
599
600 if (match_rf_read_sniff_ranges(eRFPath, RegAddr, BitMask)) {
601 RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n"
602 , eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data);
603 }
604 }
605
606 return data;
607 }
608
rtw_hal_write_rfreg(_adapter * padapter,enum rf_path eRFPath,u32 RegAddr,u32 BitMask,u32 Data)609 void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
610 {
611 if (padapter->hal_func.write_rfreg) {
612
613 if (match_rf_write_sniff_ranges(eRFPath, RegAddr, BitMask)) {
614 RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n"
615 , eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data);
616 }
617
618 padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
619
620 #ifdef CONFIG_PCI_HCI
621 if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/
622 rtw_udelay_os(2);
623 #endif
624 }
625 }
626
627 #if defined(CONFIG_PCI_HCI)
rtw_hal_interrupt_handler(_adapter * padapter)628 s32 rtw_hal_interrupt_handler(_adapter *padapter)
629 {
630 s32 ret = _FAIL;
631 ret = padapter->hal_func.interrupt_handler(padapter);
632 return ret;
633 }
634 #endif
635 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
rtw_hal_interrupt_handler(_adapter * padapter,u16 pkt_len,u8 * pbuf)636 void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
637 {
638 padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf);
639 }
640 #endif
641
rtw_hal_set_chnl_bw(_adapter * padapter,u8 channel,enum channel_width Bandwidth,u8 Offset40,u8 Offset80)642 void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80)
643 {
644 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
645 u8 cch_160 = Bandwidth == CHANNEL_WIDTH_160 ? channel : 0;
646 u8 cch_80 = Bandwidth == CHANNEL_WIDTH_80 ? channel : 0;
647 u8 cch_40 = Bandwidth == CHANNEL_WIDTH_40 ? channel : 0;
648 u8 cch_20 = Bandwidth == CHANNEL_WIDTH_20 ? channel : 0;
649
650 if (rtw_phydm_is_iqk_in_progress(padapter))
651 RTW_ERR("%s, %d, IQK may race condition\n", __func__, __LINE__);
652
653 #ifdef CONFIG_MP_INCLUDED
654 /* MP mode channel don't use secondary channel */
655 if (rtw_mp_mode_check(padapter) == _FALSE)
656 #endif
657 {
658 #if 0
659 if (cch_160 != 0)
660 cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80);
661 #endif
662 if (cch_80 != 0)
663 cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80);
664 if (cch_40 != 0)
665 cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, Offset40);
666 }
667
668 pHalData->cch_80 = cch_80;
669 pHalData->cch_40 = cch_40;
670 pHalData->cch_20 = cch_20;
671
672 if (0)
673 RTW_INFO("%s cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u)\n", __func__
674 , channel, ch_width_str(Bandwidth), Offset40, Offset80
675 , pHalData->cch_80, pHalData->cch_40, pHalData->cch_20);
676
677 padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80);
678 }
679
rtw_hal_set_tx_power_level(_adapter * padapter,u8 channel)680 void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel)
681 {
682 if (padapter->hal_func.set_tx_power_level_handler)
683 padapter->hal_func.set_tx_power_level_handler(padapter, channel);
684 }
685
rtw_hal_get_tx_power_level(_adapter * padapter,s32 * powerlevel)686 void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel)
687 {
688 if (padapter->hal_func.get_tx_power_level_handler)
689 padapter->hal_func.get_tx_power_level_handler(padapter, powerlevel);
690 }
691
rtw_hal_dm_watchdog(_adapter * padapter)692 void rtw_hal_dm_watchdog(_adapter *padapter)
693 {
694 #ifdef CONFIG_MCC_MODE
695 if (MCC_EN(padapter)) {
696 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
697 return;
698 }
699 #endif /* CONFIG_MCC_MODE */
700 rtw_hal_turbo_edca(padapter);
701 padapter->hal_func.hal_dm_watchdog(padapter);
702
703 }
704
705 #ifdef CONFIG_LPS_LCLK_WD_TIMER
rtw_hal_dm_watchdog_in_lps(_adapter * padapter)706 void rtw_hal_dm_watchdog_in_lps(_adapter *padapter)
707 {
708 #if defined(CONFIG_CONCURRENT_MODE)
709 #ifndef CONFIG_FW_MULTI_PORT_SUPPORT
710 if (padapter->hw_port != HW_PORT0)
711 return;
712 #endif
713 #endif
714
715 if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE)
716 rtw_phydm_watchdog_in_lps_lclk(padapter);/* this function caller is in interrupt context */
717 }
718 #endif /*CONFIG_LPS_LCLK_WD_TIMER*/
719
rtw_hal_bcn_related_reg_setting(_adapter * padapter)720 void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
721 {
722 padapter->hal_func.SetBeaconRelatedRegistersHandler(padapter);
723 }
724
725 #ifdef CONFIG_HOSTAPD_MLME
rtw_hal_hostap_mgnt_xmit_entry(_adapter * padapter,_pkt * pkt)726 s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
727 {
728 if (padapter->hal_func.hostap_mgnt_xmit_entry)
729 return padapter->hal_func.hostap_mgnt_xmit_entry(padapter, pkt);
730 return _FAIL;
731 }
732 #endif /* CONFIG_HOSTAPD_MLME */
733
734 #ifdef DBG_CONFIG_ERROR_DETECT
rtw_hal_sreset_init(_adapter * padapter)735 void rtw_hal_sreset_init(_adapter *padapter)
736 {
737 padapter->hal_func.sreset_init_value(padapter);
738 }
rtw_hal_sreset_reset(_adapter * padapter)739 void rtw_hal_sreset_reset(_adapter *padapter)
740 {
741 padapter = GET_PRIMARY_ADAPTER(padapter);
742 padapter->hal_func.silentreset(padapter);
743 }
744
rtw_hal_sreset_reset_value(_adapter * padapter)745 void rtw_hal_sreset_reset_value(_adapter *padapter)
746 {
747 padapter->hal_func.sreset_reset_value(padapter);
748 }
749
rtw_hal_sreset_xmit_status_check(_adapter * padapter)750 void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
751 {
752 padapter->hal_func.sreset_xmit_status_check(padapter);
753 }
rtw_hal_sreset_linked_status_check(_adapter * padapter)754 void rtw_hal_sreset_linked_status_check(_adapter *padapter)
755 {
756 padapter->hal_func.sreset_linked_status_check(padapter);
757 }
rtw_hal_sreset_get_wifi_status(_adapter * padapter)758 u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
759 {
760 return padapter->hal_func.sreset_get_wifi_status(padapter);
761 }
762
rtw_hal_sreset_inprogress(_adapter * padapter)763 bool rtw_hal_sreset_inprogress(_adapter *padapter)
764 {
765 padapter = GET_PRIMARY_ADAPTER(padapter);
766 return padapter->hal_func.sreset_inprogress(padapter);
767 }
768 #endif /* DBG_CONFIG_ERROR_DETECT */
769
770 #ifdef CONFIG_IOL
rtw_hal_iol_cmd(ADAPTER * adapter,struct xmit_frame * xmit_frame,u32 max_waiting_ms,u32 bndy_cnt)771 int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_waiting_ms, u32 bndy_cnt)
772 {
773 if (adapter->hal_func.IOL_exec_cmds_sync)
774 return adapter->hal_func.IOL_exec_cmds_sync(adapter, xmit_frame, max_waiting_ms, bndy_cnt);
775 return _FAIL;
776 }
777 #endif
778
779 #ifdef CONFIG_XMIT_THREAD_MODE
rtw_hal_xmit_thread_handler(_adapter * padapter)780 s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
781 {
782 return padapter->hal_func.xmit_thread_handler(padapter);
783 }
784 #endif
785
786 #ifdef CONFIG_RECV_THREAD_MODE
rtw_hal_recv_hdl(_adapter * adapter)787 s32 rtw_hal_recv_hdl(_adapter *adapter)
788 {
789 return adapter->hal_func.recv_hdl(adapter);
790 }
791 #endif
792
rtw_hal_notch_filter(_adapter * adapter,bool enable)793 void rtw_hal_notch_filter(_adapter *adapter, bool enable)
794 {
795 if (adapter->hal_func.hal_notch_filter)
796 adapter->hal_func.hal_notch_filter(adapter, enable);
797 }
798
799 #ifdef CONFIG_FW_C2H_REG
rtw_hal_c2h_valid(_adapter * adapter,u8 * buf)800 inline bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf)
801 {
802 HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
803 HAL_VERSION *hal_ver = &HalData->version_id;
804 bool ret = _FAIL;
805
806 ret = C2H_ID_88XX(buf) || C2H_PLEN_88XX(buf);
807
808 return ret;
809 }
810
rtw_hal_c2h_evt_read(_adapter * adapter,u8 * buf)811 inline s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf)
812 {
813 HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
814 HAL_VERSION *hal_ver = &HalData->version_id;
815 s32 ret = _FAIL;
816
817 ret = c2h_evt_read_88xx(adapter, buf);
818
819 return ret;
820 }
821
rtw_hal_c2h_reg_hdr_parse(_adapter * adapter,u8 * buf,u8 * id,u8 * seq,u8 * plen,u8 ** payload)822 bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload)
823 {
824 HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
825 HAL_VERSION *hal_ver = &HalData->version_id;
826 bool ret = _FAIL;
827
828 *id = C2H_ID_88XX(buf);
829 *seq = C2H_SEQ_88XX(buf);
830 *plen = C2H_PLEN_88XX(buf);
831 *payload = C2H_PAYLOAD_88XX(buf);
832 ret = _SUCCESS;
833
834 return ret;
835 }
836 #endif /* CONFIG_FW_C2H_REG */
837
838 #ifdef CONFIG_FW_C2H_PKT
rtw_hal_c2h_pkt_hdr_parse(_adapter * adapter,u8 * buf,u16 len,u8 * id,u8 * seq,u8 * plen,u8 ** payload)839 bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload)
840 {
841 HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
842 HAL_VERSION *hal_ver = &HalData->version_id;
843 bool ret = _FAIL;
844
845 if (!buf || len > 256 || len < 3)
846 goto exit;
847
848 *id = C2H_ID_88XX(buf);
849 *seq = C2H_SEQ_88XX(buf);
850 *plen = len - 2;
851 *payload = C2H_PAYLOAD_88XX(buf);
852 ret = _SUCCESS;
853
854 exit:
855 return ret;
856 }
857 #endif /* CONFIG_FW_C2H_PKT */
858
859 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
860 #include <rtw_bt_mp.h> /* for MPTBT_FwC2hBtMpCtrl */
861 #endif
c2h_handler(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)862 s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
863 {
864 u8 sub_id = 0;
865 s32 ret = _SUCCESS;
866
867 switch (id) {
868 case C2H_FW_SCAN_COMPLETE:
869 RTW_INFO("[C2H], FW Scan Complete\n");
870 break;
871
872 #ifdef CONFIG_BT_COEXIST
873 case C2H_BT_INFO:
874 rtw_btcoex_BtInfoNotify(adapter, plen, payload);
875 break;
876 case C2H_BT_MP_INFO:
877 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
878 MPTBT_FwC2hBtMpCtrl(adapter, payload, plen);
879 #endif
880 rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
881 break;
882 case C2H_MAILBOX_STATUS:
883 RTW_DBG_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
884 break;
885 case C2H_WLAN_INFO:
886 rtw_btcoex_WlFwDbgInfoNotify(adapter, payload, plen);
887 break;
888 #endif /* CONFIG_BT_COEXIST */
889
890 case C2H_IQK_FINISH:
891 c2h_iqk_offload(adapter, payload, plen);
892 break;
893
894 #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
895 case C2H_FW_CHNL_SWITCH_COMPLETE:
896 rtw_tdls_chsw_oper_done(adapter);
897 #if defined(CONFIG_PCI_HCI)
898 rtw_hal_read_rfreg(adapter, 0, 0x18, 0xffffffff);
899 #endif
900 break;
901 case C2H_BCN_EARLY_RPT:
902 rtw_tdls_ch_sw_back_to_base_chnl(adapter);
903 break;
904 #endif
905
906 #ifdef CONFIG_MCC_MODE
907 case C2H_MCC:
908 rtw_hal_mcc_c2h_handler(adapter, plen, payload);
909 break;
910 #endif
911
912 #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
913 case C2H_MAC_HIDDEN_RPT:
914 c2h_mac_hidden_rpt_hdl(adapter, payload, plen);
915 break;
916 case C2H_MAC_HIDDEN_RPT_2:
917 c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen);
918 break;
919 #endif
920
921 case C2H_DEFEATURE_DBG:
922 c2h_defeature_dbg_hdl(adapter, payload, plen);
923 break;
924
925 #ifdef CONFIG_RTW_CUSTOMER_STR
926 case C2H_CUSTOMER_STR_RPT:
927 c2h_customer_str_rpt_hdl(adapter, payload, plen);
928 break;
929 case C2H_CUSTOMER_STR_RPT_2:
930 c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
931 break;
932 #endif
933
934 case C2H_EXTEND:
935 sub_id = payload[0];
936 /* no handle, goto default */
937
938 default:
939 if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE)
940 ret = _FAIL;
941 break;
942 }
943
944 exit:
945 if (ret != _SUCCESS) {
946 if (id == C2H_EXTEND)
947 RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id);
948 else
949 RTW_WARN("%s: unknown C2H(0x%02x)\n", __func__, id);
950 }
951
952 return ret;
953 }
954
955 #ifndef RTW_HALMAC
rtw_hal_c2h_handler(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)956 s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
957 {
958 s32 ret = _FAIL;
959
960 ret = adapter->hal_func.c2h_handler(adapter, id, seq, plen, payload);
961 if (ret != _SUCCESS)
962 ret = c2h_handler(adapter, id, seq, plen, payload);
963
964 return ret;
965 }
966
rtw_hal_c2h_id_handle_directly(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)967 s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
968 {
969 switch (id) {
970 case C2H_CCX_TX_RPT:
971 case C2H_BT_MP_INFO:
972 case C2H_FW_CHNL_SWITCH_COMPLETE:
973 case C2H_IQK_FINISH:
974 case C2H_MCC:
975 case C2H_BCN_EARLY_RPT:
976 case C2H_AP_REQ_TXRPT:
977 case C2H_SPC_STAT:
978 return _TRUE;
979 default:
980 return _FALSE;
981 }
982 }
983 #endif /* !RTW_HALMAC */
984
rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)985 s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)
986 {
987 return GET_HAL_DATA(padapter)->bDisableSWChannelPlan;
988 }
989
rtw_hal_macid_sleep(PADAPTER padapter,u8 macid)990 s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid)
991 {
992 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
993 struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
994 u8 support;
995
996 support = _FALSE;
997 rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support);
998 if (_FALSE == support)
999 return _FAIL;
1000
1001 if (macid >= macid_ctl->num) {
1002 RTW_ERR(FUNC_ADPT_FMT": Invalid macid(%u)\n",
1003 FUNC_ADPT_ARG(padapter), macid);
1004 return _FAIL;
1005 }
1006
1007 rtw_hal_set_hwreg(padapter, HW_VAR_MACID_SLEEP, &macid);
1008
1009 return _SUCCESS;
1010 }
1011
rtw_hal_macid_wakeup(PADAPTER padapter,u8 macid)1012 s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid)
1013 {
1014 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1015 struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
1016 u8 support;
1017
1018 support = _FALSE;
1019 rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support);
1020 if (_FALSE == support)
1021 return _FAIL;
1022
1023 if (macid >= macid_ctl->num) {
1024 RTW_ERR(FUNC_ADPT_FMT": Invalid macid(%u)\n",
1025 FUNC_ADPT_ARG(padapter), macid);
1026 return _FAIL;
1027 }
1028
1029 rtw_hal_set_hwreg(padapter, HW_VAR_MACID_WAKEUP, &macid);
1030
1031 return _SUCCESS;
1032 }
1033
rtw_hal_fill_h2c_cmd(PADAPTER padapter,u8 ElementID,u32 CmdLen,u8 * pCmdBuffer)1034 s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
1035 {
1036 _adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
1037
1038 if (GET_HAL_DATA(pri_adapter)->bFWReady == _TRUE)
1039 return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer);
1040 else if (padapter->registrypriv.mp_mode == 0)
1041 RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n"
1042 , FUNC_ADPT_ARG(padapter), ElementID);
1043 return _FAIL;
1044 }
1045
rtw_hal_fill_fake_txdesc(_adapter * padapter,u8 * pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull,u8 bDataFrame)1046 void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen,
1047 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
1048 {
1049 padapter->hal_func.fill_fake_txdesc(padapter, pDesc, BufferLen, IsPsPoll, IsBTQosNull, bDataFrame);
1050
1051 }
1052
rtw_hal_get_txbuff_rsvd_page_num(_adapter * adapter,bool wowlan)1053 u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan)
1054 {
1055 u8 num = 0;
1056
1057
1058 if (adapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
1059 num = adapter->hal_func.hal_get_tx_buff_rsvd_page_num(adapter, wowlan);
1060 } else {
1061 #ifdef RTW_HALMAC
1062 num = GET_HAL_DATA(adapter)->drv_rsvd_page_number;
1063 #endif /* RTW_HALMAC */
1064 }
1065
1066 return num;
1067 }
1068
1069 #ifdef CONFIG_GPIO_API
rtw_hal_update_hisr_hsisr_ind(_adapter * padapter,u32 flag)1070 void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag)
1071 {
1072 if (padapter->hal_func.update_hisr_hsisr_ind)
1073 padapter->hal_func.update_hisr_hsisr_ind(padapter, flag);
1074 }
1075
rtw_hal_gpio_func_check(_adapter * padapter,u8 gpio_num)1076 int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num)
1077 {
1078 int ret = _SUCCESS;
1079
1080 if (padapter->hal_func.hal_gpio_func_check)
1081 ret = padapter->hal_func.hal_gpio_func_check(padapter, gpio_num);
1082
1083 return ret;
1084 }
1085
rtw_hal_gpio_multi_func_reset(_adapter * padapter,u8 gpio_num)1086 void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
1087 {
1088 if (padapter->hal_func.hal_gpio_multi_func_reset)
1089 padapter->hal_func.hal_gpio_multi_func_reset(padapter, gpio_num);
1090 }
1091 #endif
1092
rtw_hal_fw_correct_bcn(_adapter * padapter)1093 void rtw_hal_fw_correct_bcn(_adapter *padapter)
1094 {
1095 if (padapter->hal_func.fw_correct_bcn)
1096 padapter->hal_func.fw_correct_bcn(padapter);
1097 }
1098
rtw_hal_set_tx_power_index(PADAPTER padapter,u32 powerindex,enum rf_path rfpath,u8 rate)1099 void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, enum rf_path rfpath, u8 rate)
1100 {
1101 return padapter->hal_func.set_tx_power_index_handler(padapter, powerindex, rfpath, rate);
1102 }
1103
rtw_hal_get_tx_power_index(PADAPTER padapter,enum rf_path rfpath,u8 rate,u8 bandwidth,u8 channel,struct txpwr_idx_comp * tic)1104 u8 rtw_hal_get_tx_power_index(PADAPTER padapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic)
1105 {
1106 return padapter->hal_func.get_tx_power_index_handler(padapter, rfpath, rate, bandwidth, channel, tic);
1107 }
1108
1109 #ifdef RTW_HALMAC
1110 /*
1111 * Description:
1112 * Initialize MAC registers
1113 *
1114 * Return:
1115 * _TRUE success
1116 * _FALSE fail
1117 */
rtw_hal_init_mac_register(PADAPTER adapter)1118 u8 rtw_hal_init_mac_register(PADAPTER adapter)
1119 {
1120 return adapter->hal_func.init_mac_register(adapter);
1121 }
1122
1123 /*
1124 * Description:
1125 * Initialize PHY(BB/RF) related functions
1126 *
1127 * Return:
1128 * _TRUE success
1129 * _FALSE fail
1130 */
rtw_hal_init_phy(PADAPTER adapter)1131 u8 rtw_hal_init_phy(PADAPTER adapter)
1132 {
1133 return adapter->hal_func.init_phy(adapter);
1134 }
1135 #endif /* RTW_HALMAC */
1136
1137 #ifdef CONFIG_RFKILL_POLL
rtw_hal_rfkill_poll(_adapter * adapter,u8 * valid)1138 bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid)
1139 {
1140 bool ret;
1141
1142 if (adapter->hal_func.hal_radio_onoff_check)
1143 ret = adapter->hal_func.hal_radio_onoff_check(adapter, valid);
1144 else {
1145 *valid = 0;
1146 ret = _FALSE;
1147 }
1148 return ret;
1149 }
1150 #endif
1151
1152 #define rtw_hal_error_msg(ops_fun) \
1153 RTW_PRINT("### %s - Error : Please hook hal_func.%s ###\n", __FUNCTION__, ops_fun)
1154
rtw_hal_ops_check(_adapter * padapter)1155 u8 rtw_hal_ops_check(_adapter *padapter)
1156 {
1157 u8 ret = _SUCCESS;
1158 #if 1
1159 /*** initialize section ***/
1160 if (NULL == padapter->hal_func.read_chip_version) {
1161 rtw_hal_error_msg("read_chip_version");
1162 ret = _FAIL;
1163 }
1164 if (NULL == padapter->hal_func.init_default_value) {
1165 rtw_hal_error_msg("init_default_value");
1166 ret = _FAIL;
1167 }
1168 if (NULL == padapter->hal_func.intf_chip_configure) {
1169 rtw_hal_error_msg("intf_chip_configure");
1170 ret = _FAIL;
1171 }
1172 if (NULL == padapter->hal_func.read_adapter_info) {
1173 rtw_hal_error_msg("read_adapter_info");
1174 ret = _FAIL;
1175 }
1176
1177 if (NULL == padapter->hal_func.hal_power_on) {
1178 rtw_hal_error_msg("hal_power_on");
1179 ret = _FAIL;
1180 }
1181 if (NULL == padapter->hal_func.hal_power_off) {
1182 rtw_hal_error_msg("hal_power_off");
1183 ret = _FAIL;
1184 }
1185
1186 if (NULL == padapter->hal_func.hal_init) {
1187 rtw_hal_error_msg("hal_init");
1188 ret = _FAIL;
1189 }
1190 if (NULL == padapter->hal_func.hal_deinit) {
1191 rtw_hal_error_msg("hal_deinit");
1192 ret = _FAIL;
1193 }
1194
1195 /*** xmit section ***/
1196 if (NULL == padapter->hal_func.init_xmit_priv) {
1197 rtw_hal_error_msg("init_xmit_priv");
1198 ret = _FAIL;
1199 }
1200 if (NULL == padapter->hal_func.free_xmit_priv) {
1201 rtw_hal_error_msg("free_xmit_priv");
1202 ret = _FAIL;
1203 }
1204 if (NULL == padapter->hal_func.hal_xmit) {
1205 rtw_hal_error_msg("hal_xmit");
1206 ret = _FAIL;
1207 }
1208 if (NULL == padapter->hal_func.mgnt_xmit) {
1209 rtw_hal_error_msg("mgnt_xmit");
1210 ret = _FAIL;
1211 }
1212 #ifdef CONFIG_XMIT_THREAD_MODE
1213 if (NULL == padapter->hal_func.xmit_thread_handler) {
1214 rtw_hal_error_msg("xmit_thread_handler");
1215 ret = _FAIL;
1216 }
1217 #endif
1218 if (NULL == padapter->hal_func.hal_xmitframe_enqueue) {
1219 rtw_hal_error_msg("hal_xmitframe_enqueue");
1220 ret = _FAIL;
1221 }
1222 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
1223 #ifndef CONFIG_SDIO_TX_TASKLET
1224 if (NULL == padapter->hal_func.run_thread) {
1225 rtw_hal_error_msg("run_thread");
1226 ret = _FAIL;
1227 }
1228 if (NULL == padapter->hal_func.cancel_thread) {
1229 rtw_hal_error_msg("cancel_thread");
1230 ret = _FAIL;
1231 }
1232 #endif
1233 #endif
1234
1235 /*** recv section ***/
1236 if (NULL == padapter->hal_func.init_recv_priv) {
1237 rtw_hal_error_msg("init_recv_priv");
1238 ret = _FAIL;
1239 }
1240 if (NULL == padapter->hal_func.free_recv_priv) {
1241 rtw_hal_error_msg("free_recv_priv");
1242 ret = _FAIL;
1243 }
1244 #ifdef CONFIG_RECV_THREAD_MODE
1245 if (NULL == padapter->hal_func.recv_hdl) {
1246 rtw_hal_error_msg("recv_hdl");
1247 ret = _FAIL;
1248 }
1249 #endif
1250 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
1251 if (NULL == padapter->hal_func.inirp_init) {
1252 rtw_hal_error_msg("inirp_init");
1253 ret = _FAIL;
1254 }
1255 if (NULL == padapter->hal_func.inirp_deinit) {
1256 rtw_hal_error_msg("inirp_deinit");
1257 ret = _FAIL;
1258 }
1259 #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
1260
1261
1262 /*** interrupt hdl section ***/
1263 #if defined(CONFIG_PCI_HCI)
1264 if (NULL == padapter->hal_func.irp_reset) {
1265 rtw_hal_error_msg("irp_reset");
1266 ret = _FAIL;
1267 }
1268 #endif/*#if defined(CONFIG_PCI_HCI)*/
1269 #if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))
1270 if (NULL == padapter->hal_func.interrupt_handler) {
1271 rtw_hal_error_msg("interrupt_handler");
1272 ret = _FAIL;
1273 }
1274 #endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/
1275
1276 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
1277 if (NULL == padapter->hal_func.enable_interrupt) {
1278 rtw_hal_error_msg("enable_interrupt");
1279 ret = _FAIL;
1280 }
1281 if (NULL == padapter->hal_func.disable_interrupt) {
1282 rtw_hal_error_msg("disable_interrupt");
1283 ret = _FAIL;
1284 }
1285 #endif /* defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
1286
1287
1288 /*** DM section ***/
1289 if (NULL == padapter->hal_func.dm_init) {
1290 rtw_hal_error_msg("dm_init");
1291 ret = _FAIL;
1292 }
1293 if (NULL == padapter->hal_func.dm_deinit) {
1294 rtw_hal_error_msg("dm_deinit");
1295 ret = _FAIL;
1296 }
1297 if (NULL == padapter->hal_func.hal_dm_watchdog) {
1298 rtw_hal_error_msg("hal_dm_watchdog");
1299 ret = _FAIL;
1300 }
1301
1302 /*** xxx section ***/
1303 if (NULL == padapter->hal_func.set_chnl_bw_handler) {
1304 rtw_hal_error_msg("set_chnl_bw_handler");
1305 ret = _FAIL;
1306 }
1307
1308 if (NULL == padapter->hal_func.set_hw_reg_handler) {
1309 rtw_hal_error_msg("set_hw_reg_handler");
1310 ret = _FAIL;
1311 }
1312 if (NULL == padapter->hal_func.GetHwRegHandler) {
1313 rtw_hal_error_msg("GetHwRegHandler");
1314 ret = _FAIL;
1315 }
1316 if (NULL == padapter->hal_func.get_hal_def_var_handler) {
1317 rtw_hal_error_msg("get_hal_def_var_handler");
1318 ret = _FAIL;
1319 }
1320 if (NULL == padapter->hal_func.SetHalDefVarHandler) {
1321 rtw_hal_error_msg("SetHalDefVarHandler");
1322 ret = _FAIL;
1323 }
1324 if (NULL == padapter->hal_func.GetHalODMVarHandler) {
1325 rtw_hal_error_msg("GetHalODMVarHandler");
1326 ret = _FAIL;
1327 }
1328 if (NULL == padapter->hal_func.SetHalODMVarHandler) {
1329 rtw_hal_error_msg("SetHalODMVarHandler");
1330 ret = _FAIL;
1331 }
1332
1333 if (NULL == padapter->hal_func.SetBeaconRelatedRegistersHandler) {
1334 rtw_hal_error_msg("SetBeaconRelatedRegistersHandler");
1335 ret = _FAIL;
1336 }
1337
1338 if (NULL == padapter->hal_func.fill_h2c_cmd) {
1339 rtw_hal_error_msg("fill_h2c_cmd");
1340 ret = _FAIL;
1341 }
1342
1343 #ifdef RTW_HALMAC
1344 if (NULL == padapter->hal_func.hal_mac_c2h_handler) {
1345 rtw_hal_error_msg("hal_mac_c2h_handler");
1346 ret = _FAIL;
1347 }
1348 #elif !defined(CONFIG_RTL8188E)
1349 if (NULL == padapter->hal_func.c2h_handler) {
1350 rtw_hal_error_msg("c2h_handler");
1351 ret = _FAIL;
1352 }
1353 #endif
1354
1355 #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
1356 if (NULL == padapter->hal_func.fill_fake_txdesc) {
1357 rtw_hal_error_msg("fill_fake_txdesc");
1358 ret = _FAIL;
1359 }
1360 #endif
1361
1362 #ifndef RTW_HALMAC
1363 if (NULL == padapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
1364 rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num");
1365 ret = _FAIL;
1366 }
1367 #endif /* !RTW_HALMAC */
1368
1369 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
1370 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
1371 if (NULL == padapter->hal_func.clear_interrupt) {
1372 rtw_hal_error_msg("clear_interrupt");
1373 ret = _FAIL;
1374 }
1375 #endif
1376 #endif /* CONFIG_WOWLAN */
1377
1378 if (NULL == padapter->hal_func.fw_dl) {
1379 rtw_hal_error_msg("fw_dl");
1380 ret = _FAIL;
1381 }
1382
1383 #if defined(RTW_HALMAC) && defined(CONFIG_LPS_PG)
1384 if (NULL == padapter->hal_func.fw_mem_dl) {
1385 rtw_hal_error_msg("fw_mem_dl");
1386 ret = _FAIL;
1387 }
1388 #endif
1389
1390 if ((IS_HARDWARE_TYPE_8814A(padapter)
1391 || IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter))
1392 && NULL == padapter->hal_func.fw_correct_bcn) {
1393 rtw_hal_error_msg("fw_correct_bcn");
1394 ret = _FAIL;
1395 }
1396
1397 if (IS_HARDWARE_TYPE_8822B(padapter) || IS_HARDWARE_TYPE_8821C(padapter)) {
1398 if (!padapter->hal_func.set_tx_power_index_handler) {
1399 rtw_hal_error_msg("set_tx_power_index_handler");
1400 ret = _FAIL;
1401 }
1402 }
1403
1404 if (!padapter->hal_func.get_tx_power_index_handler) {
1405 rtw_hal_error_msg("get_tx_power_index_handler");
1406 ret = _FAIL;
1407 }
1408
1409 /*** SReset section ***/
1410 #ifdef DBG_CONFIG_ERROR_DETECT
1411 if (NULL == padapter->hal_func.sreset_init_value) {
1412 rtw_hal_error_msg("sreset_init_value");
1413 ret = _FAIL;
1414 }
1415 if (NULL == padapter->hal_func.sreset_reset_value) {
1416 rtw_hal_error_msg("sreset_reset_value");
1417 ret = _FAIL;
1418 }
1419 if (NULL == padapter->hal_func.silentreset) {
1420 rtw_hal_error_msg("silentreset");
1421 ret = _FAIL;
1422 }
1423 if (NULL == padapter->hal_func.sreset_xmit_status_check) {
1424 rtw_hal_error_msg("sreset_xmit_status_check");
1425 ret = _FAIL;
1426 }
1427 if (NULL == padapter->hal_func.sreset_linked_status_check) {
1428 rtw_hal_error_msg("sreset_linked_status_check");
1429 ret = _FAIL;
1430 }
1431 if (NULL == padapter->hal_func.sreset_get_wifi_status) {
1432 rtw_hal_error_msg("sreset_get_wifi_status");
1433 ret = _FAIL;
1434 }
1435 if (NULL == padapter->hal_func.sreset_inprogress) {
1436 rtw_hal_error_msg("sreset_inprogress");
1437 ret = _FAIL;
1438 }
1439 #endif /* #ifdef DBG_CONFIG_ERROR_DETECT */
1440
1441 #ifdef RTW_HALMAC
1442 if (NULL == padapter->hal_func.init_mac_register) {
1443 rtw_hal_error_msg("init_mac_register");
1444 ret = _FAIL;
1445 }
1446 if (NULL == padapter->hal_func.init_phy) {
1447 rtw_hal_error_msg("init_phy");
1448 ret = _FAIL;
1449 }
1450 #endif /* RTW_HALMAC */
1451
1452 #ifdef CONFIG_RFKILL_POLL
1453 if (padapter->hal_func.hal_radio_onoff_check == NULL) {
1454 rtw_hal_error_msg("hal_radio_onoff_check");
1455 ret = _FAIL;
1456 }
1457 #endif
1458 #endif
1459 return ret;
1460 }
1461