1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2016 - 2017 Realtek Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 *****************************************************************************/ 16 #ifndef __HALBTC_OUT_SRC_H__ 17 #define __HALBTC_OUT_SRC_H__ 18 19 enum { 20 BTC_CCK_1, 21 BTC_CCK_2, 22 BTC_CCK_5_5, 23 BTC_CCK_11, 24 BTC_OFDM_6, 25 BTC_OFDM_9, 26 BTC_OFDM_12, 27 BTC_OFDM_18, 28 BTC_OFDM_24, 29 BTC_OFDM_36, 30 BTC_OFDM_48, 31 BTC_OFDM_54, 32 BTC_MCS_0, 33 BTC_MCS_1, 34 BTC_MCS_2, 35 BTC_MCS_3, 36 BTC_MCS_4, 37 BTC_MCS_5, 38 BTC_MCS_6, 39 BTC_MCS_7, 40 BTC_MCS_8, 41 BTC_MCS_9, 42 BTC_MCS_10, 43 BTC_MCS_11, 44 BTC_MCS_12, 45 BTC_MCS_13, 46 BTC_MCS_14, 47 BTC_MCS_15, 48 BTC_MCS_16, 49 BTC_MCS_17, 50 BTC_MCS_18, 51 BTC_MCS_19, 52 BTC_MCS_20, 53 BTC_MCS_21, 54 BTC_MCS_22, 55 BTC_MCS_23, 56 BTC_MCS_24, 57 BTC_MCS_25, 58 BTC_MCS_26, 59 BTC_MCS_27, 60 BTC_MCS_28, 61 BTC_MCS_29, 62 BTC_MCS_30, 63 BTC_MCS_31, 64 BTC_VHT_1SS_MCS_0, 65 BTC_VHT_1SS_MCS_1, 66 BTC_VHT_1SS_MCS_2, 67 BTC_VHT_1SS_MCS_3, 68 BTC_VHT_1SS_MCS_4, 69 BTC_VHT_1SS_MCS_5, 70 BTC_VHT_1SS_MCS_6, 71 BTC_VHT_1SS_MCS_7, 72 BTC_VHT_1SS_MCS_8, 73 BTC_VHT_1SS_MCS_9, 74 BTC_VHT_2SS_MCS_0, 75 BTC_VHT_2SS_MCS_1, 76 BTC_VHT_2SS_MCS_2, 77 BTC_VHT_2SS_MCS_3, 78 BTC_VHT_2SS_MCS_4, 79 BTC_VHT_2SS_MCS_5, 80 BTC_VHT_2SS_MCS_6, 81 BTC_VHT_2SS_MCS_7, 82 BTC_VHT_2SS_MCS_8, 83 BTC_VHT_2SS_MCS_9, 84 BTC_VHT_3SS_MCS_0, 85 BTC_VHT_3SS_MCS_1, 86 BTC_VHT_3SS_MCS_2, 87 BTC_VHT_3SS_MCS_3, 88 BTC_VHT_3SS_MCS_4, 89 BTC_VHT_3SS_MCS_5, 90 BTC_VHT_3SS_MCS_6, 91 BTC_VHT_3SS_MCS_7, 92 BTC_VHT_3SS_MCS_8, 93 BTC_VHT_3SS_MCS_9, 94 BTC_VHT_4SS_MCS_0, 95 BTC_VHT_4SS_MCS_1, 96 BTC_VHT_4SS_MCS_2, 97 BTC_VHT_4SS_MCS_3, 98 BTC_VHT_4SS_MCS_4, 99 BTC_VHT_4SS_MCS_5, 100 BTC_VHT_4SS_MCS_6, 101 BTC_VHT_4SS_MCS_7, 102 BTC_VHT_4SS_MCS_8, 103 BTC_VHT_4SS_MCS_9, 104 BTC_MCS_32, 105 BTC_UNKNOWN, 106 BTC_PKT_MGNT, 107 BTC_PKT_CTRL, 108 BTC_PKT_UNKNOWN, 109 BTC_PKT_NOT_FOR_ME, 110 BTC_RATE_MAX 111 }; 112 113 #define BTC_COEX_OFFLOAD 0 114 #define BTC_TMP_BUF_SHORT 20 115 116 extern u1Byte gl_btc_trace_buf[]; 117 #define BTC_SPRINTF rsprintf 118 #define BTC_TRACE(_MSG_)\ 119 do {\ 120 if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\ 121 RTW_INFO("%s", _MSG_);\ 122 } \ 123 } while (0) 124 #define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len) 125 126 127 #define NORMAL_EXEC FALSE 128 #define FORCE_EXEC TRUE 129 130 #define BTC_RF_OFF 0x0 131 #define BTC_RF_ON 0x1 132 133 #define BTC_RF_A 0x0 134 #define BTC_RF_B 0x1 135 #define BTC_RF_C 0x2 136 #define BTC_RF_D 0x3 137 138 #define BTC_SMSP SINGLEMAC_SINGLEPHY 139 #define BTC_DMDP DUALMAC_DUALPHY 140 #define BTC_DMSP DUALMAC_SINGLEPHY 141 #define BTC_MP_UNKNOWN 0xff 142 143 #define BT_COEX_ANT_TYPE_PG 0 144 #define BT_COEX_ANT_TYPE_ANTDIV 1 145 #define BT_COEX_ANT_TYPE_DETECTED 2 146 147 #define BTC_MIMO_PS_STATIC 0 /* 1ss */ 148 #define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */ 149 150 #define BTC_RATE_DISABLE 0 151 #define BTC_RATE_ENABLE 1 152 153 /* single Antenna definition */ 154 #define BTC_ANT_PATH_WIFI 0 155 #define BTC_ANT_PATH_BT 1 156 #define BTC_ANT_PATH_PTA 2 157 #define BTC_ANT_PATH_WIFI5G 3 158 #define BTC_ANT_PATH_AUTO 4 159 /* dual Antenna definition */ 160 #define BTC_ANT_WIFI_AT_MAIN 0 161 #define BTC_ANT_WIFI_AT_AUX 1 162 #define BTC_ANT_WIFI_AT_DIVERSITY 2 163 /* coupler Antenna definition */ 164 #define BTC_ANT_WIFI_AT_CPL_MAIN 0 165 #define BTC_ANT_WIFI_AT_CPL_AUX 1 166 167 typedef enum _BTC_POWERSAVE_TYPE { 168 BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */ 169 BTC_PS_LPS_ON = 1, 170 BTC_PS_LPS_OFF = 2, 171 BTC_PS_MAX 172 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; 173 174 typedef enum _BTC_BT_REG_TYPE { 175 BTC_BT_REG_RF = 0, 176 BTC_BT_REG_MODEM = 1, 177 BTC_BT_REG_BLUEWIZE = 2, 178 BTC_BT_REG_VENDOR = 3, 179 BTC_BT_REG_LE = 4, 180 BTC_BT_REG_MAX 181 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; 182 183 typedef enum _BTC_CHIP_INTERFACE { 184 BTC_INTF_UNKNOWN = 0, 185 BTC_INTF_PCI = 1, 186 BTC_INTF_USB = 2, 187 BTC_INTF_SDIO = 3, 188 BTC_INTF_MAX 189 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; 190 191 typedef enum _BTC_CHIP_TYPE { 192 BTC_CHIP_UNDEF = 0, 193 BTC_CHIP_CSR_BC4 = 1, 194 BTC_CHIP_CSR_BC8 = 2, 195 BTC_CHIP_RTL8723A = 3, 196 BTC_CHIP_RTL8821 = 4, 197 BTC_CHIP_RTL8723B = 5, 198 BTC_CHIP_MAX 199 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; 200 201 /* following is for wifi link status */ 202 #define WIFI_STA_CONNECTED BIT0 203 #define WIFI_AP_CONNECTED BIT1 204 #define WIFI_HS_CONNECTED BIT2 205 #define WIFI_P2P_GO_CONNECTED BIT3 206 #define WIFI_P2P_GC_CONNECTED BIT4 207 208 /* following is for command line utility */ 209 #define CL_SPRINTF rsprintf 210 #define CL_PRINTF DCMD_Printf 211 212 struct btc_board_info { 213 /* The following is some board information */ 214 u8 bt_chip_type; 215 u8 pg_ant_num; /* pg ant number */ 216 u8 btdm_ant_num; /* ant number for btdm */ 217 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ 218 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ 219 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ 220 boolean tfbga_package; /* for Antenna detect threshold */ 221 boolean btdm_ant_det_finish; 222 boolean btdm_ant_det_already_init_phydm; 223 u8 ant_type; 224 u8 rfe_type; 225 u8 ant_div_cfg; 226 boolean btdm_ant_det_complete_fail; 227 u8 ant_det_result; 228 boolean ant_det_result_five_complete; 229 u32 antdetval; 230 u8 customerID; 231 }; 232 233 typedef enum _BTC_DBG_OPCODE { 234 BTC_DBG_SET_COEX_NORMAL = 0x0, 235 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, 236 BTC_DBG_SET_COEX_BT_ONLY = 0x2, 237 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, 238 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, 239 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, 240 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, 241 BTC_DBG_MAX 242 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE; 243 244 typedef enum _BTC_RSSI_STATE { 245 BTC_RSSI_STATE_HIGH = 0x0, 246 BTC_RSSI_STATE_MEDIUM = 0x1, 247 BTC_RSSI_STATE_LOW = 0x2, 248 BTC_RSSI_STATE_STAY_HIGH = 0x3, 249 BTC_RSSI_STATE_STAY_MEDIUM = 0x4, 250 BTC_RSSI_STATE_STAY_LOW = 0x5, 251 BTC_RSSI_MAX 252 } BTC_RSSI_STATE, *PBTC_RSSI_STATE; 253 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE) 254 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE) 255 #define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE) 256 257 typedef enum _BTC_WIFI_ROLE { 258 BTC_ROLE_STATION = 0x0, 259 BTC_ROLE_AP = 0x1, 260 BTC_ROLE_IBSS = 0x2, 261 BTC_ROLE_HS_MODE = 0x3, 262 BTC_ROLE_MAX 263 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE; 264 265 typedef enum _BTC_WIRELESS_FREQ { 266 BTC_FREQ_2_4G = 0x0, 267 BTC_FREQ_5G = 0x1, 268 BTC_FREQ_MAX 269 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ; 270 271 typedef enum _BTC_WIFI_BW_MODE { 272 BTC_WIFI_BW_LEGACY = 0x0, 273 BTC_WIFI_BW_HT20 = 0x1, 274 BTC_WIFI_BW_HT40 = 0x2, 275 BTC_WIFI_BW_HT80 = 0x3, 276 BTC_WIFI_BW_HT160 = 0x4, 277 BTC_WIFI_BW_MAX 278 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE; 279 280 typedef enum _BTC_WIFI_TRAFFIC_DIR { 281 BTC_WIFI_TRAFFIC_TX = 0x0, 282 BTC_WIFI_TRAFFIC_RX = 0x1, 283 BTC_WIFI_TRAFFIC_MAX 284 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR; 285 286 typedef enum _BTC_WIFI_PNP { 287 BTC_WIFI_PNP_WAKE_UP = 0x0, 288 BTC_WIFI_PNP_SLEEP = 0x1, 289 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2, 290 BTC_WIFI_PNP_MAX 291 } BTC_WIFI_PNP, *PBTC_WIFI_PNP; 292 293 typedef enum _BTC_IOT_PEER { 294 BTC_IOT_PEER_UNKNOWN = 0, 295 BTC_IOT_PEER_REALTEK = 1, 296 BTC_IOT_PEER_REALTEK_92SE = 2, 297 BTC_IOT_PEER_BROADCOM = 3, 298 BTC_IOT_PEER_RALINK = 4, 299 BTC_IOT_PEER_ATHEROS = 5, 300 BTC_IOT_PEER_CISCO = 6, 301 BTC_IOT_PEER_MERU = 7, 302 BTC_IOT_PEER_MARVELL = 8, 303 BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ 304 BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ 305 BTC_IOT_PEER_AIRGO = 11, 306 BTC_IOT_PEER_INTEL = 12, 307 BTC_IOT_PEER_RTK_APCLIENT = 13, 308 BTC_IOT_PEER_REALTEK_81XX = 14, 309 BTC_IOT_PEER_REALTEK_WOW = 15, 310 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, 311 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, 312 BTC_IOT_PEER_MAX, 313 } BTC_IOT_PEER, *PBTC_IOT_PEER; 314 315 /* for 8723b-d cut large current issue */ 316 typedef enum _BTC_WIFI_COEX_STATE { 317 BTC_WIFI_STAT_INIT, 318 BTC_WIFI_STAT_IQK, 319 BTC_WIFI_STAT_NORMAL_OFF, 320 BTC_WIFI_STAT_MP_OFF, 321 BTC_WIFI_STAT_NORMAL, 322 BTC_WIFI_STAT_ANT_DIV, 323 BTC_WIFI_STAT_MAX 324 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE; 325 326 typedef enum _BTC_ANT_TYPE { 327 BTC_ANT_TYPE_0, 328 BTC_ANT_TYPE_1, 329 BTC_ANT_TYPE_2, 330 BTC_ANT_TYPE_3, 331 BTC_ANT_TYPE_4, 332 BTC_ANT_TYPE_MAX 333 } BTC_ANT_TYPE, *PBTC_ANT_TYPE; 334 335 typedef enum _BTC_VENDOR { 336 BTC_VENDOR_LENOVO, 337 BTC_VENDOR_ASUS, 338 BTC_VENDOR_OTHER 339 } BTC_VENDOR, *PBTC_VENDOR; 340 341 342 /* defined for BFP_BTC_GET */ 343 typedef enum _BTC_GET_TYPE { 344 /* type BOOLEAN */ 345 BTC_GET_BL_HS_OPERATION, 346 BTC_GET_BL_HS_CONNECTING, 347 BTC_GET_BL_WIFI_FW_READY, 348 BTC_GET_BL_WIFI_CONNECTED, 349 BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED, 350 BTC_GET_BL_WIFI_BUSY, 351 BTC_GET_BL_WIFI_SCAN, 352 BTC_GET_BL_WIFI_LINK, 353 BTC_GET_BL_WIFI_ROAM, 354 BTC_GET_BL_WIFI_4_WAY_PROGRESS, 355 BTC_GET_BL_WIFI_UNDER_5G, 356 BTC_GET_BL_WIFI_AP_MODE_ENABLE, 357 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, 358 BTC_GET_BL_WIFI_UNDER_B_MODE, 359 BTC_GET_BL_EXT_SWITCH, 360 BTC_GET_BL_WIFI_IS_IN_MP_MODE, 361 BTC_GET_BL_IS_ASUS_8723B, 362 BTC_GET_BL_RF4CE_CONNECTED, 363 364 /* type s4Byte */ 365 BTC_GET_S4_WIFI_RSSI, 366 BTC_GET_S4_HS_RSSI, 367 368 /* type u4Byte */ 369 BTC_GET_U4_WIFI_BW, 370 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 371 BTC_GET_U4_WIFI_FW_VER, 372 BTC_GET_U4_WIFI_LINK_STATUS, 373 BTC_GET_U4_BT_PATCH_VER, 374 BTC_GET_U4_VENDOR, 375 BTC_GET_U4_SUPPORTED_VERSION, 376 BTC_GET_U4_SUPPORTED_FEATURE, 377 BTC_GET_U4_WIFI_IQK_TOTAL, 378 BTC_GET_U4_WIFI_IQK_OK, 379 BTC_GET_U4_WIFI_IQK_FAIL, 380 381 /* type u1Byte */ 382 BTC_GET_U1_WIFI_DOT11_CHNL, 383 BTC_GET_U1_WIFI_CENTRAL_CHNL, 384 BTC_GET_U1_WIFI_HS_CHNL, 385 BTC_GET_U1_WIFI_P2P_CHNL, 386 BTC_GET_U1_MAC_PHY_MODE, 387 BTC_GET_U1_AP_NUM, 388 BTC_GET_U1_ANT_TYPE, 389 BTC_GET_U1_IOT_PEER, 390 391 /* type u2Byte */ 392 BTC_GET_U2_BEACON_PERIOD, 393 394 /*===== for 1Ant ======*/ 395 BTC_GET_U1_LPS_MODE, 396 397 BTC_GET_MAX 398 } BTC_GET_TYPE, *PBTC_GET_TYPE; 399 400 /* defined for BFP_BTC_SET */ 401 typedef enum _BTC_SET_TYPE { 402 /* type BOOLEAN */ 403 BTC_SET_BL_BT_DISABLE, 404 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, 405 BTC_SET_BL_BT_TRAFFIC_BUSY, 406 BTC_SET_BL_BT_LIMITED_DIG, 407 BTC_SET_BL_FORCE_TO_ROAM, 408 BTC_SET_BL_TO_REJ_AP_AGG_PKT, 409 BTC_SET_BL_BT_CTRL_AGG_SIZE, 410 BTC_SET_BL_INC_SCAN_DEV_NUM, 411 BTC_SET_BL_BT_TX_RX_MASK, 412 BTC_SET_BL_MIRACAST_PLUS_BT, 413 414 /* type u1Byte */ 415 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, 416 BTC_SET_U1_AGG_BUF_SIZE, 417 418 /* type trigger some action */ 419 BTC_SET_ACT_GET_BT_RSSI, 420 BTC_SET_ACT_AGGREGATE_CTRL, 421 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, 422 /*===== for 1Ant ======*/ 423 /* type BOOLEAN */ 424 425 /* type u1Byte */ 426 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, 427 BTC_SET_U1_LPS_VAL, 428 BTC_SET_U1_RPWM_VAL, 429 /* type trigger some action */ 430 BTC_SET_ACT_LEAVE_LPS, 431 BTC_SET_ACT_ENTER_LPS, 432 BTC_SET_ACT_NORMAL_LPS, 433 BTC_SET_ACT_PRE_NORMAL_LPS, 434 BTC_SET_ACT_POST_NORMAL_LPS, 435 BTC_SET_ACT_DISABLE_LOW_POWER, 436 BTC_SET_ACT_UPDATE_RAMASK, 437 BTC_SET_ACT_SEND_MIMO_PS, 438 /* BT Coex related */ 439 BTC_SET_ACT_CTRL_BT_INFO, 440 BTC_SET_ACT_CTRL_BT_COEX, 441 BTC_SET_ACT_CTRL_8723B_ANT, 442 /*=================*/ 443 BTC_SET_MAX 444 } BTC_SET_TYPE, *PBTC_SET_TYPE; 445 446 typedef enum _BTC_DBG_DISP_TYPE { 447 BTC_DBG_DISP_COEX_STATISTICS = 0x0, 448 BTC_DBG_DISP_BT_LINK_INFO = 0x1, 449 BTC_DBG_DISP_WIFI_STATUS = 0x2, 450 BTC_DBG_DISP_MAX 451 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE; 452 453 typedef enum _BTC_NOTIFY_TYPE_IPS { 454 BTC_IPS_LEAVE = 0x0, 455 BTC_IPS_ENTER = 0x1, 456 BTC_IPS_MAX 457 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS; 458 typedef enum _BTC_NOTIFY_TYPE_LPS { 459 BTC_LPS_DISABLE = 0x0, 460 BTC_LPS_ENABLE = 0x1, 461 BTC_LPS_MAX 462 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS; 463 typedef enum _BTC_NOTIFY_TYPE_SCAN { 464 BTC_SCAN_FINISH = 0x0, 465 BTC_SCAN_START = 0x1, 466 BTC_SCAN_START_2G = 0x2, 467 BTC_SCAN_MAX 468 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN; 469 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND { 470 BTC_NOT_SWITCH = 0x0, 471 BTC_SWITCH_TO_24G = 0x1, 472 BTC_SWITCH_TO_5G = 0x2, 473 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3, 474 BTC_SWITCH_MAX 475 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND; 476 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE { 477 BTC_ASSOCIATE_FINISH = 0x0, 478 BTC_ASSOCIATE_START = 0x1, 479 BTC_ASSOCIATE_5G_FINISH = 0x2, 480 BTC_ASSOCIATE_5G_START = 0x3, 481 BTC_ASSOCIATE_MAX 482 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE; 483 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS { 484 BTC_MEDIA_DISCONNECT = 0x0, 485 BTC_MEDIA_CONNECT = 0x1, 486 BTC_MEDIA_MAX 487 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS; 488 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET { 489 BTC_PACKET_UNKNOWN = 0x0, 490 BTC_PACKET_DHCP = 0x1, 491 BTC_PACKET_ARP = 0x2, 492 BTC_PACKET_EAPOL = 0x3, 493 BTC_PACKET_MAX 494 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; 495 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION { 496 BTC_STACK_OP_NONE = 0x0, 497 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, 498 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, 499 BTC_STACK_OP_MAX 500 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION; 501 502 /* Bryant Add */ 503 typedef enum _BTC_ANTENNA_POS { 504 BTC_ANTENNA_AT_MAIN_PORT = 0x1, 505 BTC_ANTENNA_AT_AUX_PORT = 0x2, 506 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS; 507 508 /* Bryant Add */ 509 typedef enum _BTC_BT_OFFON { 510 BTC_BT_OFF = 0x0, 511 BTC_BT_ON = 0x1, 512 } BTC_BTOFFON, *PBTC_BT_OFFON; 513 514 /*================================================== 515 For following block is for coex offload 516 ==================================================*/ 517 typedef struct _COL_H2C { 518 u1Byte opcode; 519 u1Byte opcode_ver:4; 520 u1Byte req_num:4; 521 u1Byte buf[1]; 522 } COL_H2C, *PCOL_H2C; 523 524 #define COL_C2H_ACK_HDR_LEN 3 525 typedef struct _COL_C2H_ACK { 526 u1Byte status; 527 u1Byte opcode_ver:4; 528 u1Byte req_num:4; 529 u1Byte ret_len; 530 u1Byte buf[1]; 531 } COL_C2H_ACK, *PCOL_C2H_ACK; 532 533 #define COL_C2H_IND_HDR_LEN 3 534 typedef struct _COL_C2H_IND { 535 u1Byte type; 536 u1Byte version; 537 u1Byte length; 538 u1Byte data[1]; 539 } COL_C2H_IND, *PCOL_C2H_IND; 540 541 /*============================================ 542 NOTE: for debug message, the following define should match 543 the strings in coexH2cResultString. 544 ============================================*/ 545 typedef enum _COL_H2C_STATUS { 546 /* c2h status */ 547 COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */ 548 COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */ 549 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */ 550 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */ 551 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */ 552 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */ 553 /* other COL status start from here */ 554 COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */ 555 COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */ 556 COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */ 557 COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */ 558 COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */ 559 COL_STATUS_MAX 560 } COL_H2C_STATUS, *PCOL_H2C_STATUS; 561 562 #define COL_MAX_H2C_REQ_NUM 16 563 564 #define COL_H2C_BUF_LEN 20 565 typedef enum _COL_OPCODE { 566 COL_OP_WIFI_STATUS_NOTIFY = 0x0, 567 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, 568 COL_OP_WIFI_INFO_NOTIFY = 0x2, 569 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, 570 COL_OP_SET_CONTROL = 0x4, 571 COL_OP_GET_CONTROL = 0x5, 572 COL_OP_WIFI_OPCODE_MAX 573 } COL_OPCODE, *PCOL_OPCODE; 574 575 typedef enum _COL_IND_TYPE { 576 COL_IND_BT_INFO = 0x0, 577 COL_IND_PSTDMA = 0x1, 578 COL_IND_LIMITED_TX_RX = 0x2, 579 COL_IND_COEX_TABLE = 0x3, 580 COL_IND_REQ = 0x4, 581 COL_IND_MAX 582 } COL_IND_TYPE, *PCOL_IND_TYPE; 583 584 typedef struct _COL_SINGLE_H2C_RECORD { 585 u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ 586 u4Byte h2c_len; 587 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ 588 u4Byte c2h_ack_len; 589 u4Byte count; /* the total number of the sent h2c command */ 590 u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ 591 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; 592 593 typedef struct _COL_SINGLE_C2H_IND_RECORD { 594 u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ 595 u4Byte ind_len; 596 u4Byte count; /* the total number of the rcvd c2h indication */ 597 u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ 598 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; 599 600 typedef struct _BTC_OFFLOAD { 601 /* H2C command related */ 602 u1Byte h2c_req_num; 603 u4Byte cnt_h2c_sent; 604 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; 605 606 /* C2H Ack related */ 607 u4Byte cnt_c2h_ack; 608 u4Byte status[COL_STATUS_MAX]; 609 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ 610 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; 611 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; 612 613 /* C2H Indication related */ 614 u4Byte cnt_c2h_ind; 615 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; 616 u4Byte c2h_ind_status[COL_STATUS_MAX]; 617 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; 618 u1Byte c2h_ind_len; 619 } BTC_OFFLOAD, *PBTC_OFFLOAD; 620 extern BTC_OFFLOAD gl_coex_offload; 621 /*==================================================*/ 622 623 typedef u1Byte 624 (*BFP_BTC_R1)( 625 IN PVOID pBtcContext, 626 IN u4Byte RegAddr 627 ); 628 typedef u2Byte 629 (*BFP_BTC_R2)( 630 IN PVOID pBtcContext, 631 IN u4Byte RegAddr 632 ); 633 typedef u4Byte 634 (*BFP_BTC_R4)( 635 IN PVOID pBtcContext, 636 IN u4Byte RegAddr 637 ); 638 typedef VOID 639 (*BFP_BTC_W1)( 640 IN PVOID pBtcContext, 641 IN u4Byte RegAddr, 642 IN u1Byte Data 643 ); 644 typedef VOID 645 (*BFP_BTC_W1_BIT_MASK)( 646 IN PVOID pBtcContext, 647 IN u4Byte regAddr, 648 IN u1Byte bitMask, 649 IN u1Byte data1b 650 ); 651 typedef VOID 652 (*BFP_BTC_W2)( 653 IN PVOID pBtcContext, 654 IN u4Byte RegAddr, 655 IN u2Byte Data 656 ); 657 typedef VOID 658 (*BFP_BTC_W4)( 659 IN PVOID pBtcContext, 660 IN u4Byte RegAddr, 661 IN u4Byte Data 662 ); 663 typedef VOID 664 (*BFP_BTC_LOCAL_REG_W1)( 665 IN PVOID pBtcContext, 666 IN u4Byte RegAddr, 667 IN u1Byte Data 668 ); 669 typedef VOID 670 (*BFP_BTC_SET_BB_REG)( 671 IN PVOID pBtcContext, 672 IN u4Byte RegAddr, 673 IN u4Byte BitMask, 674 IN u4Byte Data 675 ); 676 typedef u4Byte 677 (*BFP_BTC_GET_BB_REG)( 678 IN PVOID pBtcContext, 679 IN u4Byte RegAddr, 680 IN u4Byte BitMask 681 ); 682 typedef VOID 683 (*BFP_BTC_SET_RF_REG)( 684 IN PVOID pBtcContext, 685 IN enum rf_path eRFPath, 686 IN u4Byte RegAddr, 687 IN u4Byte BitMask, 688 IN u4Byte Data 689 ); 690 typedef u4Byte 691 (*BFP_BTC_GET_RF_REG)( 692 IN PVOID pBtcContext, 693 IN enum rf_path eRFPath, 694 IN u4Byte RegAddr, 695 IN u4Byte BitMask 696 ); 697 typedef VOID 698 (*BFP_BTC_FILL_H2C)( 699 IN PVOID pBtcContext, 700 IN u1Byte elementId, 701 IN u4Byte cmdLen, 702 IN pu1Byte pCmdBuffer 703 ); 704 705 typedef BOOLEAN 706 (*BFP_BTC_GET)( 707 IN PVOID pBtCoexist, 708 IN u1Byte getType, 709 OUT PVOID pOutBuf 710 ); 711 712 typedef BOOLEAN 713 (*BFP_BTC_SET)( 714 IN PVOID pBtCoexist, 715 IN u1Byte setType, 716 OUT PVOID pInBuf 717 ); 718 typedef u2Byte 719 (*BFP_BTC_SET_BT_REG)( 720 IN PVOID pBtcContext, 721 IN u1Byte regType, 722 IN u4Byte offset, 723 IN u4Byte value 724 ); 725 typedef BOOLEAN 726 (*BFP_BTC_SET_BT_ANT_DETECTION)( 727 IN PVOID pBtcContext, 728 IN u1Byte txTime, 729 IN u1Byte btChnl 730 ); 731 732 typedef BOOLEAN 733 (*BFP_BTC_SET_BT_TRX_MASK)( 734 IN PVOID pBtcContext, 735 IN u1Byte bt_trx_mask 736 ); 737 738 typedef u4Byte 739 (*BFP_BTC_GET_BT_REG)( 740 IN PVOID pBtcContext, 741 IN u1Byte regType, 742 IN u4Byte offset 743 ); 744 typedef VOID 745 (*BFP_BTC_DISP_DBG_MSG)( 746 IN PVOID pBtCoexist, 747 IN u1Byte dispType 748 ); 749 750 typedef COL_H2C_STATUS 751 (*BFP_BTC_COEX_H2C_PROCESS)( 752 IN PVOID pBtCoexist, 753 IN u1Byte opcode, 754 IN u1Byte opcode_ver, 755 IN pu1Byte ph2c_par, 756 IN u1Byte h2c_par_len 757 ); 758 759 typedef u4Byte 760 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( 761 IN PVOID pBtcContext 762 ); 763 764 typedef u4Byte 765 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( 766 IN PVOID pBtcContext 767 ); 768 769 typedef u4Byte 770 (*BFP_BTC_GET_PHYDM_VERSION)( 771 IN PVOID pBtcContext 772 ); 773 774 typedef VOID 775 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( 776 IN PVOID pDM_Odm, 777 IN u1Byte RA_offset_direction, 778 IN u1Byte RA_threshold_offset 779 ); 780 781 typedef u4Byte 782 (*BTC_PHYDM_CMNINFOQUERY)( 783 IN PVOID pDM_Odm, 784 IN u1Byte info_type 785 ); 786 787 typedef u1Byte 788 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( 789 790 IN PVOID pBtcContext 791 ); 792 793 typedef u1Byte 794 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( 795 IN PVOID pBtcContext 796 ); 797 798 typedef u4Byte 799 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( 800 IN PVOID pBtcContext, 801 IN u1Byte scanType 802 ); 803 804 typedef BOOLEAN 805 (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)( 806 IN PVOID pBtcContext, 807 IN u1Byte mapType, 808 OUT pu1Byte afhMap 809 ); 810 811 struct btc_bt_info { 812 boolean bt_disabled; 813 boolean bt_enable_disable_change; 814 u8 rssi_adjust_for_agc_table_on; 815 u8 rssi_adjust_for_1ant_coex_type; 816 boolean pre_bt_ctrl_agg_buf_size; 817 boolean bt_ctrl_agg_buf_size; 818 boolean pre_reject_agg_pkt; 819 boolean reject_agg_pkt; 820 boolean increase_scan_dev_num; 821 boolean bt_tx_rx_mask; 822 u8 pre_agg_buf_size; 823 u8 agg_buf_size; 824 boolean bt_busy; 825 boolean limited_dig; 826 u16 bt_hci_ver; 827 u16 bt_real_fw_ver; 828 u8 bt_fw_ver; 829 u32 get_bt_fw_ver_cnt; 830 u32 bt_get_fw_ver; 831 boolean miracast_plus_bt; 832 833 boolean bt_disable_low_pwr; 834 835 boolean bt_ctrl_lps; 836 boolean bt_lps_on; 837 boolean force_to_roam; /* for 1Ant solution */ 838 u8 lps_val; 839 u8 rpwm_val; 840 u32 ra_mask; 841 }; 842 843 struct btc_stack_info { 844 boolean profile_notified; 845 u16 hci_version; /* stack hci version */ 846 u8 num_of_link; 847 boolean bt_link_exist; 848 boolean sco_exist; 849 boolean acl_exist; 850 boolean a2dp_exist; 851 boolean hid_exist; 852 u8 num_of_hid; 853 boolean pan_exist; 854 boolean unknown_acl_exist; 855 s8 min_bt_rssi; 856 }; 857 858 struct btc_bt_link_info { 859 boolean bt_link_exist; 860 boolean bt_hi_pri_link_exist; 861 boolean sco_exist; 862 boolean sco_only; 863 boolean a2dp_exist; 864 boolean a2dp_only; 865 boolean hid_exist; 866 boolean hid_only; 867 boolean pan_exist; 868 boolean pan_only; 869 boolean slave_role; 870 boolean acl_busy; 871 }; 872 873 #ifdef CONFIG_RF4CE_COEXIST 874 struct btc_rf4ce_info { 875 u8 link_state; 876 }; 877 #endif 878 879 struct btc_statistics { 880 u32 cnt_bind; 881 u32 cnt_power_on; 882 u32 cnt_pre_load_firmware; 883 u32 cnt_init_hw_config; 884 u32 cnt_init_coex_dm; 885 u32 cnt_ips_notify; 886 u32 cnt_lps_notify; 887 u32 cnt_scan_notify; 888 u32 cnt_connect_notify; 889 u32 cnt_media_status_notify; 890 u32 cnt_specific_packet_notify; 891 u32 cnt_bt_info_notify; 892 u32 cnt_rf_status_notify; 893 u32 cnt_periodical; 894 u32 cnt_coex_dm_switch; 895 u32 cnt_stack_operation_notify; 896 u32 cnt_dbg_ctrl; 897 u32 cnt_rate_id_notify; 898 }; 899 900 struct btc_coexist { 901 BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/ 902 PVOID Adapter; /*default adapter*/ 903 struct btc_board_info board_info; 904 struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/ 905 struct btc_stack_info stack_info; 906 struct btc_bt_link_info bt_link_info; 907 908 #ifdef CONFIG_RF4CE_COEXIST 909 struct btc_rf4ce_info rf4ce_info; 910 #endif 911 BTC_CHIP_INTERFACE chip_interface; 912 PVOID odm_priv; 913 914 BOOLEAN initilized; 915 BOOLEAN stop_coex_dm; 916 BOOLEAN manual_control; 917 BOOLEAN bdontenterLPS; 918 pu1Byte cli_buf; 919 struct btc_statistics statistics; 920 u1Byte pwrModeVal[10]; 921 922 /* function pointers */ 923 /* io related */ 924 BFP_BTC_R1 btc_read_1byte; 925 BFP_BTC_W1 btc_write_1byte; 926 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; 927 BFP_BTC_R2 btc_read_2byte; 928 BFP_BTC_W2 btc_write_2byte; 929 BFP_BTC_R4 btc_read_4byte; 930 BFP_BTC_W4 btc_write_4byte; 931 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; 932 /* read/write bb related */ 933 BFP_BTC_SET_BB_REG btc_set_bb_reg; 934 BFP_BTC_GET_BB_REG btc_get_bb_reg; 935 936 /* read/write rf related */ 937 BFP_BTC_SET_RF_REG btc_set_rf_reg; 938 BFP_BTC_GET_RF_REG btc_get_rf_reg; 939 940 /* fill h2c related */ 941 BFP_BTC_FILL_H2C btc_fill_h2c; 942 /* other */ 943 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; 944 /* normal get/set related */ 945 BFP_BTC_GET btc_get; 946 BFP_BTC_SET btc_set; 947 948 BFP_BTC_GET_BT_REG btc_get_bt_reg; 949 BFP_BTC_SET_BT_REG btc_set_bt_reg; 950 951 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; 952 953 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; 954 BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask; 955 BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature; 956 BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version; 957 BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version; 958 BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold; 959 BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter; 960 BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt; 961 BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt; 962 BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt; 963 BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt; 964 }; 965 typedef struct btc_coexist *PBTC_COEXIST; 966 967 extern struct btc_coexist GLBtCoexist; 968 969 BOOLEAN 970 EXhalbtcoutsrc_InitlizeVariables( 971 IN PVOID Adapter 972 ); 973 VOID 974 EXhalbtcoutsrc_PowerOnSetting( 975 IN PBTC_COEXIST pBtCoexist 976 ); 977 VOID 978 EXhalbtcoutsrc_PreLoadFirmware( 979 IN PBTC_COEXIST pBtCoexist 980 ); 981 VOID 982 EXhalbtcoutsrc_InitHwConfig( 983 IN PBTC_COEXIST pBtCoexist, 984 IN BOOLEAN bWifiOnly 985 ); 986 VOID 987 EXhalbtcoutsrc_InitCoexDm( 988 IN PBTC_COEXIST pBtCoexist 989 ); 990 VOID 991 EXhalbtcoutsrc_IpsNotify( 992 IN PBTC_COEXIST pBtCoexist, 993 IN u1Byte type 994 ); 995 VOID 996 EXhalbtcoutsrc_LpsNotify( 997 IN PBTC_COEXIST pBtCoexist, 998 IN u1Byte type 999 ); 1000 VOID 1001 EXhalbtcoutsrc_ScanNotify( 1002 IN PBTC_COEXIST pBtCoexist, 1003 IN u1Byte type 1004 ); 1005 VOID 1006 EXhalbtcoutsrc_SetAntennaPathNotify( 1007 IN PBTC_COEXIST pBtCoexist, 1008 IN u1Byte type 1009 ); 1010 VOID 1011 EXhalbtcoutsrc_ConnectNotify( 1012 IN PBTC_COEXIST pBtCoexist, 1013 IN u1Byte action 1014 ); 1015 VOID 1016 EXhalbtcoutsrc_MediaStatusNotify( 1017 IN PBTC_COEXIST pBtCoexist, 1018 IN RT_MEDIA_STATUS mediaStatus 1019 ); 1020 VOID 1021 EXhalbtcoutsrc_SpecificPacketNotify( 1022 IN PBTC_COEXIST pBtCoexist, 1023 IN u1Byte pktType 1024 ); 1025 VOID 1026 EXhalbtcoutsrc_BtInfoNotify( 1027 IN PBTC_COEXIST pBtCoexist, 1028 IN pu1Byte tmpBuf, 1029 IN u1Byte length 1030 ); 1031 VOID 1032 EXhalbtcoutsrc_RfStatusNotify( 1033 IN PBTC_COEXIST pBtCoexist, 1034 IN u1Byte type 1035 ); 1036 VOID 1037 EXhalbtcoutsrc_WlFwDbgInfoNotify( 1038 IN PBTC_COEXIST pBtCoexist, 1039 IN pu1Byte tmpBuf, 1040 IN u1Byte length 1041 ); 1042 VOID 1043 EXhalbtcoutsrc_rx_rate_change_notify( 1044 IN PBTC_COEXIST pBtCoexist, 1045 IN BOOLEAN is_data_frame, 1046 IN u1Byte btc_rate_id 1047 ); 1048 VOID 1049 EXhalbtcoutsrc_StackOperationNotify( 1050 IN PBTC_COEXIST pBtCoexist, 1051 IN u1Byte type 1052 ); 1053 VOID 1054 EXhalbtcoutsrc_HaltNotify( 1055 IN PBTC_COEXIST pBtCoexist 1056 ); 1057 VOID 1058 EXhalbtcoutsrc_PnpNotify( 1059 IN PBTC_COEXIST pBtCoexist, 1060 IN u1Byte pnpState 1061 ); 1062 VOID 1063 EXhalbtcoutsrc_CoexDmSwitch( 1064 IN PBTC_COEXIST pBtCoexist 1065 ); 1066 VOID 1067 EXhalbtcoutsrc_Periodical( 1068 IN PBTC_COEXIST pBtCoexist 1069 ); 1070 VOID 1071 EXhalbtcoutsrc_DbgControl( 1072 IN PBTC_COEXIST pBtCoexist, 1073 IN u1Byte opCode, 1074 IN u1Byte opLen, 1075 IN pu1Byte pData 1076 ); 1077 VOID 1078 EXhalbtcoutsrc_AntennaDetection( 1079 IN PBTC_COEXIST pBtCoexist, 1080 IN u4Byte centFreq, 1081 IN u4Byte offset, 1082 IN u4Byte span, 1083 IN u4Byte seconds 1084 ); 1085 VOID 1086 EXhalbtcoutsrc_StackUpdateProfileInfo( 1087 VOID 1088 ); 1089 VOID 1090 EXhalbtcoutsrc_SetHciVersion( 1091 IN u2Byte hciVersion 1092 ); 1093 VOID 1094 EXhalbtcoutsrc_SetBtPatchVersion( 1095 IN u2Byte btHciVersion, 1096 IN u2Byte btPatchVersion 1097 ); 1098 VOID 1099 EXhalbtcoutsrc_UpdateMinBtRssi( 1100 IN s1Byte btRssi 1101 ); 1102 #if 0 1103 VOID 1104 EXhalbtcoutsrc_SetBtExist( 1105 IN BOOLEAN bBtExist 1106 ); 1107 #endif 1108 VOID 1109 EXhalbtcoutsrc_SetChipType( 1110 IN u1Byte chipType 1111 ); 1112 VOID 1113 EXhalbtcoutsrc_SetAntNum( 1114 IN u1Byte type, 1115 IN u1Byte antNum 1116 ); 1117 VOID 1118 EXhalbtcoutsrc_SetSingleAntPath( 1119 IN u1Byte singleAntPath 1120 ); 1121 VOID 1122 EXhalbtcoutsrc_DisplayBtCoexInfo( 1123 IN PBTC_COEXIST pBtCoexist 1124 ); 1125 VOID 1126 EXhalbtcoutsrc_DisplayAntDetection( 1127 IN PBTC_COEXIST pBtCoexist 1128 ); 1129 1130 #define MASKBYTE0 0xff 1131 #define MASKBYTE1 0xff00 1132 #define MASKBYTE2 0xff0000 1133 #define MASKBYTE3 0xff000000 1134 #define MASKHWORD 0xffff0000 1135 #define MASKLWORD 0x0000ffff 1136 #define MASKDWORD 0xffffffff 1137 #define MASK12BITS 0xfff 1138 #define MASKH4BITS 0xf0000000 1139 #define MASKOFDM_D 0xffc00000 1140 #define MASKCCK 0x3f3f3f3f 1141 1142 #endif 1143