1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 *
4 * Copyright(c) 2016 - 2017 Realtek Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 *****************************************************************************/
16
17 /* ************************************************************
18 * Description:
19 *
20 * This file is for RTL8723B Co-exist mechanism
21 *
22 * History
23 * 2012/11/15 Cosa first check in.
24 *
25 * ************************************************************ */
26
27 /* ************************************************************
28 * include files
29 * ************************************************************ */
30 #include "mp_precomp.h"
31
32 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
33
34 #if (RTL8723B_SUPPORT == 1)
35 /* ************************************************************
36 * Global variables, these are static variables
37 * ************************************************************ */
38 static u8 *trace_buf = &gl_btc_trace_buf[0];
39 static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant;
40 static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant;
41 static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant;
42 static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant;
43
44 const char *const glbt_info_src_8723b_2ant[] = {
45 "BT Info[wifi fw]",
46 "BT Info[bt rsp]",
47 "BT Info[bt auto report]",
48 };
49
50 u32 glcoex_ver_date_8723b_2ant = 20180201;
51 u32 glcoex_ver_8723b_2ant = 0x52;
52 u32 glcoex_ver_btdesired_8723b_2ant = 0x50;
53
54 /* ************************************************************
55 * local function proto type if needed
56 * ************************************************************
57 * ************************************************************
58 * local function start with halbtc8723b2ant_
59 * ************************************************************ */
60 static
halbtc8723b2ant_bt_rssi_state(u8 * ppre_bt_rssi_state,u8 level_num,u8 rssi_thresh,u8 rssi_thresh1)61 u8 halbtc8723b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
62 u8 rssi_thresh, u8 rssi_thresh1)
63 {
64 s32 bt_rssi = 0;
65 u8 bt_rssi_state = *ppre_bt_rssi_state;
66
67 bt_rssi = coex_sta->bt_rssi;
68
69 if (level_num == 2) {
70 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
71 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
72 if (bt_rssi >= (rssi_thresh +
73 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
74 bt_rssi_state = BTC_RSSI_STATE_HIGH;
75 else
76 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
77 } else {
78 if (bt_rssi < rssi_thresh)
79 bt_rssi_state = BTC_RSSI_STATE_LOW;
80 else
81 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
82 }
83 } else if (level_num == 3) {
84 if (rssi_thresh > rssi_thresh1) {
85 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
86 "[BTCoex], BT Rssi thresh error!!\n");
87 BTC_TRACE(trace_buf);
88 return *ppre_bt_rssi_state;
89 }
90
91 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
92 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
93 if (bt_rssi >= (rssi_thresh +
94 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
95 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
96 else
97 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
98 } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
99 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
100 if (bt_rssi >= (rssi_thresh1 +
101 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
102 bt_rssi_state = BTC_RSSI_STATE_HIGH;
103 else if (bt_rssi < rssi_thresh)
104 bt_rssi_state = BTC_RSSI_STATE_LOW;
105 else
106 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
107 } else {
108 if (bt_rssi < rssi_thresh1)
109 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
110 else
111 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
112 }
113 }
114
115 *ppre_bt_rssi_state = bt_rssi_state;
116
117 return bt_rssi_state;
118 }
119
120 static
halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist * btcoexist,IN u8 * pprewifi_rssi_state,IN u8 level_num,IN u8 rssi_thresh,IN u8 rssi_thresh1)121 u8 halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
122 IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
123 IN u8 rssi_thresh1)
124 {
125 s32 wifi_rssi = 0;
126 u8 wifi_rssi_state = *pprewifi_rssi_state;
127
128 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
129
130 if (level_num == 2) {
131 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
132 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
133 if (wifi_rssi >= (rssi_thresh +
134 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
135 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
136 else
137 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
138 } else {
139 if (wifi_rssi < rssi_thresh)
140 wifi_rssi_state = BTC_RSSI_STATE_LOW;
141 else
142 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
143 }
144 } else if (level_num == 3) {
145 if (rssi_thresh > rssi_thresh1) {
146 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
147 "[BTCoex], wifi RSSI thresh error!!\n");
148 BTC_TRACE(trace_buf);
149 return *pprewifi_rssi_state;
150 }
151
152 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
153 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
154 if (wifi_rssi >= (rssi_thresh +
155 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
156 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
157 else
158 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
159 } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
160 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
161 if (wifi_rssi >= (rssi_thresh1 +
162 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
163 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
164 else if (wifi_rssi < rssi_thresh)
165 wifi_rssi_state = BTC_RSSI_STATE_LOW;
166 else
167 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
168 } else {
169 if (wifi_rssi < rssi_thresh1)
170 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
171 else
172 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
173 }
174 }
175
176 *pprewifi_rssi_state = wifi_rssi_state;
177
178 return wifi_rssi_state;
179 }
180
181 static
halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist * btcoexist)182 void halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
183 {
184 static u32 bt_disable_cnt = 0;
185 boolean bt_active = true, bt_disabled = false;
186
187 /* This function check if bt is disabled */
188
189 if (coex_sta->high_priority_tx == 0 &&
190 coex_sta->high_priority_rx == 0 &&
191 coex_sta->low_priority_tx == 0 &&
192 coex_sta->low_priority_rx == 0)
193 bt_active = false;
194 if (coex_sta->high_priority_tx == 0xffff &&
195 coex_sta->high_priority_rx == 0xffff &&
196 coex_sta->low_priority_tx == 0xffff &&
197 coex_sta->low_priority_rx == 0xffff)
198 bt_active = false;
199 if (bt_active) {
200 bt_disable_cnt = 0;
201 bt_disabled = false;
202 } else {
203 bt_disable_cnt++;
204 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
205 "[BTCoex], bt all counters=0, %d times!!\n",
206 bt_disable_cnt);
207 BTC_TRACE(trace_buf);
208 if (bt_disable_cnt >= 10)
209 bt_disabled = true;
210 }
211 if (coex_sta->bt_disabled != bt_disabled) {
212 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
213 "[BTCoex], BT is from %s to %s!!\n",
214 (coex_sta->bt_disabled ? "disabled" : "enabled"),
215 (bt_disabled ? "disabled" : "enabled"));
216 BTC_TRACE(trace_buf);
217
218 coex_sta->bt_disabled = bt_disabled;
219 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
220 &bt_disabled);
221 if (bt_disabled) {
222 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
223 NULL);
224 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
225 NULL);
226 }
227 }
228 }
229
230 static
halbtc8723b2ant_limited_rx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rej_ap_agg_pkt,IN boolean bt_ctrl_agg_buf_size,IN u8 agg_buf_size)231 void halbtc8723b2ant_limited_rx(IN struct btc_coexist *btcoexist,
232 IN boolean force_exec, IN boolean rej_ap_agg_pkt,
233 IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
234 {
235 boolean reject_rx_agg = rej_ap_agg_pkt;
236 boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
237 u8 rx_agg_size = agg_buf_size;
238
239 /* ============================================ */
240 /* Rx Aggregation related setting */
241 /* ============================================ */
242 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
243 &reject_rx_agg);
244 /* decide BT control aggregation buf size or not */
245 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
246 &bt_ctrl_rx_agg_size);
247 /* aggregation buf size, only work when BT control Rx aggregation size. */
248 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
249 /* real update aggregation setting */
250 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
251 }
252
253 static
halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist * btcoexist)254 void halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
255 {
256 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
257 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
258
259 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
260
261 reg_hp_txrx = 0x770;
262 reg_lp_txrx = 0x774;
263
264 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
265 reg_hp_tx = u32tmp & MASKLWORD;
266 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
267
268 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
269 reg_lp_tx = u32tmp & MASKLWORD;
270 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
271
272 coex_sta->high_priority_tx = reg_hp_tx;
273 coex_sta->high_priority_rx = reg_hp_rx;
274 coex_sta->low_priority_tx = reg_lp_tx;
275 coex_sta->low_priority_rx = reg_lp_rx;
276
277 if ((coex_sta->low_priority_tx > 1050) &&
278 (!coex_sta->c2h_bt_inquiry_page))
279 coex_sta->pop_event_cnt++;
280
281 if ((coex_sta->low_priority_rx >= 950) &&
282 (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) &&
283 (!coex_sta->under_ips))
284 bt_link_info->slave_role = true;
285 else
286 bt_link_info->slave_role = false;
287
288 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
289 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
290 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
291 BTC_TRACE(trace_buf);
292 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
293 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
294 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
295 BTC_TRACE(trace_buf);
296
297 /* reset counter */
298 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
299 }
300
301 static
halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist * btcoexist)302 void halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
303 {
304 #if 1
305
306 coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
307 btcoexist,
308 PHYDM_INFO_CRC32_OK_CCK);
309 coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
310 btcoexist,
311 PHYDM_INFO_CRC32_OK_LEGACY);
312 coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
313 btcoexist,
314 PHYDM_INFO_CRC32_OK_HT);
315 coex_sta->crc_ok_11n_vht =
316 btcoexist->btc_phydm_query_PHY_counter(
317 btcoexist,
318 PHYDM_INFO_CRC32_OK_VHT);
319
320 coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
321 btcoexist,
322 PHYDM_INFO_CRC32_ERROR_CCK);
323 coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter(
324 btcoexist,
325 PHYDM_INFO_CRC32_ERROR_LEGACY);
326 coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
327 btcoexist,
328 PHYDM_INFO_CRC32_ERROR_HT);
329 coex_sta->crc_err_11n_vht =
330 btcoexist->btc_phydm_query_PHY_counter(
331 btcoexist,
332 PHYDM_INFO_CRC32_ERROR_VHT);
333
334 #endif
335 }
336
337 static
halbtc8723b2ant_query_bt_info(IN struct btc_coexist * btcoexist)338 void halbtc8723b2ant_query_bt_info(IN struct btc_coexist *btcoexist)
339 {
340 u8 h2c_parameter[1] = {0};
341
342 coex_sta->c2h_bt_info_req_sent = true;
343
344 h2c_parameter[0] |= BIT(0); /* trigger */
345
346 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
347 }
348
349 static
halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist * btcoexist)350 boolean halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
351 {
352 static boolean pre_wifi_busy = false, pre_under_4way = false,
353 pre_bt_hs_on = false;
354 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
355 boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
356 boolean wifi_connected = false;
357 u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
358
359
360 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
361 &wifi_connected);
362 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
363 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
364 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
365 &under_4way);
366
367 if (wifi_connected) {
368 if (wifi_busy != pre_wifi_busy) {
369 pre_wifi_busy = wifi_busy;
370 return true;
371 }
372 if (under_4way != pre_under_4way) {
373 pre_under_4way = under_4way;
374 return true;
375 }
376 if (bt_hs_on != pre_bt_hs_on) {
377 pre_bt_hs_on = bt_hs_on;
378 return true;
379 }
380
381
382 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
383 &prewifi_rssi_state, 2,
384 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
385 coex_dm->switch_thres_offset, 0);
386
387 if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
388 (BTC_RSSI_STATE_LOW == wifi_rssi_state))
389 return true;
390
391 }
392
393 return false;
394 }
395
396 static
halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist * btcoexist)397 void halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
398 {
399 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
400 boolean bt_hs_on = false;
401
402 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
403
404 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
405 bt_link_info->sco_exist = coex_sta->sco_exist;
406 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
407 bt_link_info->pan_exist = coex_sta->pan_exist;
408 bt_link_info->hid_exist = coex_sta->hid_exist;
409
410 /* work around for HS mode. */
411 if (bt_hs_on) {
412 bt_link_info->pan_exist = true;
413 bt_link_info->bt_link_exist = true;
414 }
415
416 /* check if Sco only */
417 if (bt_link_info->sco_exist &&
418 !bt_link_info->a2dp_exist &&
419 !bt_link_info->pan_exist &&
420 !bt_link_info->hid_exist)
421 bt_link_info->sco_only = true;
422 else
423 bt_link_info->sco_only = false;
424
425 /* check if A2dp only */
426 if (!bt_link_info->sco_exist &&
427 bt_link_info->a2dp_exist &&
428 !bt_link_info->pan_exist &&
429 !bt_link_info->hid_exist)
430 bt_link_info->a2dp_only = true;
431 else
432 bt_link_info->a2dp_only = false;
433
434 /* check if Pan only */
435 if (!bt_link_info->sco_exist &&
436 !bt_link_info->a2dp_exist &&
437 bt_link_info->pan_exist &&
438 !bt_link_info->hid_exist)
439 bt_link_info->pan_only = true;
440 else
441 bt_link_info->pan_only = false;
442
443 /* check if Hid only */
444 if (!bt_link_info->sco_exist &&
445 !bt_link_info->a2dp_exist &&
446 !bt_link_info->pan_exist &&
447 bt_link_info->hid_exist)
448 bt_link_info->hid_only = true;
449 else
450 bt_link_info->hid_only = false;
451 }
452
453 static
halbtc8723b2ant_action_algorithm(IN struct btc_coexist * btcoexist)454 u8 halbtc8723b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
455 {
456 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
457 boolean bt_hs_on = false;
458 u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
459 u8 num_of_diff_profile = 0;
460
461 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
462
463 if (!bt_link_info->bt_link_exist) {
464 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
465 "[BTCoex], No BT link exists!!!\n");
466 BTC_TRACE(trace_buf);
467 return algorithm;
468 }
469
470 if (bt_link_info->sco_exist)
471 num_of_diff_profile++;
472 if (bt_link_info->hid_exist)
473 num_of_diff_profile++;
474 if (bt_link_info->pan_exist)
475 num_of_diff_profile++;
476 if (bt_link_info->a2dp_exist)
477 num_of_diff_profile++;
478
479 if (num_of_diff_profile == 1) {
480 if (bt_link_info->sco_exist) {
481 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
482 "[BTCoex], SCO only\n");
483 BTC_TRACE(trace_buf);
484 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
485 } else {
486 if (bt_link_info->hid_exist) {
487 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
488 "[BTCoex], HID only\n");
489 BTC_TRACE(trace_buf);
490 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
491 } else if (bt_link_info->a2dp_exist) {
492 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
493 "[BTCoex], A2DP only\n");
494 BTC_TRACE(trace_buf);
495 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
496 } else if (bt_link_info->pan_exist) {
497 if (bt_hs_on) {
498 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
499 "[BTCoex], PAN(HS) only\n");
500 BTC_TRACE(trace_buf);
501 algorithm =
502 BT_8723B_2ANT_COEX_ALGO_PANHS;
503 } else {
504 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
505 "[BTCoex], PAN(EDR) only\n");
506 BTC_TRACE(trace_buf);
507 algorithm =
508 BT_8723B_2ANT_COEX_ALGO_PANEDR;
509 }
510 }
511 }
512 } else if (num_of_diff_profile == 2) {
513 if (bt_link_info->sco_exist) {
514 if (bt_link_info->hid_exist) {
515 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
516 "[BTCoex], SCO + HID\n");
517 BTC_TRACE(trace_buf);
518 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
519 } else if (bt_link_info->a2dp_exist) {
520 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
521 "[BTCoex], SCO + A2DP ==> SCO\n");
522 BTC_TRACE(trace_buf);
523 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
524 } else if (bt_link_info->pan_exist) {
525 if (bt_hs_on) {
526 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
527 "[BTCoex], SCO + PAN(HS)\n");
528 BTC_TRACE(trace_buf);
529 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
530 } else {
531 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
532 "[BTCoex], SCO + PAN(EDR)\n");
533 BTC_TRACE(trace_buf);
534 algorithm =
535 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
536 }
537 }
538 } else {
539 if (bt_link_info->hid_exist &&
540 bt_link_info->a2dp_exist) {
541 {
542 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
543 "[BTCoex], HID + A2DP\n");
544 BTC_TRACE(trace_buf);
545 algorithm =
546 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
547 }
548 } else if (bt_link_info->hid_exist &&
549 bt_link_info->pan_exist) {
550 if (bt_hs_on) {
551 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
552 "[BTCoex], HID + PAN(HS)\n");
553 BTC_TRACE(trace_buf);
554 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
555 } else {
556 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
557 "[BTCoex], HID + PAN(EDR)\n");
558 BTC_TRACE(trace_buf);
559 algorithm =
560 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
561 }
562 } else if (bt_link_info->pan_exist &&
563 bt_link_info->a2dp_exist) {
564 if (bt_hs_on) {
565 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
566 "[BTCoex], A2DP + PAN(HS)\n");
567 BTC_TRACE(trace_buf);
568 algorithm =
569 BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
570 } else {
571 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
572 "[BTCoex], A2DP + PAN(EDR)\n");
573 BTC_TRACE(trace_buf);
574 algorithm =
575 BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
576 }
577 }
578 }
579 } else if (num_of_diff_profile == 3) {
580 if (bt_link_info->sco_exist) {
581 if (bt_link_info->hid_exist &&
582 bt_link_info->a2dp_exist) {
583 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
584 "[BTCoex], SCO + HID + A2DP ==> HID\n");
585 BTC_TRACE(trace_buf);
586 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
587 } else if (bt_link_info->hid_exist &&
588 bt_link_info->pan_exist) {
589 if (bt_hs_on) {
590 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
591 "[BTCoex], SCO + HID + PAN(HS)\n");
592 BTC_TRACE(trace_buf);
593 algorithm =
594 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
595 } else {
596 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
597 "[BTCoex], SCO + HID + PAN(EDR)\n");
598 BTC_TRACE(trace_buf);
599 algorithm =
600 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
601 }
602 } else if (bt_link_info->pan_exist &&
603 bt_link_info->a2dp_exist) {
604 if (bt_hs_on) {
605 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
606 "[BTCoex], SCO + A2DP + PAN(HS)\n");
607 BTC_TRACE(trace_buf);
608 algorithm =
609 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
610 } else {
611 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
612 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
613 BTC_TRACE(trace_buf);
614 algorithm =
615 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
616 }
617 }
618 } else {
619 if (bt_link_info->hid_exist &&
620 bt_link_info->pan_exist &&
621 bt_link_info->a2dp_exist) {
622 if (bt_hs_on) {
623 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
624 "[BTCoex], HID + A2DP + PAN(HS)\n");
625 BTC_TRACE(trace_buf);
626 algorithm =
627 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
628 } else {
629 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
630 "[BTCoex], HID + A2DP + PAN(EDR)\n");
631 BTC_TRACE(trace_buf);
632 algorithm =
633 BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
634 }
635 }
636 }
637 } else if (num_of_diff_profile >= 3) {
638 if (bt_link_info->sco_exist) {
639 if (bt_link_info->hid_exist &&
640 bt_link_info->pan_exist &&
641 bt_link_info->a2dp_exist) {
642 if (bt_hs_on) {
643 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
644 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
645 BTC_TRACE(trace_buf);
646
647 } else {
648 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
649 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
650 BTC_TRACE(trace_buf);
651 algorithm =
652 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
653 }
654 }
655 }
656 }
657
658 return algorithm;
659 }
660
661 static
halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist * btcoexist,IN u8 dac_swing_lvl)662 void halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
663 IN u8 dac_swing_lvl)
664 {
665 u8 h2c_parameter[1] = {0};
666
667 /* There are several type of dacswing */
668 /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
669 h2c_parameter[0] = dac_swing_lvl;
670
671 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
672 }
673
674 static
halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN u8 dec_bt_pwr_lvl)675 void halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
676 IN u8 dec_bt_pwr_lvl)
677 {
678 return; /*BT no longer support this feature*/
679 /*
680 u8 h2c_parameter[1] = {0};
681
682 h2c_parameter[0] = dec_bt_pwr_lvl;
683
684 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
685 */
686 }
687
688 static
halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 dec_bt_pwr_lvl)689 void halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
690 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
691 {
692 return; /*BT no longer support this feature*/
693 /*
694 coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
695
696 if (!force_exec) {
697 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
698 return;
699 }
700 halbtc8723b2ant_set_fw_dec_bt_pwr(btcoexist,
701 coex_dm->cur_bt_dec_pwr_lvl);
702
703 coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
704 */
705 }
706
707 static
halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean enable_auto_report)708 void halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
709 IN boolean enable_auto_report)
710 {
711 u8 h2c_parameter[1] = {0};
712
713 h2c_parameter[0] = 0;
714
715 if (enable_auto_report)
716 h2c_parameter[0] |= BIT(0);
717
718 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
719 }
720
721 static
halbtc8723b2ant_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable_auto_report)722 void halbtc8723b2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
723 IN boolean force_exec, IN boolean enable_auto_report)
724 {
725 coex_dm->cur_bt_auto_report = enable_auto_report;
726
727 if (!force_exec) {
728 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
729 return;
730 }
731 halbtc8723b2ant_set_bt_auto_report(btcoexist,
732 coex_dm->cur_bt_auto_report);
733
734 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
735 }
736
737 static
halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 fw_dac_swing_lvl)738 void halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
739 IN boolean force_exec, IN u8 fw_dac_swing_lvl)
740 {
741 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
742
743 if (!force_exec) {
744 if (coex_dm->pre_fw_dac_swing_lvl ==
745 coex_dm->cur_fw_dac_swing_lvl)
746 return;
747 }
748
749 halbtc8723b2ant_set_fw_dac_swing_level(btcoexist,
750 coex_dm->cur_fw_dac_swing_lvl);
751
752 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
753 }
754
755 static
halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist * btcoexist,IN boolean rx_rf_shrink_on)756 void halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
757 IN boolean rx_rf_shrink_on)
758 {
759 if (rx_rf_shrink_on) {
760 /* Shrink RF Rx LPF corner */
761 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
762 "[BTCoex], Shrink RF Rx LPF corner!!\n");
763 BTC_TRACE(trace_buf);
764 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
765 0xffffc);
766 } else {
767 /* Resume RF Rx LPF corner */
768 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
769 if (btcoexist->initilized) {
770 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
771 "[BTCoex], Resume RF Rx LPF corner!!\n");
772 BTC_TRACE(trace_buf);
773 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
774 0xfffff, coex_dm->bt_rf_0x1e_backup);
775 }
776 }
777 }
778
779 static
halbtc8723b2ant_rf_shrink(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rx_rf_shrink_on)780 void halbtc8723b2ant_rf_shrink(IN struct btc_coexist *btcoexist,
781 IN boolean force_exec, IN boolean rx_rf_shrink_on)
782 {
783 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
784
785 if (!force_exec) {
786 if (coex_dm->pre_rf_rx_lpf_shrink ==
787 coex_dm->cur_rf_rx_lpf_shrink)
788 return;
789 }
790 halbtc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
791 coex_dm->cur_rf_rx_lpf_shrink);
792
793 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
794 }
795
796 static
halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist * btcoexist,IN boolean low_penalty_ra)797 void halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
798 *btcoexist, IN boolean low_penalty_ra)
799 {
800 u8 h2c_parameter[6] = {0};
801
802 h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
803
804 if (low_penalty_ra) {
805 h2c_parameter[1] |= BIT(0);
806 h2c_parameter[2] =
807 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
808 h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */
809 h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */
810 h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */
811 }
812
813 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
814 }
815
816 static
halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean low_penalty_ra)817 void halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
818 IN boolean force_exec, IN boolean low_penalty_ra)
819 {
820 coex_dm->cur_low_penalty_ra = low_penalty_ra;
821
822 if (!force_exec) {
823 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
824 return;
825 }
826 halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
827 coex_dm->cur_low_penalty_ra);
828
829 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
830 }
831
832 static
halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist * btcoexist,IN u32 level)833 void halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
834 IN u32 level)
835 {
836 u8 val = (u8)level;
837
838 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
839 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
840 BTC_TRACE(trace_buf);
841 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
842 }
843
844 static
halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist * btcoexist,IN boolean sw_dac_swing_on,IN u32 sw_dac_swing_lvl)845 void halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
846 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
847 {
848 if (sw_dac_swing_on)
849 halbtc8723b2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
850 else
851 halbtc8723b2ant_set_dac_swing_reg(btcoexist, 0x18);
852 }
853
854 static
halbtc8723b2ant_dac_swing(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean dac_swing_on,IN u32 dac_swing_lvl)855 void halbtc8723b2ant_dac_swing(IN struct btc_coexist *btcoexist,
856 IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
857 {
858 coex_dm->cur_dac_swing_on = dac_swing_on;
859 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
860
861 if (!force_exec) {
862 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
863 (coex_dm->pre_dac_swing_lvl ==
864 coex_dm->cur_dac_swing_lvl))
865 return;
866 }
867 delay_ms(30);
868 halbtc8723b2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
869 dac_swing_lvl);
870
871 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
872 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
873 }
874
875 static
halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean adc_back_off)876 void halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
877 IN boolean adc_back_off)
878 {
879 if (adc_back_off) {
880 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
881 "[BTCoex], BB BackOff Level On!\n");
882 BTC_TRACE(trace_buf);
883 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
884 } else {
885 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
886 "[BTCoex], BB BackOff Level Off!\n");
887 BTC_TRACE(trace_buf);
888 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
889 }
890 }
891
892 static
halbtc8723b2ant_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean adc_back_off)893 void halbtc8723b2ant_adc_back_off(IN struct btc_coexist *btcoexist,
894 IN boolean force_exec, IN boolean adc_back_off)
895 {
896 coex_dm->cur_adc_back_off = adc_back_off;
897
898 if (!force_exec) {
899 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
900 return;
901 }
902 halbtc8723b2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
903
904 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
905 }
906
907 static
halbtc8723b2ant_set_agc_table(IN struct btc_coexist * btcoexist,IN boolean agc_table_en)908 void halbtc8723b2ant_set_agc_table(IN struct btc_coexist *btcoexist,
909 IN boolean agc_table_en)
910 {
911 u8 rssi_adjust_val = 0;
912
913 /* =================BB AGC Gain Table */
914 if (agc_table_en) {
915 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
916 "[BTCoex], BB Agc Table On!\n");
917 BTC_TRACE(trace_buf);
918 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
919 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
920 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
921 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
922 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
923 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
924 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
925 } else {
926 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
927 "[BTCoex], BB Agc Table Off!\n");
928 BTC_TRACE(trace_buf);
929 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
930 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
931 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
932 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
933 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
934 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
935 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
936 }
937
938
939 /* =================RF Gain */
940 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
941 if (agc_table_en) {
942 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
943 "[BTCoex], Agc Table On!\n");
944 BTC_TRACE(trace_buf);
945 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
946 0x38fff);
947 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
948 0x38ffe);
949 } else {
950 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
951 "[BTCoex], Agc Table Off!\n");
952 BTC_TRACE(trace_buf);
953 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
954 0x380c3);
955 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
956 0x28ce6);
957 }
958 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
959
960 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
961 if (agc_table_en) {
962 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
963 "[BTCoex], Agc Table On!\n");
964 BTC_TRACE(trace_buf);
965 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
966 0x38fff);
967 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
968 0x38ffe);
969 } else {
970 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
971 "[BTCoex], Agc Table Off!\n");
972 BTC_TRACE(trace_buf);
973 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
974 0x380c3);
975 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
976 0x28ce6);
977 }
978 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
979
980 /* set rssi_adjust_val for wifi module. */
981 if (agc_table_en)
982 rssi_adjust_val = 8;
983 btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
984 &rssi_adjust_val);
985 }
986
987 static
halbtc8723b2ant_agc_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean agc_table_en)988 void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist,
989 IN boolean force_exec, IN boolean agc_table_en)
990 {
991 coex_dm->cur_agc_table_en = agc_table_en;
992
993 if (!force_exec) {
994 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
995 return;
996 }
997 halbtc8723b2ant_set_agc_table(btcoexist, agc_table_en);
998
999 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1000 }
1001
1002 static
halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist * btcoexist,IN boolean shrink_rx_lpf,IN boolean low_penalty_ra,IN boolean limited_dig,IN boolean bt_lna_constrain)1003 void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1004 IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1005 IN boolean limited_dig, IN boolean bt_lna_constrain)
1006 {
1007 /*
1008 u32 wifi_bw;
1009
1010 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1011
1012 if(BTC_WIFI_BW_HT40 != wifi_bw)
1013 {
1014 if (shrink_rx_lpf)
1015 shrink_rx_lpf = false;
1016 }
1017 */
1018
1019 /* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
1020 halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
1021 }
1022
1023 static
halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist * btcoexist,IN boolean agc_table_shift,IN boolean adc_back_off,IN boolean sw_dac_swing,IN u32 dac_swing_lvl)1024 void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1025 IN boolean agc_table_shift, IN boolean adc_back_off,
1026 IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1027 {
1028 /* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
1029 /* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1030 /* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
1031 }
1032
1033 static
halbtc8723b2ant_coex_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)1034 void halbtc8723b2ant_coex_table(IN struct btc_coexist *btcoexist,
1035 IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1036 IN u32 val0x6c8, IN u8 val0x6cc)
1037 {
1038
1039 if (!force_exec) {
1040 if ((val0x6c0 == coex_dm->cur_val0x6c0) &&
1041 (val0x6c4 == coex_dm->cur_val0x6c4) &&
1042 (val0x6c8 == coex_dm->cur_val0x6c8) &&
1043 (val0x6cc == coex_dm->cur_val0x6cc))
1044 return;
1045 }
1046
1047 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1048 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1049 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1050 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1051
1052 coex_dm->cur_val0x6c0 = val0x6c0;
1053 coex_dm->cur_val0x6c4 = val0x6c4;
1054 coex_dm->cur_val0x6c8 = val0x6c8;
1055 coex_dm->cur_val0x6cc = val0x6cc;
1056
1057 }
1058
1059 static
halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)1060 void halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1061 IN boolean force_exec, IN u8 type)
1062 {
1063 coex_sta->coex_table_type = type;
1064
1065 switch (type) {
1066 case 0:
1067 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1068 0x55555555, 0x55555555, 0xffffff, 0x3);
1069 break;
1070 case 1:
1071 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1072 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
1073 break;
1074 case 2:
1075 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1076 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
1077 break;
1078 case 3:
1079 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1080 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
1081 break;
1082 case 4:
1083 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1084 0xffffffff, 0xffffffff, 0xffffff, 0x3);
1085 break;
1086 case 5:
1087 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1088 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
1089 break;
1090 case 6:
1091 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1092 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
1093 break;
1094 case 7:
1095 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1096 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1097 break;
1098 case 8:
1099 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1100 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1101 break;
1102 case 9:
1103 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1104 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1105 break;
1106 case 10:
1107 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1108 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1109 break;
1110 case 11:
1111 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1112 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1113 break;
1114 case 12:
1115 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1116 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1117 break;
1118 case 13:
1119 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1120 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
1121 break;
1122 case 14:
1123 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1124 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
1125 break;
1126 case 15:
1127 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1128 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
1129 break;
1130 case 16:
1131 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1132 0xffff55ff, 0xfafafafa, 0xffffff, 0x3);
1133 break;
1134 case 17:
1135 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1136 0xffff55ff, 0xfafa5afa, 0xffffff, 0x3);
1137 break;
1138 default:
1139 break;
1140 }
1141 }
1142
1143 static
halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean enable)1144 void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1145 IN boolean enable)
1146 {
1147 u8 h2c_parameter[1] = {0};
1148
1149 if (enable)
1150 h2c_parameter[0] |= BIT(0); /* function enable */
1151
1152 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1153 }
1154
1155 static
halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable)1156 void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1157 IN boolean force_exec, IN boolean enable)
1158 {
1159 coex_dm->cur_ignore_wlan_act = enable;
1160
1161 if (!force_exec) {
1162 if (coex_dm->pre_ignore_wlan_act ==
1163 coex_dm->cur_ignore_wlan_act)
1164 return;
1165 }
1166 halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1167
1168 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1169 }
1170
1171 static
halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist * btcoexist,IN u8 lps_val,IN u8 rpwm_val)1172 void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
1173 IN u8 lps_val, IN u8 rpwm_val)
1174 {
1175 u8 lps = lps_val;
1176 u8 rpwm = rpwm_val;
1177
1178 btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
1179 btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1180 }
1181
1182 static
halbtc8723b2ant_lps_rpwm(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 lps_val,IN u8 rpwm_val)1183 void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
1184 IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
1185 {
1186 coex_dm->cur_lps = lps_val;
1187 coex_dm->cur_rpwm = rpwm_val;
1188
1189 if (!force_exec) {
1190 if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
1191 (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
1192 return;
1193 }
1194 halbtc8723b2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
1195
1196 coex_dm->pre_lps = coex_dm->cur_lps;
1197 coex_dm->pre_rpwm = coex_dm->cur_rpwm;
1198 }
1199
1200 static
halbtc8723b2ant_ps_tdma_check_for_power_save_state(IN struct btc_coexist * btcoexist,IN boolean new_ps_state)1201 void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1202 IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
1203 {
1204 u8 lps_mode = 0x0;
1205 u8 h2c_parameter[5] = {0x0, 0, 0, 48, 0};
1206
1207 btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
1208
1209 if (lps_mode) { /* already under LPS state */
1210 if (new_ps_state) {
1211 /* keep state under LPS, do nothing. */
1212 } else {
1213 /* will leave LPS state, turn off psTdma first */
1214 /* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1215 1); */
1216 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
1217 h2c_parameter);
1218 }
1219 } else { /* NO PS state */
1220 if (new_ps_state) {
1221 /* will enter LPS state, turn off psTdma first */
1222 /* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1223 1); */
1224 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
1225 h2c_parameter);
1226 } else {
1227 /* keep state under NO PS state, do nothing. */
1228 }
1229 }
1230 }
1231
1232 static
halbtc8723b2ant_power_save_state(IN struct btc_coexist * btcoexist,IN u8 ps_type,IN u8 lps_val,IN u8 rpwm_val)1233 void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
1234 IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
1235 {
1236 boolean low_pwr_disable = false;
1237
1238 switch (ps_type) {
1239 case BTC_PS_WIFI_NATIVE:
1240 /* recover to original 32k low power setting */
1241 low_pwr_disable = false;
1242 btcoexist->btc_set(btcoexist,
1243 BTC_SET_ACT_DISABLE_LOW_POWER,
1244 &low_pwr_disable);
1245 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
1246 NULL);
1247 coex_sta->force_lps_on = false;
1248 break;
1249 case BTC_PS_LPS_ON:
1250 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1251 btcoexist, true);
1252 halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
1253 lps_val, rpwm_val);
1254 /* when coex force to enter LPS, do not enter 32k low power. */
1255 low_pwr_disable = true;
1256 btcoexist->btc_set(btcoexist,
1257 BTC_SET_ACT_DISABLE_LOW_POWER,
1258 &low_pwr_disable);
1259 /* power save must executed before psTdma. */
1260 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
1261 NULL);
1262 coex_sta->force_lps_on = true;
1263 break;
1264 case BTC_PS_LPS_OFF:
1265 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1266 btcoexist, false);
1267 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
1268 NULL);
1269 coex_sta->force_lps_on = false;
1270 break;
1271 default:
1272 break;
1273 }
1274 }
1275
1276 static
halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist * btcoexist,IN u8 byte1,IN u8 byte2,IN u8 byte3,IN u8 byte4,IN u8 byte5)1277 void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1278 IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1279 {
1280 u8 h2c_parameter[5] = {0};
1281 u8 real_byte1 = byte1, real_byte5 = byte5;
1282 boolean ap_enable = false;
1283
1284 #if 0
1285 if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist))
1286 byte5 = byte5 | 0x1;
1287 #endif
1288
1289 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1290 &ap_enable);
1291
1292 if (ap_enable) {
1293 if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1294 real_byte1 &= ~BIT(4);
1295 real_byte1 |= BIT(5);
1296
1297 real_byte5 |= BIT(5);
1298 real_byte5 &= ~BIT(6);
1299
1300 halbtc8723b2ant_power_save_state(btcoexist,
1301 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1302 }
1303 } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1304 halbtc8723b2ant_power_save_state(btcoexist,
1305 BTC_PS_LPS_ON, 0x50, 0x4);
1306
1307 } else {
1308 halbtc8723b2ant_power_save_state(btcoexist,
1309 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1310 }
1311
1312 h2c_parameter[0] = byte1;
1313 h2c_parameter[1] = byte2;
1314 h2c_parameter[2] = byte3;
1315 h2c_parameter[3] = byte4;
1316 h2c_parameter[4] = byte5;
1317
1318 coex_dm->ps_tdma_para[0] = byte1;
1319 coex_dm->ps_tdma_para[1] = byte2;
1320 coex_dm->ps_tdma_para[2] = byte3;
1321 coex_dm->ps_tdma_para[3] = byte4;
1322 coex_dm->ps_tdma_para[4] = byte5;
1323
1324 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1325 }
1326
1327 static
halbtc8723b2ant_ps_tdma(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean turn_on,IN u8 type)1328 void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1329 IN boolean force_exec, IN boolean turn_on, IN u8 type)
1330 {
1331 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1332 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1333 u8 wifi_rssi_state1, bt_rssi_state;
1334 s8 wifi_duration_adjust = 0x0;
1335 u8 psTdmaByte4Modify = 0x0;
1336 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1337
1338 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1339 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
1340 - coex_dm->switch_thres_offset, 0);
1341 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1342 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1343 coex_dm->switch_thres_offset, 0);
1344
1345 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1346 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1347 (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type);
1348 BTC_TRACE(trace_buf);
1349
1350 #ifdef PLATFORM_WINDOWS
1351 u32 wait_counter = 0;
1352 #endif
1353
1354 #ifdef PLATFORM_WINDOWS
1355 while (PlatformAtomicExchange((pu4Byte)&coex_dm->setting_tdma, TRUE) == TRUE) {
1356 /*wait setting*/
1357 wait_counter++;
1358 PlatformStallExecution(50); /*100 us*/
1359 if (wait_counter > 3000) {
1360 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1361 "[BTCoex], Wait fail for setting TDMA\n");
1362 BTC_TRACE(trace_buf);
1363 return;
1364 }
1365 }
1366 if (wait_counter != 0) {
1367 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1368 "[BTCoex], Wait setting for TDMA(%d)\n", wait_counter);
1369 BTC_TRACE(trace_buf);
1370 }
1371 #endif
1372
1373 if (!(BTC_RSSI_HIGH(wifi_rssi_state1) &&
1374 BTC_RSSI_HIGH(bt_rssi_state)) && turn_on)
1375 /* if (halbtc8723b2ant_CoexSwitchThresCheck(btcoexist) && turn_on) */
1376 {
1377 type = type + 100; /* for WiFi RSSI low or BT RSSI low */
1378 coex_dm->is_switch_to_1dot5_ant = true;
1379 } else
1380 coex_dm->is_switch_to_1dot5_ant = false;
1381
1382
1383 if (!force_exec) {
1384 if ((turn_on == coex_dm->cur_ps_tdma_on) &&
1385 (type == coex_dm->cur_ps_tdma)) {
1386 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1387 "[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
1388 (coex_dm->cur_ps_tdma_on ? "on" : "off"), coex_dm->cur_ps_tdma);
1389 BTC_TRACE(trace_buf);
1390
1391 #ifdef PLATFORM_WINDOWS
1392 PlatformAtomicExchange((pu4Byte)&coex_dm->setting_tdma, FALSE);
1393 #endif
1394 return;
1395 }
1396 }
1397
1398
1399 if (coex_sta->scan_ap_num <= 5) {
1400 if (coex_sta->a2dp_bit_pool >= 45)
1401 wifi_duration_adjust = -15;
1402 else if (coex_sta->a2dp_bit_pool >= 35)
1403 wifi_duration_adjust = -10;
1404 else
1405 wifi_duration_adjust = 5;
1406 } else if (coex_sta->scan_ap_num <= 20) {
1407 if (coex_sta->a2dp_bit_pool >= 45)
1408 wifi_duration_adjust = -15;
1409 else if (coex_sta->a2dp_bit_pool >= 35)
1410 wifi_duration_adjust = -10;
1411 else
1412 wifi_duration_adjust = 0;
1413 } else if (coex_sta->scan_ap_num <= 40) {
1414 if (coex_sta->a2dp_bit_pool >= 45)
1415 wifi_duration_adjust = -15;
1416 else if (coex_sta->a2dp_bit_pool >= 35)
1417 wifi_duration_adjust = -10;
1418 else
1419 wifi_duration_adjust = -5;
1420 } else {
1421 if (coex_sta->a2dp_bit_pool >= 45)
1422 wifi_duration_adjust = -15;
1423 else if (coex_sta->a2dp_bit_pool >= 35)
1424 wifi_duration_adjust = -10;
1425 else
1426 wifi_duration_adjust = -10;
1427 }
1428
1429 if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist))
1430 psTdmaByte4Modify =
1431 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
1432
1433
1434 if (turn_on) {
1435 switch (type) {
1436 case 1:
1437 default:
1438 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1439 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1440 0x90 | psTdmaByte4Modify);
1441 break;
1442 case 2:
1443 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1444 0x2d + wifi_duration_adjust, 0x03, 0xf1,
1445 0x90 | psTdmaByte4Modify);
1446 break;
1447 case 3:
1448 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1449 0x1c, 0x3, 0xf1, 0x90 |
1450 psTdmaByte4Modify);
1451 break;
1452 case 4:
1453 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1454 0x10, 0x03, 0xf1, 0x90 |
1455 psTdmaByte4Modify);
1456 break;
1457 case 5:
1458 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1459 0x3c + wifi_duration_adjust, 0x3, 0x70,
1460 0x90 | psTdmaByte4Modify);
1461 break;
1462 case 6:
1463 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1464 0x2d + wifi_duration_adjust, 0x3, 0x70,
1465 0x90 | psTdmaByte4Modify);
1466 break;
1467 case 7:
1468 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1469 0x1c, 0x3, 0x70, 0x90 |
1470 psTdmaByte4Modify);
1471 break;
1472 case 8:
1473 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
1474 0x10, 0x3, 0x70, 0x90 |
1475 psTdmaByte4Modify);
1476 break;
1477 case 9:
1478 /*
1479 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1480 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1481 0x90 | psTdmaByte4Modify);
1482 */
1483 /* Bryant Modify for BT no-profile busy case */
1484 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1485 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1486 0x91);
1487
1488 break;
1489 case 10:
1490 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1491 0x2d + wifi_duration_adjust, 0x03, 0xf1,
1492 0x90 | psTdmaByte4Modify);
1493 break;
1494 case 11:
1495 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1496 0x1c, 0x3, 0xf1, 0x90 |
1497 psTdmaByte4Modify);
1498 break;
1499 case 12:
1500 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1501 0x10, 0x3, 0xf1, 0x90 |
1502 psTdmaByte4Modify);
1503 break;
1504 case 13:
1505 /*
1506 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1507 0x3c + wifi_duration_adjust, 0x3, 0x70,
1508 0x90 | psTdmaByte4Modify);
1509 */
1510 /* Bryant Modify for BT no-profile busy case */
1511 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1512 0x3c + wifi_duration_adjust, 0x3, 0x70,
1513 0x91);
1514 break;
1515 case 14:
1516 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1517 0x2d + wifi_duration_adjust, 0x3, 0x70,
1518 0x90 | psTdmaByte4Modify);
1519 break;
1520 case 15:
1521 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1522 0x1c, 0x3, 0x70, 0x90 |
1523 psTdmaByte4Modify);
1524 break;
1525 case 16:
1526 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1527 0x10, 0x3, 0x70, 0x90 |
1528 psTdmaByte4Modify);
1529 break;
1530 case 17:
1531 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
1532 0x2f, 0x2f, 0x60, 0x90);
1533 break;
1534 case 18:
1535 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1536 0x5, 0x5, 0xe1, 0x90);
1537 break;
1538 case 19:
1539 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1540 0x25, 0x25, 0xe1, 0x90);
1541 break;
1542 case 20:
1543 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1544 0x25, 0x25, 0x60, 0x90);
1545 break;
1546 case 21:
1547 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1548 0x15, 0x03, 0x70, 0x90);
1549 break;
1550 case 22:
1551 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1552 0x35, 0x03, 0xf1, 0x90);
1553 break;
1554 case 23:
1555 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1556 0x35, 0x03, 0x71, 0x10);
1557 break;
1558
1559 case 25:
1560 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1561 0x30, 0x03, 0x71, 0x10);
1562 break;
1563 case 30:
1564 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1565 0x10, 0x3, 0x70, 0x54);
1566 break;
1567 case 31:
1568 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1569 0x10, 0x3, 0x70, 0x55);
1570 break;
1571 case 33:
1572 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1573 0x1c, 0x3, 0xf1, 0x91);
1574 break;
1575 case 34:
1576 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1577 0x35, 0x3, 0x70, 0x50);
1578 break;
1579 case 35:
1580 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1581 0x10, 0x7, 0x70, 0x54);
1582 break;
1583 case 36:
1584 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1585 0x10, 0x3, 0x70, 0x50);
1586 break;
1587 case 40:
1588 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1589 0x10, 0x3, 0x71, 0x54);
1590 break;
1591 case 71:
1592 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1593 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1594 0x90);
1595 break;
1596 case 101:
1597 case 105:
1598 case 113:
1599 case 171:
1600 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1601 0x3a + wifi_duration_adjust, 0x03, 0x70,
1602 0x50 | psTdmaByte4Modify);
1603 break;
1604 case 102:
1605 case 106:
1606 case 110:
1607 case 114:
1608 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1609 0x2d + wifi_duration_adjust, 0x03, 0x70,
1610 0x50 | psTdmaByte4Modify);
1611 break;
1612 case 103:
1613 case 107:
1614 case 111:
1615 case 115:
1616 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1617 0x1c, 0x03, 0x70, 0x50 |
1618 psTdmaByte4Modify);
1619 break;
1620 case 104:
1621 case 108:
1622 case 112:
1623 case 116:
1624 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1625 0x10, 0x03, 0x70, 0x50 |
1626 psTdmaByte4Modify);
1627 break;
1628 case 109:
1629 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1630 0x3c, 0x03, 0xf1, 0x90 |
1631 psTdmaByte4Modify);
1632 break;
1633 /* case 113:
1634 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1635 0x3c, 0x03, 0x70, 0x90 |
1636 psTdmaByte4Modify);
1637 break; */
1638 case 121:
1639 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1640 0x15, 0x03, 0x70, 0x90 |
1641 psTdmaByte4Modify);
1642 break;
1643 case 122:
1644 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1645 0x35, 0x03, 0x71, 0x11);
1646 break;
1647 case 123:
1648 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1649 0x35, 0x03, 0x71, 0x10);
1650 break;
1651 case 125:
1652 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1653 0x30, 0x03, 0x70, 0x51);
1654 break;
1655 case 130:
1656 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1657 0x10, 0x3, 0x70, 0x54);
1658 break;
1659 case 133:
1660 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1661 0x1c, 0x3, 0x70, 0x51);
1662 break;
1663 case 134:
1664 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1665 0x35, 0x3, 0x70, 0x50);
1666 break;
1667 case 135:
1668 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1669 0x10, 0x7, 0x70, 0x54);
1670 break;
1671 case 136:
1672 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1673 0x10, 0x3, 0x70, 0x50);
1674 break;
1675 case 140:
1676 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1677 0x10, 0x3, 0x71, 0x54);
1678 break;
1679 }
1680 } else {
1681 /* disable PS tdma */
1682 switch (type) {
1683 case 0:
1684 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1685 0x0, 0x0, 0x40, 0x0);
1686 break;
1687 case 1:
1688 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1689 0x0, 0x0, 0x48, 0x0);
1690 break;
1691 default:
1692 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1693 0x0, 0x0, 0x40, 0x0);
1694 break;
1695 }
1696 }
1697
1698 /* update pre state */
1699 coex_dm->cur_ps_tdma_on = turn_on;
1700 coex_dm->cur_ps_tdma = type;
1701
1702 #ifdef PLATFORM_WINDOWS
1703 PlatformAtomicExchange((pu4Byte)&coex_dm->setting_tdma, FALSE);
1704 #endif
1705
1706 }
1707
1708 static
halbtc8723b2ant_set_ant_path(IN struct btc_coexist * btcoexist,IN u8 ant_pos_type,IN boolean init_hwcfg,IN boolean wifi_off)1709 void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1710 IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1711 {
1712 struct btc_board_info *board_info = &btcoexist->board_info;
1713 u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
1714 boolean pg_ext_switch = false;
1715 boolean use_ext_switch = false;
1716 u8 h2c_parameter[2] = {0};
1717 u32 u32tmp_1[4];
1718 boolean is_fw_ready;
1719
1720 btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
1721 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
1722 &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */
1723
1724 if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
1725 use_ext_switch = true;
1726
1727 if (init_hwcfg) {
1728 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
1729 btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
1730 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
1731 btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
1732 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
1733
1734 if (fw_ver >= 0x180000) {
1735 /* Use H2C to set GNT_BT to High to avoid A2DP click */
1736 h2c_parameter[0] = 1;
1737 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
1738 h2c_parameter);
1739
1740 cnt_bt_cal_chk = 0;
1741 while (1) {
1742 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
1743 if (is_fw_ready == false)
1744 break;
1745
1746 if (btcoexist->btc_read_1byte(btcoexist,
1747 0x765) == 0x18)
1748 break;
1749
1750 cnt_bt_cal_chk++;
1751 if (cnt_bt_cal_chk > 20)
1752 break;
1753 }
1754 } else
1755 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
1756 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1757 if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1758 btcoexist->btc_write_4byte(btcoexist, 0x948,
1759 u32tmp_1[0]);
1760 else
1761 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
1762
1763 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
1764 0x0); /* WiFi TRx Mask off */
1765 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
1766 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); */ /*BT TRx Mask off */
1767
1768 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
1769 /* tell firmware "no antenna inverse" */
1770 h2c_parameter[0] = 0;
1771 } else {
1772 /* tell firmware "antenna inverse" */
1773 h2c_parameter[0] = 1;
1774 }
1775
1776 if (use_ext_switch) {
1777 /* ext switch type */
1778 h2c_parameter[1] = 1;
1779 } else {
1780 /* int switch type */
1781 h2c_parameter[1] = 0;
1782 }
1783 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
1784 } else {
1785 if (fw_ver >= 0x180000) {
1786 /* Use H2C to set GNT_BT to "Control by PTA"*/
1787 h2c_parameter[0] = 0;
1788 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
1789 h2c_parameter);
1790
1791 cnt_bt_cal_chk = 0;
1792 while (1) {
1793 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
1794 if (is_fw_ready == false)
1795 break;
1796
1797 if (btcoexist->btc_read_1byte(btcoexist,
1798 0x765) == 0x0)
1799 break;
1800
1801 cnt_bt_cal_chk++;
1802 if (cnt_bt_cal_chk > 20)
1803 break;
1804 }
1805 } else
1806 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
1807 }
1808
1809 /* ext switch setting */
1810 if (use_ext_switch) {
1811 if (init_hwcfg) {
1812 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
1813 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1814 u32tmp &= ~BIT(23);
1815 u32tmp |= BIT(24);
1816 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1817 }
1818 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1819 if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1820 btcoexist->btc_write_4byte(btcoexist, 0x948,
1821 u32tmp_1[0]);
1822 else
1823 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
1824
1825 switch (ant_pos_type) {
1826 case BTC_ANT_WIFI_AT_MAIN:
1827 btcoexist->btc_write_1byte_bitmask(btcoexist,
1828 0x92c, 0x3,
1829 0x1); /* ext switch main at wifi */
1830 break;
1831 case BTC_ANT_WIFI_AT_AUX:
1832 btcoexist->btc_write_1byte_bitmask(btcoexist,
1833 0x92c, 0x3,
1834 0x2); /* ext switch aux at wifi */
1835 break;
1836 }
1837 } else { /* internal switch */
1838 if (init_hwcfg) {
1839 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
1840 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1841 u32tmp |= BIT(23);
1842 u32tmp &= ~BIT(24);
1843 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1844 }
1845
1846 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
1847 0x0); /* fixed external switch S1->Main, S0->Aux */
1848 switch (ant_pos_type) {
1849 case BTC_ANT_WIFI_AT_MAIN:
1850 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
1851 0x948);
1852 if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1853 btcoexist->btc_write_4byte(btcoexist, 0x948,
1854 u32tmp_1[0]);
1855 else
1856 btcoexist->btc_write_4byte(btcoexist, 0x948,
1857 0x0);
1858 break;
1859 case BTC_ANT_WIFI_AT_AUX:
1860 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
1861 0x948);
1862 if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1863 btcoexist->btc_write_4byte(btcoexist, 0x948,
1864 u32tmp_1[0]);
1865 else
1866 btcoexist->btc_write_4byte(btcoexist, 0x948,
1867 0x280);
1868 break;
1869 }
1870 }
1871 }
1872 #if 0
1873 boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
1874 {
1875 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1876 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1877 u8 wifi_rssi_state1, bt_rssi_state;
1878 u32 vendor;
1879 u8 offset = 0;
1880
1881 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
1882
1883 /* if (vendor == BTC_VENDOR_LENOVO) */
1884 /* offset = 20; */
1885
1886 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1887 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
1888 - coex_dm->switch_thres_offset, 0);
1889 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1890 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1891 coex_dm->switch_thres_offset, 0);
1892
1893 if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
1894 return true;
1895
1896 return false;
1897 }
1898 #endif
1899
1900 static
halbtc8723b2ant_coex_all_off(IN struct btc_coexist * btcoexist)1901 void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1902 {
1903 /* fw all off */
1904 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1905 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1906 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1907
1908 /* sw all off */
1909 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1910 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1911
1912 /* hw all off */
1913 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
1914 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1915 }
1916
1917 static
halbtc8723b2ant_init_coex_dm(IN struct btc_coexist * btcoexist)1918 void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1919 {
1920 /* force to reset coex mechanism */
1921 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1922
1923 halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1924 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1925 halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1926
1927 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1928 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1929
1930 coex_sta->pop_event_cnt = 0;
1931
1932 }
1933
1934 static
halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist * btcoexist)1935 void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1936 {
1937 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
1938 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
1939 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1940 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
1941 boolean wifi_connected = false;
1942 boolean low_pwr_disable = true;
1943 boolean scan = false, link = false, roam = false;
1944 boolean wifi_busy = false;
1945
1946
1947 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1948 &prewifi_rssi_state, 2, 15, 0);
1949 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1950 &prewifi_rssi_state1, 2,
1951 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
1952 coex_dm->switch_thres_offset, 0);
1953 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1954 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1955 coex_dm->switch_thres_offset, 0);
1956
1957 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1958 &low_pwr_disable);
1959 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1960 &wifi_connected);
1961
1962 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
1963 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
1964 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
1965 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1966
1967
1968 if (coex_sta->bt_abnormal_scan) {
1969 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
1970 23);
1971 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
1972 } else if (scan || link || roam) {
1973 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1974 "[BTCoex], Wifi link process + BT Inq/Page!!\n");
1975 BTC_TRACE(trace_buf);
1976 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1977 7);
1978 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1979 } else if (wifi_connected) {
1980 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1981 "[BTCoex], Wifi connected + BT Inq/Page!!\n");
1982 BTC_TRACE(trace_buf);
1983 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1984 7);
1985
1986 if (wifi_busy)
1987 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
1988 3);
1989 else
1990 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
1991 } else {
1992 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1993 "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
1994 BTC_TRACE(trace_buf);
1995 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1996 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1997 }
1998
1999 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
2000 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2001
2002 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
2003 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2004 /*
2005 coex_dm->need_recover0x948 = true;
2006 coex_dm->backup0x948 = btcoexist->btc_read_4byte(btcoexist, 0x948);
2007
2008 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX, false, false);
2009 */
2010 }
2011
2012 static
halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist * btcoexist)2013 void halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
2014 {
2015 u32 u32tmp;
2016 u8 u8tmpa, u8tmpb;
2017 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
2018
2019 if (bt_link_info->a2dp_exist) {
2020 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 16);
2021 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 40);
2022 } else {
2023
2024 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15);
2025 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
2026 }
2027
2028 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
2029 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2030
2031
2032 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
2033 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
2034 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
2035
2036 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2037 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
2038 u32tmp, u8tmpa, u8tmpb);
2039 BTC_TRACE(trace_buf);
2040 }
2041
2042 static
halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist * btcoexist)2043 boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist
2044 *btcoexist)
2045 {
2046 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
2047 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
2048 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2049 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
2050 u8 ap_num = 0;
2051
2052 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
2053 &prewifi_rssi_state, 2, 15, 0);
2054 /* wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-coex_dm->switch_thres_offset-coex_dm->switch_thres_offset, 0); */
2055 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
2056 &prewifi_rssi_state1, 2,
2057 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
2058 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
2059 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2060 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
2061 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
2062
2063 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
2064
2065 /* define the office environment */
2066 if (BTC_RSSI_HIGH(wifi_rssi_state1) &&
2067 (coex_sta->hid_exist == true) &&
2068 (coex_sta->a2dp_exist == true)) {
2069
2070 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2071 "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n");
2072 BTC_TRACE(trace_buf);
2073
2074 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6);
2075 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2076
2077 /* sw all off */
2078 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
2079 false);
2080 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
2081 0x18);
2082
2083 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2084
2085 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2086
2087 return true;
2088 }
2089
2090 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18);
2091 return false;
2092 }
2093
2094 static
halbtc8723b2ant_is_common_action(IN struct btc_coexist * btcoexist)2095 boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
2096 {
2097 boolean common = false, wifi_connected = false, wifi_busy = false;
2098 boolean bt_hs_on = false, low_pwr_disable = false;
2099 boolean asus_8723b = false;
2100
2101 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
2102 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
2103 &wifi_connected);
2104 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2105
2106 if (!wifi_connected) {
2107 low_pwr_disable = false;
2108 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
2109 &low_pwr_disable);
2110 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2111 0x8);
2112
2113 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2114 "[BTCoex], Wifi non-connected idle!!\n");
2115 BTC_TRACE(trace_buf);
2116
2117 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
2118 0x0);
2119 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2120
2121 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2122 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2123 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2124
2125 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
2126 false);
2127 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
2128 0x18);
2129
2130 common = true;
2131 } else {
2132 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
2133 coex_dm->bt_status) {
2134 low_pwr_disable = false;
2135 btcoexist->btc_set(btcoexist,
2136 BTC_SET_ACT_DISABLE_LOW_POWER,
2137 &low_pwr_disable);
2138 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
2139 false, false, 0x8);
2140
2141 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2142 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
2143 BTC_TRACE(trace_buf);
2144
2145 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
2146 0xfffff, 0x0);
2147 halbtc8723b2ant_coex_table_with_type(btcoexist,
2148 NORMAL_EXEC, 0);
2149
2150 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
2151 1);
2152 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2153 0xb);
2154 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2155
2156 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
2157 false,
2158 false);
2159 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
2160 false, 0x18);
2161
2162 common = true;
2163 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
2164 coex_dm->bt_status) {
2165 low_pwr_disable = true;
2166 btcoexist->btc_set(btcoexist,
2167 BTC_SET_ACT_DISABLE_LOW_POWER,
2168 &low_pwr_disable);
2169
2170 if (bt_hs_on)
2171 return false;
2172 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2173 "[BTCoex], Wifi connected + BT connected-idle!!\n");
2174 BTC_TRACE(trace_buf);
2175 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
2176 false, false, 0x8);
2177
2178 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
2179 0xfffff, 0x0);
2180 halbtc8723b2ant_coex_table_with_type(btcoexist,
2181 NORMAL_EXEC, 0);
2182 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
2183 1);
2184 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2185 0xb);
2186 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2187
2188 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
2189 false, false);
2190 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
2191 false, 0x18);
2192
2193 common = true;
2194 } else {
2195 low_pwr_disable = true;
2196 btcoexist->btc_set(btcoexist,
2197 BTC_SET_ACT_DISABLE_LOW_POWER,
2198 &low_pwr_disable);
2199
2200 if (wifi_busy) {
2201 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2202 "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
2203 BTC_TRACE(trace_buf);
2204 /* btcoexist->btc_get(btcoexist,
2205 BTC_GET_BL_IS_ASUS_8723B, &asus_8723b);
2206 if (!asus_8723b)
2207 common = false;
2208 else
2209 common = halbtc8723b2ant_action_wifi_idle_process(
2210 btcoexist); */
2211 common = false;
2212 } else {
2213 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2214 "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
2215 BTC_TRACE(trace_buf);
2216 common = false;
2217 /*common = halbtc8723b2ant_action_wifi_idle_process(
2218 btcoexist);*/
2219 }
2220 }
2221 }
2222
2223 return common;
2224 }
2225
2226 static
halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist * btcoexist,IN boolean sco_hid,IN boolean tx_pause,IN u8 max_interval)2227 void halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
2228 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
2229 {
2230 static s32 up, dn, m, n, wait_count;
2231 s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
2232 u8 retry_count = 0;
2233
2234 if (!coex_dm->auto_tdma_adjust) {
2235 coex_dm->auto_tdma_adjust = true;
2236 {
2237 if (sco_hid) {
2238 if (tx_pause) {
2239 if (max_interval == 1) {
2240 halbtc8723b2ant_ps_tdma(
2241 btcoexist, NORMAL_EXEC,
2242 true, 13);
2243 coex_dm->ps_tdma_du_adj_type =
2244 13;
2245 } else if (max_interval == 2) {
2246 halbtc8723b2ant_ps_tdma(
2247 btcoexist, NORMAL_EXEC,
2248 true, 14);
2249 coex_dm->ps_tdma_du_adj_type =
2250 14;
2251 } else if (max_interval == 3) {
2252 halbtc8723b2ant_ps_tdma(
2253 btcoexist, NORMAL_EXEC,
2254 true, 15);
2255 coex_dm->ps_tdma_du_adj_type =
2256 15;
2257 } else {
2258 halbtc8723b2ant_ps_tdma(
2259 btcoexist, NORMAL_EXEC,
2260 true, 15);
2261 coex_dm->ps_tdma_du_adj_type =
2262 15;
2263 }
2264 } else {
2265 if (max_interval == 1) {
2266 halbtc8723b2ant_ps_tdma(
2267 btcoexist, NORMAL_EXEC,
2268 true, 9);
2269 coex_dm->ps_tdma_du_adj_type =
2270 9;
2271 } else if (max_interval == 2) {
2272 halbtc8723b2ant_ps_tdma(
2273 btcoexist, NORMAL_EXEC,
2274 true, 10);
2275 coex_dm->ps_tdma_du_adj_type =
2276 10;
2277 } else if (max_interval == 3) {
2278 halbtc8723b2ant_ps_tdma(
2279 btcoexist, NORMAL_EXEC,
2280 true, 11);
2281 coex_dm->ps_tdma_du_adj_type =
2282 11;
2283 } else {
2284 halbtc8723b2ant_ps_tdma(
2285 btcoexist, NORMAL_EXEC,
2286 true, 11);
2287 coex_dm->ps_tdma_du_adj_type =
2288 11;
2289 }
2290 }
2291 } else {
2292 if (tx_pause) {
2293 if (max_interval == 1) {
2294 halbtc8723b2ant_ps_tdma(
2295 btcoexist, NORMAL_EXEC,
2296 true, 5);
2297 coex_dm->ps_tdma_du_adj_type =
2298 5;
2299 } else if (max_interval == 2) {
2300 halbtc8723b2ant_ps_tdma(
2301 btcoexist, NORMAL_EXEC,
2302 true, 6);
2303 coex_dm->ps_tdma_du_adj_type =
2304 6;
2305 } else if (max_interval == 3) {
2306 halbtc8723b2ant_ps_tdma(
2307 btcoexist, NORMAL_EXEC,
2308 true, 7);
2309 coex_dm->ps_tdma_du_adj_type =
2310 7;
2311 } else {
2312 halbtc8723b2ant_ps_tdma(
2313 btcoexist, NORMAL_EXEC,
2314 true, 7);
2315 coex_dm->ps_tdma_du_adj_type =
2316 7;
2317 }
2318 } else {
2319 if (max_interval == 1) {
2320 halbtc8723b2ant_ps_tdma(
2321 btcoexist, NORMAL_EXEC,
2322 true, 1);
2323 coex_dm->ps_tdma_du_adj_type =
2324 1;
2325 } else if (max_interval == 2) {
2326 halbtc8723b2ant_ps_tdma(
2327 btcoexist, NORMAL_EXEC,
2328 true, 2);
2329 coex_dm->ps_tdma_du_adj_type =
2330 2;
2331 } else if (max_interval == 3) {
2332 halbtc8723b2ant_ps_tdma(
2333 btcoexist, NORMAL_EXEC,
2334 true, 3);
2335 coex_dm->ps_tdma_du_adj_type =
2336 3;
2337 } else {
2338 halbtc8723b2ant_ps_tdma(
2339 btcoexist, NORMAL_EXEC,
2340 true, 3);
2341 coex_dm->ps_tdma_du_adj_type =
2342 3;
2343 }
2344 }
2345 }
2346 }
2347 /* ============ */
2348 up = 0;
2349 dn = 0;
2350 m = 1;
2351 n = 3;
2352 result = 0;
2353 wait_count = 0;
2354 } else {
2355 /* acquire the BT TRx retry count from BT_Info byte2 */
2356 retry_count = coex_sta->bt_retry_cnt;
2357
2358 if ((coex_sta->low_priority_tx) > 1050 ||
2359 (coex_sta->low_priority_rx) > 1250)
2360 retry_count++;
2361
2362 result = 0;
2363 wait_count++;
2364
2365 if (retry_count ==
2366 0) { /* no retry in the last 2-second duration */
2367 up++;
2368 dn--;
2369
2370 if (dn <= 0)
2371 dn = 0;
2372
2373 if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
2374 wait_count = 0;
2375 n = 3;
2376 up = 0;
2377 dn = 0;
2378 result = 1;
2379 }
2380 } else if (retry_count <=
2381 3) { /* <=3 retry in the last 2-second duration */
2382 up--;
2383 dn++;
2384
2385 if (up <= 0)
2386 up = 0;
2387
2388 if (dn == 2) {/* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
2389 if (wait_count <= 2)
2390 m++; /* to avoid loop between the two levels */
2391 else
2392 m = 1;
2393
2394 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2395 m = 20;
2396
2397 n = 3 * m;
2398 up = 0;
2399 dn = 0;
2400 wait_count = 0;
2401 result = -1;
2402 }
2403 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
2404 if (wait_count == 1)
2405 m++; /* to avoid loop between the two levels */
2406 else
2407 m = 1;
2408
2409 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2410 m = 20;
2411
2412 n = 3 * m;
2413 up = 0;
2414 dn = 0;
2415 wait_count = 0;
2416 result = -1;
2417 }
2418
2419 if (max_interval == 1) {
2420 if (tx_pause) {
2421 if (coex_dm->cur_ps_tdma == 71) {
2422 halbtc8723b2ant_ps_tdma(btcoexist,
2423 NORMAL_EXEC, true, 5);
2424 coex_dm->ps_tdma_du_adj_type = 5;
2425 } else if (coex_dm->cur_ps_tdma == 1) {
2426 halbtc8723b2ant_ps_tdma(btcoexist,
2427 NORMAL_EXEC, true, 5);
2428 coex_dm->ps_tdma_du_adj_type = 5;
2429 } else if (coex_dm->cur_ps_tdma == 2) {
2430 halbtc8723b2ant_ps_tdma(btcoexist,
2431 NORMAL_EXEC, true, 6);
2432 coex_dm->ps_tdma_du_adj_type = 6;
2433 } else if (coex_dm->cur_ps_tdma == 3) {
2434 halbtc8723b2ant_ps_tdma(btcoexist,
2435 NORMAL_EXEC, true, 7);
2436 coex_dm->ps_tdma_du_adj_type = 7;
2437 } else if (coex_dm->cur_ps_tdma == 4) {
2438 halbtc8723b2ant_ps_tdma(btcoexist,
2439 NORMAL_EXEC, true, 8);
2440 coex_dm->ps_tdma_du_adj_type = 8;
2441 }
2442 if (coex_dm->cur_ps_tdma == 9) {
2443 halbtc8723b2ant_ps_tdma(btcoexist,
2444 NORMAL_EXEC, true, 13);
2445 coex_dm->ps_tdma_du_adj_type = 13;
2446 } else if (coex_dm->cur_ps_tdma == 10) {
2447 halbtc8723b2ant_ps_tdma(btcoexist,
2448 NORMAL_EXEC, true, 14);
2449 coex_dm->ps_tdma_du_adj_type = 14;
2450 } else if (coex_dm->cur_ps_tdma == 11) {
2451 halbtc8723b2ant_ps_tdma(btcoexist,
2452 NORMAL_EXEC, true, 15);
2453 coex_dm->ps_tdma_du_adj_type = 15;
2454 } else if (coex_dm->cur_ps_tdma == 12) {
2455 halbtc8723b2ant_ps_tdma(btcoexist,
2456 NORMAL_EXEC, true, 16);
2457 coex_dm->ps_tdma_du_adj_type = 16;
2458 }
2459
2460 if (result == -1) {
2461 if (coex_dm->cur_ps_tdma == 5) {
2462 halbtc8723b2ant_ps_tdma(
2463 btcoexist, NORMAL_EXEC,
2464 true, 6);
2465 coex_dm->ps_tdma_du_adj_type =
2466 6;
2467 } else if (coex_dm->cur_ps_tdma == 6) {
2468 halbtc8723b2ant_ps_tdma(
2469 btcoexist, NORMAL_EXEC,
2470 true, 7);
2471 coex_dm->ps_tdma_du_adj_type =
2472 7;
2473 } else if (coex_dm->cur_ps_tdma == 7) {
2474 halbtc8723b2ant_ps_tdma(
2475 btcoexist, NORMAL_EXEC,
2476 true, 8);
2477 coex_dm->ps_tdma_du_adj_type =
2478 8;
2479 } else if (coex_dm->cur_ps_tdma == 13) {
2480 halbtc8723b2ant_ps_tdma(
2481 btcoexist, NORMAL_EXEC,
2482 true, 14);
2483 coex_dm->ps_tdma_du_adj_type =
2484 14;
2485 } else if (coex_dm->cur_ps_tdma == 14) {
2486 halbtc8723b2ant_ps_tdma(
2487 btcoexist, NORMAL_EXEC,
2488 true, 15);
2489 coex_dm->ps_tdma_du_adj_type =
2490 15;
2491 } else if (coex_dm->cur_ps_tdma == 15) {
2492 halbtc8723b2ant_ps_tdma(
2493 btcoexist, NORMAL_EXEC,
2494 true, 16);
2495 coex_dm->ps_tdma_du_adj_type =
2496 16;
2497 }
2498 } else if (result == 1) {
2499 if (coex_dm->cur_ps_tdma == 8) {
2500 halbtc8723b2ant_ps_tdma(
2501 btcoexist, NORMAL_EXEC,
2502 true, 7);
2503 coex_dm->ps_tdma_du_adj_type =
2504 7;
2505 } else if (coex_dm->cur_ps_tdma == 7) {
2506 halbtc8723b2ant_ps_tdma(
2507 btcoexist, NORMAL_EXEC,
2508 true, 6);
2509 coex_dm->ps_tdma_du_adj_type =
2510 6;
2511 } else if (coex_dm->cur_ps_tdma == 6) {
2512 halbtc8723b2ant_ps_tdma(
2513 btcoexist, NORMAL_EXEC,
2514 true, 5);
2515 coex_dm->ps_tdma_du_adj_type =
2516 5;
2517 } else if (coex_dm->cur_ps_tdma == 16) {
2518 halbtc8723b2ant_ps_tdma(
2519 btcoexist, NORMAL_EXEC,
2520 true, 15);
2521 coex_dm->ps_tdma_du_adj_type =
2522 15;
2523 } else if (coex_dm->cur_ps_tdma == 15) {
2524 halbtc8723b2ant_ps_tdma(
2525 btcoexist, NORMAL_EXEC,
2526 true, 14);
2527 coex_dm->ps_tdma_du_adj_type =
2528 14;
2529 } else if (coex_dm->cur_ps_tdma == 14) {
2530 halbtc8723b2ant_ps_tdma(
2531 btcoexist, NORMAL_EXEC,
2532 true, 13);
2533 coex_dm->ps_tdma_du_adj_type =
2534 13;
2535 }
2536 }
2537 } else {
2538 if (coex_dm->cur_ps_tdma == 5) {
2539 halbtc8723b2ant_ps_tdma(btcoexist,
2540 NORMAL_EXEC, true, 71);
2541 coex_dm->ps_tdma_du_adj_type = 71;
2542 } else if (coex_dm->cur_ps_tdma == 6) {
2543 halbtc8723b2ant_ps_tdma(btcoexist,
2544 NORMAL_EXEC, true, 2);
2545 coex_dm->ps_tdma_du_adj_type = 2;
2546 } else if (coex_dm->cur_ps_tdma == 7) {
2547 halbtc8723b2ant_ps_tdma(btcoexist,
2548 NORMAL_EXEC, true, 3);
2549 coex_dm->ps_tdma_du_adj_type = 3;
2550 } else if (coex_dm->cur_ps_tdma == 8) {
2551 halbtc8723b2ant_ps_tdma(btcoexist,
2552 NORMAL_EXEC, true, 4);
2553 coex_dm->ps_tdma_du_adj_type = 4;
2554 }
2555 if (coex_dm->cur_ps_tdma == 13) {
2556 halbtc8723b2ant_ps_tdma(btcoexist,
2557 NORMAL_EXEC, true, 9);
2558 coex_dm->ps_tdma_du_adj_type = 9;
2559 } else if (coex_dm->cur_ps_tdma == 14) {
2560 halbtc8723b2ant_ps_tdma(btcoexist,
2561 NORMAL_EXEC, true, 10);
2562 coex_dm->ps_tdma_du_adj_type = 10;
2563 } else if (coex_dm->cur_ps_tdma == 15) {
2564 halbtc8723b2ant_ps_tdma(btcoexist,
2565 NORMAL_EXEC, true, 11);
2566 coex_dm->ps_tdma_du_adj_type = 11;
2567 } else if (coex_dm->cur_ps_tdma == 16) {
2568 halbtc8723b2ant_ps_tdma(btcoexist,
2569 NORMAL_EXEC, true, 12);
2570 coex_dm->ps_tdma_du_adj_type = 12;
2571 }
2572
2573 if (result == -1) {
2574 if (coex_dm->cur_ps_tdma == 71) {
2575 halbtc8723b2ant_ps_tdma(
2576 btcoexist, NORMAL_EXEC,
2577 true, 1);
2578 coex_dm->ps_tdma_du_adj_type =
2579 1;
2580 } else if (coex_dm->cur_ps_tdma == 1) {
2581 halbtc8723b2ant_ps_tdma(
2582 btcoexist, NORMAL_EXEC,
2583 true, 2);
2584 coex_dm->ps_tdma_du_adj_type =
2585 2;
2586 } else if (coex_dm->cur_ps_tdma == 2) {
2587 halbtc8723b2ant_ps_tdma(
2588 btcoexist, NORMAL_EXEC,
2589 true, 3);
2590 coex_dm->ps_tdma_du_adj_type =
2591 3;
2592 } else if (coex_dm->cur_ps_tdma == 3) {
2593 halbtc8723b2ant_ps_tdma(
2594 btcoexist, NORMAL_EXEC,
2595 true, 4);
2596 coex_dm->ps_tdma_du_adj_type =
2597 4;
2598 } else if (coex_dm->cur_ps_tdma == 9) {
2599 halbtc8723b2ant_ps_tdma(
2600 btcoexist, NORMAL_EXEC,
2601 true, 10);
2602 coex_dm->ps_tdma_du_adj_type =
2603 10;
2604 } else if (coex_dm->cur_ps_tdma == 10) {
2605 halbtc8723b2ant_ps_tdma(
2606 btcoexist, NORMAL_EXEC,
2607 true, 11);
2608 coex_dm->ps_tdma_du_adj_type =
2609 11;
2610 } else if (coex_dm->cur_ps_tdma == 11) {
2611 halbtc8723b2ant_ps_tdma(
2612 btcoexist, NORMAL_EXEC,
2613 true, 12);
2614 coex_dm->ps_tdma_du_adj_type =
2615 12;
2616 }
2617 } else if (result == 1) {
2618 if (coex_dm->cur_ps_tdma == 4) {
2619 halbtc8723b2ant_ps_tdma(
2620 btcoexist, NORMAL_EXEC,
2621 true, 3);
2622 coex_dm->ps_tdma_du_adj_type =
2623 3;
2624 } else if (coex_dm->cur_ps_tdma == 3) {
2625 halbtc8723b2ant_ps_tdma(
2626 btcoexist, NORMAL_EXEC,
2627 true, 2);
2628 coex_dm->ps_tdma_du_adj_type =
2629 2;
2630 } else if (coex_dm->cur_ps_tdma == 2) {
2631 halbtc8723b2ant_ps_tdma(
2632 btcoexist, NORMAL_EXEC,
2633 true, 1);
2634 coex_dm->ps_tdma_du_adj_type =
2635 1;
2636 } else if (coex_dm->cur_ps_tdma == 1) {
2637 halbtc8723b2ant_ps_tdma(
2638 btcoexist, NORMAL_EXEC,
2639 true, 71);
2640 coex_dm->ps_tdma_du_adj_type =
2641 71;
2642 } else if (coex_dm->cur_ps_tdma == 12) {
2643 halbtc8723b2ant_ps_tdma(
2644 btcoexist, NORMAL_EXEC,
2645 true, 11);
2646 coex_dm->ps_tdma_du_adj_type =
2647 11;
2648 } else if (coex_dm->cur_ps_tdma == 11) {
2649 halbtc8723b2ant_ps_tdma(
2650 btcoexist, NORMAL_EXEC,
2651 true, 10);
2652 coex_dm->ps_tdma_du_adj_type =
2653 10;
2654 } else if (coex_dm->cur_ps_tdma == 10) {
2655 halbtc8723b2ant_ps_tdma(
2656 btcoexist, NORMAL_EXEC,
2657 true, 9);
2658 coex_dm->ps_tdma_du_adj_type =
2659 9;
2660 }
2661 }
2662 }
2663 } else if (max_interval == 2) {
2664 if (tx_pause) {
2665 if (coex_dm->cur_ps_tdma == 1) {
2666 halbtc8723b2ant_ps_tdma(btcoexist,
2667 NORMAL_EXEC, true, 6);
2668 coex_dm->ps_tdma_du_adj_type = 6;
2669 } else if (coex_dm->cur_ps_tdma == 2) {
2670 halbtc8723b2ant_ps_tdma(btcoexist,
2671 NORMAL_EXEC, true, 6);
2672 coex_dm->ps_tdma_du_adj_type = 6;
2673 } else if (coex_dm->cur_ps_tdma == 3) {
2674 halbtc8723b2ant_ps_tdma(btcoexist,
2675 NORMAL_EXEC, true, 7);
2676 coex_dm->ps_tdma_du_adj_type = 7;
2677 } else if (coex_dm->cur_ps_tdma == 4) {
2678 halbtc8723b2ant_ps_tdma(btcoexist,
2679 NORMAL_EXEC, true, 8);
2680 coex_dm->ps_tdma_du_adj_type = 8;
2681 }
2682 if (coex_dm->cur_ps_tdma == 9) {
2683 halbtc8723b2ant_ps_tdma(btcoexist,
2684 NORMAL_EXEC, true, 14);
2685 coex_dm->ps_tdma_du_adj_type = 14;
2686 } else if (coex_dm->cur_ps_tdma == 10) {
2687 halbtc8723b2ant_ps_tdma(btcoexist,
2688 NORMAL_EXEC, true, 14);
2689 coex_dm->ps_tdma_du_adj_type = 14;
2690 } else if (coex_dm->cur_ps_tdma == 11) {
2691 halbtc8723b2ant_ps_tdma(btcoexist,
2692 NORMAL_EXEC, true, 15);
2693 coex_dm->ps_tdma_du_adj_type = 15;
2694 } else if (coex_dm->cur_ps_tdma == 12) {
2695 halbtc8723b2ant_ps_tdma(btcoexist,
2696 NORMAL_EXEC, true, 16);
2697 coex_dm->ps_tdma_du_adj_type = 16;
2698 }
2699 if (result == -1) {
2700 if (coex_dm->cur_ps_tdma == 5) {
2701 halbtc8723b2ant_ps_tdma(
2702 btcoexist, NORMAL_EXEC,
2703 true, 6);
2704 coex_dm->ps_tdma_du_adj_type =
2705 6;
2706 } else if (coex_dm->cur_ps_tdma == 6) {
2707 halbtc8723b2ant_ps_tdma(
2708 btcoexist, NORMAL_EXEC,
2709 true, 7);
2710 coex_dm->ps_tdma_du_adj_type =
2711 7;
2712 } else if (coex_dm->cur_ps_tdma == 7) {
2713 halbtc8723b2ant_ps_tdma(
2714 btcoexist, NORMAL_EXEC,
2715 true, 8);
2716 coex_dm->ps_tdma_du_adj_type =
2717 8;
2718 } else if (coex_dm->cur_ps_tdma == 13) {
2719 halbtc8723b2ant_ps_tdma(
2720 btcoexist, NORMAL_EXEC,
2721 true, 14);
2722 coex_dm->ps_tdma_du_adj_type =
2723 14;
2724 } else if (coex_dm->cur_ps_tdma == 14) {
2725 halbtc8723b2ant_ps_tdma(
2726 btcoexist, NORMAL_EXEC,
2727 true, 15);
2728 coex_dm->ps_tdma_du_adj_type =
2729 15;
2730 } else if (coex_dm->cur_ps_tdma == 15) {
2731 halbtc8723b2ant_ps_tdma(
2732 btcoexist, NORMAL_EXEC,
2733 true, 16);
2734 coex_dm->ps_tdma_du_adj_type =
2735 16;
2736 }
2737 } else if (result == 1) {
2738 if (coex_dm->cur_ps_tdma == 8) {
2739 halbtc8723b2ant_ps_tdma(
2740 btcoexist, NORMAL_EXEC,
2741 true, 7);
2742 coex_dm->ps_tdma_du_adj_type =
2743 7;
2744 } else if (coex_dm->cur_ps_tdma == 7) {
2745 halbtc8723b2ant_ps_tdma(
2746 btcoexist, NORMAL_EXEC,
2747 true, 6);
2748 coex_dm->ps_tdma_du_adj_type =
2749 6;
2750 } else if (coex_dm->cur_ps_tdma == 6) {
2751 halbtc8723b2ant_ps_tdma(
2752 btcoexist, NORMAL_EXEC,
2753 true, 6);
2754 coex_dm->ps_tdma_du_adj_type =
2755 6;
2756 } else if (coex_dm->cur_ps_tdma == 16) {
2757 halbtc8723b2ant_ps_tdma(
2758 btcoexist, NORMAL_EXEC,
2759 true, 15);
2760 coex_dm->ps_tdma_du_adj_type =
2761 15;
2762 } else if (coex_dm->cur_ps_tdma == 15) {
2763 halbtc8723b2ant_ps_tdma(
2764 btcoexist, NORMAL_EXEC,
2765 true, 14);
2766 coex_dm->ps_tdma_du_adj_type =
2767 14;
2768 } else if (coex_dm->cur_ps_tdma == 14) {
2769 halbtc8723b2ant_ps_tdma(
2770 btcoexist, NORMAL_EXEC,
2771 true, 14);
2772 coex_dm->ps_tdma_du_adj_type =
2773 14;
2774 }
2775 }
2776 } else {
2777 if (coex_dm->cur_ps_tdma == 5) {
2778 halbtc8723b2ant_ps_tdma(btcoexist,
2779 NORMAL_EXEC, true, 2);
2780 coex_dm->ps_tdma_du_adj_type = 2;
2781 } else if (coex_dm->cur_ps_tdma == 6) {
2782 halbtc8723b2ant_ps_tdma(btcoexist,
2783 NORMAL_EXEC, true, 2);
2784 coex_dm->ps_tdma_du_adj_type = 2;
2785 } else if (coex_dm->cur_ps_tdma == 7) {
2786 halbtc8723b2ant_ps_tdma(btcoexist,
2787 NORMAL_EXEC, true, 3);
2788 coex_dm->ps_tdma_du_adj_type = 3;
2789 } else if (coex_dm->cur_ps_tdma == 8) {
2790 halbtc8723b2ant_ps_tdma(btcoexist,
2791 NORMAL_EXEC, true, 4);
2792 coex_dm->ps_tdma_du_adj_type = 4;
2793 }
2794 if (coex_dm->cur_ps_tdma == 13) {
2795 halbtc8723b2ant_ps_tdma(btcoexist,
2796 NORMAL_EXEC, true, 10);
2797 coex_dm->ps_tdma_du_adj_type = 10;
2798 } else if (coex_dm->cur_ps_tdma == 14) {
2799 halbtc8723b2ant_ps_tdma(btcoexist,
2800 NORMAL_EXEC, true, 10);
2801 coex_dm->ps_tdma_du_adj_type = 10;
2802 } else if (coex_dm->cur_ps_tdma == 15) {
2803 halbtc8723b2ant_ps_tdma(btcoexist,
2804 NORMAL_EXEC, true, 11);
2805 coex_dm->ps_tdma_du_adj_type = 11;
2806 } else if (coex_dm->cur_ps_tdma == 16) {
2807 halbtc8723b2ant_ps_tdma(btcoexist,
2808 NORMAL_EXEC, true, 12);
2809 coex_dm->ps_tdma_du_adj_type = 12;
2810 }
2811 if (result == -1) {
2812 if (coex_dm->cur_ps_tdma == 1) {
2813 halbtc8723b2ant_ps_tdma(
2814 btcoexist, NORMAL_EXEC,
2815 true, 2);
2816 coex_dm->ps_tdma_du_adj_type =
2817 2;
2818 } else if (coex_dm->cur_ps_tdma == 2) {
2819 halbtc8723b2ant_ps_tdma(
2820 btcoexist, NORMAL_EXEC,
2821 true, 3);
2822 coex_dm->ps_tdma_du_adj_type =
2823 3;
2824 } else if (coex_dm->cur_ps_tdma == 3) {
2825 halbtc8723b2ant_ps_tdma(
2826 btcoexist, NORMAL_EXEC,
2827 true, 4);
2828 coex_dm->ps_tdma_du_adj_type =
2829 4;
2830 } else if (coex_dm->cur_ps_tdma == 9) {
2831 halbtc8723b2ant_ps_tdma(
2832 btcoexist, NORMAL_EXEC,
2833 true, 10);
2834 coex_dm->ps_tdma_du_adj_type =
2835 10;
2836 } else if (coex_dm->cur_ps_tdma == 10) {
2837 halbtc8723b2ant_ps_tdma(
2838 btcoexist, NORMAL_EXEC,
2839 true, 11);
2840 coex_dm->ps_tdma_du_adj_type =
2841 11;
2842 } else if (coex_dm->cur_ps_tdma == 11) {
2843 halbtc8723b2ant_ps_tdma(
2844 btcoexist, NORMAL_EXEC,
2845 true, 12);
2846 coex_dm->ps_tdma_du_adj_type =
2847 12;
2848 }
2849 } else if (result == 1) {
2850 if (coex_dm->cur_ps_tdma == 4) {
2851 halbtc8723b2ant_ps_tdma(
2852 btcoexist, NORMAL_EXEC,
2853 true, 3);
2854 coex_dm->ps_tdma_du_adj_type =
2855 3;
2856 } else if (coex_dm->cur_ps_tdma == 3) {
2857 halbtc8723b2ant_ps_tdma(
2858 btcoexist, NORMAL_EXEC,
2859 true, 2);
2860 coex_dm->ps_tdma_du_adj_type =
2861 2;
2862 } else if (coex_dm->cur_ps_tdma == 2) {
2863 halbtc8723b2ant_ps_tdma(
2864 btcoexist, NORMAL_EXEC,
2865 true, 2);
2866 coex_dm->ps_tdma_du_adj_type =
2867 2;
2868 } else if (coex_dm->cur_ps_tdma == 12) {
2869 halbtc8723b2ant_ps_tdma(
2870 btcoexist, NORMAL_EXEC,
2871 true, 11);
2872 coex_dm->ps_tdma_du_adj_type =
2873 11;
2874 } else if (coex_dm->cur_ps_tdma == 11) {
2875 halbtc8723b2ant_ps_tdma(
2876 btcoexist, NORMAL_EXEC,
2877 true, 10);
2878 coex_dm->ps_tdma_du_adj_type =
2879 10;
2880 } else if (coex_dm->cur_ps_tdma == 10) {
2881 halbtc8723b2ant_ps_tdma(
2882 btcoexist, NORMAL_EXEC,
2883 true, 10);
2884 coex_dm->ps_tdma_du_adj_type =
2885 10;
2886 }
2887 }
2888 }
2889 } else if (max_interval == 3) {
2890 if (tx_pause) {
2891 if (coex_dm->cur_ps_tdma == 1) {
2892 halbtc8723b2ant_ps_tdma(btcoexist,
2893 NORMAL_EXEC, true, 7);
2894 coex_dm->ps_tdma_du_adj_type = 7;
2895 } else if (coex_dm->cur_ps_tdma == 2) {
2896 halbtc8723b2ant_ps_tdma(btcoexist,
2897 NORMAL_EXEC, true, 7);
2898 coex_dm->ps_tdma_du_adj_type = 7;
2899 } else if (coex_dm->cur_ps_tdma == 3) {
2900 halbtc8723b2ant_ps_tdma(btcoexist,
2901 NORMAL_EXEC, true, 7);
2902 coex_dm->ps_tdma_du_adj_type = 7;
2903 } else if (coex_dm->cur_ps_tdma == 4) {
2904 halbtc8723b2ant_ps_tdma(btcoexist,
2905 NORMAL_EXEC, true, 8);
2906 coex_dm->ps_tdma_du_adj_type = 8;
2907 }
2908 if (coex_dm->cur_ps_tdma == 9) {
2909 halbtc8723b2ant_ps_tdma(btcoexist,
2910 NORMAL_EXEC, true, 15);
2911 coex_dm->ps_tdma_du_adj_type = 15;
2912 } else if (coex_dm->cur_ps_tdma == 10) {
2913 halbtc8723b2ant_ps_tdma(btcoexist,
2914 NORMAL_EXEC, true, 15);
2915 coex_dm->ps_tdma_du_adj_type = 15;
2916 } else if (coex_dm->cur_ps_tdma == 11) {
2917 halbtc8723b2ant_ps_tdma(btcoexist,
2918 NORMAL_EXEC, true, 15);
2919 coex_dm->ps_tdma_du_adj_type = 15;
2920 } else if (coex_dm->cur_ps_tdma == 12) {
2921 halbtc8723b2ant_ps_tdma(btcoexist,
2922 NORMAL_EXEC, true, 16);
2923 coex_dm->ps_tdma_du_adj_type = 16;
2924 }
2925 if (result == -1) {
2926 if (coex_dm->cur_ps_tdma == 5) {
2927 halbtc8723b2ant_ps_tdma(
2928 btcoexist, NORMAL_EXEC,
2929 true, 7);
2930 coex_dm->ps_tdma_du_adj_type =
2931 7;
2932 } else if (coex_dm->cur_ps_tdma == 6) {
2933 halbtc8723b2ant_ps_tdma(
2934 btcoexist, NORMAL_EXEC,
2935 true, 7);
2936 coex_dm->ps_tdma_du_adj_type =
2937 7;
2938 } else if (coex_dm->cur_ps_tdma == 7) {
2939 halbtc8723b2ant_ps_tdma(
2940 btcoexist, NORMAL_EXEC,
2941 true, 8);
2942 coex_dm->ps_tdma_du_adj_type =
2943 8;
2944 } else if (coex_dm->cur_ps_tdma == 13) {
2945 halbtc8723b2ant_ps_tdma(
2946 btcoexist, NORMAL_EXEC,
2947 true, 15);
2948 coex_dm->ps_tdma_du_adj_type =
2949 15;
2950 } else if (coex_dm->cur_ps_tdma == 14) {
2951 halbtc8723b2ant_ps_tdma(
2952 btcoexist, NORMAL_EXEC,
2953 true, 15);
2954 coex_dm->ps_tdma_du_adj_type =
2955 15;
2956 } else if (coex_dm->cur_ps_tdma == 15) {
2957 halbtc8723b2ant_ps_tdma(
2958 btcoexist, NORMAL_EXEC,
2959 true, 16);
2960 coex_dm->ps_tdma_du_adj_type =
2961 16;
2962 }
2963 } else if (result == 1) {
2964 if (coex_dm->cur_ps_tdma == 8) {
2965 halbtc8723b2ant_ps_tdma(
2966 btcoexist, NORMAL_EXEC,
2967 true, 7);
2968 coex_dm->ps_tdma_du_adj_type =
2969 7;
2970 } else if (coex_dm->cur_ps_tdma == 7) {
2971 halbtc8723b2ant_ps_tdma(
2972 btcoexist, NORMAL_EXEC,
2973 true, 7);
2974 coex_dm->ps_tdma_du_adj_type =
2975 7;
2976 } else if (coex_dm->cur_ps_tdma == 6) {
2977 halbtc8723b2ant_ps_tdma(
2978 btcoexist, NORMAL_EXEC,
2979 true, 7);
2980 coex_dm->ps_tdma_du_adj_type =
2981 7;
2982 } else if (coex_dm->cur_ps_tdma == 16) {
2983 halbtc8723b2ant_ps_tdma(
2984 btcoexist, NORMAL_EXEC,
2985 true, 15);
2986 coex_dm->ps_tdma_du_adj_type =
2987 15;
2988 } else if (coex_dm->cur_ps_tdma == 15) {
2989 halbtc8723b2ant_ps_tdma(
2990 btcoexist, NORMAL_EXEC,
2991 true, 15);
2992 coex_dm->ps_tdma_du_adj_type =
2993 15;
2994 } else if (coex_dm->cur_ps_tdma == 14) {
2995 halbtc8723b2ant_ps_tdma(
2996 btcoexist, NORMAL_EXEC,
2997 true, 15);
2998 coex_dm->ps_tdma_du_adj_type =
2999 15;
3000 }
3001 }
3002 } else {
3003 if (coex_dm->cur_ps_tdma == 5) {
3004 halbtc8723b2ant_ps_tdma(btcoexist,
3005 NORMAL_EXEC, true, 3);
3006 coex_dm->ps_tdma_du_adj_type = 3;
3007 } else if (coex_dm->cur_ps_tdma == 6) {
3008 halbtc8723b2ant_ps_tdma(btcoexist,
3009 NORMAL_EXEC, true, 3);
3010 coex_dm->ps_tdma_du_adj_type = 3;
3011 } else if (coex_dm->cur_ps_tdma == 7) {
3012 halbtc8723b2ant_ps_tdma(btcoexist,
3013 NORMAL_EXEC, true, 3);
3014 coex_dm->ps_tdma_du_adj_type = 3;
3015 } else if (coex_dm->cur_ps_tdma == 8) {
3016 halbtc8723b2ant_ps_tdma(btcoexist,
3017 NORMAL_EXEC, true, 4);
3018 coex_dm->ps_tdma_du_adj_type = 4;
3019 }
3020 if (coex_dm->cur_ps_tdma == 13) {
3021 halbtc8723b2ant_ps_tdma(btcoexist,
3022 NORMAL_EXEC, true, 11);
3023 coex_dm->ps_tdma_du_adj_type = 11;
3024 } else if (coex_dm->cur_ps_tdma == 14) {
3025 halbtc8723b2ant_ps_tdma(btcoexist,
3026 NORMAL_EXEC, true, 11);
3027 coex_dm->ps_tdma_du_adj_type = 11;
3028 } else if (coex_dm->cur_ps_tdma == 15) {
3029 halbtc8723b2ant_ps_tdma(btcoexist,
3030 NORMAL_EXEC, true, 11);
3031 coex_dm->ps_tdma_du_adj_type = 11;
3032 } else if (coex_dm->cur_ps_tdma == 16) {
3033 halbtc8723b2ant_ps_tdma(btcoexist,
3034 NORMAL_EXEC, true, 12);
3035 coex_dm->ps_tdma_du_adj_type = 12;
3036 }
3037 if (result == -1) {
3038 if (coex_dm->cur_ps_tdma == 1) {
3039 halbtc8723b2ant_ps_tdma(
3040 btcoexist, NORMAL_EXEC,
3041 true, 3);
3042 coex_dm->ps_tdma_du_adj_type =
3043 3;
3044 } else if (coex_dm->cur_ps_tdma == 2) {
3045 halbtc8723b2ant_ps_tdma(
3046 btcoexist, NORMAL_EXEC,
3047 true, 3);
3048 coex_dm->ps_tdma_du_adj_type =
3049 3;
3050 } else if (coex_dm->cur_ps_tdma == 3) {
3051 halbtc8723b2ant_ps_tdma(
3052 btcoexist, NORMAL_EXEC,
3053 true, 4);
3054 coex_dm->ps_tdma_du_adj_type =
3055 4;
3056 } else if (coex_dm->cur_ps_tdma == 9) {
3057 halbtc8723b2ant_ps_tdma(
3058 btcoexist, NORMAL_EXEC,
3059 true, 11);
3060 coex_dm->ps_tdma_du_adj_type =
3061 11;
3062 } else if (coex_dm->cur_ps_tdma == 10) {
3063 halbtc8723b2ant_ps_tdma(
3064 btcoexist, NORMAL_EXEC,
3065 true, 11);
3066 coex_dm->ps_tdma_du_adj_type =
3067 11;
3068 } else if (coex_dm->cur_ps_tdma == 11) {
3069 halbtc8723b2ant_ps_tdma(
3070 btcoexist, NORMAL_EXEC,
3071 true, 12);
3072 coex_dm->ps_tdma_du_adj_type =
3073 12;
3074 }
3075 } else if (result == 1) {
3076 if (coex_dm->cur_ps_tdma == 4) {
3077 halbtc8723b2ant_ps_tdma(
3078 btcoexist, NORMAL_EXEC,
3079 true, 3);
3080 coex_dm->ps_tdma_du_adj_type =
3081 3;
3082 } else if (coex_dm->cur_ps_tdma == 3) {
3083 halbtc8723b2ant_ps_tdma(
3084 btcoexist, NORMAL_EXEC,
3085 true, 3);
3086 coex_dm->ps_tdma_du_adj_type =
3087 3;
3088 } else if (coex_dm->cur_ps_tdma == 2) {
3089 halbtc8723b2ant_ps_tdma(
3090 btcoexist, NORMAL_EXEC,
3091 true, 3);
3092 coex_dm->ps_tdma_du_adj_type =
3093 3;
3094 } else if (coex_dm->cur_ps_tdma == 12) {
3095 halbtc8723b2ant_ps_tdma(
3096 btcoexist, NORMAL_EXEC,
3097 true, 11);
3098 coex_dm->ps_tdma_du_adj_type =
3099 11;
3100 } else if (coex_dm->cur_ps_tdma == 11) {
3101 halbtc8723b2ant_ps_tdma(
3102 btcoexist, NORMAL_EXEC,
3103 true, 11);
3104 coex_dm->ps_tdma_du_adj_type =
3105 11;
3106 } else if (coex_dm->cur_ps_tdma == 10) {
3107 halbtc8723b2ant_ps_tdma(
3108 btcoexist, NORMAL_EXEC,
3109 true, 11);
3110 coex_dm->ps_tdma_du_adj_type =
3111 11;
3112 }
3113 }
3114 }
3115 }
3116 }
3117
3118 /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
3119 /* then we have to adjust it back to the previous record one. */
3120 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
3121 boolean scan = false, link = false, roam = false;
3122
3123 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3124 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
3125 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
3126 BTC_TRACE(trace_buf);
3127
3128 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3129 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3130 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3131
3132 if (!scan && !link && !roam)
3133 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3134 coex_dm->ps_tdma_du_adj_type);
3135 else {
3136 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3137 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
3138 BTC_TRACE(trace_buf);
3139 }
3140 }
3141 }
3142
3143 /* SCO only or SCO+PAN(HS) */
3144 static
halbtc8723b2ant_action_sco(IN struct btc_coexist * btcoexist)3145 void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist)
3146 {
3147 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
3148 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3149 u8 wifi_rssi_state, bt_rssi_state;
3150 u32 wifi_bw;
3151
3152 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3153 &prewifi_rssi_state, 2, 15, 0);
3154 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3155 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3156 coex_dm->switch_thres_offset, 0);
3157
3158 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3159
3160 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3161
3162 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
3163
3164 if (BTC_RSSI_HIGH(bt_rssi_state))
3165 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3166 else
3167 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3168
3169 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3170
3171 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */
3172 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3173 else /* for SCO quality & wifi performance balance at 11n mode */
3174 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3175
3176 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
3177 0); /* for voice quality */
3178
3179 /* sw mechanism */
3180 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3181 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3182 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3183 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3184 false, false);
3185 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3186 true, 0x4);
3187 } else {
3188 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3189 false, false);
3190 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3191 true, 0x4);
3192 }
3193 } else {
3194 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3195 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3196 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3197 false, false);
3198 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3199 true, 0x4);
3200 } else {
3201 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3202 false, false);
3203 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3204 true, 0x4);
3205 }
3206 }
3207 }
3208
3209 static
halbtc8723b2ant_action_hid(IN struct btc_coexist * btcoexist)3210 void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist)
3211 {
3212 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
3213 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3214 u8 wifi_rssi_state, bt_rssi_state;
3215 u32 wifi_bw;
3216
3217 btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
3218
3219 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3220 &prewifi_rssi_state, 2, 15, 0);
3221 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3222 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3223 coex_dm->switch_thres_offset, 0);
3224
3225 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3226
3227 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3228
3229 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3230
3231 if (BTC_RSSI_HIGH(bt_rssi_state))
3232 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3233 else
3234 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3235
3236 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3237
3238 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
3239 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3240 else /* for HID quality & wifi performance balance at 11n mode */
3241 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
3242
3243 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3244 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3245 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
3246 else
3247 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
3248
3249 /* sw mechanism */
3250 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3251 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3252 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3253 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3254 false, false);
3255 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3256 false, 0x18);
3257 } else {
3258 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3259 false, false);
3260 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3261 false, 0x18);
3262 }
3263 } else {
3264 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3265 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3266 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3267 false, false);
3268 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3269 false, 0x18);
3270 } else {
3271 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3272 false, false);
3273 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3274 false, 0x18);
3275 }
3276 }
3277 }
3278
3279 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
3280 static
halbtc8723b2ant_action_a2dp(IN struct btc_coexist * btcoexist)3281 void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
3282 {
3283 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3284 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3285 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3286 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3287 u32 wifi_bw;
3288 u8 ap_num = 0;
3289
3290 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3291 &prewifi_rssi_state, 2, 15, 0);
3292 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3293 &prewifi_rssi_state1, 2,
3294 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3295 coex_dm->switch_thres_offset, 0);
3296 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3297 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3298 coex_dm->switch_thres_offset, 0);
3299
3300 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
3301
3302 #if 0
3303 /* define the office environment */
3304 if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) &&
3305 BTC_RSSI_HIGH(bt_rssi_state)) {
3306 /* dbg_print(" AP#>10(%d)\n", ap_num); */
3307
3308 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
3309 0x0);
3310 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
3311 0x8);
3312 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3313 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3314
3315 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3316
3317 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3318
3319 /* sw mechanism */
3320 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3321 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3322 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3323 false, false);
3324 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3325 true, 0x18);
3326 } else {
3327 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3328 false, false);
3329 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3330 true, 0x18);
3331 }
3332 return;
3333
3334 }
3335 #endif
3336
3337 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3338 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3339
3340 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3341
3342 if (BTC_RSSI_HIGH(bt_rssi_state)) {
3343 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3344 } else {
3345 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3346 }
3347
3348 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 16);
3349
3350 if (coex_sta->connect_ap_period_cnt > 0)
3351 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 31);
3352 else
3353 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
3354
3355 #if 0
3356 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3357 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3358
3359 } else {
3360 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3361 13);
3362 }
3363
3364
3365 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3366 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3367 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, false,
3368 1);
3369 else
3370 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1);
3371 #endif
3372
3373 /* sw mechanism */
3374 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3375 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3376 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3377 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3378 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3379 false, false);
3380 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3381 false, 0x18);
3382 } else {
3383 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3384 false, false);
3385 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3386 false, 0x18);
3387 }
3388 } else {
3389 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3390 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3391 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3392 false, false);
3393 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3394 false, 0x18);
3395 } else {
3396 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3397 false, false);
3398 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3399 false, 0x18);
3400 }
3401 }
3402 }
3403
3404 static
halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist * btcoexist)3405 void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
3406 {
3407 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3408 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3409 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3410 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3411 u32 wifi_bw;
3412
3413 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3414 &prewifi_rssi_state, 2, 15, 0);
3415 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3416 &prewifi_rssi_state1, 2,
3417 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3418 coex_dm->switch_thres_offset, 0);
3419 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3420 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3421 coex_dm->switch_thres_offset, 0);
3422
3423 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3424
3425 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3426
3427 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3428
3429 if (BTC_RSSI_HIGH(bt_rssi_state))
3430 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3431 else
3432 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3433
3434 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3435 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3436
3437 } else {
3438 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3439 13);
3440 }
3441
3442 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
3443
3444 /* sw mechanism */
3445 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3446 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3447 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3448 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3449 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3450 false, false);
3451 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3452 false, 0x18);
3453 } else {
3454 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3455 false, false);
3456 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3457 false, 0x18);
3458 }
3459 } else {
3460 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3461 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3462 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3463 false, false);
3464 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3465 false, 0x18);
3466 } else {
3467 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3468 false, false);
3469 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3470 false, 0x18);
3471 }
3472 }
3473 }
3474
3475 static
halbtc8723b2ant_action_pan_edr(IN struct btc_coexist * btcoexist)3476 void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
3477 {
3478 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3479 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3480 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3481 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3482 u32 wifi_bw;
3483
3484 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3485 &prewifi_rssi_state, 2, 15, 0);
3486 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3487 &prewifi_rssi_state1, 2,
3488 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3489 coex_dm->switch_thres_offset, 0);
3490 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3491 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3492 coex_dm->switch_thres_offset, 0);
3493
3494 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3495
3496 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3497
3498 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3499
3500 if (BTC_RSSI_HIGH(bt_rssi_state))
3501 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3502 else
3503 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3504
3505 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3506 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3507 10);
3508 } else {
3509 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3510 13);
3511 }
3512
3513 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3514 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3515 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3516 else
3517 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
3518
3519 /* sw mechanism */
3520 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3521 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3522 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3523 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3524 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3525 false, false);
3526 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3527 false, 0x18);
3528 } else {
3529 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3530 false, false);
3531 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3532 false, 0x18);
3533 }
3534 } else {
3535 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3536 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3537 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3538 false, false);
3539 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3540 false, 0x18);
3541 } else {
3542 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3543 false, false);
3544 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3545 false, 0x18);
3546 }
3547 }
3548 }
3549
3550
3551 /* PAN(HS) only */
3552 static
halbtc8723b2ant_action_pan_hs(IN struct btc_coexist * btcoexist)3553 void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
3554 {
3555 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3556 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3557 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3558 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3559 u32 wifi_bw;
3560
3561 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3562 &prewifi_rssi_state, 2, 15, 0);
3563 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3564 &prewifi_rssi_state1, 2,
3565 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3566 coex_dm->switch_thres_offset, 0);
3567 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3568 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3569 coex_dm->switch_thres_offset, 0);
3570
3571 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3572
3573 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3574
3575 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3576
3577 if (BTC_RSSI_HIGH(bt_rssi_state))
3578 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3579 else
3580 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3581
3582 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3583
3584 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3585
3586 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3587 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3588 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3589 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3590 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3591 false, false);
3592 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3593 false, 0x18);
3594 } else {
3595 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3596 false, false);
3597 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3598 false, 0x18);
3599 }
3600 } else {
3601 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3602 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3603 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3604 false, false);
3605 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3606 false, 0x18);
3607 } else {
3608 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3609 false, false);
3610 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3611 false, 0x18);
3612 }
3613 }
3614 }
3615
3616 /* PAN(EDR)+A2DP */
3617 static
halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist * btcoexist)3618 void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
3619 {
3620 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3621 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3622 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3623 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3624 u8 ap_num = 0;
3625 u32 wifi_bw;
3626 boolean wifi_busy = false;
3627
3628 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3629
3630 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3631 &prewifi_rssi_state, 2, 15, 0);
3632 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3633 &prewifi_rssi_state1, 2,
3634 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3635 coex_dm->switch_thres_offset, 0);
3636 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3637 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3638 coex_dm->switch_thres_offset, 0);
3639
3640 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3641
3642 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3643
3644 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3645
3646 if (BTC_RSSI_HIGH(bt_rssi_state))
3647 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3648 else
3649 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3650
3651 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3652 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
3653 &ap_num);
3654
3655 #if 0
3656 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3657 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3658 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3659 12);
3660
3661 if (ap_num < 10)
3662 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3663 false, 1);
3664 else
3665 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3666 false, 3);
3667
3668 } else {
3669 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3670 13);
3671 if (ap_num < 10)
3672 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3673 true, 1);
3674 else
3675 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3676 true, 3);
3677 }
3678 #endif
3679
3680 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 17);
3681
3682 if (wifi_busy)
3683 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 35);
3684 else
3685 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 36);
3686
3687 /* sw mechanism */
3688 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3689 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3690 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3691 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3692 false, false);
3693 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3694 false, 0x18);
3695 } else {
3696 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3697 false, false);
3698 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3699 false, 0x18);
3700 }
3701 } else {
3702 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3703 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3704 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3705 false, false);
3706 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3707 false, 0x18);
3708 } else {
3709 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3710 false, false);
3711 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3712 false, 0x18);
3713 }
3714 }
3715 }
3716
3717 static
halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist * btcoexist)3718 void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3719 {
3720 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3721 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3722 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3723 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3724 u32 wifi_bw;
3725
3726 btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
3727
3728 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3729 &prewifi_rssi_state, 2, 15, 0);
3730 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3731 &prewifi_rssi_state1, 2,
3732 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3733 coex_dm->switch_thres_offset, 0);
3734 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3735 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3736 coex_dm->switch_thres_offset, 0);
3737 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3738
3739 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3740
3741 if (BTC_RSSI_HIGH(bt_rssi_state))
3742 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3743 else
3744 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3745
3746 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3747 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3748 } else {
3749 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3750 14);
3751 }
3752
3753 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3754 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3755 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3756 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
3757 3);
3758 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */
3759 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
3760 0xfffff, 0x780);
3761 } else {
3762 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
3763 6);
3764 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */
3765 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
3766 0xfffff, 0x0);
3767 }
3768 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3769 } else {
3770 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3771 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */
3772 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
3773 0x0);
3774 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3775 }
3776
3777 /* sw mechanism */
3778 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3779 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3780 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3781 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3782 false, false);
3783 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3784 false, 0x18);
3785 } else {
3786 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3787 false, false);
3788 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3789 false, 0x18);
3790 }
3791 } else {
3792 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3793 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3794 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3795 false, false);
3796 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3797 false, 0x18);
3798 } else {
3799 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3800 false, false);
3801 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3802 false, 0x18);
3803 }
3804 }
3805 }
3806
3807 /* HID+A2DP+PAN(EDR) */
3808 static
halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist * btcoexist)3809 void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3810 {
3811 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3812 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3813 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3814 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3815 u32 wifi_bw;
3816
3817 btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
3818
3819 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3820 &prewifi_rssi_state, 2, 15, 0);
3821 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3822 &prewifi_rssi_state1, 2,
3823 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3824 coex_dm->switch_thres_offset, 0);
3825 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3826 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3827 coex_dm->switch_thres_offset, 0);
3828
3829 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3830
3831 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3832
3833 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3834
3835 if (BTC_RSSI_HIGH(bt_rssi_state))
3836 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3837 else
3838 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3839
3840 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3841 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3842 } else {
3843 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3844 14);
3845 }
3846
3847 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3848
3849 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3850 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3851 if (BTC_WIFI_BW_HT40 == wifi_bw)
3852 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3853 true, 3);
3854 else
3855 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3856 false, 3);
3857 } else
3858 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3859
3860 /* sw mechanism */
3861 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3862 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3863 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3864 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3865 false, false);
3866 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3867 false, 0x18);
3868 } else {
3869 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3870 false, false);
3871 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3872 false, 0x18);
3873 }
3874 } else {
3875 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3876 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3877 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3878 false, false);
3879 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3880 false, 0x18);
3881 } else {
3882 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3883 false, false);
3884 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3885 false, 0x18);
3886 }
3887 }
3888 }
3889
3890 static
halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist * btcoexist)3891 void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3892 {
3893 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3894 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3895 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3896 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3897 u32 wifi_bw;
3898 u8 ap_num = 0;
3899
3900 btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 35);
3901
3902
3903 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3904 &prewifi_rssi_state, 2, 15, 0);
3905 /* bt_rssi_state = halbtc8723b2ant_bt_rssi_state(2, 29, 0); */
3906 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3907 &prewifi_rssi_state1, 2,
3908 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3909 coex_dm->switch_thres_offset, 0);
3910 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 3,
3911 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3912 coex_dm->switch_thres_offset, 37);
3913
3914 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
3915 &ap_num);
3916
3917 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3918
3919 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5);
3920
3921 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3922
3923 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3924 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
3925 if (BTC_RSSI_HIGH(bt_rssi_state))
3926 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3927 else if (BTC_RSSI_MEDIUM(bt_rssi_state))
3928 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3929 else
3930 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3931 } else {
3932 /* only 802.11N mode we have to dec bt power to 4 degree */
3933 if (BTC_RSSI_HIGH(bt_rssi_state)) {
3934 /* need to check ap Number of Not */
3935 if (ap_num < 10)
3936 halbtc8723b2ant_dec_bt_pwr(btcoexist,
3937 NORMAL_EXEC, 4);
3938 else
3939 halbtc8723b2ant_dec_bt_pwr(btcoexist,
3940 NORMAL_EXEC, 2);
3941 } else if (BTC_RSSI_MEDIUM(bt_rssi_state))
3942 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3943 else
3944 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3945 }
3946
3947 #if 1
3948 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3949 16);
3950 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
3951 #endif
3952 #if 0
3953 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3954 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3955 } else {
3956 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3957 14);
3958 }
3959
3960 if (BTC_RSSI_HIGH(bt_rssi_state)) {
3961 if (ap_num < 10)
3962 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3963 false, 2);
3964
3965 else
3966 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3967 false, 3);
3968 } else {
3969 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 18);
3970 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
3971 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
3972 btcoexist->btc_write_4byte(btcoexist, 0x430, 0x0);
3973 btcoexist->btc_write_4byte(btcoexist, 0x434, 0x01010000);
3974
3975 if (ap_num < 10)
3976 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3977 true, 2);
3978
3979 else
3980 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3981 true, 3);
3982 }
3983 #endif
3984 /* sw mechanism */
3985 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3986 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3987 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3988 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3989 false, false);
3990 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3991 false, 0x18);
3992 } else {
3993 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3994 false, false);
3995 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3996 false, 0x18);
3997 }
3998 } else {
3999 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
4000 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
4001 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
4002 false, false);
4003 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
4004 false, 0x18);
4005 } else {
4006 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
4007 false, false);
4008 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
4009 false, 0x18);
4010 }
4011 }
4012 }
4013
4014 static
halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist * btcoexist)4015 void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
4016 {
4017 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
4018
4019 /* sw all off */
4020 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
4021 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
4022
4023 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
4024 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
4025 }
4026
4027 static
halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist * btcoexist)4028 void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
4029 {
4030 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
4031 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
4032
4033 /* sw all off */
4034 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
4035 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
4036
4037 /* hw all off */
4038 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
4039 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
4040
4041 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
4042 }
4043
4044 static
halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist * btcoexist)4045 void halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
4046 {
4047 u8 algorithm = 0;
4048 u32 num_of_wifi_link = 0;
4049 u32 wifi_link_status = 0;
4050 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
4051 boolean miracast_plus_bt = false;
4052 boolean scan = false, link = false, roam = false;
4053
4054 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4055 "[BTCoex], RunCoexistMechanism()===>\n");
4056 BTC_TRACE(trace_buf);
4057
4058 if (btcoexist->manual_control) {
4059 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4060 "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
4061 BTC_TRACE(trace_buf);
4062 return;
4063 }
4064
4065 if (coex_sta->under_ips) {
4066 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4067 "[BTCoex], wifi is under IPS !!!\n");
4068 BTC_TRACE(trace_buf);
4069 return;
4070 }
4071
4072 if (coex_sta->bt_whck_test) {
4073 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4074 "[BTCoex], BT is under WHCK TEST!!!\n");
4075 BTC_TRACE(trace_buf);
4076 halbtc8723b2ant_action_bt_whck_test(btcoexist);
4077 return;
4078 }
4079
4080 algorithm = halbtc8723b2ant_action_algorithm(btcoexist);
4081 if (coex_sta->c2h_bt_inquiry_page &&
4082 (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
4083 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4084 "[BTCoex], BT is under inquiry/page scan !!\n");
4085 BTC_TRACE(trace_buf);
4086 halbtc8723b2ant_action_bt_inquiry(btcoexist);
4087 return;
4088 }
4089
4090 /*
4091 if(coex_dm->need_recover0x948)
4092 {
4093 coex_dm->need_recover0x948 = false;
4094 btcoexist->btc_write_4byte(btcoexist, 0x948, coex_dm->backup0x948);
4095 }
4096 */
4097
4098 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
4099 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
4100 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
4101
4102 if (scan || link || roam) {
4103 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4104 "[BTCoex], WiFi is under Link Process !!\n");
4105 BTC_TRACE(trace_buf);
4106 halbtc8723b2ant_action_wifi_link_process(btcoexist);
4107 return;
4108 }
4109
4110 /* for P2P */
4111
4112 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
4113 &wifi_link_status);
4114 num_of_wifi_link = wifi_link_status >> 16;
4115
4116 if ((num_of_wifi_link >= 2) ||
4117 (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
4118 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4119 "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
4120 num_of_wifi_link, wifi_link_status);
4121 BTC_TRACE(trace_buf);
4122
4123 if (bt_link_info->bt_link_exist)
4124 miracast_plus_bt = true;
4125 else
4126 miracast_plus_bt = false;
4127
4128 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
4129 &miracast_plus_bt);
4130 halbtc8723b2ant_action_wifi_multi_port(btcoexist);
4131
4132 return;
4133 }
4134
4135 miracast_plus_bt = false;
4136 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
4137 &miracast_plus_bt);
4138
4139 coex_dm->cur_algorithm = algorithm;
4140 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
4141 coex_dm->cur_algorithm);
4142 BTC_TRACE(trace_buf);
4143
4144 if (halbtc8723b2ant_is_common_action(btcoexist)) {
4145 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4146 "[BTCoex], Action 2-Ant common.\n");
4147 BTC_TRACE(trace_buf);
4148 coex_dm->auto_tdma_adjust = false;
4149 } else {
4150 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
4151 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4152 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
4153 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
4154 BTC_TRACE(trace_buf);
4155 coex_dm->auto_tdma_adjust = false;
4156 }
4157 switch (coex_dm->cur_algorithm) {
4158 case BT_8723B_2ANT_COEX_ALGO_SCO:
4159 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4160 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
4161 BTC_TRACE(trace_buf);
4162 halbtc8723b2ant_action_sco(btcoexist);
4163 break;
4164 case BT_8723B_2ANT_COEX_ALGO_HID:
4165 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4166 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
4167 BTC_TRACE(trace_buf);
4168 halbtc8723b2ant_action_hid(btcoexist);
4169 break;
4170 case BT_8723B_2ANT_COEX_ALGO_A2DP:
4171 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4172 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
4173 BTC_TRACE(trace_buf);
4174 halbtc8723b2ant_action_a2dp(btcoexist);
4175 break;
4176 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
4177 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4178 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
4179 BTC_TRACE(trace_buf);
4180 halbtc8723b2ant_action_a2dp_pan_hs(btcoexist);
4181 break;
4182 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
4183 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4184 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
4185 BTC_TRACE(trace_buf);
4186 halbtc8723b2ant_action_pan_edr(btcoexist);
4187 break;
4188 case BT_8723B_2ANT_COEX_ALGO_PANHS:
4189 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4190 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
4191 BTC_TRACE(trace_buf);
4192 halbtc8723b2ant_action_pan_hs(btcoexist);
4193 break;
4194 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
4195 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4196 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
4197 BTC_TRACE(trace_buf);
4198 halbtc8723b2ant_action_pan_edr_a2dp(btcoexist);
4199 break;
4200 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
4201 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4202 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
4203 BTC_TRACE(trace_buf);
4204 halbtc8723b2ant_action_pan_edr_hid(btcoexist);
4205 break;
4206 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
4207 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4208 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
4209 BTC_TRACE(trace_buf);
4210 halbtc8723b2ant_action_hid_a2dp_pan_edr(
4211 btcoexist);
4212 break;
4213 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
4214 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4215 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
4216 BTC_TRACE(trace_buf);
4217 halbtc8723b2ant_action_hid_a2dp(btcoexist);
4218 break;
4219 default:
4220 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4221 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
4222 BTC_TRACE(trace_buf);
4223 halbtc8723b2ant_coex_all_off(btcoexist);
4224 break;
4225 }
4226 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
4227 }
4228 }
4229
4230 static
halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist * btcoexist)4231 void halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist)
4232 {
4233 boolean is_in_mp_mode = false;
4234 u8 h2c_parameter[2] = {0};
4235 u32 fw_ver = 0;
4236
4237 /* set wlan_act to low */
4238 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
4239
4240 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
4241 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
4242 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4243 if (fw_ver >= 0x180000) {
4244 /* Use H2C to set GNT_BT to HIGH */
4245 h2c_parameter[0] = 1;
4246 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter);
4247 } else
4248 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
4249
4250 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE,
4251 &is_in_mp_mode);
4252 if (!is_in_mp_mode)
4253 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
4254 0x0); /* BT select s0/s1 is controlled by BT */
4255 else
4256 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
4257 0x1); /* BT select s0/s1 is controlled by WiFi */
4258 }
4259
4260 static
halbtc8723b2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean back_up)4261 void halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
4262 IN boolean back_up)
4263 {
4264 u8 u8tmp = 0;
4265 u32 vendor;
4266
4267
4268 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4269 "[BTCoex], 2Ant Init HW Config!!\n");
4270 BTC_TRACE(trace_buf);
4271 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
4272 if (vendor == BTC_VENDOR_LENOVO)
4273 coex_dm->switch_thres_offset = 0;
4274 else if (vendor == BTC_VENDOR_ASUS)
4275 coex_dm->switch_thres_offset = 0;
4276 else
4277 coex_dm->switch_thres_offset = 20;
4278
4279 /* 0xf0[15:12] --> Chip Cut information */
4280 coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
4281 0xf1) & 0xf0) >> 4;
4282
4283 /* backup rf 0x1e value */
4284 coex_dm->bt_rf_0x1e_backup =
4285 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff);
4286
4287 /* 0x790[5:0]=0x5 */
4288 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
4289 u8tmp &= 0xc0;
4290 u8tmp |= 0x5;
4291 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
4292
4293 /* Antenna config */
4294 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
4295 false);
4296 coex_sta->dis_ver_info_cnt = 0;
4297
4298 /* PTA parameter */
4299 halbtc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
4300
4301 /* Enable counter statistics */
4302 btcoexist->btc_write_1byte(btcoexist, 0x76e,
4303 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
4304 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
4305 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
4306
4307 /* Give bt_coex_supported_version the default value */
4308 coex_sta->bt_coex_supported_version = 0;
4309
4310 }
4311
4312 /* ************************************************************
4313 * work around function start with wa_halbtc8723b2ant_
4314 * ************************************************************
4315 * ************************************************************
4316 * extern function start with ex_halbtc8723b2ant_
4317 * ************************************************************ */
ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist * btcoexist)4318 void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
4319 {
4320 struct btc_board_info *board_info = &btcoexist->board_info;
4321 u16 u16tmp = 0x0;
4322 u32 value = 0;
4323 u32 u32tmp_1[4];
4324
4325 btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20);
4326
4327 /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
4328 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
4329 btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
4330
4331 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
4332
4333 if (btcoexist->chip_interface == BTC_INTF_USB) {
4334 /* fixed at S0 for USB interface */
4335 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
4336 } else {
4337 /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
4338 if (board_info->single_ant_path == 0) {
4339 /* set to S1 */
4340 board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
4341 } else if (board_info->single_ant_path == 1) {
4342 /* set to S0 */
4343 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
4344 }
4345 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
4346 &value);
4347 }
4348 }
4349
ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist * btcoexist)4350 void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
4351 {
4352 struct btc_board_info *board_info = &btcoexist->board_info;
4353 u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
4354
4355 /* */
4356 /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
4357 /* Local setting bit define */
4358 /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
4359 /* BIT1: "0" for internal switch; "1" for external switch */
4360 /* BIT2: "0" for one antenna; "1" for two antenna */
4361 /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
4362 if (btcoexist->chip_interface == BTC_INTF_USB) {
4363 /* fixed at S0 for USB interface */
4364 u8tmp |= 0x1; /* antenna inverse */
4365 btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
4366 } else {
4367 if (board_info->single_ant_path == 1) {
4368 /* set to S0 */
4369 u8tmp |= 0x1; /* antenna inverse */
4370 }
4371
4372 if (btcoexist->chip_interface == BTC_INTF_PCI)
4373 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384,
4374 u8tmp);
4375 else if (btcoexist->chip_interface == BTC_INTF_SDIO)
4376 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
4377 u8tmp);
4378 }
4379 }
4380
ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)4381 void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
4382 IN boolean wifi_only)
4383 {
4384 halbtc8723b2ant_init_hw_config(btcoexist, true);
4385 }
4386
ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist * btcoexist)4387 void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
4388 {
4389 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4390 "[BTCoex], Coex Mechanism Init!!\n");
4391 BTC_TRACE(trace_buf);
4392
4393 halbtc8723b2ant_init_coex_dm(btcoexist);
4394 }
4395
ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist * btcoexist)4396 void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
4397 {
4398 struct btc_board_info *board_info = &btcoexist->board_info;
4399 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
4400 u8 *cli_buf = btcoexist->cli_buf;
4401 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
4402 u32 u32tmp[4];
4403 u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck;
4404 u32 fw_ver = 0, bt_patch_ver = 0;
4405 u32 bt_coex_ver = 0;
4406 static u8 pop_report_in_10s = 0;
4407 u32 phyver = 0;
4408
4409 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4410 "\r\n ============[BT Coexist info 8723B]============");
4411 CL_PRINTF(cli_buf);
4412
4413 if (btcoexist->manual_control) {
4414 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4415 "\r\n ============[Under Manual Control]============");
4416 CL_PRINTF(cli_buf);
4417 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4418 "\r\n ==========================================");
4419 CL_PRINTF(cli_buf);
4420 }
4421
4422 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
4423 btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
4424
4425 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s/ %s",
4426 "Ant PG Num/ Mech/ Pos",
4427 board_info->pg_ant_num,
4428 (board_info->btdm_ant_num == 1 ? "Shared" : "Non-Shared"),
4429 (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
4430 CL_PRINTF(cli_buf);
4431
4432 /* btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); */
4433 bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
4434 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4435 phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
4436 bt_coex_ver = coex_sta->bt_coex_supported_version & 0xff;
4437
4438 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4439 "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
4440 "CoexVer WL/ BT_Desired/ BT_Report",
4441 glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant,
4442 glcoex_ver_btdesired_8723b_2ant,
4443 bt_coex_ver,
4444 (bt_coex_ver == 0xff ? "Unknown" :
4445 (bt_coex_ver >= glcoex_ver_btdesired_8723b_2ant ?
4446 "Match" : "Mis-Match")));
4447 CL_PRINTF(cli_buf);
4448
4449 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4450 "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
4451 "W_FW/ B_FW/ Phy/ Kt",
4452 fw_ver, bt_patch_ver, phyver,
4453 coex_sta->cut_version + 65);
4454 CL_PRINTF(cli_buf);
4455
4456 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
4457 "Wifi channel informed to BT",
4458 coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
4459 coex_dm->wifi_chnl_info[2]);
4460 CL_PRINTF(cli_buf);
4461
4462 /* wifi status */
4463 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4464 "============[Wifi Status]============");
4465 CL_PRINTF(cli_buf);
4466 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
4467
4468 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4469 "============[BT Status]============");
4470 CL_PRINTF(cli_buf);
4471
4472 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
4473 "BT Abnormal scan",
4474 (coex_sta->bt_abnormal_scan) ? "Yes" : "No");
4475 CL_PRINTF(cli_buf);
4476
4477 pop_report_in_10s++;
4478 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
4479 "BT [status/ rssi/ retryCnt/ popCnt]",
4480 ((coex_sta->bt_disabled) ? ("disabled") : ((
4481 coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
4482 : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
4483 coex_dm->bt_status) ? "non-connected idle" :
4484 ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
4485 ? "connected-idle" : "busy")))),
4486 coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
4487 coex_sta->pop_event_cnt);
4488 CL_PRINTF(cli_buf);
4489
4490 if (pop_report_in_10s >= 5) {
4491 coex_sta->pop_event_cnt = 0;
4492 pop_report_in_10s = 0;
4493 }
4494
4495
4496 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4497 "\r\n %-35s = %d / %d / %d / %d / %d / %d",
4498 "SCO/HID/PAN/A2DP/NameReq/WHQL",
4499 bt_link_info->sco_exist, bt_link_info->hid_exist,
4500 bt_link_info->pan_exist, bt_link_info->a2dp_exist,
4501 coex_sta->c2h_bt_remote_name_req,
4502 coex_sta->bt_whck_test);
4503 CL_PRINTF(cli_buf);
4504
4505
4506 if (bt_link_info->hid_exist) {
4507 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "HID ratio info",
4508 (coex_sta->hid_busy_num >= 2) ? "HID(4/18)" : "HID(2/18)");
4509 CL_PRINTF(cli_buf);
4510 }
4511 {
4512 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
4513 "BT Role",
4514 (bt_link_info->slave_role) ? "Slave" : "Master");
4515 CL_PRINTF(cli_buf);
4516 }
4517
4518 bt_info_ext = coex_sta->bt_info_ext;
4519 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
4520 "A2DP Rate/Bitpool",
4521 (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
4522 CL_PRINTF(cli_buf);
4523
4524 for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
4525 if (coex_sta->bt_info_c2h_cnt[i]) {
4526 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4527 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
4528 glbt_info_src_8723b_2ant[i],
4529 coex_sta->bt_info_c2h[i][0],
4530 coex_sta->bt_info_c2h[i][1],
4531 coex_sta->bt_info_c2h[i][2],
4532 coex_sta->bt_info_c2h[i][3],
4533 coex_sta->bt_info_c2h[i][4],
4534 coex_sta->bt_info_c2h[i][5],
4535 coex_sta->bt_info_c2h[i][6],
4536 coex_sta->bt_info_c2h_cnt[i]);
4537 CL_PRINTF(cli_buf);
4538 }
4539 }
4540
4541 /* Sw mechanism */
4542 if (btcoexist->manual_control)
4543 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4544 "============[Sw mechanism] (before Manual)============");
4545 else
4546 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4547 "============[Sw mechanism]============");
4548
4549 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
4550 "SM1[ShRf/ LpRA/ LimDig]",
4551 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
4552 coex_dm->limited_dig);
4553 CL_PRINTF(cli_buf);
4554 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
4555 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
4556 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
4557 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
4558 CL_PRINTF(cli_buf);
4559
4560 /* Fw mechanism */
4561 if (btcoexist->manual_control)
4562 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4563 "============[Fw mechanism] (before Manual) ============");
4564 else
4565 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4566 "============[Fw mechanism]============");
4567
4568 ps_tdma_case = coex_dm->cur_ps_tdma;
4569
4570 if (coex_dm->is_switch_to_1dot5_ant)
4571 ps_tdma_case = ps_tdma_case + 100;
4572
4573 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4574 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
4575 "PS TDMA",
4576 coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
4577 coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
4578 coex_dm->ps_tdma_para[4], ps_tdma_case,
4579 (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
4580 (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
4581 CL_PRINTF(cli_buf);
4582
4583 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
4584 "Coex Table Type",
4585 coex_sta->coex_table_type);
4586 CL_PRINTF(cli_buf);
4587
4588 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
4589 "DecBtPwr/ IgnWlanAct",
4590 coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
4591 CL_PRINTF(cli_buf);
4592
4593 /* Hw setting */
4594 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4595 "============[Hw setting]============");
4596 CL_PRINTF(cli_buf);
4597
4598 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
4599 "RF-A, 0x1e initVal",
4600 coex_dm->bt_rf_0x1e_backup);
4601 CL_PRINTF(cli_buf);
4602
4603 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
4604 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
4605 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4606 "0x778/0x880[29:25]",
4607 u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
4608 CL_PRINTF(cli_buf);
4609
4610
4611 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
4612 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
4613 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765);
4614 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4615 "0x948/ 0x67[5] / 0x765",
4616 u32tmp[0], ((u8tmp[0] & 0x20) >> 5), u8tmp[1]);
4617 CL_PRINTF(cli_buf);
4618
4619 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
4620 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
4621 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
4622 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4623 "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
4624 u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3);
4625 CL_PRINTF(cli_buf);
4626
4627
4628 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
4629 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
4630 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
4631 u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
4632 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4633 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4634 "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
4635 ((u8tmp[0] & 0x8) >> 3), u8tmp[1],
4636 ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1);
4637 CL_PRINTF(cli_buf);
4638
4639 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
4640 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
4641 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4642 "0x550(bcn ctrl)/0x522",
4643 u32tmp[0], u8tmp[0]);
4644 CL_PRINTF(cli_buf);
4645
4646 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
4647 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
4648 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4649 "0xc50(dig)/0x49c(null-drop)",
4650 u32tmp[0] & 0xff, u8tmp[0]);
4651 CL_PRINTF(cli_buf);
4652
4653 fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4654 PHYDM_INFO_FA_OFDM);
4655 fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4656 PHYDM_INFO_FA_CCK);
4657 cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4658 PHYDM_INFO_CCA_OFDM);
4659 cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4660 PHYDM_INFO_CCA_CCK);
4661
4662 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4663 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4664 "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
4665 cca_cck, fa_cck, cca_ofdm, fa_ofdm);
4666 CL_PRINTF(cli_buf);
4667
4668 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4669 "CRC_OK CCK/11g/11n/11n-agg",
4670 coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
4671 coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
4672 CL_PRINTF(cli_buf);
4673
4674 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4675 "CRC_Err CCK/11g/11n/11n-agg",
4676 coex_sta->crc_err_cck, coex_sta->crc_err_11g,
4677 coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
4678 CL_PRINTF(cli_buf);
4679
4680 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
4681 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
4682 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
4683 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
4684 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4685 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4686 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
4687 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
4688 CL_PRINTF(cli_buf);
4689
4690 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4691 "0x770(high-pri rx/tx)",
4692 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
4693 CL_PRINTF(cli_buf);
4694 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4695 "0x774(low-pri rx/tx)",
4696 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
4697 CL_PRINTF(cli_buf);
4698 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
4699 /* halbtc8723b2ant_monitor_bt_ctr(btcoexist); */
4700 #endif
4701 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
4702 }
4703
4704
ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist * btcoexist,IN u8 type)4705 void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4706 {
4707 if (BTC_IPS_ENTER == type) {
4708 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4709 "[BTCoex], IPS ENTER notify\n");
4710 BTC_TRACE(trace_buf);
4711 coex_sta->under_ips = true;
4712 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
4713 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
4714 halbtc8723b2ant_coex_all_off(btcoexist);
4715 } else if (BTC_IPS_LEAVE == type) {
4716 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4717 "[BTCoex], IPS LEAVE notify\n");
4718 BTC_TRACE(trace_buf);
4719 coex_sta->under_ips = false;
4720 halbtc8723b2ant_init_hw_config(btcoexist, false);
4721 halbtc8723b2ant_init_coex_dm(btcoexist);
4722 halbtc8723b2ant_query_bt_info(btcoexist);
4723 }
4724 }
4725
ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist * btcoexist,IN u8 type)4726 void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4727 {
4728 if (BTC_LPS_ENABLE == type) {
4729 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4730 "[BTCoex], LPS ENABLE notify\n");
4731 BTC_TRACE(trace_buf);
4732 coex_sta->under_lps = true;
4733 } else if (BTC_LPS_DISABLE == type) {
4734 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4735 "[BTCoex], LPS DISABLE notify\n");
4736 BTC_TRACE(trace_buf);
4737 coex_sta->under_lps = false;
4738 }
4739 }
4740
ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist * btcoexist,IN u8 type)4741 void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
4742 IN u8 type)
4743 {
4744 u32 u32tmp;
4745 u8 u8tmpa, u8tmpb;
4746
4747 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
4748 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
4749 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
4750
4751 if (BTC_SCAN_START == type) {
4752 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4753 "[BTCoex], SCAN START notify\n");
4754 BTC_TRACE(trace_buf);
4755 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
4756 false, false);
4757 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
4758 } else if (BTC_SCAN_FINISH == type) {
4759 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4760 "[BTCoex], SCAN FINISH notify\n");
4761 BTC_TRACE(trace_buf);
4762 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4763 &coex_sta->scan_ap_num);
4764 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
4765 }
4766
4767 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4768 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
4769 u32tmp, u8tmpa, u8tmpb);
4770 BTC_TRACE(trace_buf);
4771 }
4772
ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist * btcoexist,IN u8 type)4773 void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
4774 IN u8 type)
4775 {
4776 if (BTC_ASSOCIATE_START == type) {
4777 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4778 "[BTCoex], CONNECT START notify\n");
4779 BTC_TRACE(trace_buf);
4780 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
4781 false, false);
4782 coex_sta->connect_ap_period_cnt = 2;
4783 } else if (BTC_ASSOCIATE_FINISH == type) {
4784 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4785 "[BTCoex], CONNECT FINISH notify\n");
4786 BTC_TRACE(trace_buf);
4787 }
4788 }
4789
ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)4790 void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
4791 IN u8 type)
4792 {
4793 u8 h2c_parameter[3] = {0};
4794 u32 wifi_bw;
4795 u8 wifi_central_chnl;
4796 u8 ap_num = 0;
4797
4798 if (BTC_MEDIA_CONNECT == type) {
4799 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4800 "[BTCoex], MEDIA connect notify\n");
4801 BTC_TRACE(trace_buf);
4802 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
4803 false, false);
4804 } else {
4805 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4806 "[BTCoex], MEDIA disconnect notify\n");
4807 BTC_TRACE(trace_buf);
4808 }
4809
4810 /* only 2.4G we need to inform bt the chnl mask */
4811 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
4812 &wifi_central_chnl);
4813 if ((BTC_MEDIA_CONNECT == type) &&
4814 (wifi_central_chnl <= 14)) {
4815 h2c_parameter[0] = 0x1;
4816 h2c_parameter[1] = wifi_central_chnl;
4817 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
4818 if (BTC_WIFI_BW_HT40 == wifi_bw)
4819 h2c_parameter[2] = 0x30;
4820 else {
4821 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4822 &ap_num);
4823 if (ap_num < 10)
4824 h2c_parameter[2] = 0x30;
4825 else
4826 h2c_parameter[2] = 0x20;
4827 }
4828 }
4829
4830 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
4831 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
4832 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
4833
4834 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
4835 }
4836
ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist * btcoexist,IN u8 type)4837 void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
4838 IN u8 type)
4839 {
4840 if (type == BTC_PACKET_DHCP) {
4841 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4842 "[BTCoex], DHCP Packet notify\n");
4843 BTC_TRACE(trace_buf);
4844 }
4845 }
4846
ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist * btcoexist,IN u8 * tmp_buf,IN u8 length)4847 void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
4848 IN u8 *tmp_buf, IN u8 length)
4849 {
4850 u8 bt_info = 0;
4851 u8 i, rsp_source = 0;
4852 boolean bt_busy = false, limited_dig = false;
4853 boolean wifi_connected = false;
4854
4855 coex_sta->c2h_bt_info_req_sent = false;
4856
4857 rsp_source = tmp_buf[0] & 0xf;
4858 if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX)
4859 rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
4860 coex_sta->bt_info_c2h_cnt[rsp_source]++;
4861
4862 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4863 "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
4864 length);
4865 BTC_TRACE(trace_buf);
4866 for (i = 0; i < length; i++) {
4867 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
4868 if (i == 1)
4869 bt_info = tmp_buf[i];
4870 if (i == length - 1) {
4871 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
4872 tmp_buf[i]);
4873 BTC_TRACE(trace_buf);
4874 } else {
4875 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
4876 tmp_buf[i]);
4877 BTC_TRACE(trace_buf);
4878 }
4879 }
4880
4881 if (btcoexist->manual_control) {
4882 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4883 "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n");
4884 BTC_TRACE(trace_buf);
4885 return;
4886 }
4887
4888 /* if 0xff, it means BT is under WHCK test */
4889 if (bt_info == 0xff)
4890 coex_sta->bt_whck_test = true;
4891 else
4892 coex_sta->bt_whck_test = false;
4893
4894 if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
4895 coex_sta->bt_retry_cnt = /* [3:0] */
4896 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
4897
4898 if (coex_sta->bt_retry_cnt >= 1)
4899 coex_sta->pop_event_cnt++;
4900
4901 coex_sta->bt_rssi =
4902 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
4903
4904 coex_sta->bt_info_ext =
4905 coex_sta->bt_info_c2h[rsp_source][4];
4906
4907 if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
4908 coex_sta->c2h_bt_remote_name_req = true;
4909 else
4910 coex_sta->c2h_bt_remote_name_req = false;
4911
4912 if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) {
4913 coex_sta->a2dp_bit_pool =
4914 coex_sta->bt_info_c2h[rsp_source][6];
4915 } else
4916 coex_sta->a2dp_bit_pool = 0;
4917
4918 coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2]
4919 & 0x40);
4920 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK,
4921 &coex_sta->bt_tx_rx_mask);
4922 if (coex_sta->bt_tx_rx_mask) {
4923 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
4924 /* BT TRx mask off */
4925 btcoexist->btc_set_bt_trx_mask(btcoexist, 0);
4926
4927 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4928 "############# [BTCoex], BT TRx Mask off for BT Info Notify\n");
4929 BTC_TRACE(trace_buf);
4930 #if 0
4931 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4932 "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n");
4933 BTC_TRACE(trace_buf);
4934 btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF,
4935 0x3c, 0x01);
4936 #endif
4937 }
4938
4939 coex_sta->bt_info_ext2 = coex_sta->bt_info_c2h[rsp_source][5];
4940 coex_sta->hid_busy_num = (coex_sta->bt_info_ext2 & 0x30) >> 4;
4941
4942
4943 /* Here we need to resend some wifi info to BT */
4944 /* because bt is reset and loss of the info. */
4945 if ((coex_sta->bt_info_ext & BIT(1))) {
4946 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4947 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
4948 BTC_TRACE(trace_buf);
4949 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4950 &wifi_connected);
4951 if (wifi_connected)
4952 ex_halbtc8723b2ant_media_status_notify(
4953 btcoexist, BTC_MEDIA_CONNECT);
4954 else
4955 ex_halbtc8723b2ant_media_status_notify(
4956 btcoexist, BTC_MEDIA_DISCONNECT);
4957 }
4958
4959 if ((coex_sta->bt_info_ext & BIT(3))) {
4960 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4961 "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
4962 BTC_TRACE(trace_buf);
4963 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC,
4964 false);
4965 } else {
4966 /* BT already NOT ignore Wlan active, do nothing here. */
4967 }
4968 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
4969 if ((coex_sta->bt_info_ext & BIT(4))) {
4970 /* BT auto report already enabled, do nothing */
4971 } else
4972 halbtc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC,
4973 true);
4974 #endif
4975 }
4976
4977 /* check BIT2 first ==> check if bt is under inquiry or page scan */
4978 if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
4979 coex_sta->c2h_bt_inquiry_page = true;
4980 else
4981 coex_sta->c2h_bt_inquiry_page = false;
4982
4983 /* set link exist status */
4984 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
4985 coex_sta->bt_link_exist = false;
4986 coex_sta->pan_exist = false;
4987 coex_sta->a2dp_exist = false;
4988 coex_sta->hid_exist = false;
4989 coex_sta->sco_exist = false;
4990 } else { /* connection exists */
4991 coex_sta->bt_link_exist = true;
4992 if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
4993 coex_sta->pan_exist = true;
4994 else
4995 coex_sta->pan_exist = false;
4996 if (bt_info & BT_INFO_8723B_2ANT_B_A2DP)
4997 coex_sta->a2dp_exist = true;
4998 else
4999 coex_sta->a2dp_exist = false;
5000 if (bt_info & BT_INFO_8723B_2ANT_B_HID)
5001 coex_sta->hid_exist = true;
5002 else
5003 coex_sta->hid_exist = false;
5004 if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO)
5005 coex_sta->sco_exist = true;
5006 else
5007 coex_sta->sco_exist = false;
5008
5009 if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
5010 (coex_sta->hid_exist == true)) {
5011 coex_sta->hid_exist = false;
5012 }
5013
5014 if ((coex_sta->hid_exist == false) &&
5015 (coex_sta->c2h_bt_inquiry_page == false) &&
5016 (coex_sta->sco_exist == false)) {
5017 if (coex_sta->high_priority_tx +
5018 coex_sta->high_priority_rx >= 160) {
5019 coex_sta->hid_exist = true;
5020 bt_info = bt_info | 0x28;
5021 }
5022 }
5023 }
5024
5025 halbtc8723b2ant_update_bt_link_info(btcoexist);
5026
5027 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
5028 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
5029 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5030 "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
5031 BTC_TRACE(trace_buf);
5032 } else if (bt_info ==
5033 BT_INFO_8723B_2ANT_B_CONNECTION) { /* connection exists but no busy */
5034 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
5035 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5036 "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
5037 BTC_TRACE(trace_buf);
5038 } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
5039 (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) {
5040 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
5041 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5042 "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
5043 BTC_TRACE(trace_buf);
5044 } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
5045 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
5046 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5047 "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
5048 BTC_TRACE(trace_buf);
5049 } else {
5050 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX;
5051 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5052 "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
5053 BTC_TRACE(trace_buf);
5054 }
5055
5056 if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
5057 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
5058 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
5059 bt_busy = true;
5060 limited_dig = true;
5061 } else {
5062 bt_busy = false;
5063 limited_dig = false;
5064 }
5065
5066 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
5067
5068 coex_dm->limited_dig = limited_dig;
5069 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
5070
5071 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
5072 }
5073
ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist * btcoexist)5074 void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist)
5075 {
5076 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
5077 BTC_TRACE(trace_buf);
5078
5079 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
5080 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
5081 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); */ /*BT goto standby while GNT_BT 1-->0 */
5082 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
5083
5084 ex_halbtc8723b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
5085 }
5086
ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist * btcoexist,IN u8 pnp_state)5087 void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
5088 IN u8 pnp_state)
5089 {
5090 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
5091 BTC_TRACE(trace_buf);
5092
5093 if ((pnp_state == BTC_WIFI_PNP_SLEEP) || (pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT)) {
5094 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5095 "[BTCoex], Pnp notify to SLEEP\n");
5096 BTC_TRACE(trace_buf);
5097
5098 /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
5099 /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
5100 /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
5101 coex_sta->under_ips = false;
5102 coex_sta->under_lps = false;
5103
5104 } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
5105 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5106 "[BTCoex], Pnp notify to WAKE UP\n");
5107 BTC_TRACE(trace_buf);
5108 halbtc8723b2ant_init_hw_config(btcoexist, false);
5109 halbtc8723b2ant_init_coex_dm(btcoexist);
5110 halbtc8723b2ant_query_bt_info(btcoexist);
5111 }
5112 }
5113
ex_halbtc8723b2ant_periodical(IN struct btc_coexist * btcoexist)5114 void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
5115 {
5116 u32 bt_patch_ver;
5117
5118 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
5119
5120 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5121 "[BTCoex], ==========================Periodical===========================\n");
5122 BTC_TRACE(trace_buf);
5123 if (coex_sta->dis_ver_info_cnt <= 5) {
5124 coex_sta->dis_ver_info_cnt += 1;
5125 if (coex_sta->dis_ver_info_cnt == 3) {
5126 /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */
5127 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5128 "[BTCoex], Set GNT_BT control by PTA\n");
5129 BTC_TRACE(trace_buf);
5130 halbtc8723b2ant_set_ant_path(btcoexist,
5131 BTC_ANT_WIFI_AT_MAIN, false, false);
5132 }
5133 }
5134
5135 if (((coex_sta->bt_coex_supported_version == 0) ||
5136 (coex_sta->bt_coex_supported_version == 0xffff)) && (!coex_sta->bt_disabled))
5137 btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
5138
5139
5140 /*btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);*/
5141 /*btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;*/
5142
5143 /*for A2DP glitch during connecting AP*/
5144 if (coex_sta->connect_ap_period_cnt > 0)
5145 coex_sta->connect_ap_period_cnt--;
5146
5147 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
5148 halbtc8723b2ant_query_bt_info(btcoexist);
5149 halbtc8723b2ant_monitor_bt_enable_disable(btcoexist);
5150 #else
5151 halbtc8723b2ant_monitor_bt_ctr(btcoexist);
5152 halbtc8723b2ant_monitor_wifi_ctr(btcoexist);
5153
5154 /* for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist */
5155 if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
5156 (bt_link_info->hid_exist == true))
5157 bt_link_info->hid_exist = false;
5158
5159 if (halbtc8723b2ant_is_wifi_status_changed(btcoexist) ||
5160 coex_dm->auto_tdma_adjust)
5161 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
5162 #endif
5163 }
5164
5165 #endif
5166
5167 #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
5168
5169
5170