1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2017 Realtek Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 *****************************************************************************/
16 #ifndef __RTW_PWRCTRL_H_
17 #define __RTW_PWRCTRL_H_
18
19
20 #define FW_PWR0 0
21 #define FW_PWR1 1
22 #define FW_PWR2 2
23 #define FW_PWR3 3
24
25
26 #define HW_PWR0 7
27 #define HW_PWR1 6
28 #define HW_PWR2 2
29 #define HW_PWR3 0
30 #define HW_PWR4 8
31
32 #define FW_PWRMSK 0x7
33
34
35 #define XMIT_ALIVE BIT(0)
36 #define RECV_ALIVE BIT(1)
37 #define CMD_ALIVE BIT(2)
38 #define EVT_ALIVE BIT(3)
39 #ifdef CONFIG_BT_COEXIST
40 #define BTCOEX_ALIVE BIT(4)
41 #endif /* CONFIG_BT_COEXIST */
42
43 #ifdef CONFIG_WOWLAN
44 #ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86
45 /* TCP/ICMP/UDP multicast with specific IP addr */
46 #define DEFAULT_PATTERN_NUM 4
47 #else
48 /* TCP/ICMP */
49 #define DEFAULT_PATTERN_NUM 3
50 #endif
51
52 #ifdef CONFIG_WOW_PATTERN_HW_CAM /* Frame Mask Cam number for pattern match */
53 #define MAX_WKFM_CAM_NUM 12
54 #else
55 #define MAX_WKFM_CAM_NUM 16
56 #endif
57
58 #define MAX_WKFM_SIZE 16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */
59 #define MAX_WKFM_PATTERN_SIZE 128
60 #define WKFMCAM_ADDR_NUM 6
61 #define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */
62 enum pattern_type {
63 PATTERN_BROADCAST = 0,
64 PATTERN_MULTICAST,
65 PATTERN_UNICAST,
66 PATTERN_VALID,
67 PATTERN_INVALID,
68 };
69
70 typedef struct rtl_priv_pattern {
71 int len;
72 char content[MAX_WKFM_PATTERN_SIZE];
73 char mask[MAX_WKFM_SIZE];
74 } rtl_priv_pattern_t;
75
76 #endif /* CONFIG_WOWLAN */
77
78 enum Power_Mgnt {
79 PS_MODE_ACTIVE = 0 ,
80 PS_MODE_MIN ,
81 PS_MODE_MAX ,
82 PS_MODE_DTIM , /* PS_MODE_SELF_DEFINED */
83 PS_MODE_VOIP ,
84 PS_MODE_UAPSD_WMM ,
85 PS_MODE_UAPSD ,
86 PS_MODE_IBSS ,
87 PS_MODE_WWLAN ,
88 PM_Radio_Off ,
89 PM_Card_Disable ,
90 PS_MODE_NUM,
91 };
92
93 enum lps_level {
94 LPS_NORMAL = 0,
95 LPS_LCLK,
96 LPS_PG,
97 LPS_LEVEL_MAX,
98 };
99
100 #ifdef CONFIG_PNO_SUPPORT
101 #define MAX_PNO_LIST_COUNT 16
102 #define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */
103 #define MAX_HIDDEN_AP 8 /* 8 hidden AP */
104 #endif
105
106 /*
107 BIT[2:0] = HW state
108 BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state
109 BIT[4] = sub-state
110 */
111
112 #define PS_DPS BIT(0)
113 #define PS_LCLK (PS_DPS)
114 #define PS_RF_OFF BIT(1)
115 #define PS_ALL_ON BIT(2)
116 #define PS_ST_ACTIVE BIT(3)
117
118 #define PS_ISR_ENABLE BIT(4)
119 #define PS_IMR_ENABLE BIT(5)
120 #define PS_ACK BIT(6)
121 #define PS_TOGGLE BIT(7)
122
123 #define PS_STATE_MASK (0x0F)
124 #define PS_STATE_HW_MASK (0x07)
125 #define PS_SEQ_MASK (0xc0)
126
127 #define PS_STATE(x) (PS_STATE_MASK & (x))
128 #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
129 #define PS_SEQ(x) (PS_SEQ_MASK & (x))
130
131 #define PS_STATE_S0 (PS_DPS)
132 #define PS_STATE_S1 (PS_LCLK)
133 #define PS_STATE_S2 (PS_RF_OFF)
134 #define PS_STATE_S3 (PS_ALL_ON)
135 #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
136
137
138 #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
139 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
140 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
141
142
143 struct reportpwrstate_parm {
144 unsigned char mode;
145 unsigned char state; /* the CPWM value */
146 unsigned short rsvd;
147 };
148
149
150 typedef _sema _pwrlock;
151
152
_init_pwrlock(_pwrlock * plock)153 __inline static void _init_pwrlock(_pwrlock *plock)
154 {
155 _rtw_init_sema(plock, 1);
156 }
157
_free_pwrlock(_pwrlock * plock)158 __inline static void _free_pwrlock(_pwrlock *plock)
159 {
160 _rtw_free_sema(plock);
161 }
162
163
_enter_pwrlock(_pwrlock * plock)164 __inline static void _enter_pwrlock(_pwrlock *plock)
165 {
166 _rtw_down_sema(plock);
167 }
168
169
_exit_pwrlock(_pwrlock * plock)170 __inline static void _exit_pwrlock(_pwrlock *plock)
171 {
172 _rtw_up_sema(plock);
173 }
174
175 #define LPS_DELAY_MS 1000 /* 1 sec */
176
177 #define EXE_PWR_NONE 0x01
178 #define EXE_PWR_IPS 0x02
179 #define EXE_PWR_LPS 0x04
180
181 /* RF state. */
182 typedef enum _rt_rf_power_state {
183 rf_on, /* RF is on after RFSleep or RFOff */
184 rf_sleep, /* 802.11 Power Save mode */
185 rf_off, /* HW/SW Radio OFF or Inactive Power Save */
186 /* =====Add the new RF state above this line===== */
187 rf_max
188 } rt_rf_power_state;
189
190 /* RF Off Level for IPS or HW/SW radio off */
191 #define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
192 #define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
193 #define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
194 #define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-initialize hw parameters */
195 #define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW */
196 #define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
197 #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock Req in initialization. */
198 #define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R if no packet is received or transmittd. */
199 #define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
200
201 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE)
202 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG)))
203 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG)
204
205 /* ASPM OSC Control bit, added by Roger, 2013.03.29. */
206 #define RT_PCI_ASPM_OSC_IGNORE 0 /* PCI ASPM ignore OSC control in default */
207 #define RT_PCI_ASPM_OSC_ENABLE BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */
208 #define RT_PCI_ASPM_OSC_DISABLE BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */
209
210
211 enum _PS_BBRegBackup_ {
212 PSBBREG_RF0 = 0,
213 PSBBREG_RF1,
214 PSBBREG_RF2,
215 PSBBREG_AFE0,
216 PSBBREG_TOTALCNT
217 };
218
219 enum { /* for ips_mode */
220 IPS_NONE = 0,
221 IPS_NORMAL,
222 IPS_LEVEL_2,
223 IPS_NUM
224 };
225
226 /* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */
227 typedef enum _PS_DENY_REASON {
228 PS_DENY_DRV_INITIAL = 0,
229 PS_DENY_SCAN,
230 PS_DENY_JOIN,
231 PS_DENY_DISCONNECT,
232 PS_DENY_SUSPEND,
233 PS_DENY_IOCTL,
234 PS_DENY_MGNT_TX,
235 PS_DENY_MONITOR_MODE,
236 PS_DENY_BEAMFORMING, /* Beamforming */
237 PS_DENY_DRV_REMOVE = 30,
238 PS_DENY_OTHERS = 31
239 } PS_DENY_REASON;
240
241 #ifdef CONFIG_PNO_SUPPORT
242 typedef struct pno_nlo_info {
243 u32 fast_scan_period; /* Fast scan period */
244 u8 ssid_num; /* number of entry */
245 u8 hidden_ssid_num;
246 u32 slow_scan_period; /* slow scan period */
247 u32 fast_scan_iterations; /* Fast scan iterations */
248 u8 ssid_length[MAX_PNO_LIST_COUNT]; /* SSID Length Array */
249 u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; /* Cipher information for security */
250 u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; /* channel information */
251 u8 loc_probe_req[MAX_HIDDEN_AP]; /* loc_probeReq */
252 } pno_nlo_info_t;
253
254 typedef struct pno_ssid {
255 u32 SSID_len;
256 u8 SSID[32];
257 } pno_ssid_t;
258
259 typedef struct pno_ssid_list {
260 pno_ssid_t node[MAX_PNO_LIST_COUNT];
261 } pno_ssid_list_t;
262
263 typedef struct pno_scan_channel_info {
264 u8 channel;
265 u8 tx_power;
266 u8 timeout;
267 u8 active; /* set 1 means active scan, or pasivite scan. */
268 } pno_scan_channel_info_t;
269
270 typedef struct pno_scan_info {
271 u8 enableRFE; /* Enable RFE */
272 u8 period_scan_time; /* exclusive with fast_scan_period and slow_scan_period */
273 u8 periodScan; /* exclusive with fast_scan_period and slow_scan_period */
274 u8 orig_80_offset; /* original channel 80 offset */
275 u8 orig_40_offset; /* original channel 40 offset */
276 u8 orig_bw; /* original bandwidth */
277 u8 orig_ch; /* original channel */
278 u8 channel_num; /* number of channel */
279 u64 rfe_type; /* rfe_type && 0x00000000000000ff */
280 pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT];
281 } pno_scan_info_t;
282 #endif /* CONFIG_PNO_SUPPORT */
283
284 #ifdef CONFIG_LPS_POFF
285 /* Driver context for LPS 32K Close IO Power */
286 typedef struct lps_poff_info {
287 bool bEn;
288 u8 *pStaticFile;
289 u8 *pDynamicFile;
290 u32 ConfFileOffset;
291 u32 tx_bndy_static;
292 u32 tx_bndy_dynamic;
293 u16 ConfLenForPTK;
294 u16 ConfLenForGTK;
295 ATOMIC_T bEnterPOFF;
296 ATOMIC_T bTxBoundInProgress;
297 ATOMIC_T bSetPOFFParm;
298 } lps_poff_info_t;
299 #endif /*CONFIG_LPS_POFF*/
300
301 struct aoac_report {
302 u8 iv[8];
303 u8 replay_counter_eapol_key[8];
304 u8 group_key[32];
305 u8 key_index;
306 u8 security_type;
307 u8 wow_pattern_idx;
308 u8 version_info;
309 u8 rekey_ok:1;
310 u8 dummy:7;
311 u8 reserved[3];
312 u8 rxptk_iv[8];
313 u8 rxgtk_iv[4][8];
314 };
315
316 struct rsvd_page_cache_t;
317
318 struct pwrctrl_priv {
319 _pwrlock lock;
320 _pwrlock check_32k_lock;
321 volatile u8 rpwm; /* requested power state for fw */
322 volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
323 volatile u8 tog; /* toggling */
324 volatile u8 cpwm_tog; /* toggling */
325 u8 rpwm_retry;
326
327 u8 pwr_mode;
328 u8 smart_ps;
329 u8 bcn_ant_mode;
330 u8 dtim;
331 #ifdef CONFIG_LPS_CHK_BY_TP
332 u8 lps_chk_by_tp;
333 u16 lps_tx_tp_th;/*Mbps*/
334 u16 lps_rx_tp_th;/*Mbps*/
335 u16 lps_bi_tp_th;/*Mbps*//*TRX TP*/
336 int lps_chk_cnt_th;
337 int lps_chk_cnt;
338 u32 lps_tx_pkts;
339 u32 lps_rx_pkts;
340
341 #endif
342
343 #ifdef CONFIG_WMMPS_STA
344 u8 wmm_smart_ps;
345 #endif /* CONFIG_WMMPS_STA */
346
347 u32 alives;
348 _workitem cpwm_event;
349 _workitem dma_event; /*for handle un-synchronized tx dma*/
350 #ifdef CONFIG_LPS_RPWM_TIMER
351 u8 brpwmtimeout;
352 _workitem rpwmtimeoutwi;
353 _timer pwr_rpwm_timer;
354 #endif /* CONFIG_LPS_RPWM_TIMER */
355 u8 bpower_saving; /* for LPS/IPS */
356
357 u8 b_hw_radio_off;
358 u8 reg_rfoff;
359 u8 reg_pdnmode; /* powerdown mode */
360 u32 rfoff_reason;
361
362 /* RF OFF Level */
363 u32 cur_ps_level;
364 u32 reg_rfps_level;
365
366 uint ips_enter_cnts;
367 uint ips_leave_cnts;
368 uint lps_enter_cnts;
369 uint lps_leave_cnts;
370
371 u8 ips_mode;
372 u8 ips_org_mode;
373 u8 ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */
374 uint bips_processing;
375 systime ips_deny_time; /* will deny IPS when system time is smaller than this */
376 u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */
377
378 /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */
379 /* Use PS_DENY_REASON to decide reason. */
380 /* Don't access this variable directly without control function, */
381 /* and this variable should be protected by lock. */
382 u32 ps_deny;
383
384 u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
385
386 u8 fw_psmode_iface_id;
387 u8 bLeisurePs;
388 u8 LpsIdleCount;
389 u8 power_mgnt;
390 u8 org_power_mgnt;
391 u8 bFwCurrentInPSMode;
392 systime lps_deny_time; /* will deny LPS when system time is smaller than this */
393 s32 pnp_current_pwr_state;
394 u8 pnp_bstop_trx;
395
396 #ifdef CONFIG_AUTOSUSPEND
397 int ps_flag; /* used by autosuspend */
398 u8 bInternalAutoSuspend;
399 #endif
400 u8 bInSuspend;
401 #ifdef CONFIG_BT_COEXIST
402 u8 bAutoResume;
403 u8 autopm_cnt;
404 #endif
405 u8 bSupportRemoteWakeup;
406 u8 wowlan_wake_reason;
407 u8 wowlan_last_wake_reason;
408 u8 wowlan_ap_mode;
409 u8 wowlan_mode;
410 u8 wowlan_p2p_mode;
411 u8 wowlan_pno_enable;
412 u8 wowlan_in_resume;
413
414 #ifdef CONFIG_GPIO_WAKEUP
415 u8 is_high_active;
416 #endif /* CONFIG_GPIO_WAKEUP */
417 u8 hst2dev_high_active;
418 #ifdef CONFIG_WOWLAN
419 bool default_patterns_en;
420 #ifdef CONFIG_IPV6
421 u8 wowlan_ns_offload_en;
422 #endif /*CONFIG_IPV6*/
423 u8 wowlan_txpause_status;
424 u8 wowlan_pattern_idx;
425 u64 wowlan_fw_iv;
426 struct rtl_priv_pattern patterns[MAX_WKFM_CAM_NUM];
427 #ifdef CONFIG_PNO_SUPPORT
428 u8 pno_inited;
429 pno_nlo_info_t *pnlo_info;
430 pno_scan_info_t *pscan_info;
431 pno_ssid_list_t *pno_ssid_list;
432 #endif /* CONFIG_PNO_SUPPORT */
433 #ifdef CONFIG_WOW_PATTERN_HW_CAM
434 _mutex wowlan_pattern_cam_mutex;
435 #endif
436 u8 wowlan_aoac_rpt_loc;
437 struct aoac_report wowlan_aoac_rpt;
438 u8 wowlan_power_mgmt;
439 u8 wowlan_lps_level;
440 #ifdef CONFIG_LPS_1T1R
441 u8 wowlan_lps_1t1r;
442 #endif
443 #endif /* CONFIG_WOWLAN */
444 _timer pwr_state_check_timer;
445 int pwr_state_check_interval;
446 u8 pwr_state_check_cnts;
447
448
449 rt_rf_power_state rf_pwrstate;/* cur power state, only for IPS */
450 /* rt_rf_power_state current_rfpwrstate; */
451 rt_rf_power_state change_rfpwrstate;
452
453 u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
454 u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
455 u8 bkeepfwalive;
456 u8 brfoffbyhw;
457 unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
458
459 #ifdef CONFIG_RESUME_IN_WORKQUEUE
460 struct workqueue_struct *rtw_workqueue;
461 _workitem resume_work;
462 #endif
463
464 #ifdef CONFIG_HAS_EARLYSUSPEND
465 struct early_suspend early_suspend;
466 u8 do_late_resume;
467 #endif /* CONFIG_HAS_EARLYSUSPEND */
468
469 #ifdef CONFIG_ANDROID_POWER
470 android_early_suspend_t early_suspend;
471 u8 do_late_resume;
472 #endif
473
474 #ifdef CONFIG_LPS_POFF
475 lps_poff_info_t *plps_poff_info;
476 #endif
477 u8 lps_level_bk;
478 u8 lps_level; /*LPS_NORMAL,LPA_CG,LPS_PG*/
479 #ifdef CONFIG_LPS_1T1R
480 u8 lps_1t1r_bk;
481 u8 lps_1t1r;
482 #endif
483 #ifdef CONFIG_LPS_PG
484 struct rsvd_page_cache_t lpspg_info;
485 #ifdef CONFIG_RTL8822C
486 struct rsvd_page_cache_t lpspg_dpk_info;
487 struct rsvd_page_cache_t lpspg_iqk_info;
488 #endif
489 #endif
490 u8 current_lps_hw_port_id;
491
492 #ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS
493 systime radio_on_start_time;
494 systime pwr_saving_start_time;
495 u32 pwr_saving_time;
496 u32 on_time;
497 u32 tx_time;
498 u32 rx_time;
499 #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
500
501 };
502
503 #define rtw_get_ips_mode_req(pwrctl) \
504 (pwrctl)->ips_mode_req
505
506 #define rtw_ips_mode_req(pwrctl, ips_mode) \
507 (pwrctl)->ips_mode_req = (ips_mode)
508
509 #define RTW_PWR_STATE_CHK_INTERVAL 2000
510
511 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
512 do { \
513 /*RTW_INFO("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \
514 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
515 } while (0)
516
517 #define rtw_set_pwr_state_check_timer(pwrctl) \
518 _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
519
520 extern void rtw_init_pwrctrl_priv(_adapter *adapter);
521 extern void rtw_free_pwrctrl_priv(_adapter *adapter);
522
523 #ifdef CONFIG_LPS_LCLK
524 s32 rtw_register_task_alive(PADAPTER, u32 task);
525 void rtw_unregister_task_alive(PADAPTER, u32 task);
526 extern s32 rtw_register_tx_alive(PADAPTER padapter);
527 extern void rtw_unregister_tx_alive(PADAPTER padapter);
528 extern s32 rtw_register_rx_alive(PADAPTER padapter);
529 extern void rtw_unregister_rx_alive(PADAPTER padapter);
530 extern s32 rtw_register_cmd_alive(PADAPTER padapter);
531 extern void rtw_unregister_cmd_alive(PADAPTER padapter);
532 extern s32 rtw_register_evt_alive(PADAPTER padapter);
533 extern void rtw_unregister_evt_alive(PADAPTER padapter);
534 extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate);
535 extern void LPS_Leave_check(PADAPTER padapter);
536 #endif
537
538 extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
539 extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter);
540 #ifdef CONFIG_IPS
541 void _ips_enter(_adapter *padapter);
542 void ips_enter(_adapter *padapter);
543 int _ips_leave(_adapter *padapter);
544 int ips_leave(_adapter *padapter);
545 #endif
546
547 void rtw_ps_processor(_adapter *padapter);
548
549 #ifdef CONFIG_AUTOSUSPEND
550 int autoresume_enter(_adapter *padapter);
551 #endif
552 #ifdef SUPPORT_HW_RFOFF_DETECTED
553 rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter);
554 #endif
555
556
557 #ifdef DBG_CHECK_FW_PS_STATE
558 int rtw_fw_ps_state(PADAPTER padapter);
559 #endif
560
561 #ifdef CONFIG_LPS
562 void LPS_Enter(PADAPTER padapter, const char *msg);
563 void LPS_Leave(PADAPTER padapter, const char *msg);
564 #ifdef CONFIG_CHECK_LEAVE_LPS
565 #ifdef CONFIG_LPS_CHK_BY_TP
566 void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta);
567 #endif
568 void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
569 #endif /*CONFIG_CHECK_LEAVE_LPS*/
570 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
571 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
572 u8 rtw_set_rpwm(_adapter *padapter, u8 val8);
573 #ifdef CONFIG_WOWLAN
574 void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en);
575 #endif /* CONFIG_WOWLAN */
576 #endif /* CONFIG_LPS */
577
578 #ifdef CONFIG_RESUME_IN_WORKQUEUE
579 void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
580 #endif /* CONFIG_RESUME_IN_WORKQUEUE */
581
582 #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
583 bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv);
584 bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv);
585 void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable);
586 void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
587 void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
588 #else
589 #define rtw_is_earlysuspend_registered(pwrpriv) _FALSE
590 #define rtw_is_do_late_resume(pwrpriv) _FALSE
591 #define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0)
592 #define rtw_register_early_suspend(pwrpriv) do {} while (0)
593 #define rtw_unregister_early_suspend(pwrpriv) do {} while (0)
594 #endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */
595
596 u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
597 void rtw_set_ips_deny(_adapter *padapter, u32 ms);
598 int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
599 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__)
600 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
601 int rtw_pm_set_ips(_adapter *padapter, u8 mode);
602 int rtw_pm_set_lps(_adapter *padapter, u8 mode);
603 int rtw_pm_set_lps_level(_adapter *padapter, u8 level);
604 #ifdef CONFIG_LPS_1T1R
605 int rtw_pm_set_lps_1t1r(_adapter *padapter, u8 en);
606 #endif
607 void rtw_set_lps_deny(_adapter *adapter, u32 ms);
608 #ifdef CONFIG_WOWLAN
609 int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode);
610 int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level);
611 #ifdef CONFIG_LPS_1T1R
612 int rtw_pm_set_wow_lps_1t1r(_adapter *padapter, u8 en);
613 #endif
614 #endif /* CONFIG_WOWLAN */
615
616 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
617 void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
618 u32 rtw_ps_deny_get(PADAPTER padapter);
619
620 #if defined(CONFIG_WOWLAN)
621 void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip);
622 void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr);
623 bool rtw_check_pattern_valid(u8 *input, u8 len);
624 bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern,
625 int *pattern_len, char *bit_mask);
626 void rtw_wow_pattern_sw_reset(_adapter *adapter);
627 u8 rtw_set_default_pattern(_adapter *adapter);
628 void rtw_wow_pattern_sw_dump(_adapter *adapter);
629 #endif /* CONFIG_WOWLAN */
630 void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta);
631 void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta);
632 #endif /* __RTL871X_PWRCTRL_H_ */
633