1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __RTL8812A_XMIT_H__ 21 #define __RTL8812A_XMIT_H__ 22 23 24 //For 88e early mode 25 #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) 26 #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) 27 #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) 28 #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) 29 #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) 30 #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) 31 #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) 32 33 // 34 //defined for TX DESC Operation 35 // 36 37 #define MAX_TID (15) 38 39 //OFFSET 0 40 #define OFFSET_SZ 0 41 #define OFFSET_SHT 16 42 #define BMC BIT(24) 43 #define LSG BIT(26) 44 #define FSG BIT(27) 45 #define OWN BIT(31) 46 47 48 //OFFSET 4 49 #define PKT_OFFSET_SZ 0 50 #define QSEL_SHT 8 51 #define RATE_ID_SHT 16 52 #define NAVUSEHDR BIT(20) 53 #define SEC_TYPE_SHT 22 54 #define PKT_OFFSET_SHT 26 55 56 //OFFSET 8 57 #define AGG_EN BIT(12) 58 #define AGG_BK BIT(16) 59 #define AMPDU_DENSITY_SHT 20 60 #define ANTSEL_A BIT(24) 61 #define ANTSEL_B BIT(25) 62 #define TX_ANT_CCK_SHT 26 63 #define TX_ANTL_SHT 28 64 #define TX_ANT_HT_SHT 30 65 66 //OFFSET 12 67 #define SEQ_SHT 16 68 #define EN_HWSEQ BIT(31) 69 70 //OFFSET 16 71 #define QOS BIT(6) 72 #define HW_SSN BIT(7) 73 #define USERATE BIT(8) 74 #define DISDATAFB BIT(10) 75 #define CTS_2_SELF BIT(11) 76 #define RTS_EN BIT(12) 77 #define HW_RTS_EN BIT(13) 78 #define DATA_SHORT BIT(24) 79 #define PWR_STATUS_SHT 15 80 #define DATA_SC_SHT 20 81 #define DATA_BW BIT(25) 82 83 //OFFSET 20 84 #define RTY_LMT_EN BIT(17) 85 86 //OFFSET 20 87 #define SGI BIT(6) 88 #define USB_TXAGG_NUM_SHT 24 89 90 typedef struct txdescriptor_8812 91 { 92 // Offset 0 93 u32 pktlen:16; 94 u32 offset:8; 95 u32 bmc:1; 96 u32 htc:1; 97 u32 ls:1; 98 u32 fs:1; 99 u32 linip:1; 100 u32 noacm:1; 101 u32 gf:1; 102 u32 own:1; 103 104 // Offset 4 105 u32 macid:6; 106 u32 rsvd0406:2; 107 u32 qsel:5; 108 u32 rd_nav_ext:1; 109 u32 lsig_txop_en:1; 110 u32 pifs:1; 111 u32 rate_id:4; 112 u32 navusehdr:1; 113 u32 en_desc_id:1; 114 u32 sectype:2; 115 u32 rsvd0424:2; 116 u32 pkt_offset:5; // unit: 8 bytes 117 u32 rsvd0431:1; 118 119 // Offset 8 120 u32 rts_rc:6; 121 u32 data_rc:6; 122 u32 agg_en:1; 123 u32 rd_en:1; 124 u32 bar_rty_th:2; 125 u32 bk:1; 126 u32 morefrag:1; 127 u32 raw:1; 128 u32 ccx:1; 129 u32 ampdu_density:3; 130 u32 bt_null:1; 131 u32 ant_sel_a:1; 132 u32 ant_sel_b:1; 133 u32 tx_ant_cck:2; 134 u32 tx_antl:2; 135 u32 tx_ant_ht:2; 136 137 // Offset 12 138 u32 nextheadpage:8; 139 u32 tailpage:8; 140 u32 seq:12; 141 u32 cpu_handle:1; 142 u32 tag1:1; 143 u32 trigger_int:1; 144 u32 hwseq_en:1; 145 146 // Offset 16 147 u32 rtsrate:5; 148 u32 ap_dcfe:1; 149 u32 hwseq_sel:2; 150 u32 userate:1; 151 u32 disrtsfb:1; 152 u32 disdatafb:1; 153 u32 cts2self:1; 154 u32 rtsen:1; 155 u32 hw_rts_en:1; 156 u32 port_id:1; 157 u32 pwr_status:3; 158 u32 wait_dcts:1; 159 u32 cts2ap_en:1; 160 u32 data_sc:2; 161 u32 data_stbc:2; 162 u32 data_short:1; 163 u32 data_bw:1; 164 u32 rts_short:1; 165 u32 rts_bw:1; 166 u32 rts_sc:2; 167 u32 vcs_stbc:2; 168 169 // Offset 20 170 u32 datarate:6; 171 u32 sgi:1; 172 u32 try_rate:1; 173 u32 data_ratefb_lmt:5; 174 u32 rts_ratefb_lmt:4; 175 u32 rty_lmt_en:1; 176 u32 data_rt_lmt:6; 177 u32 usb_txagg_num:8; 178 179 // Offset 24 180 u32 txagg_a:5; 181 u32 txagg_b:5; 182 u32 use_max_len:1; 183 u32 max_agg_num:5; 184 u32 mcsg1_max_len:4; 185 u32 mcsg2_max_len:4; 186 u32 mcsg3_max_len:4; 187 u32 mcs7_sgi_max_len:4; 188 189 // Offset 28 190 u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) 191 u32 mcsg4_max_len:4; 192 u32 mcsg5_max_len:4; 193 u32 mcsg6_max_len:4; 194 u32 mcs15_sgi_max_len:4; 195 196 // Offset 32 197 u32 rsvd32; 198 199 // Offset 36 200 u32 rsvd36; 201 }TXDESC_8812, *PTXDESC_8812; 202 203 204 // Dword 0 205 #define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) 206 #define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) 207 #define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) 208 #define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) 209 #define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) 210 #define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) 211 #define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) 212 #define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) 213 #define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) 214 #define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) 215 #define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) 216 217 // Dword 1 218 #define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) 219 #define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) 220 #define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) 221 #define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) 222 #define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) 223 #define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) 224 #define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) 225 #define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) 226 #define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) 227 228 // Dword 2 229 #define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) 230 #define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) 231 #define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) 232 #define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) 233 #define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) 234 #define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) 235 #define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) 236 #define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) 237 #define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) 238 #define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) 239 #define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) 240 241 // Dword 3 242 #define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) 243 #define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) 244 #define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) 245 #define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) 246 #define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) 247 #define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) 248 #define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) 249 #define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) 250 #define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) 251 #define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) 252 #define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) 253 #define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) 254 #define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) 255 #define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) 256 #define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) 257 258 // Dword 4 259 #define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) 260 #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) 261 #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) 262 #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) 263 #define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) 264 #define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) 265 266 // Dword 5 267 #define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) 268 #define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) 269 #define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) 270 #define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) 271 #define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) 272 #define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) 273 #define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) 274 #define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) 275 #define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) 276 277 // Dword 6 278 #define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) 279 #define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) 280 #define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) 281 #define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) 282 #define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) 283 #define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) 284 285 // Dword 7 286 #define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 287 #define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 288 #define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) 289 #ifdef CONFIG_SDIO_HCI 290 #define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) 291 #endif 292 293 // Dword 8 294 #define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) 295 296 // Dword 9 297 #define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) 298 299 // Dword 10 300 #define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) 301 #define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) 302 303 // Dword 11 304 #define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) 305 306 307 #define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) 308 #define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) 309 #define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) 310 #define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) 311 #define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) 312 #define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) 313 314 #ifdef CONFIG_TX_EARLY_MODE 315 #define USB_DUMMY_OFFSET 2 316 #else 317 #define USB_DUMMY_OFFSET 1 318 #endif 319 #define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) 320 321 322 void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); 323 void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); 324 void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); 325 void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); 326 void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); 327 328 #ifdef CONFIG_USB_HCI 329 s32 rtl8812au_init_xmit_priv(PADAPTER padapter); 330 void rtl8812au_free_xmit_priv(PADAPTER padapter); 331 s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 332 s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 333 s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 334 s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); 335 void rtl8812au_xmit_tasklet(void *priv); 336 s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 337 #endif 338 339 #ifdef CONFIG_PCI_HCI 340 s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); 341 void rtl8812ae_free_xmit_priv(PADAPTER padapter); 342 struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); 343 void rtl8812ae_xmitframe_resume(_adapter *padapter); 344 s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 345 s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 346 s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 347 void rtl8812ae_xmit_tasklet(void *priv); 348 #endif 349 350 #ifdef CONFIG_TX_EARLY_MODE 351 void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); 352 #endif 353 354 void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); 355 356 u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); 357 358 u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); 359 360 #endif //__RTL8812_XMIT_H__ 361 362 #ifdef CONFIG_RTL8821A 363 #include "rtl8821a_xmit.h" 364 #endif // CONFIG_RTL8821A 365 366