1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __RTL8812A_HAL_H__ 21 #define __RTL8812A_HAL_H__ 22 23 //#include "hal_com.h" 24 #include "hal_data.h" 25 26 //include HAL Related header after HAL Related compiling flags 27 #include "rtl8812a_spec.h" 28 #include "rtl8812a_rf.h" 29 #include "rtl8812a_dm.h" 30 #include "rtl8812a_recv.h" 31 #include "rtl8812a_xmit.h" 32 #include "rtl8812a_cmd.h" 33 #include "rtl8812a_led.h" 34 #include "Hal8812PwrSeq.h" 35 #include "Hal8821APwrSeq.h" //for 8821A/8811A 36 #include "Hal8812PhyReg.h" 37 #include "Hal8812PhyCfg.h" 38 #ifdef DBG_CONFIG_ERROR_DETECT 39 #include "rtl8812a_sreset.h" 40 #endif 41 42 43 //--------------------------------------------------------------------- 44 // RTL8812AU From header 45 //--------------------------------------------------------------------- 46 #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" 47 #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" 48 #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" 49 #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" 50 #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" 51 #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" 52 #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" 53 #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" 54 #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" 55 #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" 56 #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" 57 #define RTL8812_WIFI_ANT_ISOLATION "rtl8812a/wifi_ant_isolation.txt" 58 59 //--------------------------------------------------------------------- 60 // RTL8821U From file 61 //--------------------------------------------------------------------- 62 #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" 63 #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" 64 #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" 65 #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" 66 #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" 67 #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" 68 #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" 69 #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" 70 #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" 71 #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" 72 #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" 73 74 //--------------------------------------------------------------------- 75 // RTL8812 Power Configuration CMDs for PCIe interface 76 //--------------------------------------------------------------------- 77 #define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow 78 #define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow 79 #define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow 80 #define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow 81 #define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow 82 #define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow 83 #define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow 84 #define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow 85 #define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow 86 87 //--------------------------------------------------------------------- 88 // RTL8821 Power Configuration CMDs for PCIe interface 89 //--------------------------------------------------------------------- 90 #define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow 91 #define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow 92 #define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow 93 #define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow 94 #define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow 95 #define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow 96 #define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow 97 #define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow 98 #define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow 99 100 101 #if 1 // download firmware related data structure 102 #define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k 103 #define FW_START_ADDRESS 0x1000 104 #define FW_END_ADDRESS 0x5FFF 105 106 107 108 typedef struct _RT_FIRMWARE_8812 { 109 FIRMWARE_SOURCE eFWSource; 110 #ifdef CONFIG_EMBEDDED_FWIMG 111 u8* szFwBuffer; 112 #else 113 u8 szFwBuffer[FW_SIZE_8812]; 114 #endif 115 u32 ulFwLength; 116 } RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; 117 118 // 119 // This structure must be cared byte-ordering 120 // 121 // Added by tynli. 2009.12.04. 122 #define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) 123 124 #define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) 125 //===================================================== 126 // Firmware Header(8-byte alinment required) 127 //===================================================== 128 //--- LONG WORD 0 ---- 129 #define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut 130 #define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI 131 #define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions 132 #define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version 133 #define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 134 #define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) 135 136 //--- LONG WORD 1 ---- 137 #define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field 138 #define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field 139 #define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field 140 #define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field 141 #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code 142 #define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) 143 144 //--- LONG WORD 2 ---- 145 #define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index 146 #define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) 147 148 //--- LONG WORD 3 ---- 149 #define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) 150 #define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) 151 152 #endif // download firmware related data structure 153 154 155 #define DRIVER_EARLY_INT_TIME_8812 0x05 156 #define BCN_DMA_ATIME_INT_TIME_8812 0x02 157 158 //for 8812 159 // TX 128K, RX 16K, Page size 512B for TX, 128B for RX 160 #define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */ 161 162 #ifdef CONFIG_WOWLAN 163 #define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/ 164 #else 165 #define RESV_FMWF 0 166 #endif 167 168 #ifdef CONFIG_FW_C2H_DEBUG 169 #define RX_DMA_RESERVED_SIZE_8812 0x100 // 256B, reserved for c2h debug message 170 #else 171 #define RX_DMA_RESERVED_SIZE_8812 0x0 // 0B 172 #endif 173 #define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) 174 175 #define BCNQ_PAGE_NUM_8812 0x07 176 177 //For WoWLan , more reserved page 178 //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 179 #ifdef CONFIG_WOWLAN 180 #define WOWLAN_PAGE_NUM_8812 0x05 181 #else 182 #define WOWLAN_PAGE_NUM_8812 0x00 183 #endif 184 185 #define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812) 186 #define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) 187 188 #define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1) 189 190 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_PAGE_BOUNDARY_8812 191 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) 192 193 // For Normal Chip Setting 194 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 195 #define NORMAL_PAGE_NUM_LPQ_8812 0x10 196 #define NORMAL_PAGE_NUM_HPQ_8812 0x10 197 #define NORMAL_PAGE_NUM_NPQ_8812 0x00 198 199 #define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 200 #define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 201 #define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 202 203 204 // for 8821A 205 // TX 64K, RX 16K, Page size 256B for TX, 128B for RX 206 #define PAGE_SIZE_TX_8821A 256 207 #define PAGE_SIZE_RX_8821A 128 208 209 #define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */ 210 211 #ifdef CONFIG_FW_C2H_DEBUG 212 #define RX_DMA_RESERVED_SIZE_8821 0x100 // 256B, reserved for c2h debug message 213 #else 214 #define RX_DMA_RESERVED_SIZE_8821 0x0 // 0B 215 #endif 216 #define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) 217 218 #define BCNQ_PAGE_NUM_8821 0x08 219 #ifdef CONFIG_CONCURRENT_MODE 220 #define BCNQ1_PAGE_NUM_8821 0x04 221 #else 222 #define BCNQ1_PAGE_NUM_8821 0x00 223 #endif 224 225 //For WoWLan , more reserved page 226 //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 227 #ifdef CONFIG_WOWLAN 228 #define WOWLAN_PAGE_NUM_8821 0x06 229 #else 230 #define WOWLAN_PAGE_NUM_8821 0x00 231 #endif 232 233 #define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) 234 #define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) 235 //#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 236 237 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 238 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) 239 240 241 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER 242 #define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 243 #define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 244 #define NORMAL_PAGE_NUM_NPQ_8821 0x00 245 246 #define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 247 #define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 248 #define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 249 250 251 #define EFUSE_HIDDEN_812AU 0 252 #define EFUSE_HIDDEN_812AU_VS 1 253 #define EFUSE_HIDDEN_812AU_VL 2 254 #define EFUSE_HIDDEN_812AU_VN 3 255 256 #if 0 257 #define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 258 #define HWSET_MAX_SIZE_JAGUAR 1024 259 #else 260 #define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 261 #define HWSET_MAX_SIZE_JAGUAR 512 262 #endif 263 264 #define EFUSE_MAX_BANK_8812A 2 265 #define EFUSE_MAP_LEN_JAGUAR 512 266 #define EFUSE_MAX_SECTION_JAGUAR 64 267 #define EFUSE_MAX_WORD_UNIT_JAGUAR 4 268 #define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. 269 #define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) 270 // <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section 271 // 9bytes + 1byt + 5bytes and pre 1byte. 272 // For worst case: 273 // | 2byte|----8bytes----|1byte|--7bytes--| //92D 274 #define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. 275 #define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 276 // Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. 277 typedef enum _TX_PWR_PERCENTAGE{ 278 TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% 279 TX_PWR_PERCENTAGE_1 = 0x02, // 25% 280 TX_PWR_PERCENTAGE_2 = 0x04, // 50% 281 TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. 282 } TX_PWR_PERCENTAGE; 283 284 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) 285 #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) 286 287 //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) 288 289 //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) 290 291 // rtl8812_hal_init.c 292 void _8051Reset8812(PADAPTER padapter); 293 s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); 294 void InitializeFirmwareVars8812(PADAPTER padapter); 295 296 s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); 297 s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); 298 void InitRDGSetting8812A(PADAPTER padapter); 299 300 void CheckAutoloadState8812A(PADAPTER padapter); 301 302 // EFuse 303 u8 GetEEPROMSize8812A(PADAPTER padapter); 304 void InitPGData8812A(PADAPTER padapter); 305 void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); 306 void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 307 void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); 308 void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); 309 void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); 310 void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 311 void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); 312 void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); 313 void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail); 314 void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); 315 void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); 316 void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); 317 void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); 318 void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 319 int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); 320 void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); 321 322 BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); 323 void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 324 325 #ifdef CONFIG_WOWLAN 326 void Hal_DetectWoWMode(PADAPTER pAdapter); 327 #endif //CONFIG_WOWLAN 328 329 void _InitBeaconParameters_8812A(PADAPTER padapter); 330 void SetBeaconRelatedRegisters8812A(PADAPTER padapter); 331 332 void ReadRFType8812A(PADAPTER padapter); 333 void InitDefaultValue8821A(PADAPTER padapter); 334 335 void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); 336 void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); 337 u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 338 u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 339 s32 c2h_id_filter_ccx_8812a(u8 *buf); 340 void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); 341 342 // register 343 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); 344 345 void rtl8812_start_thread(PADAPTER padapter); 346 void rtl8812_stop_thread(PADAPTER padapter); 347 348 #ifdef CONFIG_PCI_HCI 349 BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); 350 VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); 351 #endif 352 353 #ifdef CONFIG_BT_COEXIST 354 void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); 355 #endif 356 357 358 #endif //__RTL8188E_HAL_H__ 359 360