1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __RTL8703B_CMD_H__ 21 #define __RTL8703B_CMD_H__ 22 23 //---------------------------------------------------------------------------------------------------------// 24 //---------------------------------- H2C CMD DEFINITION ------------------------------------------------// 25 //---------------------------------------------------------------------------------------------------------// 26 27 enum h2c_cmd_8703B{ 28 //Common Class: 000 29 H2C_8703B_RSVD_PAGE = 0x00, 30 H2C_8703B_MEDIA_STATUS_RPT = 0x01, 31 H2C_8703B_SCAN_ENABLE = 0x02, 32 H2C_8703B_KEEP_ALIVE = 0x03, 33 H2C_8703B_DISCON_DECISION = 0x04, 34 H2C_8703B_PSD_OFFLOAD = 0x05, 35 H2C_8703B_AP_OFFLOAD = 0x08, 36 H2C_8703B_BCN_RSVDPAGE = 0x09, 37 H2C_8703B_PROBERSP_RSVDPAGE = 0x0A, 38 H2C_8703B_FCS_RSVDPAGE = 0x10, 39 H2C_8703B_FCS_INFO = 0x11, 40 H2C_8703B_AP_WOW_GPIO_CTRL = 0x13, 41 42 //PoweSave Class: 001 43 H2C_8703B_SET_PWR_MODE = 0x20, 44 H2C_8703B_PS_TUNING_PARA = 0x21, 45 H2C_8703B_PS_TUNING_PARA2 = 0x22, 46 H2C_8703B_P2P_LPS_PARAM = 0x23, 47 H2C_8703B_P2P_PS_OFFLOAD = 0x24, 48 H2C_8703B_PS_SCAN_ENABLE = 0x25, 49 H2C_8703B_SAP_PS_ = 0x26, 50 H2C_8703B_INACTIVE_PS_ = 0x27, //Inactive_PS 51 H2C_8703B_FWLPS_IN_IPS_ = 0x28, 52 53 //Dynamic Mechanism Class: 010 54 H2C_8703B_MACID_CFG = 0x40, 55 H2C_8703B_TXBF = 0x41, 56 H2C_8703B_RSSI_SETTING = 0x42, 57 H2C_8703B_AP_REQ_TXRPT = 0x43, 58 H2C_8703B_INIT_RATE_COLLECT = 0x44, 59 H2C_8703B_RA_PARA_ADJUST = 0x46, 60 61 //BT Class: 011 62 H2C_8703B_B_TYPE_TDMA = 0x60, 63 H2C_8703B_BT_INFO = 0x61, 64 H2C_8703B_FORCE_BT_TXPWR = 0x62, 65 H2C_8703B_BT_IGNORE_WLANACT = 0x63, 66 H2C_8703B_DAC_SWING_VALUE = 0x64, 67 H2C_8703B_ANT_SEL_RSV = 0x65, 68 H2C_8703B_WL_OPMODE = 0x66, 69 H2C_8703B_BT_MP_OPER = 0x67, 70 H2C_8703B_BT_CONTROL = 0x68, 71 H2C_8703B_BT_WIFI_CTRL = 0x69, 72 H2C_8703B_BT_FW_PATCH = 0x6A, 73 H2C_8703B_BT_WLAN_CALIBRATION = 0x6D, 74 75 //WOWLAN Class: 100 76 H2C_8703B_WOWLAN = 0x80, 77 H2C_8703B_REMOTE_WAKE_CTRL = 0x81, 78 H2C_8703B_AOAC_GLOBAL_INFO = 0x82, 79 H2C_8703B_AOAC_RSVD_PAGE = 0x83, 80 H2C_8703B_AOAC_RSVD_PAGE2 = 0x84, 81 H2C_8703B_D0_SCAN_OFFLOAD_CTRL = 0x85, 82 H2C_8703B_D0_SCAN_OFFLOAD_INFO = 0x86, 83 H2C_8703B_CHNL_SWITCH_OFFLOAD = 0x87, 84 H2C_8703B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, 85 H2C_8703B_P2P_OFFLOAD = 0x8B, 86 87 H2C_8703B_RESET_TSF = 0xC0, 88 H2C_8703B_MAXID, 89 }; 90 91 //---------------------------------------------------------------------------------------------------------// 92 //---------------------------------- H2C CMD CONTENT --------------------------------------------------// 93 //---------------------------------------------------------------------------------------------------------// 94 //_RSVDPAGE_LOC_CMD_0x00 95 #define SET_8703B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) 96 #define SET_8703B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) 97 #define SET_8703B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) 98 #define SET_8703B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) 99 #define SET_8703B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) 100 101 //_MEDIA_STATUS_RPT_PARM_CMD_0x01 102 #define SET_8703B_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 103 #define SET_8703B_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 104 #define SET_8703B_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) 105 #define SET_8703B_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) 106 107 //_KEEP_ALIVE_CMD_0x03 108 #define SET_8703B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 109 #define SET_8703B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 110 #define SET_8703B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 111 #define SET_8703B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) 112 113 //_DISCONNECT_DECISION_CMD_0x04 114 #define SET_8703B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 115 #define SET_8703B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 116 #define SET_8703B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) 117 #define SET_8703B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) 118 119 // _PWR_MOD_CMD_0x20 120 #define SET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) 121 #define SET_8703B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) 122 #define SET_8703B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) 123 #define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) 124 #define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) 125 #define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) 126 #define SET_8703B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) 127 128 #define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) 129 130 // _PS_TUNE_PARAM_CMD_0x21 131 #define SET_8703B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 132 #define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 133 #define SET_8703B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) 134 #define SET_8703B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) 135 #define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 136 137 //_MACID_CFG_CMD_0x40 138 #define SET_8703B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 139 #define SET_8703B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) 140 #define SET_8703B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) 141 #define SET_8703B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) 142 #define SET_8703B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) 143 #define SET_8703B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) 144 #define SET_8703B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) 145 #define SET_8703B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) 146 #define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 147 #define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 148 #define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) 149 #define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) 150 151 //_RSSI_SETTING_CMD_0x42 152 #define SET_8703B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 153 #define SET_8703B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) 154 #define SET_8703B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 155 156 // _AP_REQ_TXRPT_CMD_0x43 157 #define SET_8703B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 158 #define SET_8703B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 159 160 // _FORCE_BT_TXPWR_CMD_0x62 161 #define SET_8703B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) 162 163 // _FORCE_BT_MP_OPER_CMD_0x67 164 #define SET_8703B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 165 #define SET_8703B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 166 #define SET_8703B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 167 #define SET_8703B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 168 #define SET_8703B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 169 #define SET_8703B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 170 171 // _BT_FW_PATCH_0x6A 172 #define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) 173 #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 174 #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 175 #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 176 #define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 177 178 //---------------------------------------------------------------------------------------------------------// 179 //------------------------------------------- Structure --------------------------------------------------// 180 //---------------------------------------------------------------------------------------------------------// 181 182 183 //---------------------------------------------------------------------------------------------------------// 184 //---------------------------------- Function Statement --------------------------------------------------// 185 //---------------------------------------------------------------------------------------------------------// 186 187 // host message to firmware cmd 188 void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); 189 void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); 190 void rtl8703b_set_rssi_cmd(PADAPTER padapter, u8 *param); 191 void rtl8703b_Add_RateATid(PADAPTER pAdapter, u64 rate_bitmap, u8 *arg, u8 rssi_level); 192 void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); 193 //s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); 194 void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter); 195 void rtl8703b_set_FwMacIdConfig_cmd(_adapter* padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask); 196 void rtl8703b_set_FwMediaStatusRpt_cmd(PADAPTER padapter, u8 mstatus, u8 macid); 197 void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); 198 void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus); 199 #ifdef CONFIG_BT_COEXIST 200 void rtl8703b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); 201 #endif // CONFIG_BT_COEXIST 202 #ifdef CONFIG_P2P 203 void rtl8703b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); 204 #endif //CONFIG_P2P 205 206 void CheckFwRsvdPageContent(PADAPTER padapter); 207 208 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 209 void SetFwRelatedForWoWLAN8703b(_adapter* padapter, u8 bHostIsGoingtoSleep); 210 #endif//CONFIG_WOWLAN 211 212 #ifdef CONFIG_P2P_WOWLAN 213 void rtl8703b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); 214 #endif 215 216 void rtl8703b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); 217 218 #ifdef CONFIG_TSF_RESET_OFFLOAD 219 u8 rtl8703b_reset_tsf(_adapter *padapter, u8 reset_port); 220 #endif // CONFIG_TSF_RESET_OFFLOAD 221 s32 FillH2CCmd8703B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 222 u8 GetTxBufferRsvdPageNum8703B(_adapter *padapter, bool wowlan); 223 #endif 224 225