xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/include/hal_com.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2017 Realtek Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  * more details.
14  *
15  *****************************************************************************/
16 #ifndef __HAL_COMMON_H__
17 #define __HAL_COMMON_H__
18 
19 #include "HalVerDef.h"
20 #include "hal_pg.h"
21 #include "hal_phy.h"
22 #include "hal_phy_reg.h"
23 #include "hal_com_reg.h"
24 #include "hal_com_phycfg.h"
25 #include "../hal/hal_com_c2h.h"
26 
27 /*------------------------------ Tx Desc definition Macro ------------------------*/
28 /* #pragma mark -- Tx Desc related definition. -- */
29 /* ----------------------------------------------------------------------------
30  * -----------------------------------------------------------
31  *	Rate
32  * -----------------------------------------------------------
33  * CCK Rates, TxHT = 0 */
34 #define DESC_RATE1M					0x00
35 #define DESC_RATE2M					0x01
36 #define DESC_RATE5_5M				0x02
37 #define DESC_RATE11M				0x03
38 
39 /* OFDM Rates, TxHT = 0 */
40 #define DESC_RATE6M					0x04
41 #define DESC_RATE9M					0x05
42 #define DESC_RATE12M				0x06
43 #define DESC_RATE18M				0x07
44 #define DESC_RATE24M				0x08
45 #define DESC_RATE36M				0x09
46 #define DESC_RATE48M				0x0a
47 #define DESC_RATE54M				0x0b
48 
49 /* MCS Rates, TxHT = 1 */
50 #define DESC_RATEMCS0				0x0c
51 #define DESC_RATEMCS1				0x0d
52 #define DESC_RATEMCS2				0x0e
53 #define DESC_RATEMCS3				0x0f
54 #define DESC_RATEMCS4				0x10
55 #define DESC_RATEMCS5				0x11
56 #define DESC_RATEMCS6				0x12
57 #define DESC_RATEMCS7				0x13
58 #define DESC_RATEMCS8				0x14
59 #define DESC_RATEMCS9				0x15
60 #define DESC_RATEMCS10				0x16
61 #define DESC_RATEMCS11				0x17
62 #define DESC_RATEMCS12				0x18
63 #define DESC_RATEMCS13				0x19
64 #define DESC_RATEMCS14				0x1a
65 #define DESC_RATEMCS15				0x1b
66 #define DESC_RATEMCS16				0x1C
67 #define DESC_RATEMCS17				0x1D
68 #define DESC_RATEMCS18				0x1E
69 #define DESC_RATEMCS19				0x1F
70 #define DESC_RATEMCS20				0x20
71 #define DESC_RATEMCS21				0x21
72 #define DESC_RATEMCS22				0x22
73 #define DESC_RATEMCS23				0x23
74 #define DESC_RATEMCS24				0x24
75 #define DESC_RATEMCS25				0x25
76 #define DESC_RATEMCS26				0x26
77 #define DESC_RATEMCS27				0x27
78 #define DESC_RATEMCS28				0x28
79 #define DESC_RATEMCS29				0x29
80 #define DESC_RATEMCS30				0x2A
81 #define DESC_RATEMCS31				0x2B
82 #define DESC_RATEVHTSS1MCS0		0x2C
83 #define DESC_RATEVHTSS1MCS1		0x2D
84 #define DESC_RATEVHTSS1MCS2		0x2E
85 #define DESC_RATEVHTSS1MCS3		0x2F
86 #define DESC_RATEVHTSS1MCS4		0x30
87 #define DESC_RATEVHTSS1MCS5		0x31
88 #define DESC_RATEVHTSS1MCS6		0x32
89 #define DESC_RATEVHTSS1MCS7		0x33
90 #define DESC_RATEVHTSS1MCS8		0x34
91 #define DESC_RATEVHTSS1MCS9		0x35
92 #define DESC_RATEVHTSS2MCS0		0x36
93 #define DESC_RATEVHTSS2MCS1		0x37
94 #define DESC_RATEVHTSS2MCS2		0x38
95 #define DESC_RATEVHTSS2MCS3		0x39
96 #define DESC_RATEVHTSS2MCS4		0x3A
97 #define DESC_RATEVHTSS2MCS5		0x3B
98 #define DESC_RATEVHTSS2MCS6		0x3C
99 #define DESC_RATEVHTSS2MCS7		0x3D
100 #define DESC_RATEVHTSS2MCS8		0x3E
101 #define DESC_RATEVHTSS2MCS9		0x3F
102 #define DESC_RATEVHTSS3MCS0		0x40
103 #define DESC_RATEVHTSS3MCS1		0x41
104 #define DESC_RATEVHTSS3MCS2		0x42
105 #define DESC_RATEVHTSS3MCS3		0x43
106 #define DESC_RATEVHTSS3MCS4		0x44
107 #define DESC_RATEVHTSS3MCS5		0x45
108 #define DESC_RATEVHTSS3MCS6		0x46
109 #define DESC_RATEVHTSS3MCS7		0x47
110 #define DESC_RATEVHTSS3MCS8		0x48
111 #define DESC_RATEVHTSS3MCS9		0x49
112 #define DESC_RATEVHTSS4MCS0		0x4A
113 #define DESC_RATEVHTSS4MCS1		0x4B
114 #define DESC_RATEVHTSS4MCS2		0x4C
115 #define DESC_RATEVHTSS4MCS3		0x4D
116 #define DESC_RATEVHTSS4MCS4		0x4E
117 #define DESC_RATEVHTSS4MCS5		0x4F
118 #define DESC_RATEVHTSS4MCS6		0x50
119 #define DESC_RATEVHTSS4MCS7		0x51
120 #define DESC_RATEVHTSS4MCS8		0x52
121 #define DESC_RATEVHTSS4MCS9		0x53
122 
123 #define HDATA_RATE(rate)\
124 	(rate == DESC_RATE1M) ? "CCK_1M" :\
125 	(rate == DESC_RATE2M) ? "CCK_2M" :\
126 	(rate == DESC_RATE5_5M) ? "CCK5_5M" :\
127 	(rate == DESC_RATE11M) ? "CCK_11M" :\
128 	(rate == DESC_RATE6M) ? "OFDM_6M" :\
129 	(rate == DESC_RATE9M) ? "OFDM_9M" :\
130 	(rate == DESC_RATE12M) ? "OFDM_12M" :\
131 	(rate == DESC_RATE18M) ? "OFDM_18M" :\
132 	(rate == DESC_RATE24M) ? "OFDM_24M" :\
133 	(rate == DESC_RATE36M) ? "OFDM_36M" :\
134 	(rate == DESC_RATE48M) ? "OFDM_48M" :\
135 	(rate == DESC_RATE54M) ? "OFDM_54M" :\
136 	(rate == DESC_RATEMCS0) ? "MCS0" :\
137 	(rate == DESC_RATEMCS1) ? "MCS1" :\
138 	(rate == DESC_RATEMCS2) ? "MCS2" :\
139 	(rate == DESC_RATEMCS3) ? "MCS3" :\
140 	(rate == DESC_RATEMCS4) ? "MCS4" :\
141 	(rate == DESC_RATEMCS5) ? "MCS5" :\
142 	(rate == DESC_RATEMCS6) ? "MCS6" :\
143 	(rate == DESC_RATEMCS7) ? "MCS7" :\
144 	(rate == DESC_RATEMCS8) ? "MCS8" :\
145 	(rate == DESC_RATEMCS9) ? "MCS9" :\
146 	(rate == DESC_RATEMCS10) ? "MCS10" :\
147 	(rate == DESC_RATEMCS11) ? "MCS11" :\
148 	(rate == DESC_RATEMCS12) ? "MCS12" :\
149 	(rate == DESC_RATEMCS13) ? "MCS13" :\
150 	(rate == DESC_RATEMCS14) ? "MCS14" :\
151 	(rate == DESC_RATEMCS15) ? "MCS15" :\
152 	(rate == DESC_RATEMCS16) ? "MCS16" :\
153 	(rate == DESC_RATEMCS17) ? "MCS17" :\
154 	(rate == DESC_RATEMCS18) ? "MCS18" :\
155 	(rate == DESC_RATEMCS19) ? "MCS19" :\
156 	(rate == DESC_RATEMCS20) ? "MCS20" :\
157 	(rate == DESC_RATEMCS21) ? "MCS21" :\
158 	(rate == DESC_RATEMCS22) ? "MCS22" :\
159 	(rate == DESC_RATEMCS23) ? "MCS23" :\
160 	(rate == DESC_RATEVHTSS1MCS0) ? "VHTSS1MCS0" :\
161 	(rate == DESC_RATEVHTSS1MCS1) ? "VHTSS1MCS1" :\
162 	(rate == DESC_RATEVHTSS1MCS2) ? "VHTSS1MCS2" :\
163 	(rate == DESC_RATEVHTSS1MCS3) ? "VHTSS1MCS3" :\
164 	(rate == DESC_RATEVHTSS1MCS4) ? "VHTSS1MCS4" :\
165 	(rate == DESC_RATEVHTSS1MCS5) ? "VHTSS1MCS5" :\
166 	(rate == DESC_RATEVHTSS1MCS6) ? "VHTSS1MCS6" :\
167 	(rate == DESC_RATEVHTSS1MCS7) ? "VHTSS1MCS7" :\
168 	(rate == DESC_RATEVHTSS1MCS8) ? "VHTSS1MCS8" :\
169 	(rate == DESC_RATEVHTSS1MCS9) ? "VHTSS1MCS9" :\
170 	(rate == DESC_RATEVHTSS2MCS0) ? "VHTSS2MCS0" :\
171 	(rate == DESC_RATEVHTSS2MCS1) ? "VHTSS2MCS1" :\
172 	(rate == DESC_RATEVHTSS2MCS2) ? "VHTSS2MCS2" :\
173 	(rate == DESC_RATEVHTSS2MCS3) ? "VHTSS2MCS3" :\
174 	(rate == DESC_RATEVHTSS2MCS4) ? "VHTSS2MCS4" :\
175 	(rate == DESC_RATEVHTSS2MCS5) ? "VHTSS2MCS5" :\
176 	(rate == DESC_RATEVHTSS2MCS6) ? "VHTSS2MCS6" :\
177 	(rate == DESC_RATEVHTSS2MCS7) ? "VHTSS2MCS7" :\
178 	(rate == DESC_RATEVHTSS2MCS8) ? "VHTSS2MCS8" :\
179 	(rate == DESC_RATEVHTSS2MCS9) ? "VHTSS2MCS9" :\
180 	(rate == DESC_RATEVHTSS3MCS0) ? "VHTSS3MCS0" :\
181 	(rate == DESC_RATEVHTSS3MCS1) ? "VHTSS3MCS1" :\
182 	(rate == DESC_RATEVHTSS3MCS2) ? "VHTSS3MCS2" :\
183 	(rate == DESC_RATEVHTSS3MCS3) ? "VHTSS3MCS3" :\
184 	(rate == DESC_RATEVHTSS3MCS4) ? "VHTSS3MCS4" :\
185 	(rate == DESC_RATEVHTSS3MCS5) ? "VHTSS3MCS5" :\
186 	(rate == DESC_RATEVHTSS3MCS6) ? "VHTSS3MCS6" :\
187 	(rate == DESC_RATEVHTSS3MCS7) ? "VHTSS3MCS7" :\
188 	(rate == DESC_RATEVHTSS3MCS8) ? "VHTSS3MCS8" :\
189 	(rate == DESC_RATEVHTSS3MCS9) ? "VHTSS3MCS9" : "UNKNOWN"
190 
191 enum {
192 	UP_LINK,
193 	DOWN_LINK,
194 };
195 typedef enum _RT_MEDIA_STATUS {
196 	RT_MEDIA_DISCONNECT = 0,
197 	RT_MEDIA_CONNECT       = 1
198 } RT_MEDIA_STATUS;
199 
200 #define MAX_DLFW_PAGE_SIZE			4096	/* @ page : 4k bytes */
201 typedef enum _FIRMWARE_SOURCE {
202 	FW_SOURCE_IMG_FILE = 0,
203 	FW_SOURCE_HEADER_FILE = 1,		/* from header file */
204 } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
205 
206 typedef enum _CH_SW_USE_CASE {
207 	CH_SW_USE_CASE_TDLS		= 0,
208 	CH_SW_USE_CASE_MCC		= 1
209 } CH_SW_USE_CASE;
210 
211 typedef enum _WAKEUP_REASON{
212 	RX_PAIRWISEKEY					= 0x01,
213 	RX_GTK							= 0x02,
214 	RX_FOURWAY_HANDSHAKE			= 0x03,
215 	RX_DISASSOC						= 0x04,
216 	RX_DEAUTH						= 0x08,
217 	RX_ARP_REQUEST					= 0x09,
218 	FW_DECISION_DISCONNECT			= 0x10,
219 	RX_MAGIC_PKT					= 0x21,
220 	RX_UNICAST_PKT					= 0x22,
221 	RX_PATTERN_PKT					= 0x23,
222 	RTD3_SSID_MATCH					= 0x24,
223 	RX_REALWOW_V2_WAKEUP_PKT		= 0x30,
224 	RX_REALWOW_V2_ACK_LOST			= 0x31,
225 	ENABLE_FAIL_DMA_IDLE			= 0x40,
226 	ENABLE_FAIL_DMA_PAUSE			= 0x41,
227 	RTIME_FAIL_DMA_IDLE				= 0x42,
228 	RTIME_FAIL_DMA_PAUSE			= 0x43,
229 	RX_PNO							= 0x55,
230 	AP_OFFLOAD_WAKEUP				= 0x66,
231 	CLK_32K_UNLOCK					= 0xFD,
232 	CLK_32K_LOCK					= 0xFE
233 }WAKEUP_REASON;
234 
235 /*
236  * Queue Select Value in TxDesc
237  *   */
238 #define QSLT_BK							0x2/* 0x01 */
239 #define QSLT_BE							0x0
240 #define QSLT_VI							0x5/* 0x4 */
241 #define QSLT_VO							0x7/* 0x6 */
242 #define QSLT_BEACON						0x10
243 #define QSLT_HIGH						0x11
244 #define QSLT_MGNT						0x12
245 #define QSLT_CMD						0x13
246 
247 /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
248  * #define MAX_TX_QUEUE		9 */
249 
250 #define TX_SELE_HQ			BIT(0)		/* High Queue */
251 #define TX_SELE_LQ			BIT(1)		/* Low Queue */
252 #define TX_SELE_NQ			BIT(2)		/* Normal Queue */
253 #define TX_SELE_EQ			BIT(3)		/* Extern Queue */
254 
255 #define PageNum_128(_Len)		(u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
256 #define PageNum_256(_Len)		(u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0))
257 #define PageNum_512(_Len)		(u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0))
258 #define PageNum(_Len, _Size)		(u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0))
259 
260 struct dbg_rx_counter {
261 	u32	rx_pkt_ok;
262 	u32	rx_pkt_crc_error;
263 	u32	rx_pkt_drop;
264 	u32	rx_ofdm_fa;
265 	u32	rx_cck_fa;
266 	u32	rx_ht_fa;
267 };
268 
269 u8 rtw_hal_get_port(_adapter *adapter);
270 
271 #ifdef CONFIG_MBSSID_CAM
272 	#define DBG_MBID_CAM_DUMP
273 
274 	void rtw_mbid_cam_init(struct dvobj_priv *dvobj);
275 	void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj);
276 	void rtw_mbid_cam_reset(_adapter *adapter);
277 	u8 rtw_get_max_mbid_cam_id(_adapter *adapter);
278 	u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
279 	int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
280 	int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
281 	void rtw_mi_set_mbid_cam(_adapter *adapter);
282 	u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
283 	void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num);
284 	void rtw_mbid_cam_enable(_adapter *adapter);
285 #endif
286 
287 #ifdef CONFIG_MI_WITH_MBSSID_CAM
288 	void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
289 	void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
290 	#ifdef CONFIG_SWTIMER_BASED_TXBCN
291 	u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval);
292 	#endif
293 	void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
294 #endif
295 
296 void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
297 void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
298 void rtw_reset_mac_rx_counters(_adapter *padapter);
299 void rtw_reset_phy_rx_counters(_adapter *padapter);
300 void rtw_reset_phy_trx_ok_counters(_adapter *padapter);
301 
302 #ifdef DBG_RX_COUNTER_DUMP
303 	#define DUMP_DRV_RX_COUNTER	BIT0
304 	#define DUMP_MAC_RX_COUNTER	BIT1
305 	#define DUMP_PHY_RX_COUNTER	BIT2
306 	#define DUMP_DRV_TRX_COUNTER_DATA	BIT3
307 
308 	void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode);
309 	void rtw_dump_rx_counters(_adapter *padapter);
310 #endif
311 
312 void dump_chip_info(HAL_VERSION	ChipVersion);
313 void rtw_hal_config_rftype(PADAPTER  padapter);
314 
315 #define BAND_CAP_2G			BIT0
316 #define BAND_CAP_5G			BIT1
317 #define BAND_CAP_BIT_NUM	2
318 
319 #define BW_CAP_5M		BIT0
320 #define BW_CAP_10M		BIT1
321 #define BW_CAP_20M		BIT2
322 #define BW_CAP_40M		BIT3
323 #define BW_CAP_80M		BIT4
324 #define BW_CAP_160M		BIT5
325 #define BW_CAP_80_80M	BIT6
326 #define BW_CAP_BIT_NUM	7
327 
328 #define PROTO_CAP_11B		BIT0
329 #define PROTO_CAP_11G		BIT1
330 #define PROTO_CAP_11N		BIT2
331 #define PROTO_CAP_11AC		BIT3
332 #define PROTO_CAP_BIT_NUM	4
333 
334 #define WL_FUNC_P2P			BIT0
335 #define WL_FUNC_MIRACAST	BIT1
336 #define WL_FUNC_TDLS		BIT2
337 #define WL_FUNC_FTM			BIT3
338 #define WL_FUNC_BIT_NUM		4
339 
340 #define TBTT_PROHIBIT_SETUP_TIME 0x04 /* 128us, unit is 32us */
341 #define TBTT_PROHIBIT_HOLD_TIME 0x80 /* 4ms, unit is 32us*/
342 #define TBTT_PROHIBIT_HOLD_TIME_STOP_BCN 0x64 /* 3.2ms unit is 32us*/
343 
344 int hal_spec_init(_adapter *adapter);
345 void dump_hal_spec(void *sel, _adapter *adapter);
346 
347 bool hal_chk_band_cap(_adapter *adapter, u8 cap);
348 bool hal_chk_bw_cap(_adapter *adapter, u8 cap);
349 bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
350 bool hal_is_band_support(_adapter *adapter, u8 band);
351 bool hal_is_bw_support(_adapter *adapter, u8 bw);
352 bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
353 bool hal_is_mimo_support(_adapter *adapter);
354 u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
355 
356 bool hal_chk_wl_func(_adapter *adapter, u8 func);
357 
358 void hal_com_config_channel_plan(
359 		PADAPTER padapter,
360 		char *hw_alpha2,
361 		u8 hw_chplan,
362 		char *sw_alpha2,
363 		u8 sw_chplan,
364 		u8 def_chplan,
365 		BOOLEAN AutoLoadFail
366 );
367 
368 int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
369 #ifdef RTW_HALMAC
370 void rtw_hal_hw_port_enable(_adapter *adapter);
371 void rtw_hal_hw_port_disable(_adapter *adapter);
372 #endif
373 
374 BOOLEAN
375 HAL_IsLegalChannel(
376 		PADAPTER	Adapter,
377 		u32			Channel
378 );
379 
380 u8	MRateToHwRate(u8 rate);
381 
382 u8	hw_rate_to_m_rate(u8 rate);
383 
384 void	HalSetBrateCfg(
385 		PADAPTER		Adapter,
386 		u8			*mBratesOS,
387 		u16			*pBrateCfg);
388 
389 BOOLEAN
390 Hal_MappingOutPipe(
391 		PADAPTER	pAdapter,
392 		u8		NumOutPipe
393 );
394 
395 void rtw_dump_fw_info(void *sel, _adapter *adapter);
396 void rtw_restore_hw_port_cfg(_adapter *adapter);
397 void rtw_mi_set_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
398 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
399 
400 void rtw_init_hal_com_default_value(PADAPTER Adapter);
401 
402 #ifdef CONFIG_FW_C2H_REG
403 void c2h_evt_clear(_adapter *adapter);
404 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
405 #endif
406 
407 #ifdef CONFIG_FW_C2H_PKT
408 void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len);
409 void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len);
410 #endif
411 
412 u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type);
413 
414 void rtw_hal_update_sta_wset(_adapter *adapter, struct sta_info *psta);
415 s8 rtw_get_sta_rx_nss(_adapter *adapter, struct sta_info *psta);
416 s8 rtw_get_sta_tx_nss(_adapter *adapter, struct sta_info *psta);
417 void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta);
418 
419 /* access HW only */
420 u32 rtw_sec_read_cam(_adapter *adapter, u8 addr);
421 void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata);
422 void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key);
423 void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key);
424 void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id);
425 bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id);
426 
427 u8 rtw_hal_rcr_check(_adapter *adapter, u32 check_bit);
428 
429 u8 rtw_hal_rcr_add(_adapter *adapter, u32 add);
430 u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear);
431 void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action);
432 
433 void rtw_iface_enable_tsf_update(_adapter *adapter);
434 void rtw_iface_disable_tsf_update(_adapter *adapter);
435 void rtw_hal_periodic_tsf_update_chk(_adapter *adapter);
436 void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx);
437 
438 #if CONFIG_TX_AC_LIFETIME
439 #define TX_ACLT_CONF_DEFAULT	0
440 #define TX_ACLT_CONF_AP_M2U		1
441 #define TX_ACLT_CONF_MESH		2
442 #define TX_ACLT_CONF_NUM		3
443 
444 extern const char *const _tx_aclt_conf_str[];
445 #define tx_aclt_conf_str(conf) (((conf) >= TX_ACLT_CONF_NUM) ? _tx_aclt_conf_str[TX_ACLT_CONF_NUM] : _tx_aclt_conf_str[(conf)])
446 
447 struct tx_aclt_conf_t {
448 	u8 en;
449 	u32 vo_vi;
450 	u32 be_bk;
451 };
452 
453 void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj);
454 void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num);
455 void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj);
456 void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num);
457 void rtw_hal_update_tx_aclt(_adapter *adapter);
458 #endif
459 
460 void hw_var_port_switch(_adapter *adapter);
461 void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val);
462 u8 SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
463 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
464 void rtw_hal_check_rxfifo_full(_adapter *adapter);
465 void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
466 
467 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
468 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
469 
470 BOOLEAN
471 eqNByte(
472 	u8	*str1,
473 	u8	*str2,
474 	u32	num
475 );
476 
477 u32
478 MapCharToHexDigit(
479 		char	chTmp
480 );
481 
482 BOOLEAN
483 GetHexValueFromString(
484 			char		*szStr,
485 			u32			*pu4bVal,
486 			u32			*pu4bMove
487 );
488 
489 BOOLEAN
490 GetFractionValueFromString(
491 			char	*szStr,
492 			u8		*pInteger,
493 			u8		*pFraction,
494 			u32		*pu4bMove
495 );
496 
497 BOOLEAN
498 IsCommentString(
499 			char		*szStr
500 );
501 
502 BOOLEAN
503 ParseQualifiedString(
504 		char *In,
505 		u32 *Start,
506 		char *Out,
507 		char LeftQualifier,
508 		char RightQualifier
509 );
510 
511 BOOLEAN
512 GetU1ByteIntegerFromStringInDecimal(
513 			char *Str,
514 			u8 *pInt
515 );
516 
517 BOOLEAN
518 isAllSpaceOrTab(
519 	u8	*data,
520 	u8	size
521 );
522 
523 void linked_info_dump(_adapter *padapter, u8 benable);
524 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
525 	void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
526 	void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel);
527 #endif
528 
529 #ifdef DBG_RX_DFRAME_RAW_DATA
530 	void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel);
531 #endif
532 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
533 #define		HWSET_MAX_SIZE			1024
534 
535 #ifdef CONFIG_EFUSE_CONFIG_FILE
536 u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
537 u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
538 #endif /* CONFIG_EFUSE_CONFIG_FILE */
539 
540 int hal_efuse_macaddr_offset(_adapter *adapter);
541 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
542 void rtw_dump_cur_efuse(PADAPTER padapter);
543 
544 #ifdef CONFIG_RF_POWER_TRIM
545 	void rtw_bb_rf_gain_offset(_adapter *padapter);
546 #endif /*CONFIG_RF_POWER_TRIM*/
547 
548 void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer);
549 u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
550 
551 u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta);
552 u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta);
553 #ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
554 void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx);
555 #endif
556 void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
557 u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter);
558 
559 #ifdef CONFIG_TSF_RESET_OFFLOAD
560 int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port);
561 #endif
562 u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port);
563 
564 #ifdef CONFIG_TDLS
565 	#ifdef CONFIG_TDLS_CH_SW
566 		s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
567 	#endif
568 #endif
569 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
570 s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter);
571 #endif
572 
573 #ifdef CONFIG_GPIO_API
574 	u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
575 	int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh);
576 	int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput);
577 	int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level));
578 	int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num);
579 #endif
580 
581 s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode);
582 void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter);
583 void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
584 
585 #ifdef CONFIG_GPIO_WAKEUP
586 	void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable);
587 	void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
588 	void rtw_hal_set_input_gpio(_adapter *padapter, u8 index);
589 #endif
590 
591 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
592 	extern char *rtw_phy_file_path;
593 	extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
594 	#define GetLineFromBuffer(buffer)   strsep(&buffer, "\r\n")
595 #endif
596 
597 void update_IOT_info(_adapter *padapter);
598 #ifdef CONFIG_RTS_FULL_BW
599 void rtw_set_rts_bw(_adapter *padapter);
600 #endif/*CONFIG_RTS_FULL_BW*/
601 
602 void ResumeTxBeacon(_adapter *padapter);
603 void StopTxBeacon(_adapter *padapter);
604 
605 #ifdef CONFIG_ANTENNA_DIVERSITY
606 	u8	rtw_hal_antdiv_before_linked(_adapter *padapter);
607 	void	rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
608 #endif
609 
610 #ifdef DBG_SEC_CAM_MOVE
611 	void rtw_hal_move_sta_gk_to_dk(_adapter *adapter);
612 	void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id);
613 #endif
614 
615 #ifdef CONFIG_LPS_PG
616 #define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
617 #define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
618 #define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
619 #define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
620 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
621 #define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
622 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
623 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
624 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
625 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
626 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
627 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
628 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
629 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
630 enum lps_pg_hdl_id {
631 	LPS_PG_INFO_CFG = 0,
632 	LPS_PG_REDLEMEM,
633 	LPS_PG_PHYDM_DIS,
634 	LPS_PG_PHYDM_EN,
635 };
636 
637 u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
638 #endif
639 
640 int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size);
641 void rtw_hal_construct_beacon(_adapter *padapter, u8 *pframe, u32 *pLength);
642 void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength,
643 				u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
644 
645 #ifdef CONFIG_WOWLAN
646 struct rtl_wow_pattern {
647 	u16	crc;
648 	u8	type;
649 	u32	mask[4];
650 };
651 void rtw_wow_pattern_cam_dump(_adapter *adapter);
652 
653 #ifdef CONFIG_WOW_PATTERN_HW_CAM
654 void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct  rtl_wow_pattern *context);
655 void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx);
656 #endif
657 
658 struct rtw_ndp_info {
659 	u8 enable:1;
660 	u8 check_remote_ip:1; /* Need to Check Sender IP or not */
661 	u8 rsvd:6;
662 	u8 num_of_target_ip; /* Number of Check IP which NA query IP */
663 	u8 target_link_addr[6]; /* DUT's MAC address */
664 	u8 remote_ipv6_addr[16]; /* Just respond IP */
665 	u8 target_ipv6_addr[16]; /* target IP */
666 };
667 #define REMOTE_INFO_CTRL_SET_VALD_EN(target, _value) \
668 	SET_BITS_TO_LE_4BYTE(target + 0, 0, 8, _value)
669 #define REMOTE_INFO_CTRL_SET_PTK_EN(target, _value) \
670 	SET_BITS_TO_LE_4BYTE(target + 1, 0, 1, _value)
671 #define REMOTE_INFO_CTRL_SET_GTK_EN(target, _value) \
672 	SET_BITS_TO_LE_4BYTE(target + 1, 1, 1, _value)
673 #define REMOTE_INFO_CTRL_SET_GTK_IDX(target, _value) \
674 	SET_BITS_TO_LE_4BYTE(target + 2, 0, 8, _value)
675 #endif /*CONFIG_WOWLAN*/
676 
677 void rtw_dump_phy_cap(void *sel, _adapter *adapter);
678 void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num);
679 #ifdef CONFIG_SUPPORT_FIFO_DUMP
680 void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size);
681 #endif
682 
683 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
684 s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
685 s32 rtw_set_default_port_id(_adapter *adapter);
686 s32 rtw_set_ps_rsvd_page(_adapter *adapter);
687 
688 #define get_dft_portid(adapter) (adapter_to_dvobj(adapter)->dft.port_id)
689 #define get_dft_macid(adapter) (adapter_to_dvobj(adapter)->dft.mac_id)
690 
691 /*void rtw_search_default_port(_adapter *adapter);*/
692 #endif
693 
694 #ifdef CONFIG_P2P_PS
695 #ifdef RTW_HALMAC
696 void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state);
697 #endif
698 #endif
699 
700 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
701 void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 pri_ch_idx, u8 bw);
702 #endif
703 
704 s16 translate_dbm_to_percentage(s16 signal);
705 
706 #ifdef CONFIG_SUPPORT_MULTI_BCN
707 void rtw_ap_multi_bcn_cfg(_adapter *adapter);
708 #endif
709 
710 #ifdef CONFIG_SWTIMER_BASED_TXBCN
711 #ifdef CONFIG_BCN_RECOVERY
712 u8 rtw_ap_bcn_recovery(_adapter *padapter);
713 #endif
714 #ifdef CONFIG_BCN_XMIT_PROTECT
715 u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms);
716 #endif
717 #endif /*CONFIG_SWTIMER_BASED_TXBCN*/
718 
719 #ifdef CONFIG_FW_HANDLE_TXBCN
720 void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 mbcn_id);
721 void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 mbcn_id);
722 #endif
723 
724 void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type,
725 			 enum bb_path *tx, enum bb_path *rx);
726 #ifdef CONFIG_BEAMFORMING
727 #ifdef RTW_BEAMFORMING_VERSION_2
728 void rtw_hal_beamforming_config_csirate(PADAPTER adapter);
729 #endif
730 #endif
731 #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\
732 	defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\
733 	defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821A) || \
734 	defined(CONFIG_RTL8822C)
735 u8 phy_get_current_tx_num(PADAPTER pAdapter, u8 Rate);
736 #endif
737 
738 #ifdef CONFIG_RTL8812A
739 u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen );
740 #endif
741 
742 #endif /* __HAL_COMMON_H__ */
743