1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2017 Realtek Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 *****************************************************************************/ 16 #ifndef __HALPWRSEQCMD_H__ 17 #define __HALPWRSEQCMD_H__ 18 19 #include <drv_types.h> 20 21 /*---------------------------------------------*/ 22 /* 3 The value of cmd: 4 bits 23 *---------------------------------------------*/ 24 #define PWR_CMD_READ 0x00 25 /* offset: the read register offset 26 * msk: the mask of the read value 27 * value: N/A, left by 0 28 * note: dirver shall implement this function by read & msk */ 29 30 #define PWR_CMD_WRITE 0x01 31 /* offset: the read register offset 32 * msk: the mask of the write bits 33 * value: write value 34 * note: driver shall implement this cmd by read & msk after write */ 35 36 #define PWR_CMD_POLLING 0x02 37 /* offset: the read register offset 38 * msk: the mask of the polled value 39 * value: the value to be polled, masked by the msd field. 40 * note: driver shall implement this cmd by 41 * do { 42 * if( (Read(offset) & msk) == (value & msk) ) 43 * break; 44 * } while(not timeout); */ 45 46 #define PWR_CMD_DELAY 0x03 47 /* offset: the value to delay 48 * msk: N/A 49 * value: the unit of delay, 0: us, 1: ms */ 50 51 #define PWR_CMD_END 0x04 52 /* offset: N/A 53 * msk: N/A 54 * value: N/A */ 55 56 /*---------------------------------------------*/ 57 /* 3 The value of base: 4 bits 58 *--------------------------------------------- 59 * define the base address of each block */ 60 #define PWR_BASEADDR_MAC 0x00 61 #define PWR_BASEADDR_USB 0x01 62 #define PWR_BASEADDR_PCIE 0x02 63 #define PWR_BASEADDR_SDIO 0x03 64 65 /*---------------------------------------------*/ 66 /* 3 The value of interface_msk: 4 bits 67 *---------------------------------------------*/ 68 #define PWR_INTF_SDIO_MSK BIT(0) 69 #define PWR_INTF_USB_MSK BIT(1) 70 #define PWR_INTF_PCI_MSK BIT(2) 71 #define PWR_INTF_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) 72 73 /*---------------------------------------------*/ 74 /* 3 The value of fab_msk: 4 bits 75 *---------------------------------------------*/ 76 #define PWR_FAB_TSMC_MSK BIT(0) 77 #define PWR_FAB_UMC_MSK BIT(1) 78 #define PWR_FAB_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) 79 80 /*---------------------------------------------*/ 81 /* 3 The value of cut_msk: 8 bits 82 *---------------------------------------------*/ 83 #define PWR_CUT_TESTCHIP_MSK BIT(0) 84 #define PWR_CUT_A_MSK BIT(1) 85 #define PWR_CUT_B_MSK BIT(2) 86 #define PWR_CUT_C_MSK BIT(3) 87 #define PWR_CUT_D_MSK BIT(4) 88 #define PWR_CUT_E_MSK BIT(5) 89 #define PWR_CUT_F_MSK BIT(6) 90 #define PWR_CUT_G_MSK BIT(7) 91 #define PWR_CUT_ALL_MSK 0xFF 92 93 94 typedef enum _PWRSEQ_CMD_DELAY_UNIT_ { 95 PWRSEQ_DELAY_US, 96 PWRSEQ_DELAY_MS, 97 } PWRSEQ_DELAY_UNIT; 98 99 typedef struct _WL_PWR_CFG_ { 100 u16 offset; 101 u8 cut_msk; 102 u8 fab_msk:4; 103 u8 interface_msk:4; 104 u8 base:4; 105 u8 cmd:4; 106 u8 msk; 107 u8 value; 108 } WLAN_PWR_CFG, *PWLAN_PWR_CFG; 109 110 111 #define GET_PWR_CFG_OFFSET(__PWR_CMD) ((__PWR_CMD).offset) 112 #define GET_PWR_CFG_CUT_MASK(__PWR_CMD) ((__PWR_CMD).cut_msk) 113 #define GET_PWR_CFG_FAB_MASK(__PWR_CMD) ((__PWR_CMD).fab_msk) 114 #define GET_PWR_CFG_INTF_MASK(__PWR_CMD) ((__PWR_CMD).interface_msk) 115 #define GET_PWR_CFG_BASE(__PWR_CMD) ((__PWR_CMD).base) 116 #define GET_PWR_CFG_CMD(__PWR_CMD) ((__PWR_CMD).cmd) 117 #define GET_PWR_CFG_MASK(__PWR_CMD) ((__PWR_CMD).msk) 118 #define GET_PWR_CFG_VALUE(__PWR_CMD) ((__PWR_CMD).value) 119 120 121 /* ******************************************************************************** 122 * Prototype of protected function. 123 * ******************************************************************************** */ 124 u8 HalPwrSeqCmdParsing( 125 PADAPTER padapter, 126 u8 CutVersion, 127 u8 FabVersion, 128 u8 InterfaceType, 129 WLAN_PWR_CFG PwrCfgCmd[]); 130 131 #endif 132