1 /* 2 * HND SiliconBackplane chipcommon support - OS independent. 3 * 4 * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation 5 * 6 * Copyright (C) 1999-2017, Broadcom Corporation 7 * 8 * Unless you and Broadcom execute a separate written software license 9 * agreement governing use of this software, this software is licensed to you 10 * under the terms of the GNU General Public License version 2 (the "GPL"), 11 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 12 * following added to such license: 13 * 14 * As a special exception, the copyright holders of this software give you 15 * permission to link this software with independent modules, and to copy and 16 * distribute the resulting executable under terms of your choice, provided that 17 * you also meet, for each linked independent module, the terms and conditions of 18 * the license of that module. An independent module is a module which is not 19 * derived from this software. The special exception does not apply to any 20 * modifications of the software. 21 * 22 * Notwithstanding the above, under no circumstances may you combine this 23 * software in any way with any other Broadcom software provided under a license 24 * other than the GPL, without Broadcom's express prior written consent. 25 * 26 * 27 * <<Broadcom-WL-IPTag/Open:>> 28 * 29 * $Id: hndchipc.h 689775 2017-03-13 12:37:05Z $ 30 */ 31 32 #ifndef _hndchipc_h_ 33 #define _hndchipc_h_ 34 35 #include <typedefs.h> 36 #include <siutils.h> 37 38 #ifdef RTE_UART 39 typedef void (*si_serial_init_fn)(si_t *sih, void *regs, uint irq, uint baud_base, uint reg_shift); 40 #else 41 typedef void (*si_serial_init_fn)(void *regs, uint irq, uint baud_base, uint reg_shift); 42 #endif // endif 43 extern void si_serial_init(si_t *sih, si_serial_init_fn add); 44 45 extern volatile void *hnd_jtagm_init(si_t *sih, uint clkd, bool exttap); 46 extern void hnd_jtagm_disable(si_t *sih, volatile void *h); 47 extern uint32 jtag_scan(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint32 ir1, 48 uint drsz, uint32 dr0, uint32 *dr1, bool rti); 49 extern uint32 jtag_read_128(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint drsz, 50 uint32 dr0, uint32 *dr1, uint32 *dr2, uint32 *dr3); 51 extern uint32 jtag_write_128(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint drsz, 52 uint32 dr0, uint32 *dr1, uint32 *dr2, uint32 *dr3); 53 extern int jtag_setbit_128(si_t *sih, uint32 jtagureg_addr, uint8 bit_pos, uint8 bit_val); 54 55 #endif /* _hndchipc_h_ */ 56