1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd
4 *
5 * Authors:
6 * Dingqiang Lin <jon.lin@rock-chips.com>
7 */
8
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/mtd/spinand.h>
12
13 #define SPINAND_MFR_XINCUN 0x8C
14 #define XINCUN_STATUS_ECC_HAS_BITFLIPS_T (3 << 4)
15
16 static SPINAND_OP_VARIANTS(read_cache_variants,
17 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
18 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
19 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
20 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
21 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
22 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
23
24 static SPINAND_OP_VARIANTS(write_cache_variants,
25 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
26 SPINAND_PROG_LOAD(true, 0, NULL, 0));
27
28 static SPINAND_OP_VARIANTS(update_cache_variants,
29 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
30 SPINAND_PROG_LOAD(false, 0, NULL, 0));
31
xcsp2aapk_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)32 static int xcsp2aapk_ooblayout_ecc(struct mtd_info *mtd, int section,
33 struct mtd_oob_region *region)
34 {
35 if (section)
36 return -ERANGE;
37
38 region->offset = mtd->oobsize / 2;
39 region->length = mtd->oobsize / 2;
40
41 return 0;
42 }
43
xcsp2aapk_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)44 static int xcsp2aapk_ooblayout_free(struct mtd_info *mtd, int section,
45 struct mtd_oob_region *region)
46 {
47 if (section)
48 return -ERANGE;
49
50 /* Reserve 2 bytes for the BBM. */
51 region->offset = 2;
52 region->length = mtd->oobsize / 2 - 2;
53
54 return 0;
55 }
56
57 static const struct mtd_ooblayout_ops xcsp2aapk_ooblayout = {
58 .ecc = xcsp2aapk_ooblayout_ecc,
59 .free = xcsp2aapk_ooblayout_free,
60 };
61
xcsp2aapk_ecc_get_status(struct spinand_device * spinand,u8 status)62 static int xcsp2aapk_ecc_get_status(struct spinand_device *spinand,
63 u8 status)
64 {
65 struct nand_device *nand = spinand_to_nand(spinand);
66
67 switch (status & STATUS_ECC_MASK) {
68 case STATUS_ECC_NO_BITFLIPS:
69 return 0;
70
71 case STATUS_ECC_UNCOR_ERROR:
72 return -EBADMSG;
73
74 case STATUS_ECC_HAS_BITFLIPS:
75 return 0;
76 case XINCUN_STATUS_ECC_HAS_BITFLIPS_T:
77 return nanddev_get_ecc_requirements(nand)->strength;
78 default:
79 break;
80 }
81
82 return -EINVAL;
83 }
84
85 static const struct spinand_info xincun_spinand_table[] = {
86 SPINAND_INFO("XCSP2AAPK",
87 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xA1),
88 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
89 NAND_ECCREQ(8, 512),
90 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
91 &write_cache_variants,
92 &update_cache_variants),
93 SPINAND_HAS_QE_BIT,
94 SPINAND_ECCINFO(&xcsp2aapk_ooblayout, xcsp2aapk_ecc_get_status)),
95 };
96
97 static const struct spinand_manufacturer_ops xincun_spinand_manuf_ops = {
98 };
99
100 const struct spinand_manufacturer xincun_spinand_manufacturer = {
101 .id = SPINAND_MFR_XINCUN,
102 .name = "XINCUN",
103 .chips = xincun_spinand_table,
104 .nchips = ARRAY_SIZE(xincun_spinand_table),
105 .ops = &xincun_spinand_manuf_ops,
106 };
107