1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 */
5
6 #include <linux/device.h>
7 #include <linux/kernel.h>
8 #include <linux/mtd/spinand.h>
9
10 #define SPINAND_MFR_SKYHIGH 0x01
11
12 #define SKYHIGH_STATUS_ECC_1_2_BITFLIPS (1 << 4)
13 #define SKYHIGH_STATUS_ECC_3_4_BITFLIPS (2 << 4)
14 #define SKYHIGH_STATUS_ECC_UNCOR_ERROR (3 << 4)
15
16 static SPINAND_OP_VARIANTS(read_cache_variants,
17 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
18 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
19 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
20 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
21 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
22 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
23
24 static SPINAND_OP_VARIANTS(write_cache_variants,
25 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
26 SPINAND_PROG_LOAD(true, 0, NULL, 0));
27
28 static SPINAND_OP_VARIANTS(update_cache_variants,
29 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
30 SPINAND_PROG_LOAD(true, 0, NULL, 0));
31
s35ml04g3_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)32 static int s35ml04g3_ooblayout_ecc(struct mtd_info *mtd, int section,
33 struct mtd_oob_region *region)
34 {
35 return -ERANGE;
36 }
37
s35ml04g3_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)38 static int s35ml04g3_ooblayout_free(struct mtd_info *mtd, int section,
39 struct mtd_oob_region *region)
40 {
41 if (section)
42 return -ERANGE;
43
44 region->offset = 2;
45 region->length = mtd->oobsize - 2;
46
47 return 0;
48 }
49
50 static const struct mtd_ooblayout_ops s35ml04g3_ooblayout = {
51 .ecc = s35ml04g3_ooblayout_ecc,
52 .free = s35ml04g3_ooblayout_free,
53 };
54
55
s35ml0xg3_ecc_get_status(struct spinand_device * spinand,u8 status)56 static int s35ml0xg3_ecc_get_status(struct spinand_device *spinand,
57 u8 status)
58 {
59 struct nand_device *nand = spinand_to_nand(spinand);
60
61 switch (status & STATUS_ECC_MASK) {
62 case STATUS_ECC_NO_BITFLIPS:
63 return 0;
64
65 case SKYHIGH_STATUS_ECC_UNCOR_ERROR:
66 return -EBADMSG;
67
68 case SKYHIGH_STATUS_ECC_1_2_BITFLIPS:
69 return 2;
70
71 default:
72 return nanddev_get_ecc_requirements(nand)->strength;
73 }
74
75 return -EINVAL;
76 }
77
78 static const struct spinand_info skyhigh_spinand_table[] = {
79 SPINAND_INFO("S35ML01G3",
80 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15),
81 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 2, 1, 1),
82 NAND_ECCREQ(4, 512),
83 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
84 &write_cache_variants,
85 &update_cache_variants),
86 SPINAND_HAS_QE_BIT,
87 SPINAND_ECCINFO(&s35ml04g3_ooblayout, s35ml0xg3_ecc_get_status)),
88 SPINAND_INFO("S35ML02G3",
89 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25),
90 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
91 NAND_ECCREQ(4, 512),
92 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
93 &write_cache_variants,
94 &update_cache_variants),
95 SPINAND_HAS_QE_BIT,
96 SPINAND_ECCINFO(&s35ml04g3_ooblayout, s35ml0xg3_ecc_get_status)),
97 SPINAND_INFO("S35ML04G3",
98 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
99 NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1),
100 NAND_ECCREQ(4, 512),
101 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
102 &write_cache_variants,
103 &update_cache_variants),
104 SPINAND_HAS_QE_BIT,
105 SPINAND_ECCINFO(&s35ml04g3_ooblayout, s35ml0xg3_ecc_get_status)),
106 };
107
108 static const struct spinand_manufacturer_ops skyhigh_spinand_manuf_ops = {
109 };
110
111 const struct spinand_manufacturer skyhigh_spinand_manufacturer = {
112 .id = SPINAND_MFR_SKYHIGH,
113 .name = "skyhigh",
114 .chips = skyhigh_spinand_table,
115 .nchips = ARRAY_SIZE(skyhigh_spinand_table),
116 .ops = &skyhigh_spinand_manuf_ops,
117 };
118