1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
4 *
5 * Author: Guochun Huang <hero.huang@rock-chips.com>
6 */
7
8 #include "rk628.h"
9 #include "rk628_cru.h"
10 #include "rk628_config.h"
11 #include "panel.h"
12
rk628_rgb_decoder_enable(struct rk628 * rk628)13 void rk628_rgb_decoder_enable(struct rk628 *rk628)
14 {
15 /* config sw_input_mode RGB */
16 rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0, SW_INPUT_MODE_MASK,
17 SW_INPUT_MODE(INPUT_MODE_RGB));
18
19 /* pinctrl for vop pin */
20 rk628_i2c_write(rk628, GRF_GPIO2AB_SEL_CON, 0xffffffff);
21 rk628_i2c_write(rk628, GRF_GPIO2C_SEL_CON, 0xffff5555);
22 rk628_i2c_write(rk628, GRF_GPIO3AB_SEL_CON, 0x10b010b);
23
24 /* rk628: modify IO drive strength for RGB */
25 rk628_i2c_write(rk628, GRF_GPIO2A_D0_CON, 0xffff1111);
26 rk628_i2c_write(rk628, GRF_GPIO2A_D1_CON, 0xffff1111);
27 rk628_i2c_write(rk628, GRF_GPIO2B_D0_CON, 0xffff1111);
28 rk628_i2c_write(rk628, GRF_GPIO2B_D1_CON, 0xffff1111);
29 rk628_i2c_write(rk628, GRF_GPIO2C_D0_CON, 0xffff1111);
30 rk628_i2c_write(rk628, GRF_GPIO2C_D1_CON, 0xffff1111);
31 rk628_i2c_write(rk628, GRF_GPIO3A_D0_CON, 0xffff1011);
32 rk628_i2c_write(rk628, GRF_GPIO3B_D_CON, 0x10001);
33 }
34
rk628_rgb_encoder_enable(struct rk628 * rk628)35 void rk628_rgb_encoder_enable(struct rk628 *rk628)
36 {
37 rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0,
38 SW_BT_DATA_OEN_MASK | SW_OUTPUT_MODE_MASK,
39 SW_OUTPUT_MODE(OUTPUT_MODE_RGB));
40 rk628_i2c_update_bits(rk628, GRF_POST_PROC_CON, SW_DCLK_OUT_INV_EN,
41 SW_DCLK_OUT_INV_EN);
42 }
43
rk628_rgb_encoder_disable(struct rk628 * rk628)44 void rk628_rgb_encoder_disable(struct rk628 *rk628)
45 {
46 rk628_panel_disable(rk628);
47 rk628_panel_unprepare(rk628);
48 }
49
50
rk628_rgb_rx_enable(struct rk628 * rk628)51 void rk628_rgb_rx_enable(struct rk628 *rk628)
52 {
53
54 rk628_rgb_decoder_enable(rk628);
55
56 }
57
rk628_rgb_tx_enable(struct rk628 * rk628)58 void rk628_rgb_tx_enable(struct rk628 *rk628)
59 {
60 rk628_rgb_encoder_enable(rk628);
61
62 rk628_panel_prepare(rk628);
63 rk628_panel_enable(rk628);
64 }
65
rk628_rgb_tx_disable(struct rk628 * rk628)66 void rk628_rgb_tx_disable(struct rk628 *rk628)
67 {
68 rk628_panel_disable(rk628);
69 }
70
rk628_bt1120_decoder_enable(struct rk628 * rk628)71 void rk628_bt1120_decoder_enable(struct rk628 *rk628)
72 {
73 struct rk628_display_mode *mode = rk628_display_get_src_mode(rk628);
74
75 /* pinctrl for vop pin */
76 rk628_i2c_write(rk628, GRF_GPIO2AB_SEL_CON, 0xffffffff);
77 rk628_i2c_write(rk628, GRF_GPIO2C_SEL_CON, 0xffff5555);
78 rk628_i2c_write(rk628, GRF_GPIO3AB_SEL_CON, 0x10b010b);
79
80 /* rk628: modify IO drive strength for RGB */
81 rk628_i2c_write(rk628, GRF_GPIO2A_D0_CON, 0xffff1111);
82 rk628_i2c_write(rk628, GRF_GPIO2A_D1_CON, 0xffff1111);
83 rk628_i2c_write(rk628, GRF_GPIO2B_D0_CON, 0xffff1111);
84 rk628_i2c_write(rk628, GRF_GPIO2B_D1_CON, 0xffff1111);
85 rk628_i2c_write(rk628, GRF_GPIO2C_D0_CON, 0xffff1111);
86 rk628_i2c_write(rk628, GRF_GPIO2C_D1_CON, 0xffff1111);
87 rk628_i2c_write(rk628, GRF_GPIO3A_D0_CON, 0xffff1011);
88 rk628_i2c_write(rk628, GRF_GPIO3B_D_CON, 0x10001);
89
90 /* config sw_input_mode bt1120 */
91 rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0, SW_INPUT_MODE_MASK,
92 SW_INPUT_MODE(INPUT_MODE_BT1120));
93
94 /* operation resetn_bt1120dec */
95 rk628_i2c_write(rk628, CRU_SOFTRST_CON00, 0x10001000);
96 rk628_i2c_write(rk628, CRU_SOFTRST_CON00, 0x10000000);
97
98 rk628_cru_clk_set_rate(rk628, CGU_BT1120DEC, mode->clock * 1000);
99
100 #ifdef BT1120_DUAL_EDGE
101 rk628_i2c_update_bits(rk628, GRF_RGB_DEC_CON0,
102 DEC_DUALEDGE_EN, DEC_DUALEDGE_EN);
103 rk628_i2c_write(rk628, GRF_BT1120_DCLK_DELAY_CON0, 0x10000000);
104 rk628_i2c_write(rk628, GRF_BT1120_DCLK_DELAY_CON1, 0);
105 #endif
106
107 rk628_i2c_update_bits(rk628, GRF_RGB_DEC_CON1, SW_SET_X_MASK,
108 SW_SET_X(mode->hdisplay));
109 rk628_i2c_update_bits(rk628, GRF_RGB_DEC_CON2, SW_SET_Y_MASK,
110 SW_SET_Y(mode->vdisplay));
111
112 rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0,
113 SW_BT_DATA_OEN_MASK | SW_INPUT_MODE_MASK,
114 SW_BT_DATA_OEN | SW_INPUT_MODE(INPUT_MODE_BT1120));
115 rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_Y2R_EN(1));
116 rk628_i2c_update_bits(rk628, GRF_RGB_DEC_CON0,
117 SW_CAP_EN_PSYNC | SW_CAP_EN_ASYNC | SW_PROGRESS_EN,
118 SW_CAP_EN_PSYNC | SW_CAP_EN_ASYNC | SW_PROGRESS_EN);
119 }
120
rk628_bt1120_encoder_enable(struct rk628 * rk628)121 void rk628_bt1120_encoder_enable(struct rk628 *rk628)
122 {
123 u32 val = 0;
124
125 /* pinctrl for vop pin */
126 rk628_i2c_write(rk628, GRF_GPIO2AB_SEL_CON, 0xffffffff);
127 rk628_i2c_write(rk628, GRF_GPIO2C_SEL_CON, 0xffff5555);
128 rk628_i2c_write(rk628, GRF_GPIO3AB_SEL_CON, 0x10b010b);
129
130 /* rk628: modify IO drive strength for RGB */
131 rk628_i2c_write(rk628, GRF_GPIO2A_D0_CON, 0xffff1111);
132 rk628_i2c_write(rk628, GRF_GPIO2A_D1_CON, 0xffff1111);
133 rk628_i2c_write(rk628, GRF_GPIO2B_D0_CON, 0xffff1111);
134 rk628_i2c_write(rk628, GRF_GPIO2B_D1_CON, 0xffff1111);
135 rk628_i2c_write(rk628, GRF_GPIO2C_D0_CON, 0xffff1111);
136 rk628_i2c_write(rk628, GRF_GPIO2C_D1_CON, 0xffff1111);
137 rk628_i2c_write(rk628, GRF_GPIO3A_D0_CON, 0xffff1011);
138 rk628_i2c_write(rk628, GRF_GPIO3B_D_CON, 0x10001);
139
140 /* config sw_input_mode bt1120 */
141 rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0,
142 SW_BT_DATA_OEN_MASK | SW_OUTPUT_MODE_MASK,
143 SW_OUTPUT_MODE(OUTPUT_MODE_BT1120));
144 rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_R2Y_EN(1));
145 rk628_i2c_update_bits(rk628, GRF_POST_PROC_CON,
146 SW_DCLK_OUT_INV_EN, SW_DCLK_OUT_INV_EN);
147
148 #ifdef BT1120_DUAL_EDGE
149 val |= ENC_DUALEDGE_EN(1);
150 rk628_i2c_write(rk628, GRF_BT1120_DCLK_DELAY_CON0, 0x10000000);
151 rk628_i2c_write(rk628, GRF_BT1120_DCLK_DELAY_CON1, 0);
152 #endif
153 val |= BT1120_UV_SWAP(1);
154 rk628_i2c_write(rk628, GRF_RGB_ENC_CON, val);
155 }
156
rk628_bt1120_rx_enable(struct rk628 * rk628)157 void rk628_bt1120_rx_enable(struct rk628 *rk628)
158 {
159 rk628_bt1120_decoder_enable(rk628);
160 }
161
rk628_bt1120_tx_enable(struct rk628 * rk628)162 void rk628_bt1120_tx_enable(struct rk628 *rk628)
163 {
164 rk628_bt1120_encoder_enable(rk628);
165 }
166
167