1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
3
4 #include <media/v4l2-common.h>
5 #include <media/v4l2-ioctl.h>
6 #include <media/videobuf2-core.h>
7 #include <media/videobuf2-vmalloc.h>
8 #include <media/v4l2-event.h>
9 #include <media/v4l2-mc.h>
10 #include <linux/rk-isp1-config.h>
11 #include <uapi/linux/rk-video-format.h>
12 #include "dev.h"
13 #include "regs.h"
14
get_input_size(struct rkispp_params_vdev * params_vdev)15 static inline size_t get_input_size(struct rkispp_params_vdev *params_vdev)
16 {
17 struct rkispp_device *dev = params_vdev->dev;
18 struct rkispp_subdev *isp_sdev = &dev->ispp_sdev;
19
20 return isp_sdev->out_fmt.width * isp_sdev->out_fmt.height;
21 }
22
tnr_config(struct rkispp_params_vdev * params_vdev,struct rkispp_tnr_config * arg)23 static void tnr_config(struct rkispp_params_vdev *params_vdev,
24 struct rkispp_tnr_config *arg)
25 {
26 u32 i, val;
27
28 val = arg->opty_en << 2 | arg->optc_en << 3 |
29 arg->gain_en << 4;
30 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CORE_CTRL,
31 SW_TNR_OPTY_EN | SW_TNR_OPTC_EN |
32 SW_TNR_GLB_GAIN_EN, val);
33
34 val = ISPP_PACK_4BYTE(arg->pk0_y, arg->pk1_y,
35 arg->pk0_c, arg->pk1_c);
36 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_PK0, val);
37
38 val = ISPP_PACK_2SHORT(arg->glb_gain_cur, arg->glb_gain_nxt);
39 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GLB_GAIN, val);
40 val = ISPP_PACK_2SHORT(arg->glb_gain_cur_div, arg->glb_gain_cur_sqrt);
41 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GLB_GAIN_DIV, val);
42
43 for (i = 0; i < TNR_SIGMA_CURVE_SIZE - 1; i += 2)
44 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_Y01 + i * 2,
45 ISPP_PACK_2SHORT(arg->sigma_y[i], arg->sigma_y[i + 1]));
46 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_Y10, arg->sigma_y[16]);
47 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_X18,
48 ISPP_PACK_4BIT(arg->sigma_x[0], arg->sigma_x[1],
49 arg->sigma_x[2], arg->sigma_x[3],
50 arg->sigma_x[4], arg->sigma_x[5],
51 arg->sigma_x[6], arg->sigma_x[7]));
52 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SIG_X910,
53 ISPP_PACK_4BIT(arg->sigma_x[8], arg->sigma_x[9],
54 arg->sigma_x[10], arg->sigma_x[11],
55 arg->sigma_x[12], arg->sigma_x[13],
56 arg->sigma_x[14], arg->sigma_x[15]));
57
58 for (i = 0; i < TNR_LUMA_CURVE_SIZE; i += 2) {
59 val = ISPP_PACK_2SHORT(arg->luma_curve[i], arg->luma_curve[i + 1]);
60 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_LUMACURVE_Y01 + i * 2, val);
61 }
62
63 val = ISPP_PACK_2SHORT(arg->txt_th0_y, arg->txt_th1_y);
64 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_Y, val);
65 val = ISPP_PACK_2SHORT(arg->txt_th0_c, arg->txt_th1_c);
66 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_C, val);
67 val = ISPP_PACK_2SHORT(arg->txt_thy_dlt, arg->txt_thc_dlt);
68 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_TH_DLT, val);
69
70 val = ISPP_PACK_4BYTE(arg->gfcoef_y0[0], arg->gfcoef_y0[1],
71 arg->gfcoef_y0[2], arg->gfcoef_y0[3]);
72 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y0_0, val);
73 val = ISPP_PACK_4BYTE(arg->gfcoef_y0[4], arg->gfcoef_y0[5], 0, 0);
74 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y0_1, val);
75 val = ISPP_PACK_4BYTE(arg->gfcoef_y1[0], arg->gfcoef_y1[1],
76 arg->gfcoef_y1[2], 0);
77 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y1, val);
78 val = ISPP_PACK_4BYTE(arg->gfcoef_y2[0], arg->gfcoef_y2[1],
79 arg->gfcoef_y2[2], 0);
80 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y2, val);
81 val = ISPP_PACK_4BYTE(arg->gfcoef_y3[0], arg->gfcoef_y3[1],
82 arg->gfcoef_y3[2], 0);
83 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_Y3, val);
84
85 val = ISPP_PACK_4BYTE(arg->gfcoef_yg0[0], arg->gfcoef_yg0[1],
86 arg->gfcoef_yg0[2], arg->gfcoef_yg0[3]);
87 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG0_0, val);
88 val = ISPP_PACK_4BYTE(arg->gfcoef_yg0[4], arg->gfcoef_yg0[5], 0, 0);
89 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG0_1, val);
90 val = ISPP_PACK_4BYTE(arg->gfcoef_yg1[0], arg->gfcoef_yg1[1],
91 arg->gfcoef_yg1[2], 0);
92 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG1, val);
93 val = ISPP_PACK_4BYTE(arg->gfcoef_yg2[0], arg->gfcoef_yg2[1],
94 arg->gfcoef_yg2[2], 0);
95 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG2, val);
96 val = ISPP_PACK_4BYTE(arg->gfcoef_yg3[0], arg->gfcoef_yg3[1],
97 arg->gfcoef_yg3[2], 0);
98 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YG3, val);
99
100 val = ISPP_PACK_4BYTE(arg->gfcoef_yl0[0], arg->gfcoef_yl0[1],
101 arg->gfcoef_yl0[2], arg->gfcoef_yl0[3]);
102 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL0_0, val);
103 val = ISPP_PACK_4BYTE(arg->gfcoef_yl0[4], arg->gfcoef_yl0[5], 0, 0);
104 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL0_1, val);
105 val = ISPP_PACK_4BYTE(arg->gfcoef_yl1[0], arg->gfcoef_yl1[1],
106 arg->gfcoef_yl1[2], 0);
107 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL1, val);
108 val = ISPP_PACK_4BYTE(arg->gfcoef_yl2[0], arg->gfcoef_yl2[1],
109 arg->gfcoef_yl2[2], 0);
110 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_YL2, val);
111
112 val = ISPP_PACK_4BYTE(arg->gfcoef_cg0[0], arg->gfcoef_cg0[1],
113 arg->gfcoef_cg0[2], arg->gfcoef_cg0[3]);
114 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG0_0, val);
115 val = ISPP_PACK_4BYTE(arg->gfcoef_cg0[4], arg->gfcoef_cg0[5], 0, 0);
116 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG0_1, val);
117 val = ISPP_PACK_4BYTE(arg->gfcoef_cg1[0], arg->gfcoef_cg1[1],
118 arg->gfcoef_cg1[2], 0);
119 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG1, val);
120 val = ISPP_PACK_4BYTE(arg->gfcoef_cg2[0], arg->gfcoef_cg2[1],
121 arg->gfcoef_cg2[2], 0);
122 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CG2, val);
123
124 val = ISPP_PACK_4BYTE(arg->gfcoef_cl0[0], arg->gfcoef_cl0[1],
125 arg->gfcoef_cl0[2], arg->gfcoef_cl0[3]);
126 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL0_0, val);
127 val = ISPP_PACK_4BYTE(arg->gfcoef_cl0[4], arg->gfcoef_cl0[5], 0, 0);
128 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL0_1, val);
129 val = ISPP_PACK_4BYTE(arg->gfcoef_cl1[0], arg->gfcoef_cl1[1],
130 arg->gfcoef_cl1[2], 0);
131 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_GFCOEF_CL1, val);
132
133 val = ISPP_PACK_2SHORT(arg->scale_yg[0], arg->scale_yg[1]);
134 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YG01, val);
135 val = ISPP_PACK_2SHORT(arg->scale_yg[2], arg->scale_yg[3]);
136 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YG23, val);
137 val = ISPP_PACK_2SHORT(arg->scale_yl[0], arg->scale_yl[1]);
138 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YL01, val);
139 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_YL2, arg->scale_yl[2]);
140 val = ISPP_PACK_2SHORT(arg->scale_cg[0], arg->scale_y2cg[0]);
141 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG0, val);
142 val = ISPP_PACK_2SHORT(arg->scale_cg[1], arg->scale_y2cg[1]);
143 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG1, val);
144 val = ISPP_PACK_2SHORT(arg->scale_cg[2], arg->scale_y2cg[2]);
145 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CG2, val);
146 val = ISPP_PACK_2SHORT(arg->scale_cl[0], arg->scale_y2cl[0]);
147 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL0, val);
148 val = ISPP_PACK_2SHORT(arg->scale_cl[1], arg->scale_y2cl[1]);
149 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL1, val);
150 val = arg->scale_y2cl[2] << 16;
151 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_SCALE_CL2, val);
152 val = ISPP_PACK_4BYTE(arg->weight_y[0], arg->weight_y[1],
153 arg->weight_y[2], 0);
154 rkispp_write(params_vdev->dev, RKISPP_TNR_CORE_WEIGHT, val);
155 }
156
is_tnr_enable(struct rkispp_params_vdev * params_vdev)157 static bool is_tnr_enable(struct rkispp_params_vdev *params_vdev)
158 {
159 u32 cur_en;
160
161 cur_en = rkispp_read(params_vdev->dev, RKISPP_TNR_CORE_CTRL);
162 cur_en &= SW_TNR_EN;
163
164 return (!!cur_en);
165 }
166
tnr_enable(struct rkispp_params_vdev * params_vdev,bool en)167 static void tnr_enable(struct rkispp_params_vdev *params_vdev, bool en)
168 {
169 if (en && !is_tnr_enable(params_vdev))
170 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CTRL, 0, SW_TNR_1ST_FRM);
171 rkispp_set_bits(params_vdev->dev, RKISPP_TNR_CORE_CTRL, SW_TNR_EN, en);
172 }
173
nr_config(struct rkispp_params_vdev * params_vdev,struct rkispp_nr_config * arg)174 static void nr_config(struct rkispp_params_vdev *params_vdev,
175 struct rkispp_nr_config *arg)
176 {
177 u32 i, val;
178 u8 big_en, nobig_en, sd32_self_en = 0;
179
180 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_1SIGMA,
181 arg->uvnr_gain_1sigma);
182 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_OFFSET,
183 arg->uvnr_gain_offset);
184 val = ISPP_PACK_4BYTE(arg->uvnr_gain_uvgain[0],
185 arg->uvnr_gain_uvgain[1], arg->uvnr_gain_t2gen,
186 arg->uvnr_gain_iso);
187 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_GAIN_GBLGAIN, val);
188 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1GEN_M3ALPHA,
189 arg->uvnr_t1gen_m3alpha);
190 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_MODE,
191 arg->uvnr_t1flt_mode);
192 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_MSIGMA,
193 arg->uvnr_t1flt_msigma);
194 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_WTP,
195 arg->uvnr_t1flt_wtp);
196 for (i = 0; i < NR_UVNR_T1FLT_WTQ_SIZE; i += 4) {
197 val = ISPP_PACK_4BYTE(arg->uvnr_t1flt_wtq[i],
198 arg->uvnr_t1flt_wtq[i + 1], arg->uvnr_t1flt_wtq[i + 2],
199 arg->uvnr_t1flt_wtq[i + 3]);
200 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T1FLT_WTQ0 + i, val);
201 }
202 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_M3ALPHA,
203 arg->uvnr_t2gen_m3alpha);
204 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_MSIGMA,
205 arg->uvnr_t2gen_msigma);
206 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_WTP,
207 arg->uvnr_t2gen_wtp);
208 val = ISPP_PACK_4BYTE(arg->uvnr_t2gen_wtq[0],
209 arg->uvnr_t2gen_wtq[1], arg->uvnr_t2gen_wtq[2],
210 arg->uvnr_t2gen_wtq[3]);
211 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2GEN_WTQ, val);
212 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2FLT_MSIGMA,
213 arg->uvnr_t2flt_msigma);
214 val = ISPP_PACK_4BYTE(arg->uvnr_t2flt_wtp,
215 arg->uvnr_t2flt_wt[0], arg->uvnr_t2flt_wt[1],
216 arg->uvnr_t2flt_wt[2]);
217 rkispp_write(params_vdev->dev, RKISPP_NR_UVNR_T2FLT_WT, val);
218
219 val = ISPP_PACK_4BIT(arg->ynr_sgm_dx[0], arg->ynr_sgm_dx[1],
220 arg->ynr_sgm_dx[2], arg->ynr_sgm_dx[3],
221 arg->ynr_sgm_dx[4], arg->ynr_sgm_dx[5],
222 arg->ynr_sgm_dx[6], arg->ynr_sgm_dx[7]);
223 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_SGM_DX_1_8, val);
224 val = ISPP_PACK_4BIT(arg->ynr_sgm_dx[8], arg->ynr_sgm_dx[9],
225 arg->ynr_sgm_dx[10], arg->ynr_sgm_dx[11],
226 arg->ynr_sgm_dx[12], arg->ynr_sgm_dx[13],
227 arg->ynr_sgm_dx[14], arg->ynr_sgm_dx[15]);
228 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_SGM_DX_9_16, val);
229
230 for (i = 0; i < NR_YNR_SGM_Y_SIZE - 1; i += 2) {
231 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LSGM_Y_0_1 + i * 2,
232 ISPP_PACK_2SHORT(arg->ynr_lsgm_y[i], arg->ynr_lsgm_y[i + 1]));
233
234 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSGM_Y_0_1 + i * 2,
235 ISPP_PACK_2SHORT(arg->ynr_hsgm_y[i], arg->ynr_hsgm_y[i + 1]));
236 }
237 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LSGM_Y_16, arg->ynr_lsgm_y[16]);
238 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSGM_Y_16, arg->ynr_hsgm_y[16]);
239
240 val = ISPP_PACK_4BYTE(arg->ynr_lci[0], arg->ynr_lci[1],
241 arg->ynr_lci[2], arg->ynr_lci[3]);
242 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LCI, val);
243 val = ISPP_PACK_4BYTE(arg->ynr_lgain_min[0], arg->ynr_lgain_min[1],
244 arg->ynr_lgain_min[2], arg->ynr_lgain_min[3]);
245 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LGAIN_DIRE_MIN, val);
246 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_IGAIN_DIRE_MAX, arg->ynr_lgain_max);
247 val = ISPP_PACK_4BYTE(arg->ynr_lmerge_bound, arg->ynr_lmerge_ratio, 0, 0);
248 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LMERGE, val);
249 val = ISPP_PACK_4BYTE(arg->ynr_lweit_flt[0], arg->ynr_lweit_flt[1],
250 arg->ynr_lweit_flt[2], arg->ynr_lweit_flt[3]);
251 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LWEIT_FLT, val);
252 val = ISPP_PACK_4BYTE(arg->ynr_hlci[0], arg->ynr_hlci[1],
253 arg->ynr_hlci[2], arg->ynr_hlci[3]);
254 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HLCI, val);
255 val = ISPP_PACK_4BYTE(arg->ynr_lhci[0], arg->ynr_lhci[1],
256 arg->ynr_lhci[2], arg->ynr_lhci[3]);
257 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LHCI, val);
258 val = ISPP_PACK_4BYTE(arg->ynr_hhci[0], arg->ynr_hhci[1],
259 arg->ynr_hhci[2], arg->ynr_hhci[3]);
260 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HHCI, val);
261 val = ISPP_PACK_4BYTE(arg->ynr_hgain_sgm[0], arg->ynr_hgain_sgm[1],
262 arg->ynr_hgain_sgm[2], arg->ynr_hgain_sgm[3]);
263 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HGAIN_SGM, val);
264
265 for (i = 0; i < NR_YNR_HWEIT_D_SIZE; i += 4) {
266 val = ISPP_PACK_4BYTE(arg->ynr_hweit_d[i], arg->ynr_hweit_d[i + 1],
267 arg->ynr_hweit_d[i + 2], arg->ynr_hweit_d[i + 3]);
268 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_D0 + i, val);
269 }
270
271 for (i = 0; i < NR_YNR_HGRAD_Y_SIZE; i += 4) {
272 val = ISPP_PACK_4BYTE(arg->ynr_hgrad_y[i], arg->ynr_hgrad_y[i + 1],
273 arg->ynr_hgrad_y[i + 2], arg->ynr_hgrad_y[i + 3]);
274 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HGRAD_Y0 + i, val);
275 }
276
277 val = ISPP_PACK_2SHORT(arg->ynr_hweit[0], arg->ynr_hweit[1]);
278 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_1_2, val);
279 val = ISPP_PACK_2SHORT(arg->ynr_hweit[2], arg->ynr_hweit[3]);
280 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HWEIT_3_4, val);
281
282 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HMAX_ADJUST, arg->ynr_hmax_adjust);
283 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTRENGTH, arg->ynr_hstrength);
284
285 val = ISPP_PACK_4BYTE(arg->ynr_lweit_cmp[0], arg->ynr_lweit_cmp[1], 0, 0);
286 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LWEIT_CMP, val);
287 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_LMAXGAIN_LV4, arg->ynr_lmaxgain_lv4);
288
289 for (i = 0; i < NR_YNR_HSTV_Y_SIZE - 1; i += 2) {
290 val = ISPP_PACK_2SHORT(arg->ynr_hstv_y[i], arg->ynr_hstv_y[i + 1]);
291 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTV_Y_0_1 + i * 2, val);
292 }
293 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_HSTV_Y_16, arg->ynr_hstv_y[16]);
294
295 val = ISPP_PACK_2SHORT(arg->ynr_st_scale[0], arg->ynr_st_scale[1]);
296 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_ST_SCALE_LV1_LV2, val);
297 rkispp_write(params_vdev->dev, RKISPP_NR_YNR_ST_SCALE_LV3, arg->ynr_st_scale[2]);
298
299 big_en = arg->uvnr_big_en & 0x01;
300 nobig_en = arg->uvnr_nobig_en & 0x01;
301 if (get_input_size(params_vdev) > ISPP_NOBIG_OVERFLOW_SIZE) {
302 big_en = 1;
303 nobig_en = 0;
304 }
305
306 if (params_vdev->dev->hw_dev->dev_num == 1)
307 sd32_self_en = arg->uvnr_sd32_self_en;
308 val = arg->uvnr_step1_en << 1 | arg->uvnr_step2_en << 2 |
309 arg->nr_gain_en << 3 | sd32_self_en << 4 |
310 nobig_en << 5 | big_en << 6;
311 rkispp_set_bits(params_vdev->dev, RKISPP_NR_UVNR_CTRL_PARA,
312 SW_UVNR_STEP1_ON | SW_UVNR_STEP2_ON |
313 SW_NR_GAIN_BYPASS | SW_UVNR_NOBIG_EN |
314 SW_UVNR_BIG_EN, val);
315 }
316
nr_enable(struct rkispp_params_vdev * params_vdev,bool en,struct rkispp_nr_config * arg)317 static void nr_enable(struct rkispp_params_vdev *params_vdev, bool en,
318 struct rkispp_nr_config *arg)
319 {
320 u8 big_en, nobig_en;
321 u32 val;
322
323 big_en = arg->uvnr_big_en & 0x01;
324 nobig_en = arg->uvnr_nobig_en & 0x01;
325 if (get_input_size(params_vdev) > ISPP_NOBIG_OVERFLOW_SIZE) {
326 big_en = 1;
327 nobig_en = 0;
328 }
329
330 val = arg->uvnr_step1_en << 1 | arg->uvnr_step2_en << 2 |
331 arg->nr_gain_en << 3 | nobig_en << 5 | big_en << 6;
332
333 if (en)
334 val |= SW_NR_EN;
335
336 rkispp_set_bits(params_vdev->dev, RKISPP_NR_UVNR_CTRL_PARA,
337 SW_UVNR_STEP1_ON | SW_UVNR_STEP2_ON |
338 SW_NR_GAIN_BYPASS | SW_UVNR_NOBIG_EN |
339 SW_UVNR_BIG_EN | SW_NR_EN, val);
340 }
341
shp_config(struct rkispp_params_vdev * params_vdev,struct rkispp_sharp_config * arg)342 static void shp_config(struct rkispp_params_vdev *params_vdev,
343 struct rkispp_sharp_config *arg)
344 {
345 u32 i, val;
346
347 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CTRL,
348 SW_SHP_WR_ROT_MODE(3),
349 SW_SHP_WR_ROT_MODE(arg->rotation));
350
351 rkispp_write(params_vdev->dev, RKISPP_SHARP_SC_DOWN,
352 (arg->scl_down_v & 0x1) << 1 | (arg->scl_down_h & 0x1));
353
354 rkispp_write(params_vdev->dev, RKISPP_SHARP_TILE_IDX,
355 (arg->tile_ycnt & 0x1F) << 8 | (arg->tile_xcnt & 0xFF));
356
357 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_FACTOR, arg->hbf_ratio |
358 arg->ehf_th << 16 | arg->pbf_ratio << 24);
359 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_TH, arg->edge_thed |
360 arg->dir_min << 8 | arg->smoth_th4 << 16);
361 val = ISPP_PACK_2SHORT(arg->l_alpha, arg->g_alpha);
362 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_ALPHA, val);
363 val = ISPP_PACK_4BYTE(arg->pbf_k[0], arg->pbf_k[1], arg->pbf_k[2], 0);
364 rkispp_write(params_vdev->dev, RKISPP_SHARP_PBF_KERNEL, val);
365 val = ISPP_PACK_4BYTE(arg->mrf_k[0], arg->mrf_k[1], arg->mrf_k[2], arg->mrf_k[3]);
366 rkispp_write(params_vdev->dev, RKISPP_SHARP_MRF_KERNEL0, val);
367 val = ISPP_PACK_4BYTE(arg->mrf_k[4], arg->mrf_k[5], 0, 0);
368 rkispp_write(params_vdev->dev, RKISPP_SHARP_MRF_KERNEL1, val);
369
370 for (i = 0; i < SHP_MBF_KERNEL_SIZE; i += 4) {
371 val = ISPP_PACK_4BYTE(arg->mbf_k[i], arg->mbf_k[i + 1],
372 arg->mbf_k[i + 2], arg->mbf_k[i + 3]);
373 rkispp_write(params_vdev->dev, RKISPP_SHARP_MBF_KERNEL0 + i, val);
374 }
375
376 val = ISPP_PACK_4BYTE(arg->hrf_k[0], arg->hrf_k[1], arg->hrf_k[2], arg->hrf_k[3]);
377 rkispp_write(params_vdev->dev, RKISPP_SHARP_HRF_KERNEL0, val);
378 val = ISPP_PACK_4BYTE(arg->hrf_k[4], arg->hrf_k[5], 0, 0);
379 rkispp_write(params_vdev->dev, RKISPP_SHARP_HRF_KERNEL1, val);
380 val = ISPP_PACK_4BYTE(arg->hbf_k[0], arg->hbf_k[1], arg->hbf_k[2], 0);
381 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_KERNEL, val);
382
383 val = ISPP_PACK_4BYTE(arg->eg_coef[0], arg->eg_coef[1], arg->eg_coef[2], 0);
384 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_COEF, val);
385 val = ISPP_PACK_4BYTE(arg->eg_smoth[0], arg->eg_smoth[1], arg->eg_smoth[2], 0);
386 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_SMOTH, val);
387 val = ISPP_PACK_4BYTE(arg->eg_gaus[0], arg->eg_gaus[1], arg->eg_gaus[2], arg->eg_gaus[3]);
388 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_GAUS0, val);
389 val = ISPP_PACK_4BYTE(arg->eg_gaus[4], arg->eg_gaus[5], 0, 0);
390 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_GAUS1, val);
391
392 val = ISPP_PACK_4BYTE(arg->dog_k[0], arg->dog_k[1], arg->dog_k[2], arg->dog_k[3]);
393 rkispp_write(params_vdev->dev, RKISPP_SHARP_DOG_KERNEL0, val);
394 val = ISPP_PACK_4BYTE(arg->dog_k[4], arg->dog_k[5], 0, 0);
395 rkispp_write(params_vdev->dev, RKISPP_SHARP_DOG_KERNEL1, val);
396 val = ISPP_PACK_4BYTE(arg->lum_point[0], arg->lum_point[1],
397 arg->lum_point[2], arg->lum_point[3]);
398 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_POINT0, val);
399 val = ISPP_PACK_4BYTE(arg->lum_point[4], arg->lum_point[5], 0, 0);
400 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_POINT1, val);
401
402 val = ISPP_PACK_4BYTE(arg->pbf_shf_bits, arg->mbf_shf_bits, arg->hbf_shf_bits, 0);
403 rkispp_write(params_vdev->dev, RKISPP_SHARP_SHF_BITS, val);
404
405 for (i = 0; i < SHP_SIGMA_SIZE; i += 4) {
406 val = ISPP_PACK_4BYTE(arg->pbf_sigma[i], arg->pbf_sigma[i + 1],
407 arg->pbf_sigma[i + 2], arg->pbf_sigma[i + 3]);
408 rkispp_write(params_vdev->dev, RKISPP_SHARP_PBF_SIGMA_INV0 + i, val);
409 val = ISPP_PACK_4BYTE(arg->mbf_sigma[i], arg->mbf_sigma[i + 1],
410 arg->mbf_sigma[i + 2], arg->mbf_sigma[i + 3]);
411 rkispp_write(params_vdev->dev, RKISPP_SHARP_MBF_SIGMA_INV0 + i, val);
412 val = ISPP_PACK_4BYTE(arg->hbf_sigma[i], arg->hbf_sigma[i + 1],
413 arg->hbf_sigma[i + 2], arg->hbf_sigma[i + 3]);
414 rkispp_write(params_vdev->dev, RKISPP_SHARP_HBF_SIGMA_INV0 + i, val);
415 }
416
417 for (i = 0; i < SHP_LUM_CLP_SIZE; i += 4) {
418 val = ISPP_PACK_4BYTE(arg->lum_clp_m[i], arg->lum_clp_m[i + 1],
419 arg->lum_clp_m[i + 2], arg->lum_clp_m[i + 3]);
420 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_CLP_M0 + i, val);
421 val = ISPP_PACK_4BYTE(arg->lum_clp_h[i], arg->lum_clp_h[i + 1],
422 arg->lum_clp_h[i + 2], arg->lum_clp_h[i + 3]);
423 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_CLP_H0 + i, val);
424 }
425
426 for (i = 0; i < SHP_LUM_MIN_SIZE; i += 4) {
427 val = ISPP_PACK_4BYTE(arg->lum_min_m[i], arg->lum_min_m[i + 1],
428 arg->lum_min_m[i + 2], arg->lum_min_m[i + 3]);
429 rkispp_write(params_vdev->dev, RKISPP_SHARP_LUM_MIN_M0 + i, val);
430 }
431
432 for (i = 0; i < SHP_EDGE_LUM_THED_SIZE; i += 4) {
433 val = ISPP_PACK_4BYTE(arg->edge_lum_thed[i], arg->edge_lum_thed[i + 1],
434 arg->edge_lum_thed[i + 2], arg->edge_lum_thed[i + 3]);
435 rkispp_write(params_vdev->dev, RKISPP_SHARP_EDGE_LUM_THED0 + i, val);
436 }
437
438 for (i = 0; i < SHP_CLAMP_SIZE; i += 4) {
439 val = ISPP_PACK_4BYTE(arg->clamp_pos[i], arg->clamp_pos[i + 1],
440 arg->clamp_pos[i + 2], arg->clamp_pos[i + 3]);
441 rkispp_write(params_vdev->dev, RKISPP_SHARP_CLAMP_POS_DOG0 + i, val);
442 val = ISPP_PACK_4BYTE(arg->clamp_neg[i], arg->clamp_neg[i + 1],
443 arg->clamp_neg[i + 2], arg->clamp_neg[i + 3]);
444 rkispp_write(params_vdev->dev, RKISPP_SHARP_CLAMP_NEG_DOG0 + i, val);
445 }
446
447 for (i = 0; i < SHP_DETAIL_ALPHA_SIZE; i += 4) {
448 val = ISPP_PACK_4BYTE(arg->detail_alpha[i], arg->detail_alpha[i + 1],
449 arg->detail_alpha[i + 2], arg->detail_alpha[i + 3]);
450 rkispp_write(params_vdev->dev, RKISPP_SHARP_DETAIL_ALPHA_DOG0 + i, val);
451 }
452
453 val = ISPP_PACK_2SHORT(arg->rfl_ratio, arg->rfh_ratio);
454 rkispp_write(params_vdev->dev, RKISPP_SHARP_RF_RATIO, val);
455
456 val = ISPP_PACK_4BYTE(arg->m_ratio, arg->h_ratio, 0, 0);
457 rkispp_write(params_vdev->dev, RKISPP_SHARP_GRAD_RATIO, val);
458
459 val = arg->alpha_adp_en << 1 | arg->yin_flt_en << 3 |
460 arg->edge_avg_en << 4;
461 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CORE_CTRL,
462 SW_SHP_ALPHA_ADP_EN | SW_SHP_YIN_FLT_EN |
463 SW_SHP_EDGE_AVG_EN, val);
464 }
465
shp_enable(struct rkispp_params_vdev * params_vdev,bool en,struct rkispp_sharp_config * arg)466 static void shp_enable(struct rkispp_params_vdev *params_vdev, bool en,
467 struct rkispp_sharp_config *arg)
468 {
469 u32 ens = params_vdev->dev->stream_vdev.module_ens;
470 u32 val;
471
472 if (en && !(ens & ISPP_MODULE_FEC)) {
473 rkispp_set_bits(params_vdev->dev, RKISPP_SCL0_CTRL,
474 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
475 rkispp_set_bits(params_vdev->dev, RKISPP_SCL1_CTRL,
476 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
477 rkispp_set_bits(params_vdev->dev, RKISPP_SCL2_CTRL,
478 SW_SCL_FIRST_MODE, SW_SCL_FIRST_MODE);
479 } else {
480 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL0_CTRL, SW_SCL_FIRST_MODE);
481 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL1_CTRL, SW_SCL_FIRST_MODE);
482 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL2_CTRL, SW_SCL_FIRST_MODE);
483 }
484
485 val = arg->alpha_adp_en << 1 | arg->yin_flt_en << 3 |
486 arg->edge_avg_en << 4;
487 if (en)
488 val |= SW_SHP_EN;
489 rkispp_set_bits(params_vdev->dev, RKISPP_SHARP_CORE_CTRL,
490 SW_SHP_ALPHA_ADP_EN | SW_SHP_YIN_FLT_EN |
491 SW_SHP_EDGE_AVG_EN | SW_SHP_EN, val);
492 }
493
fec_config(struct rkispp_params_vdev * params_vdev,struct rkispp_fec_config * arg)494 static void fec_config(struct rkispp_params_vdev *params_vdev,
495 struct rkispp_fec_config *arg)
496 {
497 struct rkispp_device *dev = params_vdev->dev;
498 struct rkispp_fec_head *fec_data;
499 u32 width, height, mesh_size;
500 dma_addr_t dma_addr;
501 u32 val, i, buf_idx;
502
503 width = dev->ispp_sdev.out_fmt.width;
504 height = dev->ispp_sdev.out_fmt.height;
505 mesh_size = cal_fec_mesh(width, height, 0);
506 if (arg->mesh_size > mesh_size) {
507 v4l2_err(&dev->v4l2_dev,
508 "Input mesh size too large. mesh size 0x%x, 0x%x\n",
509 arg->mesh_size, mesh_size);
510 return;
511 }
512
513 for (i = 0; i < params_vdev->buf_cnt; i++) {
514 if (arg->buf_fd == params_vdev->buf_fec[i].dma_fd)
515 break;
516 }
517 if (i == params_vdev->buf_cnt) {
518 dev_err(dev->dev, "cannot find fec buf fd(%d)\n", arg->buf_fd);
519 return;
520 }
521
522 if (!params_vdev->buf_fec[i].vaddr) {
523 dev_err(dev->dev, "no fec buffer allocated\n");
524 return;
525 }
526
527 buf_idx = params_vdev->buf_fec_idx;
528 fec_data = (struct rkispp_fec_head *)params_vdev->buf_fec[buf_idx].vaddr;
529 fec_data->stat = FEC_BUF_INIT;
530
531 buf_idx = i;
532 fec_data = (struct rkispp_fec_head *)params_vdev->buf_fec[buf_idx].vaddr;
533 fec_data->stat = FEC_BUF_CHIPINUSE;
534 params_vdev->buf_fec_idx = buf_idx;
535
536 rkispp_prepare_buffer(dev, ¶ms_vdev->buf_fec[buf_idx]);
537
538 dma_addr = params_vdev->buf_fec[buf_idx].dma_addr;
539 val = dma_addr + fec_data->meshxf_oft;
540 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_XFRA_BASE, val);
541 val = dma_addr + fec_data->meshyf_oft;
542 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_YFRA_BASE, val);
543 val = dma_addr + fec_data->meshxi_oft;
544 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_XINT_BASE, val);
545 val = dma_addr + fec_data->meshyi_oft;
546 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_YINT_BASE, val);
547
548 val = 0;
549 if (arg->mesh_density)
550 val = SW_MESH_DENSITY;
551 rkispp_set_bits(params_vdev->dev, RKISPP_FEC_CORE_CTRL, SW_MESH_DENSITY, val);
552
553 rkispp_write(params_vdev->dev, RKISPP_FEC_MESH_SIZE, arg->mesh_size);
554
555 val = (arg->crop_height & 0x1FFFF) << 14 |
556 (arg->crop_width & 0x1FFFF) << 1 | (arg->crop_en & 0x01);
557 rkispp_write(params_vdev->dev, RKISPP_FEC_CROP, val);
558 }
559
fec_enable(struct rkispp_params_vdev * params_vdev,bool en)560 static void fec_enable(struct rkispp_params_vdev *params_vdev, bool en)
561 {
562 struct rkispp_device *dev = params_vdev->dev;
563 u32 buf_idx;
564
565 if (en) {
566 buf_idx = params_vdev->buf_fec_idx;
567 if (!params_vdev->buf_fec[buf_idx].vaddr) {
568 dev_err(dev->dev, "no fec buffer allocated\n");
569 return;
570 }
571 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL0_CTRL, SW_SCL_FIRST_MODE);
572 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL1_CTRL, SW_SCL_FIRST_MODE);
573 rkispp_clear_bits(params_vdev->dev, RKISPP_SCL2_CTRL, SW_SCL_FIRST_MODE);
574 }
575 rkispp_set_bits(params_vdev->dev, RKISPP_FEC_CORE_CTRL, SW_FEC_EN, en);
576 }
577
orb_config(struct rkispp_params_vdev * params_vdev,struct rkispp_orb_config * arg)578 static void orb_config(struct rkispp_params_vdev *params_vdev,
579 struct rkispp_orb_config *arg)
580 {
581 rkispp_write(params_vdev->dev, RKISPP_ORB_LIMIT_VALUE, arg->limit_value & 0xFF);
582 rkispp_write(params_vdev->dev, RKISPP_ORB_MAX_FEATURE, arg->max_feature & 0x1FFFFF);
583 }
584
orb_enable(struct rkispp_params_vdev * params_vdev,bool en)585 static void orb_enable(struct rkispp_params_vdev *params_vdev, bool en)
586 {
587 rkispp_set_bits(params_vdev->dev, RKISPP_ORB_CORE_CTRL, SW_ORB_EN, en);
588 }
589
params_vb2_buf_queue(struct vb2_buffer * vb)590 static void params_vb2_buf_queue(struct vb2_buffer *vb)
591 {
592 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
593 struct rkispp_buffer *params_buf = to_rkispp_buffer(vbuf);
594 struct vb2_queue *vq = vb->vb2_queue;
595 struct rkispp_params_vdev *params_vdev = vq->drv_priv;
596 struct rkispp_device *dev = params_vdev->dev;
597 struct rkispp_stream_vdev *vdev = &dev->stream_vdev;
598 unsigned long flags;
599
600 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
601 if (params_vdev->first_params) {
602 params_vdev->first_params = false;
603 if (params_vdev->vdev_id == PARAM_VDEV_NR)
604 wake_up(¶ms_vdev->dev->sync_onoff);
605 }
606 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
607
608 params_buf->vaddr[0] = vb2_plane_vaddr(vb, 0);
609 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
610 list_add_tail(¶ms_buf->queue, ¶ms_vdev->params);
611 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
612
613 if (params_vdev->vdev_id == PARAM_VDEV_NR) {
614 struct rkisp_ispp_buf *buf_rd = NULL;
615
616 spin_lock_irqsave(&vdev->tnr.buf_lock, flags);
617 if (!list_empty(&vdev->tnr.list_rpt)) {
618 buf_rd = list_first_entry(&vdev->tnr.list_rpt,
619 struct rkisp_ispp_buf, list);
620 list_del(&buf_rd->list);
621 }
622 spin_unlock_irqrestore(&vdev->tnr.buf_lock, flags);
623 vdev->stream_ops->rkispp_module_work_event(dev, buf_rd, NULL, ISPP_MODULE_NR, false);
624 } else if (params_vdev->vdev_id == PARAM_VDEV_FEC) {
625 struct rkispp_dummy_buffer *buf_rd = NULL;
626
627 spin_lock_irqsave(&vdev->nr.buf_lock, flags);
628 if (!list_empty(&vdev->nr.list_rpt)) {
629 buf_rd = list_first_entry(&vdev->nr.list_rpt,
630 struct rkispp_dummy_buffer, list);
631 list_del(&buf_rd->list);
632 list_add_tail(&buf_rd->list, &vdev->fec.list_rd);
633 }
634 spin_unlock_irqrestore(&vdev->nr.buf_lock, flags);
635 }
636 }
637
fec_data_abandon(struct rkispp_params_vdev * vdev,struct rkispp_params_feccfg * params)638 static void fec_data_abandon(struct rkispp_params_vdev *vdev,
639 struct rkispp_params_feccfg *params)
640 {
641 struct rkispp_fec_head *data;
642 int i;
643
644 for (i = 0; i < vdev->buf_cnt; i++) {
645 if (params->fec_cfg.buf_fd == vdev->buf_fec[i].dma_fd) {
646 data = (struct rkispp_fec_head *)vdev->buf_fec[i].vaddr;
647 if (data)
648 data->stat = FEC_BUF_INIT;
649 break;
650 }
651 }
652 }
653
rkispp_params_cfg(struct rkispp_params_vdev * params_vdev,u32 frame_id)654 static void rkispp_params_cfg(struct rkispp_params_vdev *params_vdev, u32 frame_id)
655 {
656 struct rkispp_params_cfghead *param_head = NULL;
657 u32 module_en_update, module_cfg_update, module_ens;
658
659 spin_lock(¶ms_vdev->config_lock);
660 if (!params_vdev->streamon) {
661 spin_unlock(¶ms_vdev->config_lock);
662 return;
663 }
664
665 /* get buffer by frame_id */
666 while (!list_empty(¶ms_vdev->params) && !params_vdev->cur_buf) {
667 params_vdev->cur_buf = list_first_entry(¶ms_vdev->params,
668 struct rkispp_buffer, queue);
669
670 param_head = (struct rkispp_params_cfghead *)(params_vdev->cur_buf->vaddr[0]);
671 if (param_head->frame_id < frame_id) {
672 list_del(¶ms_vdev->cur_buf->queue);
673 /* force to on/off module */
674 if (param_head->module_en_update)
675 break;
676 if (param_head->module_cfg_update & ISPP_MODULE_FEC)
677 fec_data_abandon(params_vdev, (struct rkispp_params_feccfg *)param_head);
678 vb2_buffer_done(¶ms_vdev->cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
679 params_vdev->cur_buf = NULL;
680 continue;
681 } else if (param_head->frame_id == frame_id) {
682 list_del(¶ms_vdev->cur_buf->queue);
683 } else {
684 params_vdev->cur_buf = NULL;
685 }
686 break;
687 }
688
689 if (!params_vdev->cur_buf) {
690 spin_unlock(¶ms_vdev->config_lock);
691 return;
692 }
693
694 param_head = (struct rkispp_params_cfghead *)(params_vdev->cur_buf->vaddr[0]);
695
696 module_en_update = param_head->module_en_update;
697 module_cfg_update = param_head->module_cfg_update;
698 module_ens = param_head->module_ens;
699 if (params_vdev->dev->hw_dev->is_fec_ext) {
700 module_en_update &= ~ISPP_MODULE_FEC;
701 module_cfg_update &= ~ISPP_MODULE_FEC;
702 module_ens &= ~ISPP_MODULE_FEC;
703 }
704
705 if (params_vdev->vdev_id == PARAM_VDEV_TNR) {
706 struct rkispp_params_tnrcfg *tnr_params;
707
708 tnr_params = (struct rkispp_params_tnrcfg *)param_head;
709 if (module_cfg_update & ISPP_MODULE_TNR)
710 tnr_config(params_vdev,
711 &tnr_params->tnr_cfg);
712 if (module_en_update & ISPP_MODULE_TNR)
713 tnr_enable(params_vdev,
714 !!(module_ens & ISPP_MODULE_TNR));
715 } else if (params_vdev->vdev_id == PARAM_VDEV_NR) {
716 struct rkispp_params_nrcfg *nr_params;
717
718 nr_params = (struct rkispp_params_nrcfg *)param_head;
719 if (module_cfg_update & ISPP_MODULE_NR)
720 nr_config(params_vdev,
721 &nr_params->nr_cfg);
722 if (module_en_update & ISPP_MODULE_NR)
723 nr_enable(params_vdev,
724 !!(module_ens & ISPP_MODULE_NR),
725 &nr_params->nr_cfg);
726
727 if (module_cfg_update & ISPP_MODULE_SHP)
728 shp_config(params_vdev,
729 &nr_params->shp_cfg);
730 if (module_en_update & ISPP_MODULE_SHP)
731 shp_enable(params_vdev,
732 !!(module_ens & ISPP_MODULE_SHP),
733 &nr_params->shp_cfg);
734
735 if (module_cfg_update & ISPP_MODULE_ORB)
736 orb_config(params_vdev,
737 &nr_params->orb_cfg);
738 if (module_en_update & ISPP_MODULE_ORB)
739 orb_enable(params_vdev,
740 !!(module_ens & ISPP_MODULE_ORB));
741 } else {
742 struct rkispp_params_feccfg *fec_params;
743
744 fec_params = (struct rkispp_params_feccfg *)param_head;
745 if (module_cfg_update & ISPP_MODULE_FEC)
746 fec_config(params_vdev,
747 &fec_params->fec_cfg);
748 if (module_en_update & ISPP_MODULE_FEC)
749 fec_enable(params_vdev,
750 !!(module_ens & ISPP_MODULE_FEC));
751 }
752
753 vb2_buffer_done(¶ms_vdev->cur_buf->vb.vb2_buf,
754 VB2_BUF_STATE_DONE);
755 params_vdev->cur_buf = NULL;
756
757 spin_unlock(¶ms_vdev->config_lock);
758 }
759
760 static struct rkispp_params_ops rkispp_params_ops = {
761 .rkispp_params_cfg = rkispp_params_cfg,
762 .rkispp_params_vb2_buf_queue = params_vb2_buf_queue,
763 };
764
rkispp_params_init_ops_v10(struct rkispp_params_vdev * params_vdev)765 void rkispp_params_init_ops_v10(struct rkispp_params_vdev *params_vdev)
766 {
767 params_vdev->params_ops = &rkispp_params_ops;
768 }
769