1 /*
2 * Rockchip isp1 driver
3 *
4 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #include <media/v4l2-common.h>
36 #include <media/v4l2-ioctl.h>
37 #include <media/videobuf2-core.h>
38 #include <media/videobuf2-vmalloc.h> /* for ISP params */
39 #include <media/v4l2-event.h>
40 #include <linux/rk-preisp.h>
41 #include "dev.h"
42 #include "regs.h"
43
44 #define RKISP1_ISP_PARAMS_REQ_BUFS_MIN 2
45 #define RKISP1_ISP_PARAMS_REQ_BUFS_MAX 8
46
47 #define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
48 #define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
49
50 #define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
51 #define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
52
53 #define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MAX)
54
55 #define BLS_FIX_SUB_IS_VALID(val) \
56 ((val) > (s16) CIFISP_BLS_FIX_SUB_MIN && (val) < CIFISP_BLS_FIX_SUB_MAX)
57
58 #define RKISP1_ISP_DPCC_LINE_THRESH(n) (CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 * (n))
59 #define RKISP1_ISP_DPCC_LINE_MAD_FAC(n) (CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 * (n))
60 #define RKISP1_ISP_DPCC_PG_FAC(n) (CIF_ISP_DPCC_PG_FAC_1 + 0x14 * (n))
61 #define RKISP1_ISP_DPCC_RND_THRESH(n) (CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * (n))
62 #define RKISP1_ISP_DPCC_RG_FAC(n) (CIF_ISP_DPCC_RG_FAC_1 + 0x14 * (n))
63 #define RKISP1_ISP_CC_COEFF(n) (CIF_ISP_CC_COEFF_0 + (n) * 4)
64
rkisp1_iowrite32(struct rkisp1_isp_params_vdev * params_vdev,u32 value,u32 addr)65 static inline void rkisp1_iowrite32(struct rkisp1_isp_params_vdev *params_vdev,
66 u32 value, u32 addr)
67 {
68 iowrite32(value, params_vdev->dev->base_addr + addr);
69 }
70
rkisp1_ioread32(struct rkisp1_isp_params_vdev * params_vdev,u32 addr)71 static inline u32 rkisp1_ioread32(struct rkisp1_isp_params_vdev *params_vdev,
72 u32 addr)
73 {
74 return ioread32(params_vdev->dev->base_addr + addr);
75 }
76
isp_param_set_bits(struct rkisp1_isp_params_vdev * params_vdev,u32 reg,u32 bit_mask)77 static inline void isp_param_set_bits(struct rkisp1_isp_params_vdev
78 *params_vdev,
79 u32 reg, u32 bit_mask)
80 {
81 u32 val;
82
83 val = rkisp1_ioread32(params_vdev, reg);
84 rkisp1_iowrite32(params_vdev, val | bit_mask, reg);
85 }
86
isp_param_clear_bits(struct rkisp1_isp_params_vdev * params_vdev,u32 reg,u32 bit_mask)87 static inline void isp_param_clear_bits(struct rkisp1_isp_params_vdev
88 *params_vdev,
89 u32 reg, u32 bit_mask)
90 {
91 u32 val;
92
93 val = rkisp1_ioread32(params_vdev, reg);
94 rkisp1_iowrite32(params_vdev, val & ~bit_mask, reg);
95 }
96
97 /* ISP BP interface function */
isp_dpcc_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_dpcc_config * arg)98 static void isp_dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
99 const struct cifisp_dpcc_config *arg)
100 {
101 unsigned int i;
102 u32 mode;
103
104 /* avoid to override the old enable value */
105 mode = rkisp1_ioread32(params_vdev, CIF_ISP_DPCC_MODE);
106 mode &= CIF_ISP_DPCC_ENA;
107 mode |= arg->mode & ~CIF_ISP_DPCC_ENA;
108 rkisp1_iowrite32(params_vdev, mode, CIF_ISP_DPCC_MODE);
109 rkisp1_iowrite32(params_vdev, arg->output_mode,
110 CIF_ISP_DPCC_OUTPUT_MODE);
111 rkisp1_iowrite32(params_vdev, arg->set_use, CIF_ISP_DPCC_SET_USE);
112
113 rkisp1_iowrite32(params_vdev, arg->methods[0].method,
114 CIF_ISP_DPCC_METHODS_SET_1);
115 rkisp1_iowrite32(params_vdev, arg->methods[1].method,
116 CIF_ISP_DPCC_METHODS_SET_2);
117 rkisp1_iowrite32(params_vdev, arg->methods[2].method,
118 CIF_ISP_DPCC_METHODS_SET_3);
119 for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
120 rkisp1_iowrite32(params_vdev, arg->methods[i].line_thresh,
121 RKISP1_ISP_DPCC_LINE_THRESH(i));
122 rkisp1_iowrite32(params_vdev, arg->methods[i].line_mad_fac,
123 RKISP1_ISP_DPCC_LINE_MAD_FAC(i));
124 rkisp1_iowrite32(params_vdev, arg->methods[i].pg_fac,
125 RKISP1_ISP_DPCC_PG_FAC(i));
126 rkisp1_iowrite32(params_vdev, arg->methods[i].rnd_thresh,
127 RKISP1_ISP_DPCC_RND_THRESH(i));
128 rkisp1_iowrite32(params_vdev, arg->methods[i].rg_fac,
129 RKISP1_ISP_DPCC_RG_FAC(i));
130 }
131
132 rkisp1_iowrite32(params_vdev, arg->rnd_offs, CIF_ISP_DPCC_RND_OFFS);
133 rkisp1_iowrite32(params_vdev, arg->ro_limits, CIF_ISP_DPCC_RO_LIMITS);
134 }
135
136 /* ISP black level subtraction interface function */
isp_bls_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_bls_config * arg)137 static void isp_bls_config(struct rkisp1_isp_params_vdev *params_vdev,
138 const struct cifisp_bls_config *arg)
139 {
140 /* avoid to override the old enable value */
141 u32 new_control;
142
143 new_control = rkisp1_ioread32(params_vdev, CIF_ISP_BLS_CTRL);
144 new_control &= CIF_ISP_BLS_ENA;
145 /* fixed subtraction values */
146 if (!arg->enable_auto) {
147 const struct cifisp_bls_fixed_val *pval = &arg->fixed_val;
148
149 switch (params_vdev->raw_type) {
150 case RAW_BGGR:
151 rkisp1_iowrite32(params_vdev,
152 pval->r, CIF_ISP_BLS_D_FIXED);
153 rkisp1_iowrite32(params_vdev,
154 pval->gr, CIF_ISP_BLS_C_FIXED);
155 rkisp1_iowrite32(params_vdev,
156 pval->gb, CIF_ISP_BLS_B_FIXED);
157 rkisp1_iowrite32(params_vdev,
158 pval->b, CIF_ISP_BLS_A_FIXED);
159 break;
160 case RAW_GBRG:
161 rkisp1_iowrite32(params_vdev,
162 pval->r, CIF_ISP_BLS_C_FIXED);
163 rkisp1_iowrite32(params_vdev,
164 pval->gr, CIF_ISP_BLS_D_FIXED);
165 rkisp1_iowrite32(params_vdev,
166 pval->gb, CIF_ISP_BLS_A_FIXED);
167 rkisp1_iowrite32(params_vdev,
168 pval->b, CIF_ISP_BLS_B_FIXED);
169 break;
170 case RAW_GRBG:
171 rkisp1_iowrite32(params_vdev,
172 pval->r, CIF_ISP_BLS_B_FIXED);
173 rkisp1_iowrite32(params_vdev,
174 pval->gr, CIF_ISP_BLS_A_FIXED);
175 rkisp1_iowrite32(params_vdev,
176 pval->gb, CIF_ISP_BLS_D_FIXED);
177 rkisp1_iowrite32(params_vdev,
178 pval->b, CIF_ISP_BLS_C_FIXED);
179 break;
180 case RAW_RGGB:
181 rkisp1_iowrite32(params_vdev,
182 pval->r, CIF_ISP_BLS_A_FIXED);
183 rkisp1_iowrite32(params_vdev,
184 pval->gr, CIF_ISP_BLS_B_FIXED);
185 rkisp1_iowrite32(params_vdev,
186 pval->gb, CIF_ISP_BLS_C_FIXED);
187 rkisp1_iowrite32(params_vdev,
188 pval->b, CIF_ISP_BLS_D_FIXED);
189 break;
190 default:
191 break;
192 }
193
194 } else {
195 if (arg->en_windows & BIT(1)) {
196 rkisp1_iowrite32(params_vdev, arg->bls_window2.h_offs,
197 CIF_ISP_BLS_H2_START);
198 rkisp1_iowrite32(params_vdev, arg->bls_window2.h_size,
199 CIF_ISP_BLS_H2_STOP);
200 rkisp1_iowrite32(params_vdev, arg->bls_window2.v_offs,
201 CIF_ISP_BLS_V2_START);
202 rkisp1_iowrite32(params_vdev, arg->bls_window2.v_size,
203 CIF_ISP_BLS_V2_STOP);
204 new_control |= CIF_ISP_BLS_WINDOW_2;
205 }
206
207 if (arg->en_windows & BIT(0)) {
208 rkisp1_iowrite32(params_vdev, arg->bls_window1.h_offs,
209 CIF_ISP_BLS_H1_START);
210 rkisp1_iowrite32(params_vdev, arg->bls_window1.h_size,
211 CIF_ISP_BLS_H1_STOP);
212 rkisp1_iowrite32(params_vdev, arg->bls_window1.v_offs,
213 CIF_ISP_BLS_V1_START);
214 rkisp1_iowrite32(params_vdev, arg->bls_window1.v_size,
215 CIF_ISP_BLS_V1_STOP);
216 new_control |= CIF_ISP_BLS_WINDOW_1;
217 }
218
219 rkisp1_iowrite32(params_vdev, arg->bls_samples,
220 CIF_ISP_BLS_SAMPLES);
221
222 new_control |= CIF_ISP_BLS_MODE_MEASURED;
223 }
224 rkisp1_iowrite32(params_vdev, new_control, CIF_ISP_BLS_CTRL);
225 }
226
227 /* ISP LS correction interface function */
228 static void
isp_lsc_matrix_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * pconfig)229 isp_lsc_matrix_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
230 const struct cifisp_lsc_config *pconfig)
231 {
232 int i, j;
233 unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
234 unsigned int data;
235
236 isp_lsc_status = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_STATUS);
237
238 /* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
239 sram_addr = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
240 CIF_ISP_LSC_TABLE_ADDRESS_0 :
241 CIF_ISP_LSC_TABLE_ADDRESS_153;
242 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_R_TABLE_ADDR);
243 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GR_TABLE_ADDR);
244 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GB_TABLE_ADDR);
245 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
246
247 /* program data tables (table size is 9 * 17 = 153) */
248 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
249 i += CIF_ISP_LSC_SECTORS_MAX) {
250 /*
251 * 17 sectors with 2 values in one DWORD = 9
252 * DWORDs (2nd value of last DWORD unused)
253 */
254 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
255 data = CIF_ISP_LSC_TABLE_DATA_V10(
256 pconfig->r_data_tbl[i + j],
257 pconfig->r_data_tbl[i + j + 1]);
258 rkisp1_iowrite32(params_vdev, data,
259 CIF_ISP_LSC_R_TABLE_DATA);
260
261 data = CIF_ISP_LSC_TABLE_DATA_V10(
262 pconfig->gr_data_tbl[i + j],
263 pconfig->gr_data_tbl[i + j + 1]);
264 rkisp1_iowrite32(params_vdev, data,
265 CIF_ISP_LSC_GR_TABLE_DATA);
266
267 data = CIF_ISP_LSC_TABLE_DATA_V10(
268 pconfig->gb_data_tbl[i + j],
269 pconfig->gb_data_tbl[i + j + 1]);
270 rkisp1_iowrite32(params_vdev, data,
271 CIF_ISP_LSC_GB_TABLE_DATA);
272
273 data = CIF_ISP_LSC_TABLE_DATA_V10(
274 pconfig->b_data_tbl[i + j],
275 pconfig->b_data_tbl[i + j + 1]);
276 rkisp1_iowrite32(params_vdev, data,
277 CIF_ISP_LSC_B_TABLE_DATA);
278 }
279
280 data = CIF_ISP_LSC_TABLE_DATA_V10(
281 pconfig->r_data_tbl[i + j],
282 0);
283 rkisp1_iowrite32(params_vdev, data,
284 CIF_ISP_LSC_R_TABLE_DATA);
285
286 data = CIF_ISP_LSC_TABLE_DATA_V10(
287 pconfig->gr_data_tbl[i + j],
288 0);
289 rkisp1_iowrite32(params_vdev, data,
290 CIF_ISP_LSC_GR_TABLE_DATA);
291
292 data = CIF_ISP_LSC_TABLE_DATA_V10(
293 pconfig->gb_data_tbl[i + j],
294 0);
295 rkisp1_iowrite32(params_vdev, data,
296 CIF_ISP_LSC_GB_TABLE_DATA);
297
298 data = CIF_ISP_LSC_TABLE_DATA_V10(
299 pconfig->b_data_tbl[i + j],
300 0);
301 rkisp1_iowrite32(params_vdev, data,
302 CIF_ISP_LSC_B_TABLE_DATA);
303 }
304 isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
305 CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
306 rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
307 }
308
309 static void
isp_lsc_matrix_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * pconfig)310 isp_lsc_matrix_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
311 const struct cifisp_lsc_config *pconfig)
312 {
313 int i, j;
314 unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel;
315 unsigned int data;
316
317 isp_lsc_status = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_STATUS);
318
319 /* CIF_ISP_LSC_TABLE_ADDRESS_153 = ( 17 * 18 ) >> 1 */
320 sram_addr = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
321 CIF_ISP_LSC_TABLE_ADDRESS_0 :
322 CIF_ISP_LSC_TABLE_ADDRESS_153;
323 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_R_TABLE_ADDR);
324 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GR_TABLE_ADDR);
325 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_GB_TABLE_ADDR);
326 rkisp1_iowrite32(params_vdev, sram_addr, CIF_ISP_LSC_B_TABLE_ADDR);
327
328 /* program data tables (table size is 9 * 17 = 153) */
329 for (i = 0; i < CIF_ISP_LSC_SECTORS_MAX * CIF_ISP_LSC_SECTORS_MAX;
330 i += CIF_ISP_LSC_SECTORS_MAX) {
331 /*
332 * 17 sectors with 2 values in one DWORD = 9
333 * DWORDs (2nd value of last DWORD unused)
334 */
335 for (j = 0; j < CIF_ISP_LSC_SECTORS_MAX - 1; j += 2) {
336 data = CIF_ISP_LSC_TABLE_DATA_V12(
337 pconfig->r_data_tbl[i + j],
338 pconfig->r_data_tbl[i + j + 1]);
339 rkisp1_iowrite32(params_vdev, data,
340 CIF_ISP_LSC_R_TABLE_DATA);
341
342 data = CIF_ISP_LSC_TABLE_DATA_V12(
343 pconfig->gr_data_tbl[i + j],
344 pconfig->gr_data_tbl[i + j + 1]);
345 rkisp1_iowrite32(params_vdev, data,
346 CIF_ISP_LSC_GR_TABLE_DATA);
347
348 data = CIF_ISP_LSC_TABLE_DATA_V12(
349 pconfig->gb_data_tbl[i + j],
350 pconfig->gb_data_tbl[i + j + 1]);
351 rkisp1_iowrite32(params_vdev, data,
352 CIF_ISP_LSC_GB_TABLE_DATA);
353
354 data = CIF_ISP_LSC_TABLE_DATA_V12(
355 pconfig->b_data_tbl[i + j],
356 pconfig->b_data_tbl[i + j + 1]);
357 rkisp1_iowrite32(params_vdev, data,
358 CIF_ISP_LSC_B_TABLE_DATA);
359 }
360
361 data = CIF_ISP_LSC_TABLE_DATA_V12(
362 pconfig->r_data_tbl[i + j],
363 0);
364 rkisp1_iowrite32(params_vdev, data,
365 CIF_ISP_LSC_R_TABLE_DATA);
366
367 data = CIF_ISP_LSC_TABLE_DATA_V12(
368 pconfig->gr_data_tbl[i + j],
369 0);
370 rkisp1_iowrite32(params_vdev, data,
371 CIF_ISP_LSC_GR_TABLE_DATA);
372
373 data = CIF_ISP_LSC_TABLE_DATA_V12(
374 pconfig->gb_data_tbl[i + j],
375 0);
376 rkisp1_iowrite32(params_vdev, data,
377 CIF_ISP_LSC_GB_TABLE_DATA);
378
379 data = CIF_ISP_LSC_TABLE_DATA_V12(
380 pconfig->b_data_tbl[i + j],
381 0);
382 rkisp1_iowrite32(params_vdev, data,
383 CIF_ISP_LSC_B_TABLE_DATA);
384 }
385 isp_lsc_table_sel = (isp_lsc_status & CIF_ISP_LSC_ACTIVE_TABLE) ?
386 CIF_ISP_LSC_TABLE_0 : CIF_ISP_LSC_TABLE_1;
387 rkisp1_iowrite32(params_vdev, isp_lsc_table_sel, CIF_ISP_LSC_TABLE_SEL);
388 }
389
isp_lsc_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_lsc_config * arg)390 static void isp_lsc_config(struct rkisp1_isp_params_vdev *params_vdev,
391 const struct cifisp_lsc_config *arg)
392 {
393 int i;
394 u32 lsc_ctrl;
395 unsigned int data;
396
397 /* To config must be off , store the current status firstly */
398 lsc_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_LSC_CTRL);
399 isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
400 CIF_ISP_LSC_CTRL_ENA);
401 params_vdev->ops->lsc_matrix_config(params_vdev, arg);
402
403 for (i = 0; i < 4; i++) {
404 /* program x size tables */
405 data = CIF_ISP_LSC_SECT_SIZE(arg->x_size_tbl[i * 2],
406 arg->x_size_tbl[i * 2 + 1]);
407 rkisp1_iowrite32(params_vdev, data,
408 CIF_ISP_LSC_XSIZE_01 + i * 4);
409
410 /* program x grad tables */
411 data = CIF_ISP_LSC_SECT_SIZE(arg->x_grad_tbl[i * 2],
412 arg->x_grad_tbl[i * 2 + 1]);
413 rkisp1_iowrite32(params_vdev, data,
414 CIF_ISP_LSC_XGRAD_01 + i * 4);
415
416 /* program y size tables */
417 data = CIF_ISP_LSC_SECT_SIZE(arg->y_size_tbl[i * 2],
418 arg->y_size_tbl[i * 2 + 1]);
419 rkisp1_iowrite32(params_vdev, data,
420 CIF_ISP_LSC_YSIZE_01 + i * 4);
421
422 /* program y grad tables */
423 data = CIF_ISP_LSC_SECT_SIZE(arg->y_grad_tbl[i * 2],
424 arg->y_grad_tbl[i * 2 + 1]);
425 rkisp1_iowrite32(params_vdev, data,
426 CIF_ISP_LSC_YGRAD_01 + i * 4);
427 }
428
429 /* restore the lsc ctrl status */
430 if (lsc_ctrl & CIF_ISP_LSC_CTRL_ENA) {
431 isp_param_set_bits(params_vdev,
432 CIF_ISP_LSC_CTRL,
433 CIF_ISP_LSC_CTRL_ENA);
434 } else {
435 isp_param_clear_bits(params_vdev,
436 CIF_ISP_LSC_CTRL,
437 CIF_ISP_LSC_CTRL_ENA);
438 }
439 }
440
441 /* ISP Filtering function */
isp_flt_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_flt_config * arg)442 static void isp_flt_config(struct rkisp1_isp_params_vdev *params_vdev,
443 const struct cifisp_flt_config *arg)
444 {
445 u32 filt_mode;
446
447 rkisp1_iowrite32(params_vdev, arg->thresh_bl0, CIF_ISP_FILT_THRESH_BL0);
448 rkisp1_iowrite32(params_vdev, arg->thresh_bl1, CIF_ISP_FILT_THRESH_BL1);
449 rkisp1_iowrite32(params_vdev, arg->thresh_sh0, CIF_ISP_FILT_THRESH_SH0);
450 rkisp1_iowrite32(params_vdev, arg->thresh_sh1, CIF_ISP_FILT_THRESH_SH1);
451 rkisp1_iowrite32(params_vdev, arg->fac_bl0, CIF_ISP_FILT_FAC_BL0);
452 rkisp1_iowrite32(params_vdev, arg->fac_bl1, CIF_ISP_FILT_FAC_BL1);
453 rkisp1_iowrite32(params_vdev, arg->fac_mid, CIF_ISP_FILT_FAC_MID);
454 rkisp1_iowrite32(params_vdev, arg->fac_sh0, CIF_ISP_FILT_FAC_SH0);
455 rkisp1_iowrite32(params_vdev, arg->fac_sh1, CIF_ISP_FILT_FAC_SH1);
456 rkisp1_iowrite32(params_vdev, arg->lum_weight, CIF_ISP_FILT_LUM_WEIGHT);
457
458 /* avoid to override the old enable value */
459 filt_mode = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_MODE);
460 filt_mode &= CIF_ISP_FLT_ENA;
461 if (arg->mode)
462 filt_mode |= CIF_ISP_FLT_MODE_DNR;
463 filt_mode |= CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
464 CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |
465 CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1);
466 rkisp1_iowrite32(params_vdev, filt_mode, CIF_ISP_FILT_MODE);
467 }
468
469 /* ISP demosaic interface function */
isp_bdm_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_bdm_config * arg)470 static void isp_bdm_config(struct rkisp1_isp_params_vdev *params_vdev,
471 const struct cifisp_bdm_config *arg)
472 {
473 u32 bdm_th;
474
475 /* avoid to override the old enable value */
476 bdm_th = rkisp1_ioread32(params_vdev, CIF_ISP_DEMOSAIC);
477 bdm_th &= CIF_ISP_DEMOSAIC_BYPASS;
478 bdm_th |= arg->demosaic_th & ~CIF_ISP_DEMOSAIC_BYPASS;
479 /* set demosaic threshold */
480 rkisp1_iowrite32(params_vdev, bdm_th, CIF_ISP_DEMOSAIC);
481 }
482
483 /* ISP GAMMA correction interface function */
isp_sdg_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_sdg_config * arg)484 static void isp_sdg_config(struct rkisp1_isp_params_vdev *params_vdev,
485 const struct cifisp_sdg_config *arg)
486 {
487 int i;
488
489 rkisp1_iowrite32(params_vdev,
490 arg->xa_pnts.gamma_dx0, CIF_ISP_GAMMA_DX_LO);
491 rkisp1_iowrite32(params_vdev,
492 arg->xa_pnts.gamma_dx1, CIF_ISP_GAMMA_DX_HI);
493
494 for (i = 0; i < CIFISP_DEGAMMA_CURVE_SIZE; i++) {
495 rkisp1_iowrite32(params_vdev, arg->curve_r.gamma_y[i],
496 CIF_ISP_GAMMA_R_Y0 + i * 4);
497 rkisp1_iowrite32(params_vdev, arg->curve_g.gamma_y[i],
498 CIF_ISP_GAMMA_G_Y0 + i * 4);
499 rkisp1_iowrite32(params_vdev, arg->curve_b.gamma_y[i],
500 CIF_ISP_GAMMA_B_Y0 + i * 4);
501 }
502 }
503
504 /* ISP GAMMA correction interface function */
isp_goc_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_goc_config * arg)505 static void isp_goc_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
506 const struct cifisp_goc_config *arg)
507 {
508 int i;
509
510 rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V10);
511
512 for (i = 0; i < params_vdev->config->gamma_out_max_samples; i++)
513 rkisp1_iowrite32(params_vdev, arg->gamma_y[i],
514 CIF_ISP_GAMMA_OUT_Y_0_V10 + i * 4);
515 }
516
isp_goc_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_goc_config * arg)517 static void isp_goc_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
518 const struct cifisp_goc_config *arg)
519 {
520 int i;
521 u32 value;
522
523 rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_GAMMA_OUT_MODE_V12);
524
525 for (i = 0; i < params_vdev->config->gamma_out_max_samples / 2; i++) {
526 value = CIF_ISP_GAMMA_REG_VALUE_V12(
527 arg->gamma_y[2 * i + 1],
528 arg->gamma_y[2 * i]);
529 rkisp1_iowrite32(params_vdev, value,
530 CIF_ISP_GAMMA_OUT_Y_0_V12 + i * 4);
531 }
532 }
533
534 /* ISP Cross Talk */
isp_ctk_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_ctk_config * arg)535 static void isp_ctk_config(struct rkisp1_isp_params_vdev *params_vdev,
536 const struct cifisp_ctk_config *arg)
537 {
538 rkisp1_iowrite32(params_vdev, arg->coeff0, CIF_ISP_CT_COEFF_0);
539 rkisp1_iowrite32(params_vdev, arg->coeff1, CIF_ISP_CT_COEFF_1);
540 rkisp1_iowrite32(params_vdev, arg->coeff2, CIF_ISP_CT_COEFF_2);
541 rkisp1_iowrite32(params_vdev, arg->coeff3, CIF_ISP_CT_COEFF_3);
542 rkisp1_iowrite32(params_vdev, arg->coeff4, CIF_ISP_CT_COEFF_4);
543 rkisp1_iowrite32(params_vdev, arg->coeff5, CIF_ISP_CT_COEFF_5);
544 rkisp1_iowrite32(params_vdev, arg->coeff6, CIF_ISP_CT_COEFF_6);
545 rkisp1_iowrite32(params_vdev, arg->coeff7, CIF_ISP_CT_COEFF_7);
546 rkisp1_iowrite32(params_vdev, arg->coeff8, CIF_ISP_CT_COEFF_8);
547 rkisp1_iowrite32(params_vdev, arg->ct_offset_r, CIF_ISP_CT_OFFSET_R);
548 rkisp1_iowrite32(params_vdev, arg->ct_offset_g, CIF_ISP_CT_OFFSET_G);
549 rkisp1_iowrite32(params_vdev, arg->ct_offset_b, CIF_ISP_CT_OFFSET_B);
550 }
551
isp_ctk_enable(struct rkisp1_isp_params_vdev * params_vdev,bool en)552 static void isp_ctk_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
553 {
554 if (en)
555 return;
556
557 /* Write back the default values. */
558 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_0);
559 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_1);
560 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_2);
561 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_3);
562 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_4);
563 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_5);
564 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_6);
565 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_COEFF_7);
566 rkisp1_iowrite32(params_vdev, 0x80, CIF_ISP_CT_COEFF_8);
567
568 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_R);
569 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_G);
570 rkisp1_iowrite32(params_vdev, 0, CIF_ISP_CT_OFFSET_B);
571 }
572
573 /* ISP White Balance Mode */
isp_awb_meas_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg)574 static void isp_awb_meas_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
575 const struct cifisp_awb_meas_config *arg)
576 {
577 u32 reg_val = 0;
578 /* based on the mode,configure the awb module */
579 if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
580 /* Reference Cb and Cr */
581 rkisp1_iowrite32(params_vdev,
582 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
583 arg->awb_ref_cb, CIF_ISP_AWB_REF_V10);
584 /* Yc Threshold */
585 rkisp1_iowrite32(params_vdev,
586 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
587 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
588 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
589 arg->min_c, CIF_ISP_AWB_THRESH_V10);
590 }
591
592 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
593 if (arg->enable_ymax_cmp)
594 reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
595 else
596 reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
597 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
598
599 /* window offset */
600 rkisp1_iowrite32(params_vdev,
601 arg->awb_wnd.v_offs, CIF_ISP_AWB_WND_V_OFFS_V10);
602 rkisp1_iowrite32(params_vdev,
603 arg->awb_wnd.h_offs, CIF_ISP_AWB_WND_H_OFFS_V10);
604 /* AWB window size */
605 rkisp1_iowrite32(params_vdev,
606 arg->awb_wnd.v_size, CIF_ISP_AWB_WND_V_SIZE_V10);
607 rkisp1_iowrite32(params_vdev,
608 arg->awb_wnd.h_size, CIF_ISP_AWB_WND_H_SIZE_V10);
609 /* Number of frames */
610 rkisp1_iowrite32(params_vdev,
611 arg->frames, CIF_ISP_AWB_FRAMES_V10);
612 }
613
isp_awb_meas_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg)614 static void isp_awb_meas_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
615 const struct cifisp_awb_meas_config *arg)
616 {
617 u32 reg_val = 0;
618 /* based on the mode,configure the awb module */
619 if (arg->awb_mode == CIFISP_AWB_MODE_YCBCR) {
620 /* Reference Cb and Cr */
621 rkisp1_iowrite32(params_vdev,
622 CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
623 arg->awb_ref_cb, CIF_ISP_AWB_REF_V12);
624 /* Yc Threshold */
625 rkisp1_iowrite32(params_vdev,
626 CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
627 CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
628 CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
629 arg->min_c, CIF_ISP_AWB_THRESH_V12);
630 }
631
632 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
633 if (arg->enable_ymax_cmp)
634 reg_val |= CIF_ISP_AWB_YMAX_CMP_EN;
635 else
636 reg_val &= ~CIF_ISP_AWB_YMAX_CMP_EN;
637 reg_val &= ~CIF_ISP_AWB_SET_FRAMES_MASK_V12;
638 reg_val |= CIF_ISP_AWB_SET_FRAMES_V12(arg->frames);
639 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
640
641 /* window offset */
642 rkisp1_iowrite32(params_vdev,
643 arg->awb_wnd.v_offs << 16 |
644 arg->awb_wnd.h_offs,
645 CIF_ISP_AWB_OFFS_V12);
646 /* AWB window size */
647 rkisp1_iowrite32(params_vdev,
648 arg->awb_wnd.v_size << 16 |
649 arg->awb_wnd.h_size,
650 CIF_ISP_AWB_SIZE_V12);
651 }
652
isp_awb_meas_enable_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg,bool en)653 static void isp_awb_meas_enable_v10(struct rkisp1_isp_params_vdev *params_vdev,
654 const struct cifisp_awb_meas_config *arg, bool en)
655 {
656 u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V10);
657
658 /* switch off */
659 reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
660
661 if (en) {
662 if (arg->awb_mode == CIFISP_AWB_MODE_RGB)
663 reg_val |= CIF_ISP_AWB_MODE_RGB_EN;
664 else
665 reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
666
667 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V10);
668
669 /* Measurements require AWB block be active. */
670 /* TODO: need to enable here ? awb_gain_enable has done this */
671 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
672 CIF_ISP_CTRL_ISP_AWB_ENA);
673 } else {
674 rkisp1_iowrite32(params_vdev,
675 reg_val, CIF_ISP_AWB_PROP_V10);
676 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
677 CIF_ISP_CTRL_ISP_AWB_ENA);
678 }
679 }
680
isp_awb_meas_enable_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_meas_config * arg,bool en)681 static void isp_awb_meas_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
682 const struct cifisp_awb_meas_config *arg, bool en)
683 {
684 u32 reg_val = rkisp1_ioread32(params_vdev, CIF_ISP_AWB_PROP_V12);
685
686 /* switch off */
687 reg_val &= CIF_ISP_AWB_MODE_MASK_NONE;
688
689 if (en) {
690 if (arg->awb_mode == CIFISP_AWB_MODE_RGB)
691 reg_val |= CIF_ISP_AWB_MODE_RGB_EN;
692 else
693 reg_val |= CIF_ISP_AWB_MODE_YCBCR_EN;
694
695 rkisp1_iowrite32(params_vdev, reg_val, CIF_ISP_AWB_PROP_V12);
696
697 /* Measurements require AWB block be active. */
698 /* TODO: need to enable here ? awb_gain_enable has done this */
699 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
700 CIF_ISP_CTRL_ISP_AWB_ENA);
701 } else {
702 rkisp1_iowrite32(params_vdev,
703 reg_val, CIF_ISP_AWB_PROP_V12);
704 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
705 CIF_ISP_CTRL_ISP_AWB_ENA);
706 }
707 }
708
isp_awb_gain_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_gain_config * arg)709 static void isp_awb_gain_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
710 const struct cifisp_awb_gain_config *arg)
711 {
712 rkisp1_iowrite32(params_vdev,
713 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
714 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V10);
715
716 rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
717 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V10);
718 }
719
isp_awb_gain_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_awb_gain_config * arg)720 static void isp_awb_gain_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
721 const struct cifisp_awb_gain_config *arg)
722 {
723 rkisp1_iowrite32(params_vdev,
724 CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
725 arg->gain_green_b, CIF_ISP_AWB_GAIN_G_V12);
726
727 rkisp1_iowrite32(params_vdev, CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
728 arg->gain_blue, CIF_ISP_AWB_GAIN_RB_V12);
729 }
730
isp_aec_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_aec_config * arg)731 static void isp_aec_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
732 const struct cifisp_aec_config *arg)
733 {
734 unsigned int block_hsize, block_vsize;
735 u32 exp_ctrl;
736
737 /* avoid to override the old enable value */
738 exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
739 exp_ctrl &= CIF_ISP_EXP_ENA;
740 if (arg->autostop)
741 exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
742 if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
743 exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
744 rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
745
746 rkisp1_iowrite32(params_vdev,
747 arg->meas_window.h_offs, CIF_ISP_EXP_H_OFFSET_V10);
748 rkisp1_iowrite32(params_vdev,
749 arg->meas_window.v_offs, CIF_ISP_EXP_V_OFFSET_V10);
750
751 block_hsize = arg->meas_window.h_size / CIF_ISP_EXP_COLUMN_NUM_V10 - 1;
752 block_vsize = arg->meas_window.v_size / CIF_ISP_EXP_ROW_NUM_V10 - 1;
753
754 rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_H_SIZE_SET_V10(block_hsize),
755 CIF_ISP_EXP_H_SIZE_V10);
756 rkisp1_iowrite32(params_vdev, CIF_ISP_EXP_V_SIZE_SET_V10(block_vsize),
757 CIF_ISP_EXP_V_SIZE_V10);
758 }
759
isp_aec_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_aec_config * arg)760 static void isp_aec_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
761 const struct cifisp_aec_config *arg)
762 {
763 u32 exp_ctrl;
764 u32 block_hsize, block_vsize;
765 u32 wnd_num_idx = 1;
766 const u32 ae_wnd_num[] = {
767 5, 9, 15, 15
768 };
769
770 /* avoid to override the old enable value */
771 exp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_EXP_CTRL);
772 exp_ctrl &= CIF_ISP_EXP_ENA;
773 if (arg->autostop)
774 exp_ctrl |= CIF_ISP_EXP_CTRL_AUTOSTOP;
775 if (arg->mode == CIFISP_EXP_MEASURING_MODE_1)
776 exp_ctrl |= CIF_ISP_EXP_CTRL_MEASMODE_1;
777 exp_ctrl |= CIF_ISP_EXP_CTRL_WNDNUM_SET_V12(wnd_num_idx);
778 rkisp1_iowrite32(params_vdev, exp_ctrl, CIF_ISP_EXP_CTRL);
779
780 rkisp1_iowrite32(params_vdev,
781 CIF_ISP_EXP_V_OFFSET_SET_V12(arg->meas_window.v_offs) |
782 CIF_ISP_EXP_H_OFFSET_SET_V12(arg->meas_window.h_offs),
783 CIF_ISP_EXP_OFFS_V12);
784
785 block_hsize = arg->meas_window.h_size / ae_wnd_num[wnd_num_idx] - 1;
786 block_vsize = arg->meas_window.v_size / ae_wnd_num[wnd_num_idx] - 1;
787
788 rkisp1_iowrite32(params_vdev,
789 CIF_ISP_EXP_V_SIZE_SET_V12(block_vsize) |
790 CIF_ISP_EXP_H_SIZE_SET_V12(block_hsize),
791 CIF_ISP_EXP_SIZE_V12);
792 }
793
isp_cproc_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_cproc_config * arg)794 static void isp_cproc_config(struct rkisp1_isp_params_vdev *params_vdev,
795 const struct cifisp_cproc_config *arg)
796 {
797 struct cifisp_isp_other_cfg *cur_other_cfg = ¶ms_vdev->cur_params.others;
798 struct cifisp_ie_config *cur_ie_config = &cur_other_cfg->ie_config;
799 u32 effect = cur_ie_config->effect;
800 u32 quantization = params_vdev->quantization;
801
802 rkisp1_iowrite32(params_vdev, arg->contrast, CIF_C_PROC_CONTRAST);
803 rkisp1_iowrite32(params_vdev, arg->hue, CIF_C_PROC_HUE);
804 rkisp1_iowrite32(params_vdev, arg->sat, CIF_C_PROC_SATURATION);
805 rkisp1_iowrite32(params_vdev, arg->brightness, CIF_C_PROC_BRIGHTNESS);
806
807 if (quantization != V4L2_QUANTIZATION_FULL_RANGE ||
808 effect != V4L2_COLORFX_NONE) {
809 isp_param_clear_bits(params_vdev, CIF_C_PROC_CTRL,
810 CIF_C_PROC_YOUT_FULL |
811 CIF_C_PROC_YIN_FULL |
812 CIF_C_PROC_COUT_FULL);
813 } else {
814 isp_param_set_bits(params_vdev, CIF_C_PROC_CTRL,
815 CIF_C_PROC_YOUT_FULL |
816 CIF_C_PROC_YIN_FULL |
817 CIF_C_PROC_COUT_FULL);
818 }
819 }
820
isp_hst_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg)821 static void isp_hst_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
822 const struct cifisp_hst_config *arg)
823 {
824 unsigned int block_hsize, block_vsize;
825 const u32 hist_weight_regs[] = {
826 CIF_ISP_HIST_WEIGHT_00TO30_V10, CIF_ISP_HIST_WEIGHT_40TO21_V10,
827 CIF_ISP_HIST_WEIGHT_31TO12_V10, CIF_ISP_HIST_WEIGHT_22TO03_V10,
828 CIF_ISP_HIST_WEIGHT_13TO43_V10, CIF_ISP_HIST_WEIGHT_04TO34_V10,
829 CIF_ISP_HIST_WEIGHT_44_V10,
830 };
831 int i;
832 const u8 *weight;
833 u32 hist_prop;
834
835 /* avoid to override the old enable value */
836 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
837 hist_prop &= CIF_ISP_HIST_PROP_MODE_MASK_V10;
838 hist_prop |= CIF_ISP_HIST_PREDIV_SET_V10(arg->histogram_predivider);
839 rkisp1_iowrite32(params_vdev, hist_prop, CIF_ISP_HIST_PROP_V10);
840 rkisp1_iowrite32(params_vdev,
841 arg->meas_window.h_offs,
842 CIF_ISP_HIST_H_OFFS_V10);
843 rkisp1_iowrite32(params_vdev,
844 arg->meas_window.v_offs,
845 CIF_ISP_HIST_V_OFFS_V10);
846
847 block_hsize = arg->meas_window.h_size / CIF_ISP_HIST_COLUMN_NUM_V10 - 1;
848 block_vsize = arg->meas_window.v_size / CIF_ISP_HIST_ROW_NUM_V10 - 1;
849
850 rkisp1_iowrite32(params_vdev, block_hsize, CIF_ISP_HIST_H_SIZE_V10);
851 rkisp1_iowrite32(params_vdev, block_vsize, CIF_ISP_HIST_V_SIZE_V10);
852
853 weight = arg->hist_weight;
854 for (i = 0; i < ARRAY_SIZE(hist_weight_regs); ++i, weight += 4)
855 rkisp1_iowrite32(params_vdev, CIF_ISP_HIST_WEIGHT_SET_V10(
856 weight[0], weight[1], weight[2], weight[3]),
857 hist_weight_regs[i]);
858 }
859
isp_hst_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg)860 static void isp_hst_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
861 const struct cifisp_hst_config *arg)
862 {
863 u32 i, j;
864 u32 value;
865 u32 hist_ctrl;
866 u32 block_hsize, block_vsize;
867 u32 wnd_num_idx, hist_weight_num;
868 u8 weight15x15[CIF_ISP_HIST_WEIGHT_REG_SIZE_V12];
869 const u32 hist_wnd_num[] = {
870 5, 9, 15, 15
871 };
872
873 /* now we just support 9x9 window */
874 wnd_num_idx = 1;
875 memset(weight15x15, 0x00, sizeof(weight15x15));
876 /* avoid to override the old enable value */
877 hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
878 hist_ctrl &= CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
879 CIF_ISP_HIST_CTRL_EN_MASK_V12;
880 hist_ctrl = hist_ctrl |
881 CIF_ISP_HIST_CTRL_INTRSEL_SET_V12(1) |
882 CIF_ISP_HIST_CTRL_DATASEL_SET_V12(0) |
883 CIF_ISP_HIST_CTRL_WATERLINE_SET_V12(0) |
884 CIF_ISP_HIST_CTRL_AUTOSTOP_SET_V12(0) |
885 CIF_ISP_HIST_CTRL_WNDNUM_SET_V12(1) |
886 CIF_ISP_HIST_CTRL_STEPSIZE_SET_V12(arg->histogram_predivider);
887 rkisp1_iowrite32(params_vdev, hist_ctrl, CIF_ISP_HIST_CTRL_V12);
888
889 rkisp1_iowrite32(params_vdev,
890 CIF_ISP_HIST_OFFS_SET_V12(arg->meas_window.h_offs,
891 arg->meas_window.v_offs),
892 CIF_ISP_HIST_OFFS_V12);
893
894 block_hsize = arg->meas_window.h_size / hist_wnd_num[wnd_num_idx] - 1;
895 block_vsize = arg->meas_window.v_size / hist_wnd_num[wnd_num_idx] - 1;
896 rkisp1_iowrite32(params_vdev,
897 CIF_ISP_HIST_SIZE_SET_V12(block_hsize, block_vsize),
898 CIF_ISP_HIST_SIZE_V12);
899
900 for (i = 0; i < hist_wnd_num[wnd_num_idx]; i++) {
901 for (j = 0; j < hist_wnd_num[wnd_num_idx]; j++) {
902 weight15x15[i * CIF_ISP_HIST_ROW_NUM_V12 + j] =
903 arg->hist_weight[i * hist_wnd_num[wnd_num_idx] + j];
904 }
905 }
906
907 hist_weight_num = CIF_ISP_HIST_WEIGHT_REG_SIZE_V12;
908 for (i = 0; i < (hist_weight_num / 4); i++) {
909 value = CIF_ISP_HIST_WEIGHT_SET_V12(
910 weight15x15[4 * i + 0],
911 weight15x15[4 * i + 1],
912 weight15x15[4 * i + 2],
913 weight15x15[4 * i + 3]);
914 rkisp1_iowrite32(params_vdev, value,
915 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
916 }
917 value = CIF_ISP_HIST_WEIGHT_SET_V12(
918 weight15x15[4 * i + 0], 0, 0, 0);
919 rkisp1_iowrite32(params_vdev, value,
920 CIF_ISP_HIST_WEIGHT_V12 + 4 * i);
921 }
922
isp_hst_enable_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg,bool en)923 static void isp_hst_enable_v10(struct rkisp1_isp_params_vdev *params_vdev,
924 const struct cifisp_hst_config *arg, bool en)
925 {
926 if (en) {
927 u32 hist_prop = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_PROP_V10);
928
929 hist_prop &= ~CIF_ISP_HIST_PROP_MODE_MASK_V10;
930 hist_prop |= arg->mode;
931 isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10, hist_prop);
932 } else {
933 isp_param_clear_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
934 CIF_ISP_HIST_PROP_MODE_MASK_V10);
935 }
936 }
937
isp_hst_enable_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_hst_config * arg,bool en)938 static void isp_hst_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
939 const struct cifisp_hst_config *arg, bool en)
940 {
941 if (en) {
942 u32 hist_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_HIST_CTRL_V12);
943
944 hist_ctrl &= ~CIF_ISP_HIST_CTRL_MODE_MASK_V12;
945 hist_ctrl |= CIF_ISP_HIST_CTRL_MODE_SET_V12(arg->mode);
946 hist_ctrl |= CIF_ISP_HIST_CTRL_EN_SET_V12(1);
947 isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12, hist_ctrl);
948 } else {
949 isp_param_clear_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
950 CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
951 CIF_ISP_HIST_CTRL_EN_MASK_V12);
952 }
953 }
954
isp_afm_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_afc_config * arg)955 static void isp_afm_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
956 const struct cifisp_afc_config *arg)
957 {
958 int i;
959 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
960 arg->num_afm_win);
961 u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
962
963 /* Switch off to configure. */
964 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
965
966 for (i = 0; i < num_of_win; i++) {
967 rkisp1_iowrite32(params_vdev,
968 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_offs) |
969 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_offs),
970 CIF_ISP_AFM_LT_A + i * 8);
971 rkisp1_iowrite32(params_vdev,
972 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_size +
973 arg->afm_win[i].h_offs) |
974 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_size +
975 arg->afm_win[i].v_offs),
976 CIF_ISP_AFM_RB_A + i * 8);
977 }
978 rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
979 rkisp1_iowrite32(params_vdev, arg->var_shift, CIF_ISP_AFM_VAR_SHIFT);
980 /* restore afm status */
981 rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
982 }
983
isp_afm_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_afc_config * arg)984 static void isp_afm_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
985 const struct cifisp_afc_config *arg)
986 {
987 unsigned int i;
988 u32 lum_var_shift, afm_var_shift;
989 size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
990 arg->num_afm_win);
991 u32 afm_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_AFM_CTRL);
992
993 /* Switch off to configure. */
994 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
995
996 for (i = 0; i < num_of_win; i++) {
997 rkisp1_iowrite32(params_vdev,
998 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_offs) |
999 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_offs),
1000 CIF_ISP_AFM_LT_A + i * 8);
1001 rkisp1_iowrite32(params_vdev,
1002 CIF_ISP_AFM_WINDOW_X(arg->afm_win[i].h_size +
1003 arg->afm_win[i].h_offs) |
1004 CIF_ISP_AFM_WINDOW_Y(arg->afm_win[i].v_size +
1005 arg->afm_win[i].v_offs),
1006 CIF_ISP_AFM_RB_A + i * 8);
1007 }
1008 rkisp1_iowrite32(params_vdev, arg->thres, CIF_ISP_AFM_THRES);
1009
1010 lum_var_shift = CIF_ISP_AFM_GET_LUM_SHIFT_a_V12(arg->var_shift);
1011 afm_var_shift = CIF_ISP_AFM_GET_AFM_SHIFT_a_V12(arg->var_shift);
1012 rkisp1_iowrite32(params_vdev,
1013 CIF_ISP_AFM_SET_SHIFT_a_V12(lum_var_shift, afm_var_shift) |
1014 CIF_ISP_AFM_SET_SHIFT_b_V12(lum_var_shift, afm_var_shift) |
1015 CIF_ISP_AFM_SET_SHIFT_c_V12(lum_var_shift, afm_var_shift),
1016 CIF_ISP_AFM_VAR_SHIFT);
1017
1018 /* restore afm status */
1019 rkisp1_iowrite32(params_vdev, afm_ctrl, CIF_ISP_AFM_CTRL);
1020 }
1021
isp_ie_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_ie_config * arg)1022 static void isp_ie_config(struct rkisp1_isp_params_vdev *params_vdev,
1023 const struct cifisp_ie_config *arg)
1024 {
1025 u32 eff_ctrl;
1026
1027 eff_ctrl = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
1028 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
1029
1030 if (params_vdev->quantization == V4L2_QUANTIZATION_FULL_RANGE)
1031 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
1032
1033 switch (arg->effect) {
1034 case V4L2_COLORFX_SEPIA:
1035 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
1036 break;
1037 case V4L2_COLORFX_SET_CBCR:
1038 rkisp1_iowrite32(params_vdev, arg->eff_tint, CIF_IMG_EFF_TINT);
1039 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SEPIA;
1040 break;
1041 /*
1042 * Color selection is similar to water color(AQUA):
1043 * grayscale + selected color w threshold
1044 */
1045 case V4L2_COLORFX_AQUA:
1046 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_COLOR_SEL;
1047 rkisp1_iowrite32(params_vdev, arg->color_sel,
1048 CIF_IMG_EFF_COLOR_SEL);
1049 break;
1050 case V4L2_COLORFX_EMBOSS:
1051 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_EMBOSS;
1052 rkisp1_iowrite32(params_vdev, arg->eff_mat_1,
1053 CIF_IMG_EFF_MAT_1);
1054 rkisp1_iowrite32(params_vdev, arg->eff_mat_2,
1055 CIF_IMG_EFF_MAT_2);
1056 rkisp1_iowrite32(params_vdev, arg->eff_mat_3,
1057 CIF_IMG_EFF_MAT_3);
1058 break;
1059 case V4L2_COLORFX_SKETCH:
1060 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_SKETCH;
1061 rkisp1_iowrite32(params_vdev, arg->eff_mat_3,
1062 CIF_IMG_EFF_MAT_3);
1063 rkisp1_iowrite32(params_vdev, arg->eff_mat_4,
1064 CIF_IMG_EFF_MAT_4);
1065 rkisp1_iowrite32(params_vdev, arg->eff_mat_5,
1066 CIF_IMG_EFF_MAT_5);
1067 break;
1068 case V4L2_COLORFX_BW:
1069 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_BLACKWHITE;
1070 break;
1071 case V4L2_COLORFX_NEGATIVE:
1072 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_NEGATIVE;
1073 break;
1074 default:
1075 break;
1076 }
1077
1078 rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1079 }
1080
isp_ie_enable(struct rkisp1_isp_params_vdev * params_vdev,bool en)1081 static void isp_ie_enable(struct rkisp1_isp_params_vdev *params_vdev, bool en)
1082 {
1083 if (en) {
1084 isp_param_set_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
1085 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1086 CIF_IMG_EFF_CTRL_ENABLE);
1087 isp_param_set_bits(params_vdev, CIF_IMG_EFF_CTRL,
1088 CIF_IMG_EFF_CTRL_CFG_UPD);
1089 } else {
1090 isp_param_clear_bits(params_vdev, CIF_IMG_EFF_CTRL,
1091 CIF_IMG_EFF_CTRL_ENABLE);
1092 isp_param_clear_bits(params_vdev, CIF_ICCL, CIF_ICCL_IE_CLK);
1093 }
1094 }
1095
isp_csm_config(struct rkisp1_isp_params_vdev * params_vdev,bool full_range)1096 static void isp_csm_config(struct rkisp1_isp_params_vdev *params_vdev,
1097 bool full_range)
1098 {
1099 const u16 full_range_coeff[] = {
1100 0x0026, 0x004b, 0x000f,
1101 0x01ea, 0x01d6, 0x0040,
1102 0x0040, 0x01ca, 0x01f6
1103 };
1104 const u16 limited_range_coeff[] = {
1105 0x0021, 0x0040, 0x000d,
1106 0x01ed, 0x01db, 0x0038,
1107 0x0038, 0x01d1, 0x01f7,
1108 };
1109 unsigned int i;
1110
1111 if (full_range) {
1112 for (i = 0; i < ARRAY_SIZE(full_range_coeff); i++)
1113 rkisp1_iowrite32(params_vdev, full_range_coeff[i],
1114 CIF_ISP_CC_COEFF_0 + i * 4);
1115
1116 isp_param_set_bits(params_vdev, CIF_ISP_CTRL,
1117 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
1118 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
1119 } else {
1120 for (i = 0; i < ARRAY_SIZE(limited_range_coeff); i++)
1121 rkisp1_iowrite32(params_vdev, limited_range_coeff[i],
1122 CIF_ISP_CC_COEFF_0 + i * 4);
1123
1124 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
1125 CIF_ISP_CTRL_ISP_CSM_Y_FULL_ENA |
1126 CIF_ISP_CTRL_ISP_CSM_C_FULL_ENA);
1127 }
1128 }
1129
1130 /* ISP De-noise Pre-Filter(DPF) function */
isp_dpf_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_dpf_config * arg)1131 static void isp_dpf_config(struct rkisp1_isp_params_vdev *params_vdev,
1132 const struct cifisp_dpf_config *arg)
1133 {
1134 unsigned int isp_dpf_mode;
1135 unsigned int spatial_coeff;
1136 unsigned int i;
1137
1138 switch (arg->gain.mode) {
1139 case CIFISP_DPF_GAIN_USAGE_NF_GAINS:
1140 isp_dpf_mode = CIF_ISP_DPF_MODE_USE_NF_GAIN |
1141 CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1142 break;
1143 case CIFISP_DPF_GAIN_USAGE_LSC_GAINS:
1144 isp_dpf_mode = CIF_ISP_DPF_MODE_LSC_GAIN_COMP;
1145 break;
1146 case CIFISP_DPF_GAIN_USAGE_NF_LSC_GAINS:
1147 isp_dpf_mode = CIF_ISP_DPF_MODE_USE_NF_GAIN |
1148 CIF_ISP_DPF_MODE_AWB_GAIN_COMP |
1149 CIF_ISP_DPF_MODE_LSC_GAIN_COMP;
1150 break;
1151 case CIFISP_DPF_GAIN_USAGE_AWB_GAINS:
1152 isp_dpf_mode = CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1153 break;
1154 case CIFISP_DPF_GAIN_USAGE_AWB_LSC_GAINS:
1155 isp_dpf_mode = CIF_ISP_DPF_MODE_LSC_GAIN_COMP |
1156 CIF_ISP_DPF_MODE_AWB_GAIN_COMP;
1157 break;
1158 case CIFISP_DPF_GAIN_USAGE_DISABLED:
1159 default:
1160 isp_dpf_mode = 0;
1161 break;
1162 }
1163
1164 if (arg->nll.scale_mode == CIFISP_NLL_SCALE_LOGARITHMIC)
1165 isp_dpf_mode |= CIF_ISP_DPF_MODE_NLL_SEGMENTATION;
1166 if (arg->rb_flt.fltsize == CIFISP_DPF_RB_FILTERSIZE_9x9)
1167 isp_dpf_mode |= CIF_ISP_DPF_MODE_RB_FLTSIZE_9x9;
1168 if (!arg->rb_flt.r_enable)
1169 isp_dpf_mode |= CIF_ISP_DPF_MODE_R_FLT_DIS;
1170 if (!arg->rb_flt.b_enable)
1171 isp_dpf_mode |= CIF_ISP_DPF_MODE_B_FLT_DIS;
1172 if (!arg->g_flt.gb_enable)
1173 isp_dpf_mode |= CIF_ISP_DPF_MODE_GB_FLT_DIS;
1174 if (!arg->g_flt.gr_enable)
1175 isp_dpf_mode |= CIF_ISP_DPF_MODE_GR_FLT_DIS;
1176
1177 isp_param_set_bits(params_vdev, CIF_ISP_DPF_MODE, isp_dpf_mode);
1178 rkisp1_iowrite32(params_vdev, arg->gain.nf_b_gain,
1179 CIF_ISP_DPF_NF_GAIN_B);
1180 rkisp1_iowrite32(params_vdev, arg->gain.nf_r_gain,
1181 CIF_ISP_DPF_NF_GAIN_R);
1182 rkisp1_iowrite32(params_vdev, arg->gain.nf_gb_gain,
1183 CIF_ISP_DPF_NF_GAIN_GB);
1184 rkisp1_iowrite32(params_vdev, arg->gain.nf_gr_gain,
1185 CIF_ISP_DPF_NF_GAIN_GR);
1186
1187 for (i = 0; i < CIFISP_DPF_MAX_NLF_COEFFS; i++) {
1188 rkisp1_iowrite32(params_vdev, arg->nll.coeff[i],
1189 CIF_ISP_DPF_NULL_COEFF_0 + i * 4);
1190 }
1191
1192 spatial_coeff = arg->g_flt.spatial_coeff[0] |
1193 (arg->g_flt.spatial_coeff[1] << 8) |
1194 (arg->g_flt.spatial_coeff[2] << 16) |
1195 (arg->g_flt.spatial_coeff[3] << 24);
1196 rkisp1_iowrite32(params_vdev, spatial_coeff,
1197 CIF_ISP_DPF_S_WEIGHT_G_1_4);
1198
1199 spatial_coeff = arg->g_flt.spatial_coeff[4] |
1200 (arg->g_flt.spatial_coeff[5] << 8);
1201 rkisp1_iowrite32(params_vdev, spatial_coeff,
1202 CIF_ISP_DPF_S_WEIGHT_G_5_6);
1203
1204 spatial_coeff = arg->rb_flt.spatial_coeff[0] |
1205 (arg->rb_flt.spatial_coeff[1] << 8) |
1206 (arg->rb_flt.spatial_coeff[2] << 16) |
1207 (arg->rb_flt.spatial_coeff[3] << 24);
1208 rkisp1_iowrite32(params_vdev, spatial_coeff,
1209 CIF_ISP_DPF_S_WEIGHT_RB_1_4);
1210
1211 spatial_coeff = arg->rb_flt.spatial_coeff[4] |
1212 (arg->rb_flt.spatial_coeff[5] << 8);
1213 rkisp1_iowrite32(params_vdev, spatial_coeff,
1214 CIF_ISP_DPF_S_WEIGHT_RB_5_6);
1215 }
1216
isp_dpf_strength_config(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_dpf_strength_config * arg)1217 static void isp_dpf_strength_config(struct rkisp1_isp_params_vdev *params_vdev,
1218 const struct cifisp_dpf_strength_config *arg)
1219 {
1220 rkisp1_iowrite32(params_vdev, arg->b, CIF_ISP_DPF_STRENGTH_B);
1221 rkisp1_iowrite32(params_vdev, arg->g, CIF_ISP_DPF_STRENGTH_G);
1222 rkisp1_iowrite32(params_vdev, arg->r, CIF_ISP_DPF_STRENGTH_R);
1223 }
1224
isp_dummy_enable(struct rkisp1_isp_params_vdev * params_vdev,bool en)1225 static void isp_dummy_enable(struct rkisp1_isp_params_vdev *params_vdev,
1226 bool en)
1227 {
1228 }
1229
isp_wdr_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_wdr_config * arg)1230 static void isp_wdr_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
1231 const struct cifisp_wdr_config *arg)
1232 {
1233 }
1234
isp_wdr_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_wdr_config * arg)1235 static void isp_wdr_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
1236 const struct cifisp_wdr_config *arg)
1237 {
1238 int i;
1239
1240 for (i = 0; i < CIFISP_WDR_SIZE; i++) {
1241 if (i <= 39)
1242 rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
1243 CIF_ISP_WDR_CTRL + i * 4);
1244 else
1245 rkisp1_iowrite32(params_vdev, arg->c_wdr[i],
1246 CIF_ISP_RKWDR_CTRL0 + (i - 40) * 4);
1247 }
1248 }
1249
isp_wdr_enable_v12(struct rkisp1_isp_params_vdev * params_vdev,bool en)1250 static void isp_wdr_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
1251 bool en)
1252 {
1253 if (en)
1254 rkisp1_iowrite32(params_vdev, 0x030cf1,
1255 CIF_ISP_RKWDR_CTRL0);
1256 else
1257 rkisp1_iowrite32(params_vdev, 0x030cf0,
1258 CIF_ISP_RKWDR_CTRL0);
1259 }
1260
1261 static void
isp_demosaiclp_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_demosaiclp_config * arg)1262 isp_demosaiclp_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
1263 const struct cifisp_demosaiclp_config *arg)
1264 {
1265 }
1266
1267 static void
isp_demosaiclp_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_demosaiclp_config * arg)1268 isp_demosaiclp_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
1269 const struct cifisp_demosaiclp_config *arg)
1270 {
1271 u32 val;
1272 u32 level_sel;
1273
1274 val = CIF_ISP_PACK_4BYTE(arg->lu_divided[0],
1275 arg->lu_divided[1],
1276 arg->lu_divided[2],
1277 arg->lu_divided[3]);
1278 rkisp1_iowrite32(params_vdev, val,
1279 CIF_ISP_FILT_LU_DIVID);
1280
1281 val = CIF_ISP_PACK_4BYTE(arg->thgrad_divided[0],
1282 arg->thgrad_divided[1],
1283 arg->thgrad_divided[2],
1284 arg->thgrad_divided[3]);
1285 rkisp1_iowrite32(params_vdev, val,
1286 CIF_ISP_FILT_THGRAD_DIVID0123);
1287 rkisp1_iowrite32(params_vdev,
1288 arg->thgrad_divided[4],
1289 CIF_ISP_FILT_THGRAD_DIVID4);
1290
1291 val = CIF_ISP_PACK_4BYTE(arg->thdiff_divided[0],
1292 arg->thdiff_divided[1],
1293 arg->thdiff_divided[2],
1294 arg->thdiff_divided[3]);
1295 rkisp1_iowrite32(params_vdev, val,
1296 CIF_ISP_FILT_THDIFF_DIVID0123);
1297 rkisp1_iowrite32(params_vdev,
1298 arg->thdiff_divided[4],
1299 CIF_ISP_FILT_THDIFF_DIVID4);
1300
1301 val = CIF_ISP_PACK_4BYTE(arg->thcsc_divided[0],
1302 arg->thcsc_divided[1],
1303 arg->thcsc_divided[2],
1304 arg->thcsc_divided[3]);
1305 rkisp1_iowrite32(params_vdev, val,
1306 CIF_ISP_FILT_THCSC_DIVID0123);
1307 rkisp1_iowrite32(params_vdev, arg->thcsc_divided[4],
1308 CIF_ISP_FILT_THCSC_DIVID4);
1309
1310 val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[0],
1311 arg->thvar_divided[1]);
1312 rkisp1_iowrite32(params_vdev, val,
1313 CIF_ISP_FILT_THVAR_DIVID01);
1314
1315 val = CIF_ISP_PACK_2SHORT(arg->thvar_divided[2],
1316 arg->thvar_divided[3]);
1317 rkisp1_iowrite32(params_vdev, val,
1318 CIF_ISP_FILT_THVAR_DIVID23);
1319 rkisp1_iowrite32(params_vdev, arg->thvar_divided[4],
1320 CIF_ISP_FILT_THVAR_DIVID4);
1321
1322 rkisp1_iowrite32(params_vdev, arg->th_grad,
1323 CIF_ISP_FILT_TH_GRAD);
1324 rkisp1_iowrite32(params_vdev, arg->th_diff,
1325 CIF_ISP_FILT_TH_DIFF);
1326 rkisp1_iowrite32(params_vdev, arg->th_csc,
1327 CIF_ISP_FILT_TH_CSC);
1328 rkisp1_iowrite32(params_vdev, arg->th_var,
1329 CIF_ISP_FILT_TH_VAR);
1330
1331 val = CIF_ISP_PACK_4BYTE(arg->thvar_r_fct,
1332 arg->thdiff_r_fct,
1333 arg->thgrad_r_fct,
1334 0);
1335 rkisp1_iowrite32(params_vdev, val,
1336 CIF_ISP_FILT_R_FCT);
1337
1338 val = CIF_ISP_PACK_4BYTE(arg->thgrad_b_fct,
1339 arg->thdiff_b_fct,
1340 arg->thvar_b_fct,
1341 0);
1342 rkisp1_iowrite32(params_vdev, val,
1343 CIF_ISP_FILT_B_FCT);
1344
1345 isp_param_set_bits(params_vdev,
1346 CIF_ISP_FILT_MODE,
1347 arg->rb_filter_en << 3 |
1348 arg->hp_filter_en << 2);
1349
1350 level_sel = rkisp1_ioread32(params_vdev, CIF_ISP_FILT_LELEL_SEL);
1351 level_sel &= CIF_ISP_FLT_LEVEL_OLD_LP;
1352 level_sel |= arg->th_var_en << 20 |
1353 arg->th_csc_en << 19 |
1354 arg->th_diff_en << 18 |
1355 arg->th_grad_en << 17 |
1356 arg->similarity_th << 12 |
1357 arg->flat_level_sel << 8 |
1358 arg->pattern_level_sel << 4 |
1359 arg->edge_level_sel;
1360
1361 rkisp1_iowrite32(params_vdev, level_sel,
1362 CIF_ISP_FILT_LELEL_SEL);
1363 }
1364
1365 static void
isp_demosaiclp_enable_v12(struct rkisp1_isp_params_vdev * params_vdev,bool en)1366 isp_demosaiclp_enable_v12(struct rkisp1_isp_params_vdev *params_vdev,
1367 bool en)
1368 {
1369 if (en)
1370 isp_param_clear_bits(params_vdev,
1371 CIF_ISP_FILT_LELEL_SEL,
1372 CIF_ISP_FLT_LEVEL_OLD_LP);
1373 else
1374 isp_param_set_bits(params_vdev,
1375 CIF_ISP_FILT_LELEL_SEL,
1376 CIF_ISP_FLT_LEVEL_OLD_LP);
1377 }
1378
1379 static void
isp_rkiesharp_config_v10(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_rkiesharp_config * arg)1380 isp_rkiesharp_config_v10(struct rkisp1_isp_params_vdev *params_vdev,
1381 const struct cifisp_rkiesharp_config *arg)
1382 {
1383 }
1384
1385 static void
isp_rkiesharp_config_v12(struct rkisp1_isp_params_vdev * params_vdev,const struct cifisp_rkiesharp_config * arg)1386 isp_rkiesharp_config_v12(struct rkisp1_isp_params_vdev *params_vdev,
1387 const struct cifisp_rkiesharp_config *arg)
1388 {
1389 u32 i;
1390 u32 val;
1391 u32 eff_ctrl;
1392 u32 minmax[5];
1393
1394 val = CIF_ISP_PACK_4BYTE(arg->yavg_thr[0],
1395 arg->yavg_thr[1],
1396 arg->yavg_thr[2],
1397 arg->yavg_thr[3]);
1398 rkisp1_iowrite32(params_vdev, val,
1399 CIF_RKSHARP_YAVG_THR);
1400
1401 val = CIF_ISP_PACK_4BYTE(arg->delta1[0],
1402 arg->delta2[0],
1403 arg->delta1[1],
1404 arg->delta2[1]);
1405 rkisp1_iowrite32(params_vdev, val,
1406 CIF_RKSHARP_DELTA_P0_P1);
1407
1408 val = CIF_ISP_PACK_4BYTE(arg->delta1[2],
1409 arg->delta2[2],
1410 arg->delta1[3],
1411 arg->delta2[3]);
1412 rkisp1_iowrite32(params_vdev, val,
1413 CIF_RKSHARP_DELTA_P2_P3);
1414
1415 val = CIF_ISP_PACK_4BYTE(arg->delta1[4],
1416 arg->delta2[4],
1417 0,
1418 0);
1419 rkisp1_iowrite32(params_vdev, val,
1420 CIF_RKSHARP_DELTA_P4);
1421
1422 for (i = 0; i < 5; i++)
1423 minmax[i] = arg->minnumber[i] << 4 | arg->maxnumber[i];
1424 val = CIF_ISP_PACK_4BYTE(minmax[0],
1425 minmax[1],
1426 minmax[2],
1427 minmax[3]);
1428 rkisp1_iowrite32(params_vdev, val,
1429 CIF_RKSHARP_NPIXEL_P0_P1_P2_P3);
1430 rkisp1_iowrite32(params_vdev, minmax[4],
1431 CIF_RKSHARP_NPIXEL_P4);
1432
1433 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[0],
1434 arg->gauss_flat_coe[1],
1435 arg->gauss_flat_coe[2],
1436 0);
1437 rkisp1_iowrite32(params_vdev, val,
1438 CIF_RKSHARP_GAUSS_FLAT_COE1);
1439
1440 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[3],
1441 arg->gauss_flat_coe[4],
1442 arg->gauss_flat_coe[5],
1443 0);
1444 rkisp1_iowrite32(params_vdev, val,
1445 CIF_RKSHARP_GAUSS_FLAT_COE2);
1446
1447 val = CIF_ISP_PACK_4BYTE(arg->gauss_flat_coe[6],
1448 arg->gauss_flat_coe[7],
1449 arg->gauss_flat_coe[8],
1450 0);
1451 rkisp1_iowrite32(params_vdev, val,
1452 CIF_RKSHARP_GAUSS_FLAT_COE3);
1453
1454 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[0],
1455 arg->gauss_noise_coe[1],
1456 arg->gauss_noise_coe[2],
1457 0);
1458 rkisp1_iowrite32(params_vdev, val,
1459 CIF_RKSHARP_GAUSS_NOISE_COE1);
1460
1461 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[3],
1462 arg->gauss_noise_coe[4],
1463 arg->gauss_noise_coe[5],
1464 0);
1465 rkisp1_iowrite32(params_vdev, val,
1466 CIF_RKSHARP_GAUSS_NOISE_COE2);
1467
1468 val = CIF_ISP_PACK_4BYTE(arg->gauss_noise_coe[6],
1469 arg->gauss_noise_coe[7],
1470 arg->gauss_noise_coe[8],
1471 0);
1472 rkisp1_iowrite32(params_vdev, val,
1473 CIF_RKSHARP_GAUSS_NOISE_COE3);
1474
1475 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[0],
1476 arg->gauss_other_coe[1],
1477 arg->gauss_other_coe[2],
1478 0);
1479 rkisp1_iowrite32(params_vdev, val,
1480 CIF_RKSHARP_GAUSS_OTHER_COE1);
1481
1482 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[3],
1483 arg->gauss_other_coe[4],
1484 arg->gauss_other_coe[5],
1485 0);
1486 rkisp1_iowrite32(params_vdev, val,
1487 CIF_RKSHARP_GAUSS_OTHER_COE2);
1488
1489 val = CIF_ISP_PACK_4BYTE(arg->gauss_other_coe[6],
1490 arg->gauss_other_coe[7],
1491 arg->gauss_other_coe[8],
1492 0);
1493 rkisp1_iowrite32(params_vdev, val,
1494 CIF_RKSHARP_GAUSS_OTHER_COE3);
1495
1496 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[0],
1497 arg->line1_filter_coe[1],
1498 arg->line1_filter_coe[2],
1499 0);
1500 rkisp1_iowrite32(params_vdev, val,
1501 CIF_RKSHARP_LINE1_FILTER_COE1);
1502
1503 val = CIF_ISP_PACK_4BYTE(arg->line1_filter_coe[3],
1504 arg->line1_filter_coe[4],
1505 arg->line1_filter_coe[5],
1506 0);
1507 rkisp1_iowrite32(params_vdev, val,
1508 CIF_RKSHARP_LINE1_FILTER_COE2);
1509
1510 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[0],
1511 arg->line2_filter_coe[1],
1512 arg->line2_filter_coe[2],
1513 0);
1514 rkisp1_iowrite32(params_vdev, val,
1515 CIF_RKSHARP_LINE2_FILTER_COE1);
1516
1517 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[3],
1518 arg->line2_filter_coe[4],
1519 arg->line2_filter_coe[5],
1520 0);
1521 rkisp1_iowrite32(params_vdev, val,
1522 CIF_RKSHARP_LINE2_FILTER_COE2);
1523
1524 val = CIF_ISP_PACK_4BYTE(arg->line2_filter_coe[6],
1525 arg->line2_filter_coe[7],
1526 arg->line2_filter_coe[8],
1527 0);
1528 rkisp1_iowrite32(params_vdev, val,
1529 CIF_RKSHARP_LINE2_FILTER_COE3);
1530
1531 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[0],
1532 arg->line3_filter_coe[1],
1533 arg->line3_filter_coe[2],
1534 0);
1535 rkisp1_iowrite32(params_vdev, val,
1536 CIF_RKSHARP_LINE3_FILTER_COE1);
1537
1538 val = CIF_ISP_PACK_4BYTE(arg->line3_filter_coe[3],
1539 arg->line3_filter_coe[4],
1540 arg->line3_filter_coe[5],
1541 0);
1542 rkisp1_iowrite32(params_vdev, val,
1543 CIF_RKSHARP_LINE3_FILTER_COE2);
1544
1545 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[0],
1546 arg->grad_seq[1]);
1547 rkisp1_iowrite32(params_vdev, val,
1548 CIF_RKSHARP_GRAD_SEQ_P0_P1);
1549
1550 val = CIF_ISP_PACK_2SHORT(arg->grad_seq[2],
1551 arg->grad_seq[3]);
1552 rkisp1_iowrite32(params_vdev, val,
1553 CIF_RKSHARP_GRAD_SEQ_P2_P3);
1554
1555 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[0],
1556 arg->sharp_factor[1],
1557 arg->sharp_factor[2],
1558 0);
1559 rkisp1_iowrite32(params_vdev, val,
1560 CIF_RKSHARP_SHARP_FACTOR_P0_P1_P2);
1561
1562 val = CIF_ISP_PACK_4BYTE(arg->sharp_factor[3],
1563 arg->sharp_factor[4],
1564 0,
1565 0);
1566 rkisp1_iowrite32(params_vdev, val,
1567 CIF_RKSHARP_SHARP_FACTOR_P3_P4);
1568
1569 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[0],
1570 arg->uv_gauss_flat_coe[1],
1571 arg->uv_gauss_flat_coe[2],
1572 arg->uv_gauss_flat_coe[3]);
1573 rkisp1_iowrite32(params_vdev, val,
1574 CIF_RKSHARP_UV_GAUSS_FLAT_COE11_COE14);
1575
1576 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[4],
1577 arg->uv_gauss_flat_coe[5],
1578 arg->uv_gauss_flat_coe[6],
1579 arg->uv_gauss_flat_coe[7]);
1580 rkisp1_iowrite32(params_vdev, val,
1581 CIF_RKSHARP_UV_GAUSS_FLAT_COE15_COE23);
1582
1583 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[8],
1584 arg->uv_gauss_flat_coe[9],
1585 arg->uv_gauss_flat_coe[10],
1586 arg->uv_gauss_flat_coe[11]);
1587 rkisp1_iowrite32(params_vdev, val,
1588 CIF_RKSHARP_UV_GAUSS_FLAT_COE24_COE32);
1589
1590 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_flat_coe[12],
1591 arg->uv_gauss_flat_coe[13],
1592 arg->uv_gauss_flat_coe[14],
1593 0);
1594 rkisp1_iowrite32(params_vdev, val,
1595 CIF_RKSHARP_UV_GAUSS_FLAT_COE33_COE35);
1596
1597 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[0],
1598 arg->uv_gauss_noise_coe[1],
1599 arg->uv_gauss_noise_coe[2],
1600 arg->uv_gauss_noise_coe[3]);
1601 rkisp1_iowrite32(params_vdev, val,
1602 CIF_RKSHARP_UV_GAUSS_NOISE_COE11_COE14);
1603
1604 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[4],
1605 arg->uv_gauss_noise_coe[5],
1606 arg->uv_gauss_noise_coe[6],
1607 arg->uv_gauss_noise_coe[7]);
1608 rkisp1_iowrite32(params_vdev, val,
1609 CIF_RKSHARP_UV_GAUSS_NOISE_COE15_COE23);
1610
1611 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[8],
1612 arg->uv_gauss_noise_coe[9],
1613 arg->uv_gauss_noise_coe[10],
1614 arg->uv_gauss_noise_coe[11]);
1615 rkisp1_iowrite32(params_vdev, val,
1616 CIF_RKSHARP_UV_GAUSS_NOISE_COE24_COE32);
1617
1618 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_noise_coe[12],
1619 arg->uv_gauss_noise_coe[13],
1620 arg->uv_gauss_noise_coe[14],
1621 0);
1622 rkisp1_iowrite32(params_vdev, val,
1623 CIF_RKSHARP_UV_GAUSS_NOISE_COE33_COE35);
1624
1625 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[0],
1626 arg->uv_gauss_other_coe[1],
1627 arg->uv_gauss_other_coe[2],
1628 arg->uv_gauss_other_coe[3]);
1629 rkisp1_iowrite32(params_vdev, val,
1630 CIF_RKSHARP_UV_GAUSS_OTHER_COE11_COE14);
1631
1632 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[4],
1633 arg->uv_gauss_other_coe[5],
1634 arg->uv_gauss_other_coe[6],
1635 arg->uv_gauss_other_coe[7]);
1636 rkisp1_iowrite32(params_vdev, val,
1637 CIF_RKSHARP_UV_GAUSS_OTHER_COE15_COE23);
1638
1639 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[8],
1640 arg->uv_gauss_other_coe[9],
1641 arg->uv_gauss_other_coe[10],
1642 arg->uv_gauss_other_coe[11]);
1643 rkisp1_iowrite32(params_vdev, val,
1644 CIF_RKSHARP_UV_GAUSS_OTHER_COE24_COE32);
1645
1646 val = CIF_ISP_PACK_4BYTE(arg->uv_gauss_other_coe[12],
1647 arg->uv_gauss_other_coe[13],
1648 arg->uv_gauss_other_coe[14],
1649 0);
1650 rkisp1_iowrite32(params_vdev, val,
1651 CIF_RKSHARP_UV_GAUSS_OTHER_COE33_COE35);
1652
1653 rkisp1_iowrite32(params_vdev, arg->switch_avg,
1654 CIF_RKSHARP_CTRL);
1655
1656 rkisp1_iowrite32(params_vdev,
1657 arg->coring_thr,
1658 CIF_IMG_EFF_SHARPEN);
1659
1660 val = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_MAT_3) & 0x0F;
1661 val |= (arg->lap_mat_coe[0] & 0x0F) << 4 |
1662 (arg->lap_mat_coe[1] & 0x0F) << 8 |
1663 (arg->lap_mat_coe[2] & 0x0F) << 12;
1664 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_3);
1665
1666 val = (arg->lap_mat_coe[3] & 0x0F) << 0 |
1667 (arg->lap_mat_coe[4] & 0x0F) << 4 |
1668 (arg->lap_mat_coe[5] & 0x0F) << 8 |
1669 (arg->lap_mat_coe[6] & 0x0F) << 12;
1670 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_4);
1671
1672 val = (arg->lap_mat_coe[7] & 0x0F) << 0 |
1673 (arg->lap_mat_coe[8] & 0x0F) << 4;
1674 rkisp1_iowrite32(params_vdev, val, CIF_IMG_EFF_MAT_5);
1675
1676 eff_ctrl = rkisp1_ioread32(params_vdev, CIF_IMG_EFF_CTRL);
1677 eff_ctrl &= ~CIF_IMG_EFF_CTRL_MODE_MASK;
1678 eff_ctrl |= CIF_IMG_EFF_CTRL_MODE_RKSHARPEN;
1679
1680 if (arg->full_range)
1681 eff_ctrl |= CIF_IMG_EFF_CTRL_YCBCR_FULL;
1682
1683 rkisp1_iowrite32(params_vdev, eff_ctrl, CIF_IMG_EFF_CTRL);
1684 }
1685
1686 static struct rkisp1_isp_params_ops rkisp1_v10_isp_params_ops = {
1687 .dpcc_config = isp_dpcc_config,
1688 .bls_config = isp_bls_config,
1689 .lsc_config = isp_lsc_config,
1690 .lsc_matrix_config = isp_lsc_matrix_config_v10,
1691 .flt_config = isp_flt_config,
1692 .bdm_config = isp_bdm_config,
1693 .sdg_config = isp_sdg_config,
1694 .goc_config = isp_goc_config_v10,
1695 .ctk_config = isp_ctk_config,
1696 .ctk_enable = isp_ctk_enable,
1697 .awb_meas_config = isp_awb_meas_config_v10,
1698 .awb_meas_enable = isp_awb_meas_enable_v10,
1699 .awb_gain_config = isp_awb_gain_config_v10,
1700 .aec_config = isp_aec_config_v10,
1701 .cproc_config = isp_cproc_config,
1702 .hst_config = isp_hst_config_v10,
1703 .hst_enable = isp_hst_enable_v10,
1704 .afm_config = isp_afm_config_v10,
1705 .ie_config = isp_ie_config,
1706 .ie_enable = isp_ie_enable,
1707 .csm_config = isp_csm_config,
1708 .dpf_config = isp_dpf_config,
1709 .dpf_strength_config = isp_dpf_strength_config,
1710 .wdr_config = isp_wdr_config_v10,
1711 .wdr_enable = isp_dummy_enable,
1712 .demosaiclp_config = isp_demosaiclp_config_v10,
1713 .demosaiclp_enable = isp_dummy_enable,
1714 .rkiesharp_config = isp_rkiesharp_config_v10,
1715 .rkiesharp_enable = isp_dummy_enable,
1716 };
1717
1718 static struct rkisp1_isp_params_ops rkisp1_v12_isp_params_ops = {
1719 .dpcc_config = isp_dpcc_config,
1720 .bls_config = isp_bls_config,
1721 .lsc_config = isp_lsc_config,
1722 .lsc_matrix_config = isp_lsc_matrix_config_v12,
1723 .flt_config = isp_flt_config,
1724 .bdm_config = isp_bdm_config,
1725 .sdg_config = isp_sdg_config,
1726 .goc_config = isp_goc_config_v12,
1727 .ctk_config = isp_ctk_config,
1728 .ctk_enable = isp_ctk_enable,
1729 .awb_meas_config = isp_awb_meas_config_v12,
1730 .awb_meas_enable = isp_awb_meas_enable_v12,
1731 .awb_gain_config = isp_awb_gain_config_v12,
1732 .aec_config = isp_aec_config_v12,
1733 .cproc_config = isp_cproc_config,
1734 .hst_config = isp_hst_config_v12,
1735 .hst_enable = isp_hst_enable_v12,
1736 .afm_config = isp_afm_config_v12,
1737 .ie_config = isp_ie_config,
1738 .ie_enable = isp_ie_enable,
1739 .csm_config = isp_csm_config,
1740 .dpf_config = isp_dpf_config,
1741 .dpf_strength_config = isp_dpf_strength_config,
1742 .wdr_config = isp_wdr_config_v12,
1743 .wdr_enable = isp_wdr_enable_v12,
1744 .demosaiclp_config = isp_demosaiclp_config_v12,
1745 .demosaiclp_enable = isp_demosaiclp_enable_v12,
1746 .rkiesharp_config = isp_rkiesharp_config_v12,
1747 .rkiesharp_enable = isp_ie_enable,
1748 };
1749
1750 static struct rkisp1_isp_params_config rkisp1_v10_isp_params_config = {
1751 .gamma_out_max_samples = 17,
1752 .hst_weight_grids_size = 28,
1753 };
1754
1755 static struct rkisp1_isp_params_config rkisp1_v12_isp_params_config = {
1756 .gamma_out_max_samples = 34,
1757 .hst_weight_grids_size = 81,
1758 };
1759
1760 static __maybe_unused
__isp_isr_other_config(struct rkisp1_isp_params_vdev * params_vdev,const struct rkisp1_isp_params_cfg * new_params)1761 void __isp_isr_other_config(struct rkisp1_isp_params_vdev *params_vdev,
1762 const struct rkisp1_isp_params_cfg *new_params)
1763 {
1764 unsigned int module_en_update, module_cfg_update, module_ens;
1765 struct rkisp1_isp_params_ops *ops = params_vdev->ops;
1766 struct ispsd_in_fmt *in_fmt = ¶ms_vdev->dev->isp_sdev.in_fmt;
1767 bool ie_enable;
1768 bool iesharp_enable;
1769 bool is_grey_sensor;
1770
1771 is_grey_sensor = in_fmt->mbus_code == MEDIA_BUS_FMT_Y8_1X8 ||
1772 in_fmt->mbus_code == MEDIA_BUS_FMT_Y10_1X10 ||
1773 in_fmt->mbus_code == MEDIA_BUS_FMT_Y12_1X12;
1774
1775 module_en_update = new_params->module_en_update;
1776 module_cfg_update = new_params->module_cfg_update;
1777 module_ens = new_params->module_ens;
1778
1779 ie_enable = !!(module_ens & CIFISP_MODULE_IE);
1780 iesharp_enable = !!(module_ens & CIFISP_MODULE_RK_IESHARP);
1781 if (ie_enable && iesharp_enable) {
1782 iesharp_enable = false;
1783 dev_err(params_vdev->dev->dev,
1784 "You can only use one mode in IE and RK_IESHARP!\n");
1785 }
1786
1787 if ((module_en_update & CIFISP_MODULE_DPCC) ||
1788 (module_cfg_update & CIFISP_MODULE_DPCC)) {
1789 /*update dpc config */
1790 if ((module_cfg_update & CIFISP_MODULE_DPCC))
1791 ops->dpcc_config(params_vdev,
1792 &new_params->others.dpcc_config);
1793
1794 if (module_en_update & CIFISP_MODULE_DPCC) {
1795 if (!!(module_ens & CIFISP_MODULE_DPCC))
1796 isp_param_set_bits(params_vdev,
1797 CIF_ISP_DPCC_MODE,
1798 CIF_ISP_DPCC_ENA);
1799 else
1800 isp_param_clear_bits(params_vdev,
1801 CIF_ISP_DPCC_MODE,
1802 CIF_ISP_DPCC_ENA);
1803 }
1804 }
1805
1806 if ((module_en_update & CIFISP_MODULE_BLS) ||
1807 (module_cfg_update & CIFISP_MODULE_BLS)) {
1808 /* update bls config */
1809 if ((module_cfg_update & CIFISP_MODULE_BLS))
1810 ops->bls_config(params_vdev, &new_params->others.bls_config);
1811
1812 if (module_en_update & CIFISP_MODULE_BLS) {
1813 if (!!(module_ens & CIFISP_MODULE_BLS))
1814 isp_param_set_bits(params_vdev,
1815 CIF_ISP_BLS_CTRL,
1816 CIF_ISP_BLS_ENA);
1817 else
1818 isp_param_clear_bits(params_vdev,
1819 CIF_ISP_BLS_CTRL,
1820 CIF_ISP_BLS_ENA);
1821 }
1822 }
1823
1824 if ((module_en_update & CIFISP_MODULE_SDG) ||
1825 (module_cfg_update & CIFISP_MODULE_SDG)) {
1826 /* update sdg config */
1827 if ((module_cfg_update & CIFISP_MODULE_SDG))
1828 ops->sdg_config(params_vdev, &new_params->others.sdg_config);
1829
1830 if (module_en_update & CIFISP_MODULE_SDG) {
1831 if (!!(module_ens & CIFISP_MODULE_SDG))
1832 isp_param_set_bits(params_vdev,
1833 CIF_ISP_CTRL,
1834 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
1835 else
1836 isp_param_clear_bits(params_vdev,
1837 CIF_ISP_CTRL,
1838 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
1839 }
1840 }
1841
1842 if ((module_en_update & CIFISP_MODULE_LSC) ||
1843 (module_cfg_update & CIFISP_MODULE_LSC)) {
1844 /* update lsc config */
1845 if ((module_cfg_update & CIFISP_MODULE_LSC))
1846 ops->lsc_config(params_vdev, &new_params->others.lsc_config);
1847
1848 if (module_en_update & CIFISP_MODULE_LSC) {
1849 if (!!(module_ens & CIFISP_MODULE_LSC))
1850 isp_param_set_bits(params_vdev,
1851 CIF_ISP_LSC_CTRL,
1852 CIF_ISP_LSC_CTRL_ENA);
1853 else
1854 isp_param_clear_bits(params_vdev,
1855 CIF_ISP_LSC_CTRL,
1856 CIF_ISP_LSC_CTRL_ENA);
1857 }
1858 }
1859
1860 if ((module_en_update & CIFISP_MODULE_AWB_GAIN) ||
1861 (module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
1862 /* update awb gains */
1863 if ((module_cfg_update & CIFISP_MODULE_AWB_GAIN))
1864 ops->awb_gain_config(params_vdev,
1865 &new_params->others.awb_gain_config);
1866
1867 if (module_en_update & CIFISP_MODULE_AWB_GAIN) {
1868 if (!!(module_ens & CIFISP_MODULE_AWB_GAIN))
1869 isp_param_set_bits(params_vdev,
1870 CIF_ISP_CTRL,
1871 CIF_ISP_CTRL_ISP_AWB_ENA);
1872 else
1873 isp_param_clear_bits(params_vdev,
1874 CIF_ISP_CTRL,
1875 CIF_ISP_CTRL_ISP_AWB_ENA);
1876 }
1877 }
1878
1879 if (((module_en_update & CIFISP_MODULE_BDM) ||
1880 (module_cfg_update & CIFISP_MODULE_BDM)) &&
1881 !is_grey_sensor) {
1882 /* update bdm config */
1883 if ((module_cfg_update & CIFISP_MODULE_BDM))
1884 ops->bdm_config(params_vdev, &new_params->others.bdm_config);
1885
1886 if (module_en_update & CIFISP_MODULE_BDM) {
1887 if (!!(module_ens & CIFISP_MODULE_BDM))
1888 isp_param_set_bits(params_vdev,
1889 CIF_ISP_DEMOSAIC,
1890 CIF_ISP_DEMOSAIC_BYPASS);
1891 else
1892 isp_param_clear_bits(params_vdev,
1893 CIF_ISP_DEMOSAIC,
1894 CIF_ISP_DEMOSAIC_BYPASS);
1895 }
1896 }
1897
1898 if ((module_en_update & CIFISP_MODULE_DEMOSAICLP) ||
1899 (module_cfg_update & CIFISP_MODULE_DEMOSAICLP)) {
1900 /* update demosaiclp config */
1901 if ((module_cfg_update & CIFISP_MODULE_DEMOSAICLP))
1902 ops->demosaiclp_config(params_vdev,
1903 &new_params->others.demosaiclp_config);
1904
1905 if (module_en_update & CIFISP_MODULE_DEMOSAICLP)
1906 ops->demosaiclp_enable(params_vdev,
1907 !!(module_ens & CIFISP_MODULE_DEMOSAICLP));
1908 }
1909
1910 if ((module_en_update & CIFISP_MODULE_FLT) ||
1911 (module_cfg_update & CIFISP_MODULE_FLT)) {
1912 /* update filter config */
1913 if ((module_cfg_update & CIFISP_MODULE_FLT))
1914 ops->flt_config(params_vdev, &new_params->others.flt_config);
1915
1916 if (module_en_update & CIFISP_MODULE_FLT) {
1917 if (!!(module_ens & CIFISP_MODULE_FLT))
1918 isp_param_set_bits(params_vdev,
1919 CIF_ISP_FILT_MODE,
1920 CIF_ISP_FLT_ENA);
1921 else
1922 isp_param_clear_bits(params_vdev,
1923 CIF_ISP_FILT_MODE,
1924 CIF_ISP_FLT_ENA);
1925 }
1926 }
1927
1928 if ((module_en_update & CIFISP_MODULE_CTK) ||
1929 (module_cfg_update & CIFISP_MODULE_CTK)) {
1930 /* update ctk config */
1931 if ((module_cfg_update & CIFISP_MODULE_CTK))
1932 ops->ctk_config(params_vdev, &new_params->others.ctk_config);
1933
1934 if (module_en_update & CIFISP_MODULE_CTK)
1935 ops->ctk_enable(params_vdev,
1936 !!(module_ens & CIFISP_MODULE_CTK));
1937 }
1938
1939 if ((module_en_update & CIFISP_MODULE_GOC) ||
1940 (module_cfg_update & CIFISP_MODULE_GOC)) {
1941 /* update goc config */
1942 if ((module_cfg_update & CIFISP_MODULE_GOC))
1943 ops->goc_config(params_vdev, &new_params->others.goc_config);
1944
1945 if (module_en_update & CIFISP_MODULE_GOC) {
1946 if (!!(module_ens & CIFISP_MODULE_GOC))
1947 isp_param_set_bits(params_vdev,
1948 CIF_ISP_CTRL,
1949 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
1950 else
1951 isp_param_clear_bits(params_vdev,
1952 CIF_ISP_CTRL,
1953 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
1954 }
1955 }
1956
1957 if ((module_en_update & CIFISP_MODULE_CPROC) ||
1958 (module_cfg_update & CIFISP_MODULE_CPROC)) {
1959 /* update cproc config */
1960 if ((module_cfg_update & CIFISP_MODULE_CPROC)) {
1961 ops->cproc_config(params_vdev,
1962 &new_params->others.cproc_config);
1963
1964 }
1965
1966 if (module_en_update & CIFISP_MODULE_CPROC) {
1967 if (!!(module_ens & CIFISP_MODULE_CPROC))
1968 isp_param_set_bits(params_vdev,
1969 CIF_C_PROC_CTRL,
1970 CIF_C_PROC_CTR_ENABLE);
1971 else
1972 isp_param_clear_bits(params_vdev,
1973 CIF_C_PROC_CTRL,
1974 CIF_C_PROC_CTR_ENABLE);
1975 }
1976 }
1977
1978 if (((module_en_update & CIFISP_MODULE_IE) ||
1979 (module_cfg_update & CIFISP_MODULE_IE)) && ie_enable) {
1980 /* update ie config */
1981 if ((module_cfg_update & CIFISP_MODULE_IE))
1982 ops->ie_config(params_vdev, &new_params->others.ie_config);
1983 }
1984
1985 if (((module_en_update & CIFISP_MODULE_RK_IESHARP) ||
1986 (module_cfg_update & CIFISP_MODULE_RK_IESHARP)) && iesharp_enable) {
1987 /* update rkiesharp config */
1988 if ((module_cfg_update & CIFISP_MODULE_RK_IESHARP))
1989 ops->rkiesharp_config(params_vdev,
1990 &new_params->others.rkiesharp_config);
1991 }
1992
1993 if (ie_enable || iesharp_enable)
1994 ops->ie_enable(params_vdev, true);
1995 else
1996 ops->ie_enable(params_vdev, false);
1997
1998 if ((module_en_update & CIFISP_MODULE_DPF) ||
1999 (module_cfg_update & CIFISP_MODULE_DPF)) {
2000 /* update dpf config */
2001 if ((module_cfg_update & CIFISP_MODULE_DPF))
2002 ops->dpf_config(params_vdev, &new_params->others.dpf_config);
2003
2004 if (module_en_update & CIFISP_MODULE_DPF) {
2005 if (!!(module_ens & CIFISP_MODULE_DPF))
2006 isp_param_set_bits(params_vdev,
2007 CIF_ISP_DPF_MODE,
2008 CIF_ISP_DPF_MODE_EN);
2009 else
2010 isp_param_clear_bits(params_vdev,
2011 CIF_ISP_DPF_MODE,
2012 CIF_ISP_DPF_MODE_EN);
2013 }
2014 }
2015
2016 if ((module_en_update & CIFISP_MODULE_DPF_STRENGTH) ||
2017 (module_cfg_update & CIFISP_MODULE_DPF_STRENGTH)) {
2018 /* update dpf strength config */
2019 ops->dpf_strength_config(params_vdev,
2020 &new_params->others.dpf_strength_config);
2021 }
2022
2023 if ((module_en_update & CIFISP_MODULE_WDR) ||
2024 (module_cfg_update & CIFISP_MODULE_WDR)) {
2025 /* update wdr config */
2026 if ((module_cfg_update & CIFISP_MODULE_WDR))
2027 ops->wdr_config(params_vdev,
2028 &new_params->others.wdr_config);
2029
2030 if (module_en_update & CIFISP_MODULE_WDR)
2031 ops->wdr_enable(params_vdev,
2032 !!(module_ens & CIFISP_MODULE_WDR));
2033 }
2034 }
2035
2036 static __maybe_unused
__isp_isr_meas_config(struct rkisp1_isp_params_vdev * params_vdev,struct rkisp1_isp_params_cfg * new_params)2037 void __isp_isr_meas_config(struct rkisp1_isp_params_vdev *params_vdev,
2038 struct rkisp1_isp_params_cfg *new_params)
2039 {
2040 unsigned int module_en_update, module_cfg_update, module_ens;
2041 struct rkisp1_isp_params_ops *ops = params_vdev->ops;
2042
2043 module_en_update = new_params->module_en_update;
2044 module_cfg_update = new_params->module_cfg_update;
2045 module_ens = new_params->module_ens;
2046
2047 if ((module_en_update & CIFISP_MODULE_AWB) ||
2048 (module_cfg_update & CIFISP_MODULE_AWB)) {
2049 /* update awb config */
2050 if ((module_cfg_update & CIFISP_MODULE_AWB))
2051 ops->awb_meas_config(params_vdev,
2052 &new_params->meas.awb_meas_config);
2053
2054 if (module_en_update & CIFISP_MODULE_AWB)
2055 ops->awb_meas_enable(params_vdev,
2056 &new_params->meas.awb_meas_config,
2057 !!(module_ens & CIFISP_MODULE_AWB));
2058 }
2059
2060 if ((module_en_update & CIFISP_MODULE_AFC) ||
2061 (module_cfg_update & CIFISP_MODULE_AFC)) {
2062 /* update afc config */
2063 if ((module_cfg_update & CIFISP_MODULE_AFC))
2064 ops->afm_config(params_vdev, &new_params->meas.afc_config);
2065
2066 if (module_en_update & CIFISP_MODULE_AFC) {
2067 if (!!(module_ens & CIFISP_MODULE_AFC))
2068 isp_param_set_bits(params_vdev,
2069 CIF_ISP_AFM_CTRL,
2070 CIF_ISP_AFM_ENA);
2071 else
2072 isp_param_clear_bits(params_vdev,
2073 CIF_ISP_AFM_CTRL,
2074 CIF_ISP_AFM_ENA);
2075 }
2076 }
2077
2078 if ((module_en_update & CIFISP_MODULE_HST) ||
2079 (module_cfg_update & CIFISP_MODULE_HST)) {
2080 /* update hst config */
2081 if ((module_cfg_update & CIFISP_MODULE_HST))
2082 ops->hst_config(params_vdev, &new_params->meas.hst_config);
2083
2084 if (module_en_update & CIFISP_MODULE_HST)
2085 ops->hst_enable(params_vdev,
2086 &new_params->meas.hst_config,
2087 !!(module_ens & CIFISP_MODULE_HST));
2088 }
2089
2090 if ((module_en_update & CIFISP_MODULE_AEC) ||
2091 (module_cfg_update & CIFISP_MODULE_AEC)) {
2092 /* update aec config */
2093 if ((module_cfg_update & CIFISP_MODULE_AEC))
2094 ops->aec_config(params_vdev, &new_params->meas.aec_config);
2095
2096 if (module_en_update & CIFISP_MODULE_AEC) {
2097 if (!!(module_ens & CIFISP_MODULE_AEC))
2098 isp_param_set_bits(params_vdev,
2099 CIF_ISP_EXP_CTRL,
2100 CIF_ISP_EXP_ENA);
2101 else
2102 isp_param_clear_bits(params_vdev,
2103 CIF_ISP_EXP_CTRL,
2104 CIF_ISP_EXP_ENA);
2105 }
2106 }
2107 }
2108
2109 static __maybe_unused
__preisp_isr_update_hdrae_para(struct rkisp1_isp_params_vdev * params_vdev,struct rkisp1_isp_params_cfg * new_params)2110 void __preisp_isr_update_hdrae_para(struct rkisp1_isp_params_vdev *params_vdev,
2111 struct rkisp1_isp_params_cfg *new_params)
2112 {
2113 struct preisp_hdrae_para_s *hdrae;
2114 struct cifisp_lsc_config *lsc;
2115 struct cifisp_awb_gain_config *awb_gain;
2116 unsigned int module_en_update, module_cfg_update, module_ens;
2117 int i, ret;
2118
2119 hdrae = ¶ms_vdev->hdrae_para;
2120 module_en_update = new_params->module_en_update;
2121 module_cfg_update = new_params->module_cfg_update;
2122 module_ens = new_params->module_ens;
2123 lsc = &new_params->others.lsc_config;
2124 awb_gain = &new_params->others.awb_gain_config;
2125
2126 if (!params_vdev->dev->hdr_sensor)
2127 return;
2128
2129 if ((module_en_update & CIFISP_MODULE_AWB_GAIN) ||
2130 (module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
2131 /* update awb gains */
2132 if ((module_cfg_update & CIFISP_MODULE_AWB_GAIN)) {
2133 hdrae->r_gain = awb_gain->gain_red;
2134 hdrae->b_gain = awb_gain->gain_blue;
2135 hdrae->gr_gain = awb_gain->gain_green_r;
2136 hdrae->gb_gain = awb_gain->gain_green_b;
2137 }
2138
2139 if (module_en_update & CIFISP_MODULE_AWB_GAIN) {
2140 if (!(module_ens & CIFISP_MODULE_AWB_GAIN)) {
2141 hdrae->r_gain = 0x0100;
2142 hdrae->b_gain = 0x0100;
2143 hdrae->gr_gain = 0x0100;
2144 hdrae->gb_gain = 0x0100;
2145 }
2146 }
2147 }
2148
2149 if ((module_en_update & CIFISP_MODULE_LSC) ||
2150 (module_cfg_update & CIFISP_MODULE_LSC)) {
2151 /* update lsc config */
2152 if ((module_cfg_update & CIFISP_MODULE_LSC))
2153 memcpy(hdrae->lsc_table, lsc->gr_data_tbl,
2154 PREISP_LSCTBL_SIZE);
2155
2156 if (module_en_update & CIFISP_MODULE_LSC) {
2157 if (!(module_ens & CIFISP_MODULE_LSC))
2158 for (i = 0; i < PREISP_LSCTBL_SIZE; i++)
2159 hdrae->lsc_table[i] = 0x0400;
2160 }
2161 }
2162
2163 ret = v4l2_subdev_call(params_vdev->dev->hdr_sensor, core, ioctl,
2164 PREISP_CMD_SAVE_HDRAE_PARAM, hdrae);
2165 if (ret)
2166 params_vdev->dev->hdr_sensor = NULL;
2167 }
2168
rkisp1_params_isr(struct rkisp1_isp_params_vdev * params_vdev,u32 isp_mis)2169 void rkisp1_params_isr(struct rkisp1_isp_params_vdev *params_vdev, u32 isp_mis)
2170 {
2171 struct rkisp1_isp_params_cfg *new_params;
2172 struct rkisp1_buffer *cur_buf = NULL;
2173 unsigned int cur_frame_id = -1;
2174 cur_frame_id = atomic_read(¶ms_vdev->dev->isp_sdev.frm_sync_seq) - 1;
2175
2176 spin_lock(¶ms_vdev->config_lock);
2177 if (!params_vdev->streamon) {
2178 spin_unlock(¶ms_vdev->config_lock);
2179 return;
2180 }
2181
2182 /* get one empty buffer */
2183 if (!list_empty(¶ms_vdev->params))
2184 cur_buf = list_first_entry(¶ms_vdev->params,
2185 struct rkisp1_buffer, queue);
2186 if (!cur_buf) {
2187 spin_unlock(¶ms_vdev->config_lock);
2188 return;
2189 }
2190
2191 new_params = (struct rkisp1_isp_params_cfg *)(cur_buf->vaddr[0]);
2192
2193 if (isp_mis & CIF_ISP_FRAME) {
2194 u32 isp_ctrl;
2195
2196 list_del(&cur_buf->queue);
2197
2198 __isp_isr_other_config(params_vdev, new_params);
2199 __isp_isr_meas_config(params_vdev, new_params);
2200
2201 /* update shadow register immediately */
2202 isp_ctrl = rkisp1_ioread32(params_vdev, CIF_ISP_CTRL);
2203 isp_ctrl |= CIF_ISP_CTRL_ISP_CFG_UPD;
2204 rkisp1_iowrite32(params_vdev, isp_ctrl, CIF_ISP_CTRL);
2205
2206 __preisp_isr_update_hdrae_para(params_vdev, new_params);
2207
2208 cur_buf->vb.sequence = cur_frame_id;
2209 vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
2210 }
2211 spin_unlock(¶ms_vdev->config_lock);
2212 }
2213
2214 static const struct cifisp_awb_meas_config awb_params_default_config = {
2215 {
2216 0, 0, RKISP1_DEFAULT_WIDTH, RKISP1_DEFAULT_HEIGHT
2217 },
2218 CIFISP_AWB_MODE_YCBCR, 200, 30, 20, 20, 0, 128, 128
2219 };
2220
2221 static const struct cifisp_aec_config aec_params_default_config = {
2222 CIFISP_EXP_MEASURING_MODE_0,
2223 CIFISP_EXP_CTRL_AUTOSTOP_0,
2224 {
2225 RKISP1_DEFAULT_WIDTH >> 2, RKISP1_DEFAULT_HEIGHT >> 2,
2226 RKISP1_DEFAULT_WIDTH >> 1, RKISP1_DEFAULT_HEIGHT >> 1
2227 }
2228 };
2229
2230 static const struct cifisp_hst_config hst_params_default_config = {
2231 CIFISP_HISTOGRAM_MODE_RGB_COMBINED,
2232 3,
2233 {
2234 RKISP1_DEFAULT_WIDTH >> 2, RKISP1_DEFAULT_HEIGHT >> 2,
2235 RKISP1_DEFAULT_WIDTH >> 1, RKISP1_DEFAULT_HEIGHT >> 1
2236 },
2237 {
2238 0, /* To be filled in with 0x01 at runtime. */
2239 }
2240 };
2241
2242 static const struct cifisp_afc_config afc_params_default_config = {
2243 1,
2244 {
2245 {
2246 300, 225, 200, 150
2247 }
2248 },
2249 4,
2250 14
2251 };
2252
2253 static
rkisp1_params_config_parameter(struct rkisp1_isp_params_vdev * params_vdev)2254 void rkisp1_params_config_parameter(struct rkisp1_isp_params_vdev *params_vdev)
2255 {
2256 struct rkisp1_isp_params_ops *ops = params_vdev->ops;
2257 struct cifisp_hst_config hst = hst_params_default_config;
2258 struct device *dev = params_vdev->dev->dev;
2259 int i;
2260
2261 spin_lock(¶ms_vdev->config_lock);
2262
2263 ops->awb_meas_config(params_vdev, &awb_params_default_config);
2264 ops->awb_meas_enable(params_vdev, &awb_params_default_config, true);
2265
2266 ops->aec_config(params_vdev, &aec_params_default_config);
2267 isp_param_set_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
2268
2269 ops->afm_config(params_vdev, &afc_params_default_config);
2270 isp_param_set_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
2271
2272 memset(hst.hist_weight, 0x01, sizeof(hst.hist_weight));
2273 ops->hst_config(params_vdev, &hst);
2274 if (params_vdev->dev->isp_ver == ISP_V12 ||
2275 params_vdev->dev->isp_ver == ISP_V13) {
2276 isp_param_set_bits(params_vdev, CIF_ISP_HIST_CTRL_V12,
2277 ~CIF_ISP_HIST_CTRL_MODE_MASK_V12 |
2278 hst_params_default_config.mode);
2279 } else {
2280 isp_param_set_bits(params_vdev, CIF_ISP_HIST_PROP_V10,
2281 ~CIF_ISP_HIST_PROP_MODE_MASK_V10 |
2282 hst_params_default_config.mode);
2283 }
2284
2285 /* set the range */
2286 if (params_vdev->quantization == V4L2_QUANTIZATION_FULL_RANGE)
2287 ops->csm_config(params_vdev, true);
2288 else
2289 ops->csm_config(params_vdev, false);
2290
2291 /* disable color related config for grey sensor */
2292 if (params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y8_1X8 ||
2293 params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y10_1X10 ||
2294 params_vdev->in_mbus_code == MEDIA_BUS_FMT_Y12_1X12) {
2295 ops->ctk_enable(params_vdev, false);
2296 isp_param_clear_bits(params_vdev,
2297 CIF_ISP_CTRL,
2298 CIF_ISP_CTRL_ISP_AWB_ENA);
2299 isp_param_clear_bits(params_vdev,
2300 CIF_ISP_LSC_CTRL,
2301 CIF_ISP_LSC_CTRL_ENA);
2302 }
2303
2304 params_vdev->hdrae_para.r_gain = 0x0100;
2305 params_vdev->hdrae_para.b_gain = 0x0100;
2306 params_vdev->hdrae_para.gr_gain = 0x0100;
2307 params_vdev->hdrae_para.gb_gain = 0x0100;
2308 for (i = 0; i < PREISP_LSCTBL_SIZE; i++)
2309 params_vdev->hdrae_para.lsc_table[i] = 0x0400;
2310
2311 /* override the default things */
2312 if (!params_vdev->cur_params.module_cfg_update &&
2313 !params_vdev->cur_params.module_en_update)
2314 dev_warn(dev, "can not get first iq setting in stream on\n");
2315
2316 __isp_isr_other_config(params_vdev, ¶ms_vdev->cur_params);
2317 __isp_isr_meas_config(params_vdev, ¶ms_vdev->cur_params);
2318 __preisp_isr_update_hdrae_para(params_vdev, ¶ms_vdev->cur_params);
2319
2320 spin_unlock(¶ms_vdev->config_lock);
2321 }
2322
2323 /* Not called when the camera active, thus not isr protection. */
rkisp1_params_configure_isp(struct rkisp1_isp_params_vdev * params_vdev,struct ispsd_in_fmt * in_fmt,enum v4l2_quantization quantization)2324 void rkisp1_params_configure_isp(struct rkisp1_isp_params_vdev *params_vdev,
2325 struct ispsd_in_fmt *in_fmt,
2326 enum v4l2_quantization quantization)
2327 {
2328 params_vdev->quantization = quantization;
2329 params_vdev->raw_type = in_fmt->bayer_pat;
2330 params_vdev->in_mbus_code = in_fmt->mbus_code;
2331 rkisp1_params_config_parameter(params_vdev);
2332 }
2333
2334 /* Not called when the camera active, thus not isr protection. */
rkisp1_params_disable_isp(struct rkisp1_isp_params_vdev * params_vdev)2335 void rkisp1_params_disable_isp(struct rkisp1_isp_params_vdev *params_vdev)
2336 {
2337 struct rkisp1_isp_params_ops *ops = params_vdev->ops;
2338
2339 isp_param_clear_bits(params_vdev, CIF_ISP_DPCC_MODE, CIF_ISP_DPCC_ENA);
2340 isp_param_clear_bits(params_vdev, CIF_ISP_LSC_CTRL,
2341 CIF_ISP_LSC_CTRL_ENA);
2342 isp_param_clear_bits(params_vdev, CIF_ISP_BLS_CTRL, CIF_ISP_BLS_ENA);
2343 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2344 CIF_ISP_CTRL_ISP_GAMMA_IN_ENA);
2345 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2346 CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
2347 isp_param_clear_bits(params_vdev, CIF_ISP_DEMOSAIC,
2348 CIF_ISP_DEMOSAIC_BYPASS);
2349 isp_param_clear_bits(params_vdev, CIF_ISP_FILT_MODE, CIF_ISP_FLT_ENA);
2350 ops->awb_meas_enable(params_vdev, NULL, false);
2351 isp_param_clear_bits(params_vdev, CIF_ISP_CTRL,
2352 CIF_ISP_CTRL_ISP_AWB_ENA);
2353 isp_param_clear_bits(params_vdev, CIF_ISP_EXP_CTRL, CIF_ISP_EXP_ENA);
2354 ops->ctk_enable(params_vdev, false);
2355 isp_param_clear_bits(params_vdev, CIF_C_PROC_CTRL,
2356 CIF_C_PROC_CTR_ENABLE);
2357 ops->hst_enable(params_vdev, NULL, false);
2358 isp_param_clear_bits(params_vdev, CIF_ISP_AFM_CTRL, CIF_ISP_AFM_ENA);
2359 ops->ie_enable(params_vdev, false);
2360 isp_param_clear_bits(params_vdev, CIF_ISP_DPF_MODE,
2361 CIF_ISP_DPF_MODE_EN);
2362 }
2363
rkisp1_params_enum_fmt_meta_out(struct file * file,void * priv,struct v4l2_fmtdesc * f)2364 static int rkisp1_params_enum_fmt_meta_out(struct file *file, void *priv,
2365 struct v4l2_fmtdesc *f)
2366 {
2367 struct video_device *video = video_devdata(file);
2368 struct rkisp1_isp_params_vdev *params_vdev = video_get_drvdata(video);
2369
2370 if (f->index > 0 || f->type != video->queue->type)
2371 return -EINVAL;
2372
2373 f->pixelformat = params_vdev->vdev_fmt.fmt.meta.dataformat;
2374
2375 return 0;
2376 }
2377
rkisp1_params_g_fmt_meta_out(struct file * file,void * fh,struct v4l2_format * f)2378 static int rkisp1_params_g_fmt_meta_out(struct file *file, void *fh,
2379 struct v4l2_format *f)
2380 {
2381 struct video_device *video = video_devdata(file);
2382 struct rkisp1_isp_params_vdev *params_vdev = video_get_drvdata(video);
2383 struct v4l2_meta_format *meta = &f->fmt.meta;
2384
2385 if (f->type != video->queue->type)
2386 return -EINVAL;
2387
2388 memset(meta, 0, sizeof(*meta));
2389 meta->dataformat = params_vdev->vdev_fmt.fmt.meta.dataformat;
2390 meta->buffersize = params_vdev->vdev_fmt.fmt.meta.buffersize;
2391
2392 return 0;
2393 }
2394
rkisp1_params_querycap(struct file * file,void * priv,struct v4l2_capability * cap)2395 static int rkisp1_params_querycap(struct file *file,
2396 void *priv, struct v4l2_capability *cap)
2397 {
2398 struct video_device *vdev = video_devdata(file);
2399 struct rkisp1_isp_params_vdev *params_vdev = video_get_drvdata(vdev);
2400
2401 snprintf(cap->driver, sizeof(cap->driver),
2402 "%s_v%d", DRIVER_NAME,
2403 params_vdev->dev->isp_ver >> 4);
2404 strlcpy(cap->card, vdev->name, sizeof(cap->card));
2405 strlcpy(cap->bus_info, "platform: " DRIVER_NAME, sizeof(cap->bus_info));
2406
2407 return 0;
2408 }
2409
rkisp1_params_subs_evt(struct v4l2_fh * fh,const struct v4l2_event_subscription * sub)2410 static int rkisp1_params_subs_evt(struct v4l2_fh *fh,
2411 const struct v4l2_event_subscription *sub)
2412 {
2413 if (sub->id != 0)
2414 return -EINVAL;
2415
2416 switch (sub->type) {
2417 case CIFISP_V4L2_EVENT_STREAM_START:
2418 case CIFISP_V4L2_EVENT_STREAM_STOP:
2419 return v4l2_event_subscribe(fh, sub, 0, NULL);
2420 default:
2421 return -EINVAL;
2422 }
2423 }
2424
2425 /* ISP params video device IOCTLs */
2426 static const struct v4l2_ioctl_ops rkisp1_params_ioctl = {
2427 .vidioc_reqbufs = vb2_ioctl_reqbufs,
2428 .vidioc_querybuf = vb2_ioctl_querybuf,
2429 .vidioc_create_bufs = vb2_ioctl_create_bufs,
2430 .vidioc_qbuf = vb2_ioctl_qbuf,
2431 .vidioc_dqbuf = vb2_ioctl_dqbuf,
2432 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
2433 .vidioc_expbuf = vb2_ioctl_expbuf,
2434 .vidioc_streamon = vb2_ioctl_streamon,
2435 .vidioc_streamoff = vb2_ioctl_streamoff,
2436 .vidioc_enum_fmt_meta_out = rkisp1_params_enum_fmt_meta_out,
2437 .vidioc_g_fmt_meta_out = rkisp1_params_g_fmt_meta_out,
2438 .vidioc_s_fmt_meta_out = rkisp1_params_g_fmt_meta_out,
2439 .vidioc_try_fmt_meta_out = rkisp1_params_g_fmt_meta_out,
2440 .vidioc_querycap = rkisp1_params_querycap,
2441 .vidioc_subscribe_event = rkisp1_params_subs_evt,
2442 .vidioc_unsubscribe_event = v4l2_event_unsubscribe
2443 };
2444
rkisp1_params_vb2_queue_setup(struct vb2_queue * vq,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_ctxs[])2445 static int rkisp1_params_vb2_queue_setup(struct vb2_queue *vq,
2446 unsigned int *num_buffers,
2447 unsigned int *num_planes,
2448 unsigned int sizes[],
2449 struct device *alloc_ctxs[])
2450 {
2451 struct rkisp1_isp_params_vdev *params_vdev = vq->drv_priv;
2452
2453 *num_buffers = clamp_t(u32, *num_buffers,
2454 RKISP1_ISP_PARAMS_REQ_BUFS_MIN,
2455 RKISP1_ISP_PARAMS_REQ_BUFS_MAX);
2456
2457 *num_planes = 1;
2458
2459 sizes[0] = sizeof(struct rkisp1_isp_params_cfg);
2460
2461 INIT_LIST_HEAD(¶ms_vdev->params);
2462 params_vdev->first_params = true;
2463
2464 return 0;
2465 }
2466
rkisp1_params_vb2_buf_queue(struct vb2_buffer * vb)2467 static void rkisp1_params_vb2_buf_queue(struct vb2_buffer *vb)
2468 {
2469 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
2470 struct rkisp1_buffer *params_buf = to_rkisp1_buffer(vbuf);
2471 struct vb2_queue *vq = vb->vb2_queue;
2472 struct rkisp1_isp_params_vdev *params_vdev = vq->drv_priv;
2473 struct rkisp1_isp_params_cfg *new_params;
2474 unsigned long flags;
2475
2476 unsigned int cur_frame_id = -1;
2477 cur_frame_id = atomic_read(¶ms_vdev->dev->isp_sdev.frm_sync_seq) - 1;
2478
2479 if (params_vdev->first_params) {
2480 new_params = (struct rkisp1_isp_params_cfg *)
2481 (vb2_plane_vaddr(vb, 0));
2482 vbuf->sequence = cur_frame_id;
2483 vb2_buffer_done(¶ms_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
2484 params_vdev->first_params = false;
2485 params_vdev->cur_params = *new_params;
2486 wake_up(¶ms_vdev->dev->sync_onoff);
2487 return;
2488 }
2489
2490 params_buf->vaddr[0] = vb2_plane_vaddr(vb, 0);
2491 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
2492 list_add_tail(¶ms_buf->queue, ¶ms_vdev->params);
2493 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
2494 }
2495
rkisp1_params_vb2_stop_streaming(struct vb2_queue * vq)2496 static void rkisp1_params_vb2_stop_streaming(struct vb2_queue *vq)
2497 {
2498 struct rkisp1_isp_params_vdev *params_vdev = vq->drv_priv;
2499 struct rkisp1_device *dev = params_vdev->dev;
2500 struct rkisp1_buffer *buf;
2501 unsigned long flags;
2502 int i;
2503
2504 /* stop params input firstly */
2505 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
2506 params_vdev->streamon = false;
2507 wake_up(&dev->sync_onoff);
2508 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
2509
2510 for (i = 0; i < RKISP1_ISP_PARAMS_REQ_BUFS_MAX; i++) {
2511 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
2512 if (!list_empty(¶ms_vdev->params)) {
2513 buf = list_first_entry(¶ms_vdev->params,
2514 struct rkisp1_buffer, queue);
2515 list_del(&buf->queue);
2516 spin_unlock_irqrestore(¶ms_vdev->config_lock,
2517 flags);
2518 } else {
2519 spin_unlock_irqrestore(¶ms_vdev->config_lock,
2520 flags);
2521 break;
2522 }
2523
2524 if (buf)
2525 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
2526 buf = NULL;
2527 }
2528
2529 /* clean module params */
2530 params_vdev->cur_params.module_cfg_update = 0;
2531 params_vdev->cur_params.module_en_update = 0;
2532 }
2533
2534 static int
rkisp1_params_vb2_start_streaming(struct vb2_queue * queue,unsigned int count)2535 rkisp1_params_vb2_start_streaming(struct vb2_queue *queue, unsigned int count)
2536 {
2537 struct rkisp1_isp_params_vdev *params_vdev = queue->drv_priv;
2538 unsigned long flags;
2539
2540 spin_lock_irqsave(¶ms_vdev->config_lock, flags);
2541 params_vdev->streamon = true;
2542 spin_unlock_irqrestore(¶ms_vdev->config_lock, flags);
2543
2544 return 0;
2545 }
2546
2547 static struct vb2_ops rkisp1_params_vb2_ops = {
2548 .queue_setup = rkisp1_params_vb2_queue_setup,
2549 .wait_prepare = vb2_ops_wait_prepare,
2550 .wait_finish = vb2_ops_wait_finish,
2551 .buf_queue = rkisp1_params_vb2_buf_queue,
2552 .start_streaming = rkisp1_params_vb2_start_streaming,
2553 .stop_streaming = rkisp1_params_vb2_stop_streaming,
2554
2555 };
2556
2557 struct v4l2_file_operations rkisp1_params_fops = {
2558 .mmap = vb2_fop_mmap,
2559 .unlocked_ioctl = video_ioctl2,
2560 .poll = vb2_fop_poll,
2561 .open = v4l2_fh_open,
2562 .release = vb2_fop_release
2563 };
2564
2565 static int
rkisp1_params_init_vb2_queue(struct vb2_queue * q,struct rkisp1_isp_params_vdev * params_vdev)2566 rkisp1_params_init_vb2_queue(struct vb2_queue *q,
2567 struct rkisp1_isp_params_vdev *params_vdev)
2568 {
2569 q->type = V4L2_BUF_TYPE_META_OUTPUT;
2570 q->io_modes = VB2_MMAP | VB2_USERPTR;
2571 q->drv_priv = params_vdev;
2572 q->ops = &rkisp1_params_vb2_ops;
2573 q->mem_ops = &vb2_vmalloc_memops;
2574 q->buf_struct_size = sizeof(struct rkisp1_buffer);
2575 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2576 q->lock = ¶ms_vdev->dev->iqlock;
2577 q->dev = params_vdev->dev->dev;
2578
2579 return vb2_queue_init(q);
2580 }
2581
rkisp1_init_params_vdev(struct rkisp1_isp_params_vdev * params_vdev)2582 static void rkisp1_init_params_vdev(struct rkisp1_isp_params_vdev *params_vdev)
2583 {
2584 params_vdev->vdev_fmt.fmt.meta.dataformat =
2585 V4L2_META_FMT_RK_ISP1_PARAMS;
2586 params_vdev->vdev_fmt.fmt.meta.buffersize =
2587 sizeof(struct rkisp1_isp_params_cfg);
2588
2589 if (params_vdev->dev->isp_ver == ISP_V12 ||
2590 params_vdev->dev->isp_ver == ISP_V13) {
2591 params_vdev->ops = &rkisp1_v12_isp_params_ops;
2592 params_vdev->config = &rkisp1_v12_isp_params_config;
2593 } else {
2594 params_vdev->ops = &rkisp1_v10_isp_params_ops;
2595 params_vdev->config = &rkisp1_v10_isp_params_config;
2596 }
2597 }
2598
rkisp1_register_params_vdev(struct rkisp1_isp_params_vdev * params_vdev,struct v4l2_device * v4l2_dev,struct rkisp1_device * dev)2599 int rkisp1_register_params_vdev(struct rkisp1_isp_params_vdev *params_vdev,
2600 struct v4l2_device *v4l2_dev,
2601 struct rkisp1_device *dev)
2602 {
2603 int ret;
2604 struct rkisp1_vdev_node *node = ¶ms_vdev->vnode;
2605 struct video_device *vdev = &node->vdev;
2606
2607 params_vdev->dev = dev;
2608 spin_lock_init(¶ms_vdev->config_lock);
2609
2610 strlcpy(vdev->name, "rkisp1-input-params", sizeof(vdev->name));
2611
2612 video_set_drvdata(vdev, params_vdev);
2613 vdev->ioctl_ops = &rkisp1_params_ioctl;
2614 vdev->fops = &rkisp1_params_fops;
2615 vdev->release = video_device_release_empty;
2616 /*
2617 * Provide a mutex to v4l2 core. It will be used
2618 * to protect all fops and v4l2 ioctls.
2619 */
2620 vdev->lock = &dev->iqlock;
2621 vdev->v4l2_dev = v4l2_dev;
2622 vdev->queue = &node->buf_queue;
2623 vdev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_META_OUTPUT;
2624 vdev->vfl_dir = VFL_DIR_TX;
2625 rkisp1_params_init_vb2_queue(vdev->queue, params_vdev);
2626 rkisp1_init_params_vdev(params_vdev);
2627 video_set_drvdata(vdev, params_vdev);
2628
2629 node->pad.flags = MEDIA_PAD_FL_SOURCE;
2630 ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
2631 if (ret < 0)
2632 goto err_release_queue;
2633 ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
2634 if (ret < 0) {
2635 dev_err(&vdev->dev,
2636 "could not register Video for Linux device\n");
2637 goto err_cleanup_media_entity;
2638 }
2639 return 0;
2640 err_cleanup_media_entity:
2641 media_entity_cleanup(&vdev->entity);
2642 err_release_queue:
2643 vb2_queue_release(vdev->queue);
2644 return ret;
2645 }
2646
rkisp1_unregister_params_vdev(struct rkisp1_isp_params_vdev * params_vdev)2647 void rkisp1_unregister_params_vdev(struct rkisp1_isp_params_vdev *params_vdev)
2648 {
2649 struct rkisp1_vdev_node *node = ¶ms_vdev->vnode;
2650 struct video_device *vdev = &node->vdev;
2651
2652 video_unregister_device(vdev);
2653 media_entity_cleanup(&vdev->entity);
2654 vb2_queue_release(vdev->queue);
2655 }
2656