1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2021 Rockchip Electronics Co. Ltd. 4 * 5 * Author: Shunqing Chen <csq@rock-chips.com> 6 */ 7 8 #ifndef __RK_HDMIRX_CEC_H__ 9 #define __RK_HDMIRX_CEC_H__ 10 11 struct rk_hdmirx_dev; 12 13 struct hdmirx_cec_ops { 14 void (*write)(struct rk_hdmirx_dev *hdmirx_dev, int reg, u32 val); 15 u32 (*read)(struct rk_hdmirx_dev *hdmirx_dev, int reg); 16 void (*enable)(struct rk_hdmirx_dev *hdmirx); 17 void (*disable)(struct rk_hdmirx_dev *hdmirx); 18 }; 19 20 struct hdmirx_cec_data { 21 struct rk_hdmirx_dev *hdmirx; 22 const struct hdmirx_cec_ops *ops; 23 struct device *dev; 24 int irq; 25 u8 *edid; 26 }; 27 28 struct hdmirx_cec { 29 struct rk_hdmirx_dev *hdmirx; 30 struct device *dev; 31 const struct hdmirx_cec_ops *ops; 32 u32 addresses; 33 struct cec_adapter *adap; 34 struct cec_msg rx_msg; 35 unsigned int tx_status; 36 bool tx_done; 37 bool rx_done; 38 struct cec_notifier *notify; 39 int irq; 40 struct edid *edid; 41 }; 42 43 struct hdmirx_cec *rk_hdmirx_cec_register(struct hdmirx_cec_data *data); 44 void rk_hdmirx_cec_unregister(struct hdmirx_cec *cec); 45 46 #endif /* __DW_HDMI_RX_CEC_H__ */ 47