1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * sc530ai driver
4 *
5 * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X00 first version.
8 * V0.0X01.0X01 fix set vflip/hflip failed bug.
9 */
10
11 //#define DEBUG
12 #include <linux/clk.h>
13 #include <linux/device.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/of.h>
20 #include <linux/of_graph.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/sysfs.h>
23 #include <linux/pinctrl/consumer.h>
24 #include <linux/slab.h>
25 #include <linux/version.h>
26 #include <linux/rk-camera-module.h>
27 #include <linux/rk-preisp.h>
28 #include <media/media-entity.h>
29 #include <media/v4l2-common.h>
30 #include <media/v4l2-async.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-event.h>
33 #include <media/v4l2-fwnode.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-subdev.h>
36 #include <media/v4l2-image-sizes.h>
37 #include <media/v4l2-mediabus.h>
38 #include <media/v4l2-subdev.h>
39 #include <linux/pinctrl/consumer.h>
40 #include <stdarg.h>
41 #include <linux/linkage.h>
42 #include <linux/types.h>
43 #include <linux/printk.h>
44
45 #include <linux/rk-camera-module.h>
46 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
47
48 #ifndef V4L2_CID_DIGITAL_GAIN
49 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
50 #endif
51
52 #define SC530AI_LINK_FREQ_396M 198000000 // 396Mbps
53 #define SC530AI_LINK_FREQ_792M 396000000 // 792Mbps
54 #define SC530AI_LINK_FREQ_792M_2LANE 396000000 // 792Mbps
55
56 #define SC530AI_LINEAR_PIXEL_RATES (SC530AI_LINK_FREQ_396M / 10 * 2 * 4)
57 #define SC530AI_HDR_PIXEL_RATES (SC530AI_LINK_FREQ_792M / 10 * 2 * 4)
58 #define SC530AI_MAX_PIXEL_RATE (SC530AI_LINK_FREQ_792M / 10 * 2 * 4)
59 #define SC530AI_LINEAR_PIXEL_RATES_2LAN (SC530AI_LINK_FREQ_792M / 10 * 2 * 2)
60
61 #define SC530AI_XVCLK_FREQ 27000000
62
63 #define SC530AI_CHIP_ID 0x8e39
64 #define SC530AI_REG_CHIP_ID 0x3107
65
66 #define SC530AI_REG_CTRL_MODE 0x0100
67 #define SC530AI_MODE_SW_STANDBY 0x0
68 #define SC530AI_MODE_STREAMING BIT(0)
69
70 #define SC530AI_REG_EXPOSURE_H 0x3e00
71 #define SC530AI_REG_EXPOSURE_M 0x3e01
72 #define SC530AI_REG_EXPOSURE_L 0x3e02
73
74 #define SC530AI_EXPOSURE_MIN 2
75 #define SC530AI_EXPOSURE_STEP 1
76
77 #define SC530AI_REG_DIG_GAIN 0x3e06
78 #define SC530AI_REG_DIG_FINE_GAIN 0x3e07
79 #define SC530AI_REG_ANA_GAIN 0x3e09
80
81 #define SC530AI_GAIN_MIN 0x20
82 #define SC530AI_GAIN_MAX (32 * 326)
83 #define SC530AI_GAIN_STEP 1
84 #define SC530AI_GAIN_DEFAULT 0x20
85
86 #define SC530AI_REG_VTS_H 0x320e
87 #define SC530AI_REG_VTS_L 0x320f
88 #define SC530AI_VTS_MAX 0x7fff
89
90 #define SC530AI_SOFTWARE_RESET_REG 0x0103
91
92 // short frame exposure
93 #define SC530AI_REG_SHORT_EXPOSURE_H 0x3e22
94 #define SC530AI_REG_SHORT_EXPOSURE_M 0x3e04
95 #define SC530AI_REG_SHORT_EXPOSURE_L 0x3e05
96
97 #define SC530AI_REG_MAX_SHORT_EXP_H 0x3e23
98 #define SC530AI_REG_MAX_SHORT_EXP_L 0x3e24
99
100 #define SC530AI_HDR_EXPOSURE_MIN 5 // Half line exposure time
101 #define SC530AI_HDR_EXPOSURE_STEP 4 // Half line exposure time
102
103 #define SC530AI_MAX_SHORT_EXPOSURE 608
104
105 // short frame gain
106 #define SC530AI_REG_SDIG_GAIN 0x3e10
107 #define SC530AI_REG_SDIG_FINE_GAIN 0x3e11
108 #define SC530AI_REG_SANA_GAIN 0x3e13
109
110 //group hold
111 #define SC530AI_GROUP_UPDATE_ADDRESS 0x3812
112 #define SC530AI_GROUP_UPDATE_START_DATA 0x00
113 #define SC530AI_GROUP_UPDATE_LAUNCH 0x30
114
115 #define SC530AI_FLIP_MIRROR_REG 0x3221
116 #define SC530AI_FLIP_MASK 0x60
117 #define SC530AI_MIRROR_MASK 0x06
118
119 #define REG_NULL 0xFFFF
120
121 #define SC530AI_REG_VALUE_08BIT 1
122 #define SC530AI_REG_VALUE_16BIT 2
123 #define SC530AI_REG_VALUE_24BIT 3
124
125 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
126 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
127 #define OF_CAMERA_HDR_MODE "rockchip,camera-hdr-mode"
128
129 #define SC530AI_NAME "sc530ai"
130
131 #define SC530AI_FETCH_EXP_H(VAL) (((VAL) >> 12) & 0xF)
132 #define SC530AI_FETCH_EXP_M(VAL) (((VAL) >> 4) & 0xFF)
133 #define SC530AI_FETCH_EXP_L(VAL) (((VAL) & 0xF) << 4)
134
135 static const char * const sc530ai_supply_names[] = {
136 "avdd", /* Analog power */
137 "dovdd", /* Digital I/O power */
138 "dvdd", /* Digital core power */
139 };
140
141 #define sc530ai_NUM_SUPPLIES ARRAY_SIZE(sc530ai_supply_names)
142
143 struct regval {
144 u16 addr;
145 u8 val;
146 };
147
148 struct sc530ai_mode {
149 u32 bus_fmt;
150 u32 width;
151 u32 height;
152 struct v4l2_fract max_fps;
153 u32 hts_def;
154 u32 vts_def;
155 u32 exp_def;
156 u32 mipi_freq_idx;
157 u32 bpp;
158 const struct regval *reg_list;
159 u32 hdr_mode;
160 u32 vc[PAD_MAX];
161 };
162
163 struct sc530ai {
164 struct i2c_client *client;
165 struct clk *xvclk;
166 struct gpio_desc *reset_gpio;
167 struct gpio_desc *pwdn_gpio;
168 struct regulator_bulk_data supplies[sc530ai_NUM_SUPPLIES];
169
170 struct pinctrl *pinctrl;
171 struct pinctrl_state *pins_default;
172 struct pinctrl_state *pins_sleep;
173 struct v4l2_fract cur_fps;
174 u32 cur_vts;
175 struct v4l2_subdev subdev;
176 struct media_pad pad;
177 struct v4l2_ctrl_handler ctrl_handler;
178 struct v4l2_ctrl *exposure;
179 struct v4l2_ctrl *anal_gain;
180 struct v4l2_ctrl *digi_gain;
181 struct v4l2_ctrl *hblank;
182 struct v4l2_ctrl *vblank;
183 struct v4l2_ctrl *pixel_rate;
184 struct v4l2_ctrl *link_freq;
185 struct mutex mutex;
186 bool streaming;
187 bool power_on;
188 const struct sc530ai_mode *support_modes;
189 const struct sc530ai_mode *cur_mode;
190 u32 support_modes_num;
191 unsigned int lane_num;
192 u32 module_index;
193 const char *module_facing;
194 const char *module_name;
195 const char *len_name;
196 bool has_init_exp;
197 struct preisp_hdrae_exp_s init_hdrae_exp;
198 };
199
200 #define to_sc530ai(sd) container_of(sd, struct sc530ai, subdev)
201
202 /*
203 * Xclk 24Mhz
204 * max_framerate 30fps
205 * mipi_datarate per lane 1008Mbps, 4lane
206 */
207 static const struct regval sc530ai_linear_10_30fps_2880x1620_4lane_regs[] = {
208 {0x0103, 0x01},
209 {0x0100, 0x00},
210 {0x36e9, 0x80},
211 {0x37f9, 0x80},
212 {0x301f, 0x01},
213 {0x3250, 0x40},
214 {0x3251, 0x98},
215 {0x3253, 0x0c},
216 {0x325f, 0x20},
217 {0x3301, 0x08},
218 {0x3304, 0x50},
219 {0x3306, 0x78},
220 {0x3308, 0x14},
221 {0x3309, 0x70},
222 {0x330a, 0x00},
223 {0x330b, 0xd8},
224 {0x330d, 0x10},
225 {0x331e, 0x41},
226 {0x331f, 0x61},
227 {0x3333, 0x10},
228 {0x335d, 0x60},
229 {0x335e, 0x06},
230 {0x335f, 0x08},
231 {0x3364, 0x56},
232 {0x3366, 0x01},
233 {0x337c, 0x02},
234 {0x337d, 0x0a},
235 {0x3390, 0x01},
236 {0x3391, 0x03},
237 {0x3392, 0x07},
238 {0x3393, 0x08},
239 {0x3394, 0x08},
240 {0x3395, 0x08},
241 {0x3396, 0x40},
242 {0x3397, 0x48},
243 {0x3398, 0x4b},
244 {0x3399, 0x08},
245 {0x339a, 0x08},
246 {0x339b, 0x08},
247 {0x339c, 0x1d},
248 {0x33a2, 0x04},
249 {0x33ae, 0x30},
250 {0x33af, 0x50},
251 {0x33b1, 0x80},
252 {0x33b2, 0x48},
253 {0x33b3, 0x30},
254 {0x349f, 0x02},
255 {0x34a6, 0x48},
256 {0x34a7, 0x49},
257 {0x34a8, 0x40},
258 {0x34a9, 0x30},
259 {0x34f8, 0x4b},
260 {0x34f9, 0x30},
261 {0x3632, 0x48},
262 {0x3633, 0x32},
263 {0x3637, 0x29},
264 {0x3638, 0xc1},
265 {0x363b, 0x20},
266 {0x363d, 0x02},
267 {0x3670, 0x09},
268 {0x3674, 0x8b},
269 {0x3675, 0xc6},
270 {0x3676, 0x8b},
271 {0x367c, 0x40},
272 {0x367d, 0x48},
273 {0x3690, 0x32},
274 {0x3691, 0x43},
275 {0x3692, 0x33},
276 {0x3693, 0x40},
277 {0x3694, 0x4b},
278 {0x3698, 0x85},
279 {0x3699, 0x8f},
280 {0x369a, 0xa0},
281 {0x369b, 0xc3},
282 {0x36a2, 0x49},
283 {0x36a3, 0x4b},
284 {0x36a4, 0x4f},
285 {0x36d0, 0x01},
286 {0x36ec, 0x13},
287 {0x370f, 0x01},
288 {0x3722, 0x00},
289 {0x3728, 0x10},
290 {0x37b0, 0x03},
291 {0x37b1, 0x03},
292 {0x37b2, 0x83},
293 {0x37b3, 0x48},
294 {0x37b4, 0x49},
295 {0x37fb, 0x25},
296 {0x37fc, 0x01},
297 {0x3901, 0x00},
298 {0x3902, 0xc5},
299 {0x3904, 0x08},
300 {0x3905, 0x8c},
301 {0x3909, 0x00},
302 {0x391d, 0x04},
303 {0x391f, 0x44},
304 {0x3926, 0x21},
305 {0x3929, 0x18},
306 {0x3933, 0x81},
307 {0x3934, 0x81},
308 {0x3937, 0x69},
309 {0x3939, 0x00},
310 {0x393a, 0x00},
311 {0x39dc, 0x02},
312 {0x3e01, 0xcd},
313 {0x3e02, 0xa0},
314 {0x440e, 0x02},
315 {0x4509, 0x20},
316 {0x4800, 0x04},
317 {0x4837, 0x28},
318 {0x5010, 0x10},
319 {0x5799, 0x06},
320 {0x57ad, 0x00},
321 {0x5ae0, 0xfe},
322 {0x5ae1, 0x40},
323 {0x5ae2, 0x30},
324 {0x5ae3, 0x2a},
325 {0x5ae4, 0x24},
326 {0x5ae5, 0x30},
327 {0x5ae6, 0x2a},
328 {0x5ae7, 0x24},
329 {0x5ae8, 0x3c},
330 {0x5ae9, 0x30},
331 {0x5aea, 0x28},
332 {0x5aeb, 0x3c},
333 {0x5aec, 0x30},
334 {0x5aed, 0x28},
335 {0x5aee, 0xfe},
336 {0x5aef, 0x40},
337 {0x5af4, 0x30},
338 {0x5af5, 0x2a},
339 {0x5af6, 0x24},
340 {0x5af7, 0x30},
341 {0x5af8, 0x2a},
342 {0x5af9, 0x24},
343 {0x5afa, 0x3c},
344 {0x5afb, 0x30},
345 {0x5afc, 0x28},
346 {0x5afd, 0x3c},
347 {0x5afe, 0x30},
348 {0x5aff, 0x28},
349 {0x36e9, 0x44},
350 {0x37f9, 0x34},
351 //{0x0100, 0x01},
352
353 {REG_NULL, 0x00},
354 };
355
356 static const struct regval sc530ai_hdr_10_30fps_2880x1620_4lane_regs[] = {
357 {0x0103, 0x01},
358 {0x0100, 0x00},
359 {0x36e9, 0x80},
360 {0x37f9, 0x80},
361 {0x301f, 0x03},
362 {0x320e, 0x0c},
363 {0x320f, 0xe4},
364 {0x3250, 0xff},
365 {0x3251, 0x98},
366 {0x3253, 0x0c},
367 {0x325f, 0x20},
368 {0x3281, 0x01},
369 {0x3301, 0x08},
370 {0x3304, 0x58},
371 {0x3306, 0xa0},
372 {0x3308, 0x14},
373 {0x3309, 0x50},
374 {0x330a, 0x01},
375 {0x330b, 0x10},
376 {0x330d, 0x10},
377 {0x331e, 0x49},
378 {0x331f, 0x41},
379 {0x3333, 0x10},
380 {0x335d, 0x60},
381 {0x335e, 0x06},
382 {0x335f, 0x08},
383 {0x3364, 0x56},
384 {0x3366, 0x01},
385 {0x337c, 0x02},
386 {0x337d, 0x0a},
387 {0x3390, 0x01},
388 {0x3391, 0x03},
389 {0x3392, 0x07},
390 {0x3393, 0x08},
391 {0x3394, 0x08},
392 {0x3395, 0x08},
393 {0x3396, 0x48},
394 {0x3397, 0x4b},
395 {0x3398, 0x4f},
396 {0x3399, 0x0a},
397 {0x339a, 0x0a},
398 {0x339b, 0x10},
399 {0x339c, 0x22},
400 {0x33a2, 0x04},
401 {0x33ad, 0x24},
402 {0x33ae, 0x38},
403 {0x33af, 0x38},
404 {0x33b1, 0x80},
405 {0x33b2, 0x48},
406 {0x33b3, 0x30},
407 {0x349f, 0x02},
408 {0x34a6, 0x48},
409 {0x34a7, 0x4b},
410 {0x34a8, 0x20},
411 {0x34a9, 0x18},
412 {0x34f8, 0x5f},
413 {0x34f9, 0x04},
414 {0x3632, 0x48},
415 {0x3633, 0x32},
416 {0x3637, 0x29},
417 {0x3638, 0xc1},
418 {0x363b, 0x20},
419 {0x363d, 0x02},
420 {0x3670, 0x09},
421 {0x3674, 0x88},
422 {0x3675, 0x88},
423 {0x3676, 0x88},
424 {0x367c, 0x40},
425 {0x367d, 0x48},
426 {0x3690, 0x33},
427 {0x3691, 0x34},
428 {0x3692, 0x55},
429 {0x3693, 0x4b},
430 {0x3694, 0x4f},
431 {0x3698, 0x85},
432 {0x3699, 0x8f},
433 {0x369a, 0xa0},
434 {0x369b, 0xc3},
435 {0x36a2, 0x49},
436 {0x36a3, 0x4b},
437 {0x36a4, 0x4f},
438 {0x36d0, 0x01},
439 {0x370f, 0x01},
440 {0x3722, 0x00},
441 {0x3728, 0x10},
442 {0x37b0, 0x03},
443 {0x37b1, 0x03},
444 {0x37b2, 0x83},
445 {0x37b3, 0x48},
446 {0x37b4, 0x4f},
447 {0x3901, 0x00},
448 {0x3902, 0xc5},
449 {0x3904, 0x08},
450 {0x3905, 0x8d},
451 {0x3909, 0x00},
452 {0x391d, 0x04},
453 {0x3926, 0x21},
454 {0x3929, 0x18},
455 {0x3933, 0x83},
456 {0x3934, 0x02},
457 {0x3937, 0x71},
458 {0x3939, 0x00},
459 {0x393a, 0x00},
460 {0x39dc, 0x02},
461 {0x3c0f, 0x00},
462 {0x3e00, 0x01},
463 {0x3e01, 0x82},
464 {0x3e02, 0x00},
465 {0x3e04, 0x18},
466 {0x3e05, 0x20},
467 {0x3e23, 0x00},
468 {0x3e24, 0xc8},
469 {0x440e, 0x02},
470 {0x4509, 0x20},
471 {0x4800, 0x04},
472 {0x4816, 0x11},
473 {0x5010, 0x10},
474 {0x5799, 0x06},
475 {0x57ad, 0x00},
476 {0x5ae0, 0xfe},
477 {0x5ae1, 0x40},
478 {0x5ae2, 0x30},
479 {0x5ae3, 0x2a},
480 {0x5ae4, 0x24},
481 {0x5ae5, 0x30},
482 {0x5ae6, 0x2a},
483 {0x5ae7, 0x24},
484 {0x5ae8, 0x3c},
485 {0x5ae9, 0x30},
486 {0x5aea, 0x28},
487 {0x5aeb, 0x3c},
488 {0x5aec, 0x30},
489 {0x5aed, 0x28},
490 {0x5aee, 0xfe},
491 {0x5aef, 0x40},
492 {0x5af4, 0x30},
493 {0x5af5, 0x2a},
494 {0x5af6, 0x24},
495 {0x5af7, 0x30},
496 {0x5af8, 0x2a},
497 {0x5af9, 0x24},
498 {0x5afa, 0x3c},
499 {0x5afb, 0x30},
500 {0x5afc, 0x28},
501 {0x5afd, 0x3c},
502 {0x5afe, 0x30},
503 {0x5aff, 0x28},
504 {0x36e9, 0x44},
505 {0x37f9, 0x44},
506 //{0x0100, 0x01},
507
508 {REG_NULL, 0x00},
509 };
510
511 /*
512 * Xclk 24Mhz
513 * max_framerate 30fps
514 * mipi_datarate per lane 1008Mbps, 2lane
515 */
516 static const struct regval sc530ai_10_30fps_2880x1620_2lane_regs[] = {
517 {0x0103, 0x01},
518 {0x0100, 0x00},
519 {0x36e9, 0x80},
520 {0x37f9, 0x80},
521 {0x3018, 0x32},
522 {0x3019, 0x0c},
523 {0x301f, 0x18},
524 {0x3250, 0x40},
525 {0x3251, 0x98},
526 {0x3253, 0x0c},
527 {0x325f, 0x20},
528 {0x3301, 0x08},
529 {0x3304, 0x50},
530 {0x3306, 0x78},
531 {0x3308, 0x14},
532 {0x3309, 0x70},
533 {0x330a, 0x00},
534 {0x330b, 0xd8},
535 {0x330d, 0x10},
536 {0x331e, 0x41},
537 {0x331f, 0x61},
538 {0x3333, 0x10},
539 {0x335d, 0x60},
540 {0x335e, 0x06},
541 {0x335f, 0x08},
542 {0x3364, 0x56},
543 {0x3366, 0x01},
544 {0x337c, 0x02},
545 {0x337d, 0x0a},
546 {0x3390, 0x01},
547 {0x3391, 0x03},
548 {0x3392, 0x07},
549 {0x3393, 0x08},
550 {0x3394, 0x08},
551 {0x3395, 0x08},
552 {0x3396, 0x40},
553 {0x3397, 0x48},
554 {0x3398, 0x4b},
555 {0x3399, 0x08},
556 {0x339a, 0x08},
557 {0x339b, 0x08},
558 {0x339c, 0x1d},
559 {0x33a2, 0x04},
560 {0x33ae, 0x30},
561 {0x33af, 0x50},
562 {0x33b1, 0x80},
563 {0x33b2, 0x80},
564 {0x33b3, 0x40},
565 {0x349f, 0x02},
566 {0x34a6, 0x48},
567 {0x34a7, 0x49},
568 {0x34a8, 0x40},
569 {0x34a9, 0x30},
570 {0x34f8, 0x4b},
571 {0x34f9, 0x30},
572 {0x3632, 0x48},
573 {0x3633, 0x32},
574 {0x3637, 0x2b},
575 {0x3638, 0xc1},
576 {0x363b, 0x20},
577 {0x363d, 0x02},
578 {0x3670, 0x09},
579 {0x3674, 0x8b},
580 {0x3675, 0xc6},
581 {0x3676, 0x8b},
582 {0x367c, 0x40},
583 {0x367d, 0x48},
584 {0x3690, 0x32},
585 {0x3691, 0x32},
586 {0x3692, 0x33},
587 {0x3693, 0x40},
588 {0x3694, 0x4b},
589 {0x3698, 0x85},
590 {0x3699, 0x8f},
591 {0x369a, 0xa0},
592 {0x369b, 0xc3},
593 {0x36a2, 0x49},
594 {0x36a3, 0x4b},
595 {0x36a4, 0x4f},
596 {0x36d0, 0x01},
597 {0x36ec, 0x03},
598 {0x370f, 0x01},
599 {0x3722, 0x00},
600 {0x3728, 0x10},
601 {0x37b0, 0x03},
602 {0x37b1, 0x03},
603 {0x37b2, 0x83},
604 {0x37b3, 0x48},
605 {0x37b4, 0x49},
606 {0x37fb, 0x25},
607 {0x37fc, 0x01},
608 {0x3901, 0x00},
609 {0x3902, 0xc5},
610 {0x3904, 0x08},
611 {0x3905, 0x8c},
612 {0x3909, 0x00},
613 {0x391d, 0x04},
614 {0x391f, 0x44},
615 {0x3926, 0x21},
616 {0x3929, 0x18},
617 {0x3933, 0x81},
618 {0x3934, 0x81},
619 {0x3937, 0x69},
620 {0x3939, 0x00},
621 {0x393a, 0x00},
622 {0x39dc, 0x02},
623 {0x3e01, 0xcd},
624 {0x3e02, 0xa0},
625 {0x440e, 0x02},
626 {0x4509, 0x20},
627 {0x4800, 0x04},
628 {0x4837, 0x14},
629 {0x5010, 0x10},
630 {0x5799, 0x06},
631 {0x57ad, 0x00},
632 {0x5ae0, 0xfe},
633 {0x5ae1, 0x40},
634 {0x5ae2, 0x30},
635 {0x5ae3, 0x2a},
636 {0x5ae4, 0x24},
637 {0x5ae5, 0x30},
638 {0x5ae6, 0x2a},
639 {0x5ae7, 0x24},
640 {0x5ae8, 0x3c},
641 {0x5ae9, 0x30},
642 {0x5aea, 0x28},
643 {0x5aeb, 0x3c},
644 {0x5aec, 0x30},
645 {0x5aed, 0x28},
646 {0x5aee, 0xfe},
647 {0x5aef, 0x40},
648 {0x5af4, 0x30},
649 {0x5af5, 0x2a},
650 {0x5af6, 0x24},
651 {0x5af7, 0x30},
652 {0x5af8, 0x2a},
653 {0x5af9, 0x24},
654 {0x5afa, 0x3c},
655 {0x5afb, 0x30},
656 {0x5afc, 0x28},
657 {0x5afd, 0x3c},
658 {0x5afe, 0x30},
659 {0x5aff, 0x28},
660 {0x36e9, 0x44},
661 {0x37f9, 0x34},
662 // {0x0100, 0x01},
663 {REG_NULL, 0x00},
664 };
665
666 static const struct sc530ai_mode supported_modes_4lane[] = {
667 {
668 .width = 2880,
669 .height = 1620,
670 .max_fps = {
671 .numerator = 10000,
672 .denominator = 300000,
673 },
674 .exp_def = 0xcda / 2,
675 .hts_def = 0xb40,
676 .vts_def = 0x0672,
677 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
678 .reg_list = sc530ai_linear_10_30fps_2880x1620_4lane_regs,
679 .mipi_freq_idx = 0,
680 .bpp = 10,
681 .hdr_mode = NO_HDR,
682 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
683 },
684 {
685 .width = 2880,
686 .height = 1620,
687 .max_fps = {
688 .numerator = 10000,
689 .denominator = 300000,
690 },
691 .exp_def = 0x1820 / 2,
692 .hts_def = 0xb40,
693 .vts_def = 0x0ce4,
694 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
695 .reg_list = sc530ai_hdr_10_30fps_2880x1620_4lane_regs,
696 .mipi_freq_idx = 1,
697 .bpp = 10,
698 .hdr_mode = HDR_X2,
699 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_1,
700 .vc[PAD1] = V4L2_MBUS_CSI2_CHANNEL_0,//L->csi wr0
701 .vc[PAD2] = V4L2_MBUS_CSI2_CHANNEL_1,
702 .vc[PAD3] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr2
703 },
704 };
705
706 static const struct sc530ai_mode supported_modes_2lane[] = {
707 {
708 .width = 2880,
709 .height = 1620,
710 .max_fps = {
711 .numerator = 10000,
712 .denominator = 300000,
713 },
714 .exp_def = 0xcda / 2,
715 .hts_def = 0xb40,
716 .vts_def = 0x0672,
717 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
718 .reg_list = sc530ai_10_30fps_2880x1620_2lane_regs,
719 .mipi_freq_idx = 2,
720 .bpp = 10,
721 .hdr_mode = NO_HDR,
722 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
723 },
724 };
725
726 static const s64 link_freq_items[] = {
727 SC530AI_LINK_FREQ_396M,
728 SC530AI_LINK_FREQ_792M,
729 SC530AI_LINK_FREQ_792M_2LANE,
730 };
731
732 /* Write registers up to 4 at a time */
sc530ai_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)733 static int sc530ai_write_reg(struct i2c_client *client, u16 reg,
734 u32 len, u32 val)
735 {
736 u32 buf_i, val_i;
737 u8 buf[6];
738 u8 *val_p;
739 __be32 val_be;
740
741 if (len > 4)
742 return -EINVAL;
743
744 buf[0] = reg >> 8;
745 buf[1] = reg & 0xff;
746
747 val_be = cpu_to_be32(val);
748 val_p = (u8 *)&val_be;
749 buf_i = 2;
750 val_i = 4 - len;
751
752 while (val_i < 4)
753 buf[buf_i++] = val_p[val_i++];
754
755 if (i2c_master_send(client, buf, len + 2) != len + 2)
756 return -EIO;
757
758 return 0;
759 }
760
sc530ai_write_array(struct i2c_client * client,const struct regval * regs)761 static int sc530ai_write_array(struct i2c_client *client,
762 const struct regval *regs)
763 {
764 u32 i;
765 int ret = 0;
766
767 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
768 ret = sc530ai_write_reg(client, regs[i].addr,
769 SC530AI_REG_VALUE_08BIT, regs[i].val);
770
771 return ret;
772 }
773
774 /* Read registers up to 4 at a time */
sc530ai_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)775 static int sc530ai_read_reg(struct i2c_client *client,
776 u16 reg, unsigned int len, u32 *val)
777 {
778 struct i2c_msg msgs[2];
779 u8 *data_be_p;
780 __be32 data_be = 0;
781 __be16 reg_addr_be = cpu_to_be16(reg);
782 int ret;
783
784 if (len > 4 || !len)
785 return -EINVAL;
786
787 data_be_p = (u8 *)&data_be;
788 /* Write register address */
789 msgs[0].addr = client->addr;
790 msgs[0].flags = 0;
791 msgs[0].len = 2;
792 msgs[0].buf = (u8 *)®_addr_be;
793
794 /* Read data from register */
795 msgs[1].addr = client->addr;
796 msgs[1].flags = I2C_M_RD;
797 msgs[1].len = len;
798 msgs[1].buf = &data_be_p[4 - len];
799
800 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
801 if (ret != ARRAY_SIZE(msgs))
802 return -EIO;
803
804 *val = be32_to_cpu(data_be);
805
806 return 0;
807 }
808
sc530ai_get_reso_dist(const struct sc530ai_mode * mode,struct v4l2_mbus_framefmt * framefmt)809 static int sc530ai_get_reso_dist(const struct sc530ai_mode *mode,
810 struct v4l2_mbus_framefmt *framefmt)
811 {
812 return abs(mode->width - framefmt->width) +
813 abs(mode->height - framefmt->height);
814 }
815
816 static const struct sc530ai_mode *
sc530ai_find_best_fit(struct sc530ai * sc530ai,struct v4l2_subdev_format * fmt)817 sc530ai_find_best_fit(struct sc530ai *sc530ai, struct v4l2_subdev_format *fmt)
818 {
819 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
820 int dist;
821 int cur_best_fit = 0;
822 int cur_best_fit_dist = -1;
823 unsigned int i;
824
825 for (i = 0; i < sc530ai->support_modes_num; i++) {
826 dist = sc530ai_get_reso_dist(&sc530ai->support_modes[i], framefmt);
827 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
828 cur_best_fit_dist = dist;
829 cur_best_fit = i;
830 }
831 }
832
833 return &sc530ai->support_modes[cur_best_fit];
834 }
835
sc530ai_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)836 static int sc530ai_set_fmt(struct v4l2_subdev *sd,
837 struct v4l2_subdev_pad_config *cfg,
838 struct v4l2_subdev_format *fmt)
839 {
840 struct sc530ai *sc530ai = to_sc530ai(sd);
841 const struct sc530ai_mode *mode;
842 s64 h_blank, vblank_def;
843 u64 pixel_rate = 0;
844
845 mutex_lock(&sc530ai->mutex);
846
847 mode = sc530ai_find_best_fit(sc530ai, fmt);
848 fmt->format.code = mode->bus_fmt;
849 fmt->format.width = mode->width;
850 fmt->format.height = mode->height;
851 fmt->format.field = V4L2_FIELD_NONE;
852 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
853 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
854 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
855 #else
856 mutex_unlock(&sc530ai->mutex);
857 return -ENOTTY;
858 #endif
859 } else {
860 sc530ai->cur_mode = mode;
861
862 h_blank = mode->hts_def - mode->width;
863 __v4l2_ctrl_modify_range(sc530ai->hblank, h_blank,
864 h_blank, 1, h_blank);
865 vblank_def = mode->vts_def - mode->height;
866 __v4l2_ctrl_modify_range(sc530ai->vblank, vblank_def,
867 SC530AI_VTS_MAX - mode->height,
868 1, vblank_def);
869
870 __v4l2_ctrl_s_ctrl(sc530ai->link_freq, mode->mipi_freq_idx);
871 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] /
872 mode->bpp * 2 * sc530ai->lane_num;
873 __v4l2_ctrl_s_ctrl_int64(sc530ai->pixel_rate, pixel_rate);
874 sc530ai->cur_vts = mode->vts_def;
875 sc530ai->cur_fps = mode->max_fps;
876 }
877
878 mutex_unlock(&sc530ai->mutex);
879
880 return 0;
881 }
882
sc530ai_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)883 static int sc530ai_get_fmt(struct v4l2_subdev *sd,
884 struct v4l2_subdev_pad_config *cfg,
885 struct v4l2_subdev_format *fmt)
886 {
887 struct sc530ai *sc530ai = to_sc530ai(sd);
888 const struct sc530ai_mode *mode = sc530ai->cur_mode;
889
890 mutex_lock(&sc530ai->mutex);
891 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
892 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
893 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
894 #else
895 mutex_unlock(&sc530ai->mutex);
896 return -ENOTTY;
897 #endif
898 } else {
899 fmt->format.width = mode->width;
900 fmt->format.height = mode->height;
901 fmt->format.code = mode->bus_fmt;
902 fmt->format.field = V4L2_FIELD_NONE;
903 /* format info: width/height/data type/virctual channel */
904 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
905 fmt->reserved[0] = mode->vc[fmt->pad];
906 else
907 fmt->reserved[0] = mode->vc[PAD0];
908 }
909 mutex_unlock(&sc530ai->mutex);
910
911 return 0;
912 }
913
sc530ai_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)914 static int sc530ai_enum_mbus_code(struct v4l2_subdev *sd,
915 struct v4l2_subdev_pad_config *cfg,
916 struct v4l2_subdev_mbus_code_enum *code)
917 {
918 struct sc530ai *sc530ai = to_sc530ai(sd);
919
920 if (code->index != 0)
921 return -EINVAL;
922 code->code = sc530ai->cur_mode->bus_fmt;
923
924 return 0;
925 }
926
sc530ai_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)927 static int sc530ai_enum_frame_sizes(struct v4l2_subdev *sd,
928 struct v4l2_subdev_pad_config *cfg,
929 struct v4l2_subdev_frame_size_enum *fse)
930 {
931 struct sc530ai *sc530ai = to_sc530ai(sd);
932
933 if (fse->index >= sc530ai->support_modes_num)
934 return -EINVAL;
935
936 if (fse->code != sc530ai->support_modes[fse->index].bus_fmt)
937 return -EINVAL;
938
939 fse->min_width = sc530ai->support_modes[fse->index].width;
940 fse->max_width = sc530ai->support_modes[fse->index].width;
941 fse->max_height = sc530ai->support_modes[fse->index].height;
942 fse->min_height = sc530ai->support_modes[fse->index].height;
943
944 return 0;
945 }
946
sc530ai_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)947 static int sc530ai_g_frame_interval(struct v4l2_subdev *sd,
948 struct v4l2_subdev_frame_interval *fi)
949 {
950 struct sc530ai *sc530ai = to_sc530ai(sd);
951 const struct sc530ai_mode *mode = sc530ai->cur_mode;
952
953 if (sc530ai->streaming)
954 fi->interval = sc530ai->cur_fps;
955 else
956 fi->interval = mode->max_fps;
957
958 return 0;
959 }
960
sc530ai_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)961 static int sc530ai_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
962 struct v4l2_mbus_config *config)
963 {
964 struct sc530ai *sc530ai = to_sc530ai(sd);
965 const struct sc530ai_mode *mode = sc530ai->cur_mode;
966 u32 val = 1 << (sc530ai->lane_num - 1) |
967 V4L2_MBUS_CSI2_CHANNEL_0 |
968 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
969
970 if (mode->hdr_mode != NO_HDR)
971 val |= V4L2_MBUS_CSI2_CHANNEL_1;
972 if (mode->hdr_mode == HDR_X3)
973 val |= V4L2_MBUS_CSI2_CHANNEL_2;
974
975 config->type = V4L2_MBUS_CSI2_DPHY;
976 config->flags = val;
977
978 return 0;
979 }
980
sc530ai_get_module_inf(struct sc530ai * sc530ai,struct rkmodule_inf * inf)981 static void sc530ai_get_module_inf(struct sc530ai *sc530ai,
982 struct rkmodule_inf *inf)
983 {
984 memset(inf, 0, sizeof(*inf));
985 strscpy(inf->base.sensor, SC530AI_NAME, sizeof(inf->base.sensor));
986 strscpy(inf->base.module, sc530ai->module_name,
987 sizeof(inf->base.module));
988 strscpy(inf->base.lens, sc530ai->len_name, sizeof(inf->base.lens));
989 }
990
sc530ai_get_gain_reg(u32 total_gain,u32 * again,u32 * dgain,u32 * dgain_fine)991 static void sc530ai_get_gain_reg(u32 total_gain, u32 *again, u32 *dgain,
992 u32 *dgain_fine)
993 {
994 u32 gain_factor = 0;
995
996 if (total_gain < SC530AI_GAIN_MIN)
997 total_gain = SC530AI_GAIN_MIN;
998 else if (total_gain > SC530AI_GAIN_MAX)
999 total_gain = SC530AI_GAIN_MAX;
1000
1001 gain_factor = total_gain * 1000 / 32;
1002 if (gain_factor < 2000) { /* 1 - 2x gain */
1003 *again = 0x00;
1004 *dgain = 0x00;
1005 *dgain_fine = gain_factor * 128 / 1000;
1006 } else if (gain_factor < 2550) { /* 2x - 2.55x gain */
1007 *again = 0x01;
1008 *dgain = 0x00;
1009 *dgain_fine = gain_factor * 128 / 2000;
1010 } else if (gain_factor < 2550 * 2) { /* 2.55x - 5.1x gain */
1011 *again = 0x40;
1012 *dgain = 0x00;
1013 *dgain_fine = gain_factor * 128 / 2550;
1014 } else if (gain_factor < 2550 * 4) { /* 5.1x - 10.2x gain */
1015 *again = 0x48;
1016 *dgain = 0x00;
1017 *dgain_fine = gain_factor * 128 / 5110;
1018 } else if (gain_factor < 2550 * 8) { /* 10.2x - 20.4x gain */
1019 *again = 0x49;
1020 *dgain = 0x00;
1021 *dgain_fine = gain_factor * 128 / 10200;
1022 } else if (gain_factor < 2550 * 16) { /* 20.4x - 40.8x gain */
1023 *again = 0x4B;
1024 *dgain = 0x00;
1025 *dgain_fine = gain_factor * 128 / 20400;
1026 } else if (gain_factor < 2550 * 32) { /* 40.8x - 81.6x gain */
1027 *again = 0x4f;
1028 *dgain = 0x00;
1029 *dgain_fine = gain_factor * 128 / 40800;
1030 } else if (gain_factor < 2550 * 64) { /* 81.6x - 163.2x gain */
1031 *again = 0x5f;
1032 *dgain = 0x00;
1033 *dgain_fine = gain_factor * 128 / 40800 / 2;
1034 } else if (gain_factor < 2550 * 128) { /* 163.2x - 326.4x gain */
1035 *again = 0x5f;
1036 *dgain = 0x01;
1037 *dgain_fine = gain_factor * 128 / 40800 / 4;
1038 }
1039 }
1040
sc530ai_set_hdrae(struct sc530ai * sc530ai,struct preisp_hdrae_exp_s * ae)1041 static int sc530ai_set_hdrae(struct sc530ai *sc530ai,
1042 struct preisp_hdrae_exp_s *ae)
1043 {
1044 int ret = 0;
1045 u32 l_exp_time, m_exp_time, s_exp_time;
1046 u32 l_t_gain, m_t_gain, s_t_gain;
1047 u32 l_again = 0, l_dgain = 0, l_dgain_fine = 0;
1048 u32 s_again = 0, s_dgain = 0, s_dgain_fine = 0;
1049
1050 if (!sc530ai->has_init_exp && !sc530ai->streaming) {
1051 sc530ai->init_hdrae_exp = *ae;
1052 sc530ai->has_init_exp = true;
1053 dev_dbg(&sc530ai->client->dev,
1054 "sc530ai don't stream, record exp for hdr!\n");
1055 return ret;
1056 }
1057
1058 l_exp_time = ae->long_exp_reg;
1059 m_exp_time = ae->middle_exp_reg;
1060 s_exp_time = ae->short_exp_reg;
1061 l_t_gain = ae->long_gain_reg;
1062 m_t_gain = ae->middle_gain_reg;
1063 s_t_gain = ae->short_gain_reg;
1064
1065 if (sc530ai->cur_mode->hdr_mode == HDR_X2) {
1066 //2 stagger
1067 l_t_gain = m_t_gain;
1068 l_exp_time = m_exp_time;
1069 }
1070
1071 l_exp_time = l_exp_time << 1;
1072 s_exp_time = s_exp_time << 1;
1073
1074 // set exposure reg
1075 ret |= sc530ai_write_reg(sc530ai->client,
1076 SC530AI_REG_EXPOSURE_H,
1077 SC530AI_REG_VALUE_08BIT,
1078 SC530AI_FETCH_EXP_H(l_exp_time));
1079 ret |= sc530ai_write_reg(sc530ai->client,
1080 SC530AI_REG_EXPOSURE_M,
1081 SC530AI_REG_VALUE_08BIT,
1082 SC530AI_FETCH_EXP_M(l_exp_time));
1083 ret |= sc530ai_write_reg(sc530ai->client,
1084 SC530AI_REG_EXPOSURE_L,
1085 SC530AI_REG_VALUE_08BIT,
1086 SC530AI_FETCH_EXP_L(l_exp_time));
1087 ret |= sc530ai_write_reg(sc530ai->client,
1088 SC530AI_REG_SHORT_EXPOSURE_H,
1089 SC530AI_REG_VALUE_08BIT,
1090 SC530AI_FETCH_EXP_H(s_exp_time));
1091 ret |= sc530ai_write_reg(sc530ai->client,
1092 SC530AI_REG_SHORT_EXPOSURE_M,
1093 SC530AI_REG_VALUE_08BIT,
1094 SC530AI_FETCH_EXP_M(s_exp_time));
1095 ret |= sc530ai_write_reg(sc530ai->client,
1096 SC530AI_REG_SHORT_EXPOSURE_L,
1097 SC530AI_REG_VALUE_08BIT,
1098 SC530AI_FETCH_EXP_L(s_exp_time));
1099
1100 // set gain reg
1101 sc530ai_get_gain_reg(l_t_gain, &l_again, &l_dgain, &l_dgain_fine);
1102 sc530ai_get_gain_reg(s_t_gain, &s_again, &s_dgain, &s_dgain_fine);
1103
1104 ret |= sc530ai_write_reg(sc530ai->client,
1105 SC530AI_REG_DIG_GAIN,
1106 SC530AI_REG_VALUE_08BIT,
1107 l_dgain);
1108 ret |= sc530ai_write_reg(sc530ai->client,
1109 SC530AI_REG_DIG_FINE_GAIN,
1110 SC530AI_REG_VALUE_08BIT,
1111 l_dgain_fine);
1112 ret |= sc530ai_write_reg(sc530ai->client,
1113 SC530AI_REG_ANA_GAIN,
1114 SC530AI_REG_VALUE_08BIT,
1115 l_again);
1116
1117 ret |= sc530ai_write_reg(sc530ai->client,
1118 SC530AI_REG_SDIG_GAIN,
1119 SC530AI_REG_VALUE_08BIT,
1120 s_dgain);
1121 ret |= sc530ai_write_reg(sc530ai->client,
1122 SC530AI_REG_SDIG_FINE_GAIN,
1123 SC530AI_REG_VALUE_08BIT,
1124 s_dgain_fine);
1125 ret |= sc530ai_write_reg(sc530ai->client,
1126 SC530AI_REG_SANA_GAIN,
1127 SC530AI_REG_VALUE_08BIT,
1128 s_again);
1129 return ret;
1130 }
1131
sc530ai_get_channel_info(struct sc530ai * sc530ai,struct rkmodule_channel_info * ch_info)1132 static int sc530ai_get_channel_info(struct sc530ai *sc530ai, struct rkmodule_channel_info *ch_info)
1133 {
1134 if (ch_info->index < PAD0 || ch_info->index >= PAD_MAX)
1135 return -EINVAL;
1136 ch_info->vc = sc530ai->cur_mode->vc[ch_info->index];
1137 ch_info->width = sc530ai->cur_mode->width;
1138 ch_info->height = sc530ai->cur_mode->height;
1139 ch_info->bus_fmt = sc530ai->cur_mode->bus_fmt;
1140 return 0;
1141 }
1142
sc530ai_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1143 static long sc530ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1144 {
1145 struct sc530ai *sc530ai = to_sc530ai(sd);
1146 struct rkmodule_hdr_cfg *hdr;
1147 const struct sc530ai_mode *mode;
1148 struct rkmodule_channel_info *ch_info;
1149
1150 long ret = 0;
1151 u32 i, h = 0, w;
1152 u32 stream = 0;
1153 int pixel_rate = 0;
1154
1155 switch (cmd) {
1156 case RKMODULE_GET_MODULE_INFO:
1157 sc530ai_get_module_inf(sc530ai, (struct rkmodule_inf *)arg);
1158 break;
1159 case RKMODULE_GET_HDR_CFG:
1160 hdr = (struct rkmodule_hdr_cfg *)arg;
1161 hdr->esp.mode = HDR_NORMAL_VC;
1162 hdr->hdr_mode = sc530ai->cur_mode->hdr_mode;
1163 break;
1164 case RKMODULE_SET_HDR_CFG:
1165 hdr = (struct rkmodule_hdr_cfg *)arg;
1166 w = sc530ai->cur_mode->width;
1167 h = sc530ai->cur_mode->height;
1168 for (i = 0; i < sc530ai->support_modes_num; i++) {
1169 if (w == sc530ai->support_modes[i].width &&
1170 h == sc530ai->support_modes[i].height &&
1171 sc530ai->support_modes[i].hdr_mode == hdr->hdr_mode) {
1172 sc530ai->cur_mode = &sc530ai->support_modes[i];
1173 break;
1174 }
1175 }
1176 if (i == sc530ai->support_modes_num) {
1177 dev_err(&sc530ai->client->dev,
1178 "not find hdr mode:%d %dx%d config\n",
1179 hdr->hdr_mode, w, h);
1180 ret = -EINVAL;
1181 } else {
1182 mode = sc530ai->cur_mode;
1183 w = sc530ai->cur_mode->hts_def -
1184 sc530ai->cur_mode->width;
1185 h = sc530ai->cur_mode->vts_def -
1186 sc530ai->cur_mode->height;
1187 __v4l2_ctrl_modify_range(sc530ai->hblank, w, w, 1, w);
1188 __v4l2_ctrl_modify_range(sc530ai->vblank, h,
1189 SC530AI_VTS_MAX -
1190 sc530ai->cur_mode->height,
1191 1, h);
1192
1193 __v4l2_ctrl_s_ctrl(sc530ai->link_freq,
1194 mode->mipi_freq_idx);
1195
1196 pixel_rate = (int)link_freq_items[mode->mipi_freq_idx]
1197 / mode->bpp * 2 * sc530ai->lane_num;
1198
1199 __v4l2_ctrl_s_ctrl_int64(sc530ai->pixel_rate,
1200 pixel_rate);
1201 sc530ai->cur_vts = mode->vts_def;
1202 sc530ai->cur_fps = mode->max_fps;
1203 dev_info(&sc530ai->client->dev, "sensor mode: %d\n",
1204 sc530ai->cur_mode->hdr_mode);
1205 }
1206 break;
1207 case PREISP_CMD_SET_HDRAE_EXP:
1208 if (sc530ai->cur_mode->hdr_mode == HDR_X2)
1209 ret = sc530ai_set_hdrae(sc530ai, arg);
1210 break;
1211 case RKMODULE_SET_QUICK_STREAM:
1212 stream = *((u32 *)arg);
1213 if (stream)
1214 ret = sc530ai_write_reg(sc530ai->client,
1215 SC530AI_REG_CTRL_MODE,
1216 SC530AI_REG_VALUE_08BIT,
1217 SC530AI_MODE_STREAMING);
1218 else
1219 ret = sc530ai_write_reg(sc530ai->client,
1220 SC530AI_REG_CTRL_MODE,
1221 SC530AI_REG_VALUE_08BIT,
1222 SC530AI_MODE_SW_STANDBY);
1223 break;
1224 case RKMODULE_GET_CHANNEL_INFO:
1225 ch_info = (struct rkmodule_channel_info *)arg;
1226 ret = sc530ai_get_channel_info(sc530ai, ch_info);
1227 break;
1228 default:
1229 ret = -ENOIOCTLCMD;
1230 break;
1231 }
1232
1233 return ret;
1234 }
1235
1236 #ifdef CONFIG_COMPAT
sc530ai_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1237 static long sc530ai_compat_ioctl32(struct v4l2_subdev *sd,
1238 unsigned int cmd, unsigned long arg)
1239 {
1240 void __user *up = compat_ptr(arg);
1241 struct rkmodule_inf *inf;
1242 struct rkmodule_hdr_cfg *hdr;
1243 struct preisp_hdrae_exp_s *hdrae;
1244 struct rkmodule_channel_info *ch_info;
1245 long ret = 0;
1246 u32 stream = 0;
1247
1248 switch (cmd) {
1249 case RKMODULE_GET_MODULE_INFO:
1250 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1251 if (!inf) {
1252 ret = -ENOMEM;
1253 return ret;
1254 }
1255
1256 ret = sc530ai_ioctl(sd, cmd, inf);
1257 if (!ret) {
1258 ret = copy_to_user(up, inf, sizeof(*inf));
1259 if (ret)
1260 return -EFAULT;
1261 }
1262 kfree(inf);
1263 break;
1264 case RKMODULE_GET_HDR_CFG:
1265 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1266 if (!hdr) {
1267 ret = -ENOMEM;
1268 return ret;
1269 }
1270
1271 ret = sc530ai_ioctl(sd, cmd, hdr);
1272 if (!ret) {
1273 ret = copy_to_user(up, hdr, sizeof(*hdr));
1274 if (ret)
1275 return -EFAULT;
1276 }
1277 kfree(hdr);
1278 break;
1279 case RKMODULE_SET_HDR_CFG:
1280 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1281 if (!hdr) {
1282 ret = -ENOMEM;
1283 return ret;
1284 }
1285
1286 if (copy_from_user(hdr, up, sizeof(*hdr))) {
1287 kfree(hdr);
1288 return -EFAULT;
1289 }
1290
1291 ret = sc530ai_ioctl(sd, cmd, hdr);
1292 kfree(hdr);
1293 break;
1294 case PREISP_CMD_SET_HDRAE_EXP:
1295 hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
1296 if (!hdrae) {
1297 ret = -ENOMEM;
1298 return ret;
1299 }
1300
1301 if (copy_from_user(hdrae, up, sizeof(*hdrae))) {
1302 kfree(hdrae);
1303 return -EFAULT;
1304 }
1305
1306 ret = sc530ai_ioctl(sd, cmd, hdrae);
1307 kfree(hdrae);
1308 break;
1309 case RKMODULE_SET_QUICK_STREAM:
1310 if (copy_from_user(&stream, up, sizeof(u32)))
1311 return -EFAULT;
1312
1313 ret = sc530ai_ioctl(sd, cmd, &stream);
1314 break;
1315 case RKMODULE_GET_CHANNEL_INFO:
1316 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
1317 if (!ch_info) {
1318 ret = -ENOMEM;
1319 return ret;
1320 }
1321
1322 ret = sc530ai_ioctl(sd, cmd, ch_info);
1323 if (!ret) {
1324 ret = copy_to_user(up, ch_info, sizeof(*ch_info));
1325 if (ret)
1326 ret = -EFAULT;
1327 }
1328 kfree(ch_info);
1329 break;
1330 default:
1331 ret = -ENOIOCTLCMD;
1332 break;
1333 }
1334
1335 return ret;
1336 }
1337 #endif
1338
__sc530ai_start_stream(struct sc530ai * sc530ai)1339 static int __sc530ai_start_stream(struct sc530ai *sc530ai)
1340 {
1341 int ret;
1342
1343 ret = sc530ai_write_array(sc530ai->client, sc530ai->cur_mode->reg_list);
1344 if (ret)
1345 return ret;
1346
1347 /* In case these controls are set before streaming */
1348 ret = __v4l2_ctrl_handler_setup(&sc530ai->ctrl_handler);
1349 if (ret)
1350 return ret;
1351 if (sc530ai->has_init_exp && sc530ai->cur_mode->hdr_mode != NO_HDR) {
1352 ret = sc530ai_ioctl(&sc530ai->subdev, PREISP_CMD_SET_HDRAE_EXP,
1353 &sc530ai->init_hdrae_exp);
1354 if (ret) {
1355 dev_err(&sc530ai->client->dev,
1356 "init exp fail in hdr mode\n");
1357 return ret;
1358 }
1359 }
1360 return sc530ai_write_reg(sc530ai->client, SC530AI_REG_CTRL_MODE,
1361 SC530AI_REG_VALUE_08BIT,
1362 SC530AI_MODE_STREAMING);
1363 }
1364
__sc530ai_stop_stream(struct sc530ai * sc530ai)1365 static int __sc530ai_stop_stream(struct sc530ai *sc530ai)
1366 {
1367 sc530ai->has_init_exp = false;
1368 return sc530ai_write_reg(sc530ai->client, SC530AI_REG_CTRL_MODE,
1369 SC530AI_REG_VALUE_08BIT,
1370 SC530AI_MODE_SW_STANDBY);
1371 }
1372
sc530ai_s_stream(struct v4l2_subdev * sd,int on)1373 static int sc530ai_s_stream(struct v4l2_subdev *sd, int on)
1374 {
1375 struct sc530ai *sc530ai = to_sc530ai(sd);
1376 struct i2c_client *client = sc530ai->client;
1377 int ret = 0;
1378
1379 mutex_lock(&sc530ai->mutex);
1380 on = !!on;
1381 if (on == sc530ai->streaming)
1382 goto unlock_and_return;
1383 if (on) {
1384 ret = pm_runtime_get_sync(&client->dev);
1385 if (ret < 0) {
1386 pm_runtime_put_noidle(&client->dev);
1387 goto unlock_and_return;
1388 }
1389 ret = __sc530ai_start_stream(sc530ai);
1390 if (ret) {
1391 v4l2_err(sd, "start stream failed while write regs\n");
1392 pm_runtime_put(&client->dev);
1393 goto unlock_and_return;
1394 }
1395 } else {
1396 __sc530ai_stop_stream(sc530ai);
1397 pm_runtime_put(&client->dev);
1398 }
1399
1400 sc530ai->streaming = on;
1401
1402 unlock_and_return:
1403 mutex_unlock(&sc530ai->mutex);
1404
1405 return ret;
1406 }
1407
sc530ai_s_power(struct v4l2_subdev * sd,int on)1408 static int sc530ai_s_power(struct v4l2_subdev *sd, int on)
1409 {
1410 struct sc530ai *sc530ai = to_sc530ai(sd);
1411 struct i2c_client *client = sc530ai->client;
1412 int ret = 0;
1413
1414 mutex_lock(&sc530ai->mutex);
1415
1416 /* If the power state is not modified - no work to do. */
1417 if (sc530ai->power_on == !!on)
1418 goto unlock_and_return;
1419
1420 if (on) {
1421 ret = pm_runtime_get_sync(&client->dev);
1422 if (ret < 0) {
1423 pm_runtime_put_noidle(&client->dev);
1424 goto unlock_and_return;
1425 }
1426
1427 ret |= sc530ai_write_reg(sc530ai->client,
1428 SC530AI_SOFTWARE_RESET_REG,
1429 SC530AI_REG_VALUE_08BIT,
1430 0x01);
1431 usleep_range(100, 200);
1432
1433 sc530ai->power_on = true;
1434 } else {
1435 pm_runtime_put(&client->dev);
1436 sc530ai->power_on = false;
1437 }
1438
1439 unlock_and_return:
1440 mutex_unlock(&sc530ai->mutex);
1441
1442 return ret;
1443 }
1444
__sc530ai_power_on(struct sc530ai * sc530ai)1445 static int __sc530ai_power_on(struct sc530ai *sc530ai)
1446 {
1447 int ret;
1448 struct device *dev = &sc530ai->client->dev;
1449
1450 if (!IS_ERR_OR_NULL(sc530ai->pins_default)) {
1451 ret = pinctrl_select_state(sc530ai->pinctrl,
1452 sc530ai->pins_default);
1453 if (ret < 0)
1454 dev_err(dev, "could not set pins\n");
1455 }
1456 ret = clk_set_rate(sc530ai->xvclk, SC530AI_XVCLK_FREQ);
1457 if (ret < 0)
1458 dev_warn(dev, "Failed to set xvclk rate (27MHz)\n");
1459 if (clk_get_rate(sc530ai->xvclk) != SC530AI_XVCLK_FREQ)
1460 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1461 ret = clk_prepare_enable(sc530ai->xvclk);
1462 if (ret < 0) {
1463 dev_err(dev, "Failed to enable xvclk\n");
1464 return ret;
1465 }
1466 if (!IS_ERR(sc530ai->reset_gpio))
1467 gpiod_set_value_cansleep(sc530ai->reset_gpio, 0);
1468
1469 ret = regulator_bulk_enable(sc530ai_NUM_SUPPLIES, sc530ai->supplies);
1470 if (ret < 0) {
1471 dev_err(dev, "Failed to enable regulators\n");
1472 goto disable_clk;
1473 }
1474
1475 if (!IS_ERR(sc530ai->reset_gpio))
1476 gpiod_set_value_cansleep(sc530ai->reset_gpio, 1);
1477
1478 usleep_range(500, 1000);
1479 if (!IS_ERR(sc530ai->pwdn_gpio))
1480 gpiod_set_value_cansleep(sc530ai->pwdn_gpio, 1);
1481
1482 usleep_range(4000, 5000);
1483 return 0;
1484
1485 disable_clk:
1486 clk_disable_unprepare(sc530ai->xvclk);
1487
1488 return ret;
1489 }
1490
__sc530ai_power_off(struct sc530ai * sc530ai)1491 static void __sc530ai_power_off(struct sc530ai *sc530ai)
1492 {
1493 int ret;
1494 struct device *dev = &sc530ai->client->dev;
1495
1496 if (!IS_ERR(sc530ai->pwdn_gpio))
1497 gpiod_set_value_cansleep(sc530ai->pwdn_gpio, 0);
1498 clk_disable_unprepare(sc530ai->xvclk);
1499 if (!IS_ERR(sc530ai->reset_gpio))
1500 gpiod_set_value_cansleep(sc530ai->reset_gpio, 0);
1501 if (!IS_ERR_OR_NULL(sc530ai->pins_sleep)) {
1502 ret = pinctrl_select_state(sc530ai->pinctrl,
1503 sc530ai->pins_sleep);
1504 if (ret < 0)
1505 dev_dbg(dev, "could not set pins\n");
1506 }
1507 regulator_bulk_disable(sc530ai_NUM_SUPPLIES, sc530ai->supplies);
1508 }
1509
sc530ai_runtime_resume(struct device * dev)1510 static int __maybe_unused sc530ai_runtime_resume(struct device *dev)
1511 {
1512 struct i2c_client *client = to_i2c_client(dev);
1513 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1514 struct sc530ai *sc530ai = to_sc530ai(sd);
1515
1516 return __sc530ai_power_on(sc530ai);
1517 }
1518
sc530ai_runtime_suspend(struct device * dev)1519 static int __maybe_unused sc530ai_runtime_suspend(struct device *dev)
1520 {
1521 struct i2c_client *client = to_i2c_client(dev);
1522 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1523 struct sc530ai *sc530ai = to_sc530ai(sd);
1524
1525 __sc530ai_power_off(sc530ai);
1526
1527 return 0;
1528 }
1529
1530 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sc530ai_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1531 static int sc530ai_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1532 {
1533 struct sc530ai *sc530ai = to_sc530ai(sd);
1534 struct v4l2_mbus_framefmt *try_fmt =
1535 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1536 const struct sc530ai_mode *def_mode = &sc530ai->support_modes[0];
1537
1538 mutex_lock(&sc530ai->mutex);
1539 /* Initialize try_fmt */
1540 try_fmt->width = def_mode->width;
1541 try_fmt->height = def_mode->height;
1542 try_fmt->code = def_mode->bus_fmt;
1543 try_fmt->field = V4L2_FIELD_NONE;
1544
1545 mutex_unlock(&sc530ai->mutex);
1546 /* No crop or compose */
1547
1548 return 0;
1549 }
1550 #endif
1551
1552 #define DST_WIDTH 2880
1553 #define DST_HEIGHT 1616
1554
1555 /*
1556 * The resolution of the driver configuration needs to be exactly
1557 * the same as the current output resolution of the sensor,
1558 * the input width of the isp needs to be 16 aligned,
1559 * the input height of the isp needs to be 8 aligned.
1560 * Can be cropped to standard resolution by this function,
1561 * otherwise it will crop out strange resolution according
1562 * to the alignment rules.
1563 */
sc530ai_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1564 static int sc530ai_get_selection(struct v4l2_subdev *sd,
1565 struct v4l2_subdev_pad_config *cfg,
1566 struct v4l2_subdev_selection *sel)
1567 {
1568 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) {
1569 sel->r.left = 0;
1570 sel->r.width = DST_WIDTH;
1571 sel->r.top = 2;
1572 sel->r.height = DST_HEIGHT;
1573 return 0;
1574 }
1575 return -EINVAL;
1576 }
1577
sc530ai_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1578 static int sc530ai_enum_frame_interval(struct v4l2_subdev *sd,
1579 struct v4l2_subdev_pad_config *cfg,
1580 struct v4l2_subdev_frame_interval_enum *fie)
1581 {
1582 struct sc530ai *sc530ai = to_sc530ai(sd);
1583
1584 if (fie->index >= sc530ai->support_modes_num)
1585 return -EINVAL;
1586
1587 fie->code = sc530ai->support_modes[fie->index].bus_fmt;
1588 fie->width = sc530ai->support_modes[fie->index].width;
1589 fie->height = sc530ai->support_modes[fie->index].height;
1590 fie->interval = sc530ai->support_modes[fie->index].max_fps;
1591 fie->reserved[0] = sc530ai->support_modes[fie->index].hdr_mode;
1592 return 0;
1593 }
1594
1595 static const struct dev_pm_ops sc530ai_pm_ops = {
1596 SET_RUNTIME_PM_OPS(sc530ai_runtime_suspend,
1597 sc530ai_runtime_resume, NULL)
1598 };
1599
1600 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1601 static const struct v4l2_subdev_internal_ops sc530ai_internal_ops = {
1602 .open = sc530ai_open,
1603 };
1604 #endif
1605
1606 static const struct v4l2_subdev_core_ops sc530ai_core_ops = {
1607 .s_power = sc530ai_s_power,
1608 .ioctl = sc530ai_ioctl,
1609 #ifdef CONFIG_COMPAT
1610 .compat_ioctl32 = sc530ai_compat_ioctl32,
1611 #endif
1612 };
1613
1614 static const struct v4l2_subdev_video_ops sc530ai_video_ops = {
1615 .s_stream = sc530ai_s_stream,
1616 .g_frame_interval = sc530ai_g_frame_interval,
1617 };
1618
1619 static const struct v4l2_subdev_pad_ops sc530ai_pad_ops = {
1620 .enum_mbus_code = sc530ai_enum_mbus_code,
1621 .enum_frame_size = sc530ai_enum_frame_sizes,
1622 .enum_frame_interval = sc530ai_enum_frame_interval,
1623 .get_fmt = sc530ai_get_fmt,
1624 .set_fmt = sc530ai_set_fmt,
1625 .get_selection = sc530ai_get_selection,
1626 .get_mbus_config = sc530ai_g_mbus_config,
1627 };
1628
1629 static const struct v4l2_subdev_ops sc530ai_subdev_ops = {
1630 .core = &sc530ai_core_ops,
1631 .video = &sc530ai_video_ops,
1632 .pad = &sc530ai_pad_ops,
1633 };
1634
sc530ai_modify_fps_info(struct sc530ai * sc5330ai)1635 static void sc530ai_modify_fps_info(struct sc530ai *sc5330ai)
1636 {
1637 const struct sc530ai_mode *mode = sc5330ai->cur_mode;
1638
1639 sc5330ai->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
1640 sc5330ai->cur_vts;
1641 }
1642
sc530ai_set_ctrl(struct v4l2_ctrl * ctrl)1643 static int sc530ai_set_ctrl(struct v4l2_ctrl *ctrl)
1644 {
1645 struct sc530ai *sc530ai = container_of(ctrl->handler,
1646 struct sc530ai, ctrl_handler);
1647 struct i2c_client *client = sc530ai->client;
1648 s64 max;
1649 u32 again = 0, dgain = 0, dgain_fine = 0;
1650 int ret = 0;
1651 u32 val = 0, vts = 0;
1652
1653 /* Propagate change of current control to all related controls */
1654 switch (ctrl->id) {
1655 case V4L2_CID_VBLANK:
1656 /* Update max exposure while meeting expected vblanking */
1657 max = sc530ai->cur_mode->height + ctrl->val - 5;
1658 __v4l2_ctrl_modify_range(sc530ai->exposure,
1659 sc530ai->exposure->minimum, max,
1660 sc530ai->exposure->step,
1661 sc530ai->exposure->default_value);
1662 break;
1663 }
1664
1665 if (!pm_runtime_get_if_in_use(&client->dev))
1666 return 0;
1667
1668 switch (ctrl->id) {
1669 case V4L2_CID_EXPOSURE:
1670 if (sc530ai->cur_mode->hdr_mode != NO_HDR)
1671 goto ctrl_end;
1672 val = ctrl->val << 1;
1673 ret = sc530ai_write_reg(sc530ai->client,
1674 SC530AI_REG_EXPOSURE_H,
1675 SC530AI_REG_VALUE_08BIT,
1676 SC530AI_FETCH_EXP_H(val));
1677 ret |= sc530ai_write_reg(sc530ai->client,
1678 SC530AI_REG_EXPOSURE_M,
1679 SC530AI_REG_VALUE_08BIT,
1680 SC530AI_FETCH_EXP_M(val));
1681 ret |= sc530ai_write_reg(sc530ai->client,
1682 SC530AI_REG_EXPOSURE_L,
1683 SC530AI_REG_VALUE_08BIT,
1684 SC530AI_FETCH_EXP_L(val));
1685
1686 dev_dbg(&client->dev, "set exposure 0x%x\n", val);
1687 break;
1688 case V4L2_CID_ANALOGUE_GAIN:
1689 if (sc530ai->cur_mode->hdr_mode != NO_HDR)
1690 goto ctrl_end;
1691
1692 sc530ai_get_gain_reg(ctrl->val, &again, &dgain, &dgain_fine);
1693 ret = sc530ai_write_reg(sc530ai->client,
1694 SC530AI_REG_DIG_GAIN,
1695 SC530AI_REG_VALUE_08BIT,
1696 dgain);
1697 ret |= sc530ai_write_reg(sc530ai->client,
1698 SC530AI_REG_DIG_FINE_GAIN,
1699 SC530AI_REG_VALUE_08BIT,
1700 dgain_fine);
1701 ret |= sc530ai_write_reg(sc530ai->client,
1702 SC530AI_REG_ANA_GAIN,
1703 SC530AI_REG_VALUE_08BIT,
1704 again);
1705 dev_dbg(&client->dev, "set gain 0x%x\n", ctrl->val);
1706 break;
1707 case V4L2_CID_VBLANK:
1708 vts = ctrl->val + sc530ai->cur_mode->height;
1709 ret = sc530ai_write_reg(sc530ai->client,
1710 SC530AI_REG_VTS_H,
1711 SC530AI_REG_VALUE_08BIT,
1712 (vts >> 8) & 0x7f);
1713 ret |= sc530ai_write_reg(sc530ai->client,
1714 SC530AI_REG_VTS_L,
1715 SC530AI_REG_VALUE_08BIT,
1716 vts & 0xff);
1717 if (!ret)
1718 sc530ai->cur_vts = vts;
1719 sc530ai_modify_fps_info(sc530ai);
1720 dev_dbg(&client->dev, "set vblank 0x%x\n", ctrl->val);
1721 break;
1722 case V4L2_CID_HFLIP:
1723 ret = sc530ai_read_reg(sc530ai->client, SC530AI_FLIP_MIRROR_REG,
1724 SC530AI_REG_VALUE_08BIT, &val);
1725 if (ret)
1726 break;
1727
1728 if (ctrl->val)
1729 val |= SC530AI_MIRROR_MASK;
1730 else
1731 val &= ~SC530AI_MIRROR_MASK;
1732 ret |= sc530ai_write_reg(sc530ai->client,
1733 SC530AI_FLIP_MIRROR_REG,
1734 SC530AI_REG_VALUE_08BIT, val);
1735 break;
1736 case V4L2_CID_VFLIP:
1737 ret = sc530ai_read_reg(sc530ai->client,
1738 SC530AI_FLIP_MIRROR_REG,
1739 SC530AI_REG_VALUE_08BIT, &val);
1740 if (ret)
1741 break;
1742
1743 if (ctrl->val)
1744 val |= SC530AI_FLIP_MASK;
1745 else
1746 val &= ~SC530AI_FLIP_MASK;
1747 ret |= sc530ai_write_reg(sc530ai->client,
1748 SC530AI_FLIP_MIRROR_REG,
1749 SC530AI_REG_VALUE_08BIT,
1750 val);
1751 break;
1752 default:
1753 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1754 __func__, ctrl->id, ctrl->val);
1755 break;
1756 }
1757
1758 ctrl_end:
1759 pm_runtime_put(&client->dev);
1760
1761 return ret;
1762 }
1763
1764 static const struct v4l2_ctrl_ops sc530ai_ctrl_ops = {
1765 .s_ctrl = sc530ai_set_ctrl,
1766 };
1767
sc530ai_parse_of(struct sc530ai * sc530ai)1768 static int sc530ai_parse_of(struct sc530ai *sc530ai)
1769 {
1770 struct device *dev = &sc530ai->client->dev;
1771 struct device_node *endpoint;
1772 struct fwnode_handle *fwnode;
1773 int rval;
1774
1775 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1776 if (!endpoint) {
1777 dev_err(dev, "Failed to get endpoint\n");
1778 return -EINVAL;
1779 }
1780 fwnode = of_fwnode_handle(endpoint);
1781 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1782 if (rval <= 0) {
1783 dev_err(dev, " Get mipi lane num failed!\n");
1784 return -EINVAL;
1785 }
1786
1787 sc530ai->lane_num = rval;
1788 dev_info(dev, "lane_num = %d\n", sc530ai->lane_num);
1789
1790 if (sc530ai->lane_num == 2) {
1791 sc530ai->support_modes = supported_modes_2lane;
1792 sc530ai->support_modes_num = ARRAY_SIZE(supported_modes_2lane);
1793 } else if (sc530ai->lane_num == 4) {
1794 sc530ai->support_modes = supported_modes_4lane;
1795 sc530ai->support_modes_num = ARRAY_SIZE(supported_modes_4lane);
1796 }
1797
1798 sc530ai->cur_mode = &sc530ai->support_modes[0];
1799
1800 return 0;
1801 }
1802
sc530ai_initialize_controls(struct sc530ai * sc530ai)1803 static int sc530ai_initialize_controls(struct sc530ai *sc530ai)
1804 {
1805 const struct sc530ai_mode *mode;
1806 struct v4l2_ctrl_handler *handler;
1807 s64 exposure_max, vblank_def;
1808 u64 dst_pixel_rate = 0;
1809 u32 h_blank;
1810 int ret;
1811
1812 handler = &sc530ai->ctrl_handler;
1813 mode = sc530ai->cur_mode;
1814 ret = v4l2_ctrl_handler_init(handler, 8);
1815 if (ret)
1816 return ret;
1817 handler->lock = &sc530ai->mutex;
1818
1819 sc530ai->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
1820 V4L2_CID_LINK_FREQ,
1821 ARRAY_SIZE(link_freq_items) - 1, 0,
1822 link_freq_items);
1823 __v4l2_ctrl_s_ctrl(sc530ai->link_freq, mode->mipi_freq_idx);
1824
1825 if (mode->mipi_freq_idx == 0)
1826 dst_pixel_rate = SC530AI_LINEAR_PIXEL_RATES;
1827 else if (mode->mipi_freq_idx == 1)
1828 dst_pixel_rate = SC530AI_HDR_PIXEL_RATES;
1829 else if (mode->mipi_freq_idx == 2)
1830 dst_pixel_rate = SC530AI_LINEAR_PIXEL_RATES_2LAN;
1831
1832 sc530ai->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
1833 V4L2_CID_PIXEL_RATE, 0,
1834 SC530AI_MAX_PIXEL_RATE,
1835 1, dst_pixel_rate);
1836
1837 h_blank = mode->hts_def - mode->width;
1838 sc530ai->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1839 h_blank, h_blank, 1, h_blank);
1840 if (sc530ai->hblank)
1841 sc530ai->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1842
1843 vblank_def = mode->vts_def - mode->height;
1844 sc530ai->vblank = v4l2_ctrl_new_std(handler, &sc530ai_ctrl_ops,
1845 V4L2_CID_VBLANK, vblank_def,
1846 SC530AI_VTS_MAX - mode->height,
1847 1, vblank_def);
1848
1849 exposure_max = mode->vts_def - 5;
1850 sc530ai->exposure = v4l2_ctrl_new_std(handler, &sc530ai_ctrl_ops,
1851 V4L2_CID_EXPOSURE,
1852 SC530AI_EXPOSURE_MIN,
1853 exposure_max,
1854 SC530AI_EXPOSURE_STEP,
1855 mode->exp_def);
1856
1857 sc530ai->anal_gain = v4l2_ctrl_new_std(handler, &sc530ai_ctrl_ops,
1858 V4L2_CID_ANALOGUE_GAIN,
1859 SC530AI_GAIN_MIN,
1860 SC530AI_GAIN_MAX,
1861 SC530AI_GAIN_STEP,
1862 SC530AI_GAIN_DEFAULT);
1863
1864 v4l2_ctrl_new_std(handler, &sc530ai_ctrl_ops,
1865 V4L2_CID_HFLIP, 0, 1, 1, 0);
1866
1867 v4l2_ctrl_new_std(handler, &sc530ai_ctrl_ops,
1868 V4L2_CID_VFLIP, 0, 1, 1, 0);
1869
1870 if (handler->error) {
1871 ret = handler->error;
1872 dev_err(&sc530ai->client->dev,
1873 "Failed to init controls(%d)\n", ret);
1874 goto err_free_handler;
1875 }
1876 sc530ai->subdev.ctrl_handler = handler;
1877 sc530ai->has_init_exp = false;
1878 sc530ai->cur_vts = mode->vts_def;
1879 sc530ai->cur_fps = mode->max_fps;
1880
1881 return 0;
1882
1883 err_free_handler:
1884 v4l2_ctrl_handler_free(handler);
1885 return ret;
1886 }
1887
sc530ai_check_sensor_id(struct sc530ai * sc530ai,struct i2c_client * client)1888 static int sc530ai_check_sensor_id(struct sc530ai *sc530ai,
1889 struct i2c_client *client)
1890 {
1891 struct device *dev = &sc530ai->client->dev;
1892 u32 id = 0;
1893 int ret;
1894
1895 ret = sc530ai_read_reg(client, SC530AI_REG_CHIP_ID,
1896 SC530AI_REG_VALUE_16BIT, &id);
1897 if (id != SC530AI_CHIP_ID) {
1898 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1899 return -ENODEV;
1900 }
1901
1902 dev_info(dev, "Detected SC%06x sensor\n", SC530AI_CHIP_ID);
1903
1904 return 0;
1905 }
1906
sc530ai_configure_regulators(struct sc530ai * sc530ai)1907 static int sc530ai_configure_regulators(struct sc530ai *sc530ai)
1908 {
1909 unsigned int i;
1910
1911 for (i = 0; i < sc530ai_NUM_SUPPLIES; i++)
1912 sc530ai->supplies[i].supply = sc530ai_supply_names[i];
1913
1914 return devm_regulator_bulk_get(&sc530ai->client->dev,
1915 sc530ai_NUM_SUPPLIES,
1916 sc530ai->supplies);
1917 }
1918
sc530ai_probe(struct i2c_client * client,const struct i2c_device_id * id)1919 static int sc530ai_probe(struct i2c_client *client,
1920 const struct i2c_device_id *id)
1921 {
1922 struct device *dev = &client->dev;
1923 struct device_node *node = dev->of_node;
1924 struct sc530ai *sc530ai;
1925 struct v4l2_subdev *sd;
1926 char facing[2];
1927 int ret;
1928 u32 hdr_mode = 0;
1929
1930 dev_info(dev, "driver version: %02x.%02x.%02x",
1931 DRIVER_VERSION >> 16,
1932 (DRIVER_VERSION & 0xff00) >> 8,
1933 DRIVER_VERSION & 0x00ff);
1934
1935 sc530ai = devm_kzalloc(dev, sizeof(*sc530ai), GFP_KERNEL);
1936 if (!sc530ai)
1937 return -ENOMEM;
1938
1939 of_property_read_u32(node, OF_CAMERA_HDR_MODE, &hdr_mode);
1940 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1941 &sc530ai->module_index);
1942 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1943 &sc530ai->module_facing);
1944 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1945 &sc530ai->module_name);
1946 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1947 &sc530ai->len_name);
1948 if (ret) {
1949 dev_err(dev, "could not get module information!\n");
1950 return -EINVAL;
1951 }
1952
1953 sc530ai->client = client;
1954
1955 ret = sc530ai_parse_of(sc530ai);
1956 if (ret)
1957 return -EINVAL;
1958
1959 sc530ai->xvclk = devm_clk_get(dev, "xvclk");
1960 if (IS_ERR(sc530ai->xvclk)) {
1961 dev_err(dev, "Failed to get xvclk\n");
1962 return -EINVAL;
1963 }
1964
1965 sc530ai->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1966 if (IS_ERR(sc530ai->reset_gpio))
1967 dev_warn(dev, "Failed to get reset-gpios\n");
1968
1969 sc530ai->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1970 if (IS_ERR(sc530ai->pwdn_gpio))
1971 dev_warn(dev, "Failed to get pwdn-gpios\n");
1972
1973 sc530ai->pinctrl = devm_pinctrl_get(dev);
1974 if (!IS_ERR(sc530ai->pinctrl)) {
1975 sc530ai->pins_default =
1976 pinctrl_lookup_state(sc530ai->pinctrl,
1977 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1978 if (IS_ERR(sc530ai->pins_default))
1979 dev_err(dev, "could not get default pinstate\n");
1980
1981 sc530ai->pins_sleep =
1982 pinctrl_lookup_state(sc530ai->pinctrl,
1983 OF_CAMERA_PINCTRL_STATE_SLEEP);
1984 if (IS_ERR(sc530ai->pins_sleep))
1985 dev_err(dev, "could not get sleep pinstate\n");
1986 } else {
1987 dev_err(dev, "no pinctrl\n");
1988 }
1989
1990 ret = sc530ai_configure_regulators(sc530ai);
1991 if (ret) {
1992 dev_err(dev, "Failed to get power regulators\n");
1993 return ret;
1994 }
1995
1996 mutex_init(&sc530ai->mutex);
1997
1998 sd = &sc530ai->subdev;
1999 v4l2_i2c_subdev_init(sd, client, &sc530ai_subdev_ops);
2000 ret = sc530ai_initialize_controls(sc530ai);
2001 if (ret)
2002 goto err_destroy_mutex;
2003
2004 ret = __sc530ai_power_on(sc530ai);
2005 if (ret)
2006 goto err_free_handler;
2007
2008 ret = sc530ai_check_sensor_id(sc530ai, client);
2009 if (ret)
2010 goto err_power_off;
2011
2012 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
2013 sd->internal_ops = &sc530ai_internal_ops;
2014 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2015 V4L2_SUBDEV_FL_HAS_EVENTS;
2016 #endif
2017 #if defined(CONFIG_MEDIA_CONTROLLER)
2018 sc530ai->pad.flags = MEDIA_PAD_FL_SOURCE;
2019 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
2020 ret = media_entity_pads_init(&sd->entity, 1, &sc530ai->pad);
2021 if (ret < 0)
2022 goto err_power_off;
2023 #endif
2024
2025 memset(facing, 0, sizeof(facing));
2026 if (strcmp(sc530ai->module_facing, "back") == 0)
2027 facing[0] = 'b';
2028 else
2029 facing[0] = 'f';
2030
2031 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
2032 sc530ai->module_index, facing,
2033 SC530AI_NAME, dev_name(sd->dev));
2034 ret = v4l2_async_register_subdev_sensor_common(sd);
2035 if (ret) {
2036 dev_err(&sc530ai->client->dev,
2037 "v4l2 async register subdev failed\n");
2038 goto err_clean_entity;
2039 }
2040
2041 pm_runtime_set_active(dev);
2042 pm_runtime_enable(dev);
2043 pm_runtime_idle(dev);
2044
2045 return 0;
2046
2047 err_clean_entity:
2048 #if defined(CONFIG_MEDIA_CONTROLLER)
2049 media_entity_cleanup(&sd->entity);
2050 #endif
2051 err_power_off:
2052 __sc530ai_power_off(sc530ai);
2053 err_free_handler:
2054 v4l2_ctrl_handler_free(&sc530ai->ctrl_handler);
2055 err_destroy_mutex:
2056 mutex_destroy(&sc530ai->mutex);
2057
2058 return ret;
2059 }
2060
sc530ai_remove(struct i2c_client * client)2061 static int sc530ai_remove(struct i2c_client *client)
2062 {
2063 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2064 struct sc530ai *sc530ai = to_sc530ai(sd);
2065
2066 v4l2_async_unregister_subdev(sd);
2067 #if defined(CONFIG_MEDIA_CONTROLLER)
2068 media_entity_cleanup(&sd->entity);
2069 #endif
2070 v4l2_ctrl_handler_free(&sc530ai->ctrl_handler);
2071 mutex_destroy(&sc530ai->mutex);
2072
2073 pm_runtime_disable(&client->dev);
2074 if (!pm_runtime_status_suspended(&client->dev))
2075 __sc530ai_power_off(sc530ai);
2076 pm_runtime_set_suspended(&client->dev);
2077
2078 return 0;
2079 }
2080
2081 #if IS_ENABLED(CONFIG_OF)
2082 static const struct of_device_id sc530ai_of_match[] = {
2083 { .compatible = "smartsens,sc530ai" },
2084 { },
2085 };
2086 MODULE_DEVICE_TABLE(of, sc530ai_of_match);
2087 #endif
2088
2089 static const struct i2c_device_id sc530ai_match_id[] = {
2090 { "smartsens,sc530ai", 0 },
2091 { },
2092 };
2093
2094 static struct i2c_driver sc530ai_i2c_driver = {
2095 .driver = {
2096 .name = SC530AI_NAME,
2097 .pm = &sc530ai_pm_ops,
2098 .of_match_table = of_match_ptr(sc530ai_of_match),
2099 },
2100 .probe = &sc530ai_probe,
2101 .remove = &sc530ai_remove,
2102 .id_table = sc530ai_match_id,
2103 };
2104
sensor_mod_init(void)2105 static int __init sensor_mod_init(void)
2106 {
2107 return i2c_add_driver(&sc530ai_i2c_driver);
2108 }
2109
sensor_mod_exit(void)2110 static void __exit sensor_mod_exit(void)
2111 {
2112 i2c_del_driver(&sc530ai_i2c_driver);
2113 }
2114
2115 device_initcall_sync(sensor_mod_init);
2116 module_exit(sensor_mod_exit);
2117
2118 MODULE_DESCRIPTION("smartsens sc530ai sensor driver");
2119 MODULE_LICENSE("GPL v2");
2120