1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * sc500ai driver
4 *
5 * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X00 first version.
8 * V0.0X01.0X01 fix set vflip/hflip failed bug.
9 */
10
11 #include <linux/clk.h>
12 #include <linux/device.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/sysfs.h>
20 #include <linux/slab.h>
21 #include <linux/version.h>
22 #include <linux/rk-camera-module.h>
23 #include <linux/rk-preisp.h>
24 #include <media/media-entity.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-subdev.h>
28 #include <linux/pinctrl/consumer.h>
29
30 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
31
32 #ifndef V4L2_CID_DIGITAL_GAIN
33 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
34 #endif
35
36 #define SC500AI_LANES 4
37
38 #define SC500AI_LINK_FREQ_198M 198000000 // 396Mbps
39 #define SC500AI_LINK_FREQ_405M 405000000 // 810Mbps
40
41 #define SC500AI_MAX_PIXEL_RATE (SC500AI_LINK_FREQ_405M / 10 * 2 * SC500AI_LANES)
42
43 #define SC500AI_XVCLK_FREQ 24000000
44
45 #define SC500AI_CHIP_ID 0xce1f
46 #define SC500AI_REG_CHIP_ID 0x3107
47
48 #define SC500AI_REG_CTRL_MODE 0x0100
49 #define SC500AI_MODE_SW_STANDBY 0x0
50 #define SC500AI_MODE_STREAMING BIT(0)
51
52 #define SC500AI_REG_EXPOSURE_H 0x3e00
53 #define SC500AI_REG_EXPOSURE_M 0x3e01
54 #define SC500AI_REG_EXPOSURE_L 0x3e02
55
56 #define SC500AI_EXPOSURE_MIN 2
57 #define sc500ai_EXPOSURE_STEP 1
58
59 #define SC500AI_REG_DIG_GAIN 0x3e06
60 #define SC500AI_REG_DIG_FINE_GAIN 0x3e07
61 #define SC500AI_REG_ANA_GAIN 0x3e08
62 #define SC500AI_REG_ANA_FINE_GAIN 0x3e09
63
64 #define SC500AI_GAIN_MIN 0x40
65 #define SC500AI_GAIN_MAX 0xc000
66 #define SC500AI_GAIN_STEP 1
67 #define SC500AI_GAIN_DEFAULT 0x40
68
69 #define SC500AI_REG_VTS_H 0x320e
70 #define SC500AI_REG_VTS_L 0x320f
71 #define SC500AI_VTS_MAX 0x7fff
72
73 #define SC500AI_SOFTWARE_RESET_REG 0x0103
74
75 // short frame exposure
76 #define SC500AI_REG_SHORT_EXPOSURE_H 0x3e22
77 #define SC500AI_REG_SHORT_EXPOSURE_M 0x3e04
78 #define SC500AI_REG_SHORT_EXPOSURE_L 0x3e05
79 #define SC500AI_REG_MAX_SHORT_EXP_H 0x3e23
80 #define SC500AI_REG_MAX_SHORT_EXP_L 0x3e24
81
82 #define SC500AI_HDR_EXPOSURE_MIN 5 // Half line exposure time
83 #define SC500AI_HDR_EXPOSURE_STEP 4 // Half line exposure time
84
85 #define SC500AI_MAX_SHORT_EXPOSURE 608
86
87 // short frame gain
88 #define SC500AI_REG_SDIG_GAIN 0x3e10
89 #define SC500AI_REG_SDIG_FINE_GAIN 0x3e11
90 #define SC500AI_REG_SANA_GAIN 0x3e12
91 #define SC500AI_REG_SANA_FINE_GAIN 0x3e13
92
93 //group hold
94 #define SC500AI_GROUP_UPDATE_ADDRESS 0x3812
95 #define SC500AI_GROUP_UPDATE_START_DATA 0x00
96 #define SC500AI_GROUP_UPDATE_LAUNCH 0x30
97
98 #define SC500AI_FLIP_MIRROR_REG 0x3221
99 #define SC500AI_FLIP_MASK 0x60
100 #define SC500AI_MIRROR_MASK 0x06
101
102 #define REG_NULL 0xFFFF
103
104 #define SC500AI_REG_VALUE_08BIT 1
105 #define SC500AI_REG_VALUE_16BIT 2
106 #define SC500AI_REG_VALUE_24BIT 3
107
108 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
109 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
110 #define OF_CAMERA_HDR_MODE "rockchip,camera-hdr-mode"
111
112 #define SC500AI_NAME "sc500ai"
113
114 #define SC500AI_FETCH_EXP_H(VAL) (((VAL) >> 12) & 0xF)
115 #define SC500AI_FETCH_EXP_M(VAL) (((VAL) >> 4) & 0xFF)
116 #define SC500AI_FETCH_EXP_L(VAL) (((VAL) & 0xF) << 4)
117
118 static const char * const sc500ai_supply_names[] = {
119 "avdd", /* Analog power */
120 "dovdd", /* Digital I/O power */
121 "dvdd", /* Digital core power */
122 };
123
124 #define sc500ai_NUM_SUPPLIES ARRAY_SIZE(sc500ai_supply_names)
125
126 struct regval {
127 u16 addr;
128 u8 val;
129 };
130
131 struct sc500ai_mode {
132 u32 bus_fmt;
133 u32 width;
134 u32 height;
135 struct v4l2_fract max_fps;
136 u32 hts_def;
137 u32 vts_def;
138 u32 exp_def;
139 u32 mipi_freq_idx;
140 u32 bpp;
141 const struct regval *reg_list;
142 u32 hdr_mode;
143 u32 vc[PAD_MAX];
144 };
145
146 struct sc500ai {
147 struct i2c_client *client;
148 struct clk *xvclk;
149 struct gpio_desc *reset_gpio;
150 struct gpio_desc *pwdn_gpio;
151 struct regulator_bulk_data supplies[sc500ai_NUM_SUPPLIES];
152
153 struct pinctrl *pinctrl;
154 struct pinctrl_state *pins_default;
155 struct pinctrl_state *pins_sleep;
156
157 struct v4l2_subdev subdev;
158 struct media_pad pad;
159 struct v4l2_ctrl_handler ctrl_handler;
160 struct v4l2_ctrl *exposure;
161 struct v4l2_ctrl *anal_gain;
162 struct v4l2_ctrl *digi_gain;
163 struct v4l2_ctrl *hblank;
164 struct v4l2_ctrl *vblank;
165 struct v4l2_ctrl *pixel_rate;
166 struct v4l2_ctrl *link_freq;
167 struct mutex mutex;
168 struct v4l2_fract cur_fps;
169 bool streaming;
170 bool power_on;
171 const struct sc500ai_mode *cur_mode;
172 u32 module_index;
173 const char *module_facing;
174 const char *module_name;
175 const char *len_name;
176 bool has_init_exp;
177 struct preisp_hdrae_exp_s init_hdrae_exp;
178 u32 cur_vts;
179 };
180
181 #define to_sc500ai(sd) container_of(sd, struct sc500ai, subdev)
182
183 /*
184 * Xclk 24Mhz
185 * max_framerate 30fps
186 * mipi_datarate per lane 1008Mbps, 4lane
187 */
188 static const struct regval sc500ai_linear_10_2880x1620_regs[] = {
189 {0x0103, 0x01},
190 {0x0100, 0x00},
191 {0x36e9, 0x80},
192 {0x36f9, 0x80},
193 {0x301f, 0x3c},
194 {0x3250, 0x40},
195 {0x3253, 0x0a},
196 {0x3301, 0x0a},
197 {0x3302, 0x18},
198 {0x3303, 0x10},
199 {0x3304, 0x60},
200 {0x3306, 0x60},
201 {0x3308, 0x10},
202 {0x3309, 0x70},
203 {0x330a, 0x00},
204 {0x330b, 0xf0},
205 {0x330d, 0x18},
206 {0x330e, 0x20},
207 {0x330f, 0x02},
208 {0x3310, 0x02},
209 {0x331c, 0x04},
210 {0x331e, 0x51},
211 {0x331f, 0x61},
212 {0x3320, 0x09},
213 {0x3333, 0x10},
214 {0x334c, 0x08},
215 {0x3356, 0x09},
216 {0x3364, 0x17},
217 {0x336d, 0x03},
218 {0x3390, 0x08},
219 {0x3391, 0x18},
220 {0x3392, 0x38},
221 {0x3393, 0x0a},
222 {0x3394, 0x20},
223 {0x3395, 0x20},
224 {0x3396, 0x08},
225 {0x3397, 0x18},
226 {0x3398, 0x38},
227 {0x3399, 0x0a},
228 {0x339a, 0x20},
229 {0x339b, 0x20},
230 {0x339c, 0x20},
231 {0x33ac, 0x10},
232 {0x33ae, 0x10},
233 {0x33af, 0x19},
234 {0x360f, 0x01},
235 {0x3622, 0x03},
236 {0x363a, 0x1f},
237 {0x363c, 0x40},
238 {0x3651, 0x7d},
239 {0x3670, 0x0a},
240 {0x3671, 0x07},
241 {0x3672, 0x17},
242 {0x3673, 0x1e},
243 {0x3674, 0x82},
244 {0x3675, 0x64},
245 {0x3676, 0x66},
246 {0x367a, 0x48},
247 {0x367b, 0x78},
248 {0x367c, 0x58},
249 {0x367d, 0x78},
250 {0x3690, 0x34},
251 {0x3691, 0x34},
252 {0x3692, 0x54},
253 {0x369c, 0x48},
254 {0x369d, 0x78},
255 {0x36ea, 0x35},
256 {0x36eb, 0x0c},
257 {0x36ec, 0x1a},
258 {0x36ed, 0x34},
259 {0x36fa, 0x35},
260 {0x36fb, 0x35},
261 {0x36fc, 0x10},
262 {0x36fd, 0x34},
263 {0x3904, 0x04},
264 {0x3908, 0x41},
265 {0x391d, 0x04},
266 {0x39c2, 0x30},
267 {0x3e01, 0xcd},
268 {0x3e02, 0xa0},
269 {0x3e16, 0x00},
270 {0x3e17, 0x80},
271 {0x4500, 0x88},
272 {0x4509, 0x20},
273 {0x4800, 0x04},
274 {0x5799, 0x00},
275 {0x59e0, 0x60},
276 {0x59e1, 0x08},
277 {0x59e2, 0x3f},
278 {0x59e3, 0x18},
279 {0x59e4, 0x18},
280 {0x59e5, 0x3f},
281 {0x59e7, 0x02},
282 {0x59e8, 0x38},
283 {0x59e9, 0x20},
284 {0x59ea, 0x0c},
285 {0x59ec, 0x08},
286 {0x59ed, 0x02},
287 {0x59ee, 0xa0},
288 {0x59ef, 0x08},
289 {0x59f4, 0x18},
290 {0x59f5, 0x10},
291 {0x59f6, 0x0c},
292 {0x59f9, 0x02},
293 {0x59fa, 0x18},
294 {0x59fb, 0x10},
295 {0x59fc, 0x0c},
296 {0x59ff, 0x02},
297 {0x36e9, 0x20},
298 {0x36f9, 0x53},
299 {REG_NULL, 0x00},
300 };
301
302 static const struct regval sc500ai_hdr_10_2880x1620_regs[] = {
303 {0x0103, 0x01},
304 {0x0100, 0x00},
305 {0x36e9, 0x80},
306 {0x36f9, 0x80},
307 {0x301f, 0x3b},
308 {0x3106, 0x01},
309 {0x320e, 0x0d},
310 {0x320f, 0x30},
311 {0x3220, 0x53},
312 {0x3250, 0xff},
313 {0x3253, 0x0a},
314 {0x3301, 0x0b},
315 {0x3302, 0x20},
316 {0x3303, 0x10},
317 {0x3304, 0x70},
318 {0x3306, 0x50},
319 {0x3308, 0x18},
320 {0x3309, 0x80},
321 {0x330a, 0x00},
322 {0x330b, 0xe8},
323 {0x330d, 0x30},
324 {0x330e, 0x30},
325 {0x330f, 0x02},
326 {0x3310, 0x02},
327 {0x331c, 0x08},
328 {0x331e, 0x61},
329 {0x331f, 0x71},
330 {0x3320, 0x11},
331 {0x3333, 0x10},
332 {0x334c, 0x10},
333 {0x3356, 0x11},
334 {0x3364, 0x17},
335 {0x336d, 0x03},
336 {0x3390, 0x08},
337 {0x3391, 0x18},
338 {0x3392, 0x38},
339 {0x3393, 0x0a},
340 {0x3394, 0x0a},
341 {0x3395, 0x12},
342 {0x3396, 0x08},
343 {0x3397, 0x18},
344 {0x3398, 0x38},
345 {0x3399, 0x0a},
346 {0x339a, 0x0a},
347 {0x339b, 0x0a},
348 {0x339c, 0x12},
349 {0x33ac, 0x10},
350 {0x33ae, 0x20},
351 {0x33af, 0x21},
352 {0x360f, 0x01},
353 {0x3621, 0xe8},
354 {0x3622, 0x06},
355 {0x3630, 0x82},
356 {0x3633, 0x33},
357 {0x3634, 0x64},
358 {0x3637, 0x50},
359 {0x363a, 0x1f},
360 {0x363c, 0x40},
361 {0x3651, 0x7d},
362 {0x3670, 0x0a},
363 {0x3671, 0x06},
364 {0x3672, 0x16},
365 {0x3673, 0x17},
366 {0x3674, 0x82},
367 {0x3675, 0x62},
368 {0x3676, 0x44},
369 {0x367a, 0x48},
370 {0x367b, 0x78},
371 {0x367c, 0x48},
372 {0x367d, 0x58},
373 {0x3690, 0x34},
374 {0x3691, 0x34},
375 {0x3692, 0x54},
376 {0x369c, 0x48},
377 {0x369d, 0x78},
378 {0x36ea, 0xf1},
379 {0x36eb, 0x04},
380 {0x36ec, 0x0a},
381 {0x36ed, 0x04},
382 {0x36fa, 0xf1},
383 {0x36fb, 0x04},
384 {0x36fc, 0x00},
385 {0x36fd, 0x06},
386 {0x3904, 0x04},
387 {0x3908, 0x41},
388 {0x391f, 0x10},
389 {0x39c2, 0x30},
390 {0x3e00, 0x01},
391 {0x3e01, 0x8c},
392 {0x3e02, 0x00},
393 {0x3e04, 0x18},
394 {0x3e05, 0xc0},
395 {0x3e23, 0x01},
396 {0x3e24, 0x37},
397 {0x4500, 0x88},
398 {0x4509, 0x20},
399 {0x4800, 0x04},
400 {0x4837, 0x14},
401 {0x4853, 0xfd},
402 {0x36e9, 0x53},
403 {0x36f9, 0x53},
404 {REG_NULL, 0x00},
405 };
406
407 static const struct sc500ai_mode supported_modes[] = {
408 {
409 .width = 2880,
410 .height = 1620,
411 .max_fps = {
412 .numerator = 10000,
413 .denominator = 300000,
414 },
415 .exp_def = 0xcda / 2,
416 .hts_def = 0xb40,
417 .vts_def = 0x0672,
418 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
419 .reg_list = sc500ai_linear_10_2880x1620_regs,
420 .mipi_freq_idx = 0,
421 .bpp = 10,
422 .hdr_mode = NO_HDR,
423 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
424 },
425 {
426 .width = 2880,
427 .height = 1620,
428 .max_fps = {
429 .numerator = 10000,
430 .denominator = 300000,
431 },
432 .exp_def = 0x18c0 / 2,
433 .hts_def = 0xb40,
434 .vts_def = 0x0d30,
435 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
436 .reg_list = sc500ai_hdr_10_2880x1620_regs,
437 .mipi_freq_idx = 1,
438 .bpp = 10,
439 .hdr_mode = HDR_X2,
440 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_1,
441 .vc[PAD1] = V4L2_MBUS_CSI2_CHANNEL_0,//L->csi wr0
442 .vc[PAD2] = V4L2_MBUS_CSI2_CHANNEL_1,
443 .vc[PAD3] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr2
444 },
445 };
446
447 static const s64 link_freq_items[] = {
448 SC500AI_LINK_FREQ_198M,
449 SC500AI_LINK_FREQ_405M
450 };
451
452 /* Write registers up to 4 at a time */
sc500ai_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)453 static int sc500ai_write_reg(struct i2c_client *client, u16 reg,
454 u32 len, u32 val)
455 {
456 u32 buf_i, val_i;
457 u8 buf[6];
458 u8 *val_p;
459 __be32 val_be;
460
461 if (len > 4)
462 return -EINVAL;
463
464 buf[0] = reg >> 8;
465 buf[1] = reg & 0xff;
466
467 val_be = cpu_to_be32(val);
468 val_p = (u8 *)&val_be;
469 buf_i = 2;
470 val_i = 4 - len;
471
472 while (val_i < 4)
473 buf[buf_i++] = val_p[val_i++];
474
475 if (i2c_master_send(client, buf, len + 2) != len + 2)
476 return -EIO;
477
478 return 0;
479 }
480
sc500ai_write_array(struct i2c_client * client,const struct regval * regs)481 static int sc500ai_write_array(struct i2c_client *client,
482 const struct regval *regs)
483 {
484 u32 i;
485 int ret = 0;
486
487 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
488 ret = sc500ai_write_reg(client, regs[i].addr,
489 SC500AI_REG_VALUE_08BIT, regs[i].val);
490
491 return ret;
492 }
493
494 /* Read registers up to 4 at a time */
sc500ai_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)495 static int sc500ai_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
496 u32 *val)
497 {
498 struct i2c_msg msgs[2];
499 u8 *data_be_p;
500 __be32 data_be = 0;
501 __be16 reg_addr_be = cpu_to_be16(reg);
502 int ret;
503
504 if (len > 4 || !len)
505 return -EINVAL;
506
507 data_be_p = (u8 *)&data_be;
508 /* Write register address */
509 msgs[0].addr = client->addr;
510 msgs[0].flags = 0;
511 msgs[0].len = 2;
512 msgs[0].buf = (u8 *)®_addr_be;
513
514 /* Read data from register */
515 msgs[1].addr = client->addr;
516 msgs[1].flags = I2C_M_RD;
517 msgs[1].len = len;
518 msgs[1].buf = &data_be_p[4 - len];
519
520 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
521 if (ret != ARRAY_SIZE(msgs))
522 return -EIO;
523
524 *val = be32_to_cpu(data_be);
525
526 return 0;
527 }
528
sc500ai_get_reso_dist(const struct sc500ai_mode * mode,struct v4l2_mbus_framefmt * framefmt)529 static int sc500ai_get_reso_dist(const struct sc500ai_mode *mode,
530 struct v4l2_mbus_framefmt *framefmt)
531 {
532 return abs(mode->width - framefmt->width) +
533 abs(mode->height - framefmt->height);
534 }
535
536 static const struct sc500ai_mode *
sc500ai_find_best_fit(struct v4l2_subdev_format * fmt)537 sc500ai_find_best_fit(struct v4l2_subdev_format *fmt)
538 {
539 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
540 int dist;
541 int cur_best_fit = 0;
542 int cur_best_fit_dist = -1;
543 unsigned int i;
544
545 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
546 dist = sc500ai_get_reso_dist(&supported_modes[i], framefmt);
547 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
548 cur_best_fit_dist = dist;
549 cur_best_fit = i;
550 }
551 }
552
553 return &supported_modes[cur_best_fit];
554 }
555
sc500ai_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)556 static int sc500ai_set_fmt(struct v4l2_subdev *sd,
557 struct v4l2_subdev_pad_config *cfg,
558 struct v4l2_subdev_format *fmt)
559 {
560 struct sc500ai *sc500ai = to_sc500ai(sd);
561 const struct sc500ai_mode *mode;
562 s64 h_blank, vblank_def;
563 u64 pixel_rate = 0;
564
565 mutex_lock(&sc500ai->mutex);
566
567 mode = sc500ai_find_best_fit(fmt);
568 fmt->format.code = mode->bus_fmt;
569 fmt->format.width = mode->width;
570 fmt->format.height = mode->height;
571 fmt->format.field = V4L2_FIELD_NONE;
572 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
573 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
574 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
575 #else
576 mutex_unlock(&sc500ai->mutex);
577 return -ENOTTY;
578 #endif
579 } else {
580 sc500ai->cur_mode = mode;
581
582 h_blank = mode->hts_def - mode->width;
583 __v4l2_ctrl_modify_range(sc500ai->hblank, h_blank,
584 h_blank, 1, h_blank);
585 vblank_def = mode->vts_def - mode->height;
586 __v4l2_ctrl_modify_range(sc500ai->vblank, vblank_def,
587 SC500AI_VTS_MAX - mode->height,
588 1, vblank_def);
589
590 __v4l2_ctrl_s_ctrl(sc500ai->link_freq, mode->mipi_freq_idx);
591 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * SC500AI_LANES;
592 __v4l2_ctrl_s_ctrl_int64(sc500ai->pixel_rate, pixel_rate);
593 sc500ai->cur_fps = mode->max_fps;
594 sc500ai->cur_vts = mode->vts_def;
595 }
596
597 mutex_unlock(&sc500ai->mutex);
598
599 return 0;
600 }
601
sc500ai_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)602 static int sc500ai_get_fmt(struct v4l2_subdev *sd,
603 struct v4l2_subdev_pad_config *cfg,
604 struct v4l2_subdev_format *fmt)
605 {
606 struct sc500ai *sc500ai = to_sc500ai(sd);
607 const struct sc500ai_mode *mode = sc500ai->cur_mode;
608
609 mutex_lock(&sc500ai->mutex);
610 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
611 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
612 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
613 #else
614 mutex_unlock(&sc500ai->mutex);
615 return -ENOTTY;
616 #endif
617 } else {
618 fmt->format.width = mode->width;
619 fmt->format.height = mode->height;
620 fmt->format.code = mode->bus_fmt;
621 fmt->format.field = V4L2_FIELD_NONE;
622 /* format info: width/height/data type/virctual channel */
623 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
624 fmt->reserved[0] = mode->vc[fmt->pad];
625 else
626 fmt->reserved[0] = mode->vc[PAD0];
627 }
628 mutex_unlock(&sc500ai->mutex);
629
630 return 0;
631 }
632
sc500ai_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)633 static int sc500ai_enum_mbus_code(struct v4l2_subdev *sd,
634 struct v4l2_subdev_pad_config *cfg,
635 struct v4l2_subdev_mbus_code_enum *code)
636 {
637 struct sc500ai *sc500ai = to_sc500ai(sd);
638
639 if (code->index != 0)
640 return -EINVAL;
641 code->code = sc500ai->cur_mode->bus_fmt;
642
643 return 0;
644 }
645
sc500ai_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)646 static int sc500ai_enum_frame_sizes(struct v4l2_subdev *sd,
647 struct v4l2_subdev_pad_config *cfg,
648 struct v4l2_subdev_frame_size_enum *fse)
649 {
650 if (fse->index >= ARRAY_SIZE(supported_modes))
651 return -EINVAL;
652
653 if (fse->code != supported_modes[0].bus_fmt)
654 return -EINVAL;
655
656 fse->min_width = supported_modes[fse->index].width;
657 fse->max_width = supported_modes[fse->index].width;
658 fse->max_height = supported_modes[fse->index].height;
659 fse->min_height = supported_modes[fse->index].height;
660
661 return 0;
662 }
663
sc500ai_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)664 static int sc500ai_g_frame_interval(struct v4l2_subdev *sd,
665 struct v4l2_subdev_frame_interval *fi)
666 {
667 struct sc500ai *sc500ai = to_sc500ai(sd);
668 const struct sc500ai_mode *mode = sc500ai->cur_mode;
669
670 if (sc500ai->streaming)
671 fi->interval = sc500ai->cur_fps;
672 else
673 fi->interval = mode->max_fps;
674
675 return 0;
676 }
677
sc500ai_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad,struct v4l2_mbus_config * config)678 static int sc500ai_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
679 struct v4l2_mbus_config *config)
680 {
681 struct sc500ai *sc500ai = to_sc500ai(sd);
682 const struct sc500ai_mode *mode = sc500ai->cur_mode;
683 u32 val = 1 << (SC500AI_LANES - 1) |
684 V4L2_MBUS_CSI2_CHANNEL_0 |
685 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
686
687 if (mode->hdr_mode != NO_HDR)
688 val |= V4L2_MBUS_CSI2_CHANNEL_1;
689 if (mode->hdr_mode == HDR_X3)
690 val |= V4L2_MBUS_CSI2_CHANNEL_2;
691
692 config->type = V4L2_MBUS_CSI2_DPHY;
693 config->flags = val;
694
695 return 0;
696 }
697
sc500ai_get_module_inf(struct sc500ai * sc500ai,struct rkmodule_inf * inf)698 static void sc500ai_get_module_inf(struct sc500ai *sc500ai,
699 struct rkmodule_inf *inf)
700 {
701 memset(inf, 0, sizeof(*inf));
702 strlcpy(inf->base.sensor, SC500AI_NAME, sizeof(inf->base.sensor));
703 strlcpy(inf->base.module, sc500ai->module_name,
704 sizeof(inf->base.module));
705 strlcpy(inf->base.lens, sc500ai->len_name, sizeof(inf->base.lens));
706 }
707
sc500ai_set_hightemp_dpc(struct sc500ai * sc500ai,u32 total_gain)708 static int sc500ai_set_hightemp_dpc(struct sc500ai *sc500ai, u32 total_gain)
709 {
710 int ret = 0;
711 if (total_gain <= 0x500) { // 20x gain
712 ret = sc500ai_write_reg(sc500ai->client, 0x5799, SC500AI_REG_VALUE_08BIT, 0x00);
713 } else if(total_gain >= 0x780) { // 30x gain
714 ret = sc500ai_write_reg(sc500ai->client, 0x5799, SC500AI_REG_VALUE_08BIT, 0x07);
715 }
716 return ret;
717 }
718
sc500ai_get_gain_reg(u32 total_gain,u32 * again,u32 * again_fine,u32 * dgain,u32 * dgain_fine)719 static int sc500ai_get_gain_reg(u32 total_gain, u32* again, u32* again_fine, u32* dgain, u32* dgain_fine)
720 {
721 int ret = 0;
722 u32 step = 0;
723
724 if (total_gain <= 0x60) { /* 1 - 1.5x gain */
725 step = total_gain - 0x40;
726
727 *again = 0x03;
728 *again_fine = step + 0x40;
729 *dgain = 0x00;
730 *dgain_fine = 0x80;
731 } else if (total_gain <= 0xc0) { /* 1.5x - 3x gain */
732 step = (total_gain - 0x60) * 64 / 0x60 - 1;
733
734 *again = 0x23;
735 *again_fine = step + 0x40;
736 *dgain = 0x00;
737 *dgain_fine = 0x80;
738 } else if (total_gain <= 0x180) { /* 3x - 6x gain */
739 step = (total_gain - 0xc0) * 64 / 0xc0 - 1;
740
741 *again = 0x27;
742 *again_fine = step + 0x40;
743 *dgain = 0x00;
744 *dgain_fine = 0x80;
745 } else if (total_gain <= 0x300) { /* 6x - 12x gain */
746 step = (total_gain - 0x180) * 64 / 0x180 - 1;
747
748 *again = 0x2f;
749 *again_fine = step + 0x40;
750 *dgain = 0x00;
751 *dgain_fine = 0x80;
752 } else if (total_gain <= 0x600) { /* 12x - 24x gain */
753 step = (total_gain - 0x300) * 64 / 0x300 - 1;
754
755 *again = 0x3f;
756 *again_fine = step + 0x40;
757 *dgain = 0x00;
758 *dgain_fine = 0x80;
759 } else if (total_gain <= 0xc00) { /* 24x - 48x gain */
760 step = (total_gain - 0x600) * 128 / 0x600 - 1;
761
762 *again = 0x3f;
763 *again_fine = 0x7f;
764 *dgain = 0x00;
765 *dgain_fine = 0x80 + step;
766 } else if (total_gain <= 0x1800) { /* 48x - 96x gain */
767 step = (total_gain - 0xc00) * 128 / 0xc00 - 1;
768
769 *again = 0x3f;
770 *again_fine = 0x7f;
771 *dgain = 0x01;
772 *dgain_fine = 0x80 + step;
773 } else if (total_gain <= 0x3000) { /* 96x - 192x gain */
774 step = (total_gain - 0x1800) * 128 / 0x1800 - 1;
775
776 *again = 0x3f;
777 *again_fine = 0x7f;
778 *dgain = 0x03;
779 *dgain_fine = 0x80 + step;
780 } else if (total_gain <= 0x6000) { /* 192x - 384x gain */
781 step = (total_gain - 0x3000) * 128 / 0x3000 - 1;
782
783 *again = 0x3f;
784 *again_fine = 0x7f;
785 *dgain = 0x07;
786 *dgain_fine = 0x80 + step;
787 } else if (total_gain <= 0xc000) { /* 384x - 768x gain */
788 step = (total_gain - 0x6000) * 128 / 0x6000 - 1;
789
790 *again = 0x3f;
791 *again_fine = 0x7f;
792 *dgain = 0x0f;
793 *dgain_fine = 0x80 + step;
794 }
795 return ret;
796 }
797
sc500ai_set_hdrae(struct sc500ai * sc500ai,struct preisp_hdrae_exp_s * ae)798 static int sc500ai_set_hdrae(struct sc500ai *sc500ai,
799 struct preisp_hdrae_exp_s *ae)
800 {
801 int ret = 0;
802 u32 l_exp_time, m_exp_time, s_exp_time;
803 u32 l_t_gain, m_t_gain, s_t_gain;
804 u32 l_again = 0 , l_again_fine = 0, l_dgain = 0, l_dgain_fine = 0;
805 u32 s_again = 0, s_again_fine = 0, s_dgain = 0, s_dgain_fine = 0;
806
807 if (!sc500ai->has_init_exp && !sc500ai->streaming) {
808 sc500ai->init_hdrae_exp = *ae;
809 sc500ai->has_init_exp = true;
810 dev_dbg(&sc500ai->client->dev, "sc500ai don't stream, record exp for hdr!\n");
811 return ret;
812 }
813 l_exp_time = ae->long_exp_reg;
814 m_exp_time = ae->middle_exp_reg;
815 s_exp_time = ae->short_exp_reg;
816 l_t_gain = ae->long_gain_reg;
817 m_t_gain = ae->middle_gain_reg;
818 s_t_gain = ae->short_gain_reg;
819
820 dev_dbg(&sc500ai->client->dev,
821 "rev exp req: L_exp: 0x%x, M_exp: 0x%x, S_exp: 0x%x, L_tgain: 0x%x, M_tgain: 0x%x, S_tgain: 0x%x\n",
822 l_exp_time, m_exp_time, s_exp_time,
823 l_t_gain, m_t_gain, s_t_gain);
824
825 if (sc500ai->cur_mode->hdr_mode == HDR_X2) {
826 //2 stagger
827 l_t_gain = m_t_gain;
828 l_exp_time = m_exp_time;
829 }
830
831 l_exp_time = l_exp_time << 1;
832 s_exp_time = s_exp_time << 1;
833
834 if (s_t_gain != l_t_gain)
835 dev_err(&sc500ai->client->dev,
836 "line mode: Long and short frame gains must be equal, l_t_gain: 0x%x, s_t_gain: 0x%x\n",
837 l_t_gain, s_t_gain);
838
839 if (s_exp_time > SC500AI_MAX_SHORT_EXPOSURE)
840 dev_err(&sc500ai->client->dev,
841 "set short exp error, s_exp_time: 0x%x, max_short_exp: 0x%x\n",
842 s_exp_time, SC500AI_MAX_SHORT_EXPOSURE);
843
844 // set exposure reg
845 ret |= sc500ai_write_reg(sc500ai->client,
846 SC500AI_REG_EXPOSURE_H,
847 SC500AI_REG_VALUE_08BIT,
848 SC500AI_FETCH_EXP_H(l_exp_time));
849 ret |= sc500ai_write_reg(sc500ai->client,
850 SC500AI_REG_EXPOSURE_M,
851 SC500AI_REG_VALUE_08BIT,
852 SC500AI_FETCH_EXP_M(l_exp_time));
853 ret |= sc500ai_write_reg(sc500ai->client,
854 SC500AI_REG_EXPOSURE_L,
855 SC500AI_REG_VALUE_08BIT,
856 SC500AI_FETCH_EXP_L(l_exp_time));
857 ret |= sc500ai_write_reg(sc500ai->client,
858 SC500AI_REG_SHORT_EXPOSURE_H,
859 SC500AI_REG_VALUE_08BIT,
860 SC500AI_FETCH_EXP_H(s_exp_time));
861 ret |= sc500ai_write_reg(sc500ai->client,
862 SC500AI_REG_SHORT_EXPOSURE_M,
863 SC500AI_REG_VALUE_08BIT,
864 SC500AI_FETCH_EXP_M(s_exp_time));
865 ret |= sc500ai_write_reg(sc500ai->client,
866 SC500AI_REG_SHORT_EXPOSURE_L,
867 SC500AI_REG_VALUE_08BIT,
868 SC500AI_FETCH_EXP_L(s_exp_time));
869
870 // set gain reg
871 sc500ai_get_gain_reg(l_t_gain, &l_again, &l_again_fine, &l_dgain, &l_dgain_fine);
872 sc500ai_get_gain_reg(s_t_gain, &s_again, &s_again_fine, &s_dgain, &s_dgain_fine);
873
874 ret |= sc500ai_write_reg(sc500ai->client,
875 SC500AI_REG_DIG_GAIN,
876 SC500AI_REG_VALUE_08BIT,
877 l_dgain);
878 ret |= sc500ai_write_reg(sc500ai->client,
879 SC500AI_REG_DIG_FINE_GAIN,
880 SC500AI_REG_VALUE_08BIT,
881 l_dgain_fine);
882 ret |= sc500ai_write_reg(sc500ai->client,
883 SC500AI_REG_ANA_GAIN,
884 SC500AI_REG_VALUE_08BIT,
885 l_again);
886 ret |= sc500ai_write_reg(sc500ai->client,
887 SC500AI_REG_ANA_FINE_GAIN,
888 SC500AI_REG_VALUE_08BIT,
889 l_again_fine);
890
891 ret |= sc500ai_write_reg(sc500ai->client,
892 SC500AI_REG_SDIG_GAIN,
893 SC500AI_REG_VALUE_08BIT,
894 s_dgain);
895 ret |= sc500ai_write_reg(sc500ai->client,
896 SC500AI_REG_SDIG_FINE_GAIN,
897 SC500AI_REG_VALUE_08BIT,
898 s_dgain_fine);
899 ret |= sc500ai_write_reg(sc500ai->client,
900 SC500AI_REG_SANA_GAIN,
901 SC500AI_REG_VALUE_08BIT,
902 s_again);
903 ret |= sc500ai_write_reg(sc500ai->client,
904 SC500AI_REG_SANA_FINE_GAIN,
905 SC500AI_REG_VALUE_08BIT,
906 s_again_fine);
907 sc500ai_set_hightemp_dpc(sc500ai, s_t_gain);
908 return ret;
909 }
910
sc500ai_get_channel_info(struct sc500ai * sc500ai,struct rkmodule_channel_info * ch_info)911 static int sc500ai_get_channel_info(struct sc500ai *sc500ai, struct rkmodule_channel_info *ch_info)
912 {
913 if (ch_info->index < PAD0 || ch_info->index >= PAD_MAX)
914 return -EINVAL;
915 ch_info->vc = sc500ai->cur_mode->vc[ch_info->index];
916 ch_info->width = sc500ai->cur_mode->width;
917 ch_info->height = sc500ai->cur_mode->height;
918 ch_info->bus_fmt = sc500ai->cur_mode->bus_fmt;
919 return 0;
920 }
921
sc500ai_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)922 static long sc500ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
923 {
924 struct sc500ai *sc500ai = to_sc500ai(sd);
925 struct rkmodule_hdr_cfg *hdr;
926 const struct sc500ai_mode *mode;
927 struct rkmodule_channel_info *ch_info;
928
929 long ret = 0;
930 u32 i, h, w;
931 u32 stream = 0;
932 u64 pixel_rate = 0;
933
934 switch (cmd) {
935 case RKMODULE_GET_MODULE_INFO:
936 sc500ai_get_module_inf(sc500ai, (struct rkmodule_inf *)arg);
937 break;
938 case RKMODULE_GET_HDR_CFG:
939 hdr = (struct rkmodule_hdr_cfg *)arg;
940 hdr->esp.mode = HDR_NORMAL_VC;
941 hdr->hdr_mode = sc500ai->cur_mode->hdr_mode;
942 break;
943 case RKMODULE_SET_HDR_CFG:
944 hdr = (struct rkmodule_hdr_cfg *)arg;
945 w = sc500ai->cur_mode->width;
946 h = sc500ai->cur_mode->height;
947 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
948 if (w == supported_modes[i].width &&
949 h == supported_modes[i].height &&
950 supported_modes[i].hdr_mode == hdr->hdr_mode) {
951 sc500ai->cur_mode = &supported_modes[i];
952 break;
953 }
954 }
955 if (i == ARRAY_SIZE(supported_modes)) {
956 dev_err(&sc500ai->client->dev,
957 "not find hdr mode:%d %dx%d config\n",
958 hdr->hdr_mode, w, h);
959 ret = -EINVAL;
960 } else {
961 mode = sc500ai->cur_mode;
962 w = sc500ai->cur_mode->hts_def - sc500ai->cur_mode->width;
963 h = sc500ai->cur_mode->vts_def - sc500ai->cur_mode->height;
964 __v4l2_ctrl_modify_range(sc500ai->hblank, w, w, 1, w);
965 __v4l2_ctrl_modify_range(sc500ai->vblank, h,
966 SC500AI_VTS_MAX - sc500ai->cur_mode->height, 1, h);
967
968 __v4l2_ctrl_s_ctrl(sc500ai->link_freq, mode->mipi_freq_idx);
969 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * SC500AI_LANES;
970 __v4l2_ctrl_s_ctrl_int64(sc500ai->pixel_rate, pixel_rate);
971 sc500ai->cur_fps = mode->max_fps;
972 sc500ai->cur_vts = mode->vts_def;
973 dev_info(&sc500ai->client->dev, "sensor mode: %d\n", sc500ai->cur_mode->hdr_mode);
974 }
975 break;
976 case PREISP_CMD_SET_HDRAE_EXP:
977 if (sc500ai->cur_mode->hdr_mode == HDR_X2)
978 ret = sc500ai_set_hdrae(sc500ai, arg);
979 break;
980 case RKMODULE_SET_QUICK_STREAM:
981 stream = *((u32 *)arg);
982 if (stream)
983 ret = sc500ai_write_reg(sc500ai->client, SC500AI_REG_CTRL_MODE,
984 SC500AI_REG_VALUE_08BIT, SC500AI_MODE_STREAMING);
985 else
986 ret = sc500ai_write_reg(sc500ai->client, SC500AI_REG_CTRL_MODE,
987 SC500AI_REG_VALUE_08BIT, SC500AI_MODE_SW_STANDBY);
988 break;
989 case RKMODULE_GET_CHANNEL_INFO:
990 ch_info = (struct rkmodule_channel_info *)arg;
991 ret = sc500ai_get_channel_info(sc500ai, ch_info);
992 break;
993 default:
994 ret = -ENOIOCTLCMD;
995 break;
996 }
997
998 return ret;
999 }
1000
1001 #ifdef CONFIG_COMPAT
sc500ai_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1002 static long sc500ai_compat_ioctl32(struct v4l2_subdev *sd,
1003 unsigned int cmd, unsigned long arg)
1004 {
1005 void __user *up = compat_ptr(arg);
1006 struct rkmodule_inf *inf;
1007 struct rkmodule_hdr_cfg *hdr;
1008 struct preisp_hdrae_exp_s *hdrae;
1009 struct rkmodule_channel_info *ch_info;
1010 long ret = 0;
1011 u32 stream = 0;
1012
1013 switch (cmd) {
1014 case RKMODULE_GET_MODULE_INFO:
1015 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1016 if (!inf) {
1017 ret = -ENOMEM;
1018 return ret;
1019 }
1020
1021 ret = sc500ai_ioctl(sd, cmd, inf);
1022 if (!ret) {
1023 ret = copy_to_user(up, inf, sizeof(*inf));
1024 if (ret)
1025 ret = -EFAULT;
1026 }
1027 kfree(inf);
1028 break;
1029 case RKMODULE_GET_HDR_CFG:
1030 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1031 if (!hdr) {
1032 ret = -ENOMEM;
1033 return ret;
1034 }
1035
1036 ret = sc500ai_ioctl(sd, cmd, hdr);
1037 if (!ret) {
1038 ret = copy_to_user(up, hdr, sizeof(*hdr));
1039 if (ret)
1040 ret = -EFAULT;
1041 }
1042 kfree(hdr);
1043 break;
1044 case RKMODULE_SET_HDR_CFG:
1045 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1046 if (!hdr) {
1047 ret = -ENOMEM;
1048 return ret;
1049 }
1050
1051 if (copy_from_user(hdr, up, sizeof(*hdr)))
1052 return -EFAULT;
1053
1054 ret = sc500ai_ioctl(sd, cmd, hdr);
1055 kfree(hdr);
1056 break;
1057 case PREISP_CMD_SET_HDRAE_EXP:
1058 hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
1059 if (!hdrae) {
1060 ret = -ENOMEM;
1061 return ret;
1062 }
1063
1064 if (copy_from_user(hdrae, up, sizeof(*hdrae)))
1065 return -EFAULT;
1066
1067 ret = sc500ai_ioctl(sd, cmd, hdrae);
1068 kfree(hdrae);
1069 break;
1070 case RKMODULE_SET_QUICK_STREAM:
1071 if (copy_from_user(&stream, up, sizeof(u32)))
1072 return -EFAULT;
1073
1074 ret = sc500ai_ioctl(sd, cmd, &stream);
1075 break;
1076 case RKMODULE_GET_CHANNEL_INFO:
1077 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
1078 if (!ch_info) {
1079 ret = -ENOMEM;
1080 return ret;
1081 }
1082
1083 ret = sc500ai_ioctl(sd, cmd, ch_info);
1084 if (!ret) {
1085 ret = copy_to_user(up, ch_info, sizeof(*ch_info));
1086 if (ret)
1087 ret = -EFAULT;
1088 }
1089 kfree(ch_info);
1090 break;
1091 default:
1092 ret = -ENOIOCTLCMD;
1093 break;
1094 }
1095
1096 return ret;
1097 }
1098 #endif
1099
__sc500ai_start_stream(struct sc500ai * sc500ai)1100 static int __sc500ai_start_stream(struct sc500ai *sc500ai)
1101 {
1102 int ret;
1103
1104 ret = sc500ai_write_array(sc500ai->client, sc500ai->cur_mode->reg_list);
1105 if (ret)
1106 return ret;
1107
1108 /* In case these controls are set before streaming */
1109 ret = __v4l2_ctrl_handler_setup(&sc500ai->ctrl_handler);
1110 if (ret)
1111 return ret;
1112 if (sc500ai->has_init_exp && sc500ai->cur_mode->hdr_mode != NO_HDR) {
1113 ret = sc500ai_ioctl(&sc500ai->subdev, PREISP_CMD_SET_HDRAE_EXP,
1114 &sc500ai->init_hdrae_exp);
1115 if (ret) {
1116 dev_err(&sc500ai->client->dev,
1117 "init exp fail in hdr mode\n");
1118 return ret;
1119 }
1120 }
1121
1122 return sc500ai_write_reg(sc500ai->client, SC500AI_REG_CTRL_MODE,
1123 SC500AI_REG_VALUE_08BIT, SC500AI_MODE_STREAMING);
1124 }
1125
__sc500ai_stop_stream(struct sc500ai * sc500ai)1126 static int __sc500ai_stop_stream(struct sc500ai *sc500ai)
1127 {
1128 sc500ai->has_init_exp = false;
1129 return sc500ai_write_reg(sc500ai->client, SC500AI_REG_CTRL_MODE,
1130 SC500AI_REG_VALUE_08BIT, SC500AI_MODE_SW_STANDBY);
1131 }
1132
sc500ai_s_stream(struct v4l2_subdev * sd,int on)1133 static int sc500ai_s_stream(struct v4l2_subdev *sd, int on)
1134 {
1135 struct sc500ai *sc500ai = to_sc500ai(sd);
1136 struct i2c_client *client = sc500ai->client;
1137 int ret = 0;
1138
1139 mutex_lock(&sc500ai->mutex);
1140 on = !!on;
1141 if (on == sc500ai->streaming)
1142 goto unlock_and_return;
1143
1144 if (on) {
1145 ret = pm_runtime_get_sync(&client->dev);
1146 if (ret < 0) {
1147 pm_runtime_put_noidle(&client->dev);
1148 goto unlock_and_return;
1149 }
1150
1151 ret = __sc500ai_start_stream(sc500ai);
1152 if (ret) {
1153 v4l2_err(sd, "start stream failed while write regs\n");
1154 pm_runtime_put(&client->dev);
1155 goto unlock_and_return;
1156 }
1157 } else {
1158 __sc500ai_stop_stream(sc500ai);
1159 pm_runtime_put(&client->dev);
1160 }
1161
1162 sc500ai->streaming = on;
1163
1164 unlock_and_return:
1165 mutex_unlock(&sc500ai->mutex);
1166
1167 return ret;
1168 }
1169
sc500ai_s_power(struct v4l2_subdev * sd,int on)1170 static int sc500ai_s_power(struct v4l2_subdev *sd, int on)
1171 {
1172 struct sc500ai *sc500ai = to_sc500ai(sd);
1173 struct i2c_client *client = sc500ai->client;
1174 int ret = 0;
1175
1176 mutex_lock(&sc500ai->mutex);
1177
1178 /* If the power state is not modified - no work to do. */
1179 if (sc500ai->power_on == !!on)
1180 goto unlock_and_return;
1181
1182 if (on) {
1183 ret = pm_runtime_get_sync(&client->dev);
1184 if (ret < 0) {
1185 pm_runtime_put_noidle(&client->dev);
1186 goto unlock_and_return;
1187 }
1188
1189 ret |= sc500ai_write_reg(sc500ai->client,
1190 SC500AI_SOFTWARE_RESET_REG,
1191 SC500AI_REG_VALUE_08BIT,
1192 0x01);
1193 usleep_range(100, 200);
1194
1195 sc500ai->power_on = true;
1196 } else {
1197 pm_runtime_put(&client->dev);
1198 sc500ai->power_on = false;
1199 }
1200
1201 unlock_and_return:
1202 mutex_unlock(&sc500ai->mutex);
1203
1204 return ret;
1205 }
1206
__sc500ai_power_on(struct sc500ai * sc500ai)1207 static int __sc500ai_power_on(struct sc500ai *sc500ai)
1208 {
1209 int ret;
1210 struct device *dev = &sc500ai->client->dev;
1211
1212 if (!IS_ERR_OR_NULL(sc500ai->pins_default)) {
1213 ret = pinctrl_select_state(sc500ai->pinctrl,
1214 sc500ai->pins_default);
1215 if (ret < 0)
1216 dev_err(dev, "could not set pins\n");
1217 }
1218 ret = clk_set_rate(sc500ai->xvclk, SC500AI_XVCLK_FREQ);
1219 if (ret < 0)
1220 dev_warn(dev, "Failed to set xvclk rate (27MHz)\n");
1221 if (clk_get_rate(sc500ai->xvclk) != SC500AI_XVCLK_FREQ)
1222 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1223 ret = clk_prepare_enable(sc500ai->xvclk);
1224 if (ret < 0) {
1225 dev_err(dev, "Failed to enable xvclk\n");
1226 return ret;
1227 }
1228 if (!IS_ERR(sc500ai->reset_gpio))
1229 gpiod_set_value_cansleep(sc500ai->reset_gpio, 0);
1230
1231 ret = regulator_bulk_enable(sc500ai_NUM_SUPPLIES, sc500ai->supplies);
1232 if (ret < 0) {
1233 dev_err(dev, "Failed to enable regulators\n");
1234 goto disable_clk;
1235 }
1236
1237 if (!IS_ERR(sc500ai->reset_gpio))
1238 gpiod_set_value_cansleep(sc500ai->reset_gpio, 1);
1239
1240 usleep_range(500, 1000);
1241 if (!IS_ERR(sc500ai->pwdn_gpio))
1242 gpiod_set_value_cansleep(sc500ai->pwdn_gpio, 1);
1243
1244 usleep_range(4000, 5000);
1245 return 0;
1246
1247 disable_clk:
1248 clk_disable_unprepare(sc500ai->xvclk);
1249
1250 return ret;
1251 }
1252
__sc500ai_power_off(struct sc500ai * sc500ai)1253 static void __sc500ai_power_off(struct sc500ai *sc500ai)
1254 {
1255 int ret;
1256 struct device *dev = &sc500ai->client->dev;
1257
1258 if (!IS_ERR(sc500ai->pwdn_gpio))
1259 gpiod_set_value_cansleep(sc500ai->pwdn_gpio, 0);
1260 clk_disable_unprepare(sc500ai->xvclk);
1261 if (!IS_ERR(sc500ai->reset_gpio))
1262 gpiod_set_value_cansleep(sc500ai->reset_gpio, 0);
1263 if (!IS_ERR_OR_NULL(sc500ai->pins_sleep)) {
1264 ret = pinctrl_select_state(sc500ai->pinctrl,
1265 sc500ai->pins_sleep);
1266 if (ret < 0)
1267 dev_dbg(dev, "could not set pins\n");
1268 }
1269 regulator_bulk_disable(sc500ai_NUM_SUPPLIES, sc500ai->supplies);
1270 }
1271
sc500ai_runtime_resume(struct device * dev)1272 static int sc500ai_runtime_resume(struct device *dev)
1273 {
1274 struct i2c_client *client = to_i2c_client(dev);
1275 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1276 struct sc500ai *sc500ai = to_sc500ai(sd);
1277
1278 return __sc500ai_power_on(sc500ai);
1279 }
1280
sc500ai_runtime_suspend(struct device * dev)1281 static int sc500ai_runtime_suspend(struct device *dev)
1282 {
1283 struct i2c_client *client = to_i2c_client(dev);
1284 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1285 struct sc500ai *sc500ai = to_sc500ai(sd);
1286
1287 __sc500ai_power_off(sc500ai);
1288
1289 return 0;
1290 }
1291
1292 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sc500ai_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1293 static int sc500ai_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1294 {
1295 struct sc500ai *sc500ai = to_sc500ai(sd);
1296 struct v4l2_mbus_framefmt *try_fmt =
1297 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1298 const struct sc500ai_mode *def_mode = &supported_modes[0];
1299
1300 mutex_lock(&sc500ai->mutex);
1301 /* Initialize try_fmt */
1302 try_fmt->width = def_mode->width;
1303 try_fmt->height = def_mode->height;
1304 try_fmt->code = def_mode->bus_fmt;
1305 try_fmt->field = V4L2_FIELD_NONE;
1306
1307 mutex_unlock(&sc500ai->mutex);
1308 /* No crop or compose */
1309
1310 return 0;
1311 }
1312 #endif
1313
1314 #define DST_WIDTH 2880
1315 #define DST_HEIGHT 1616
1316
1317 /*
1318 * The resolution of the driver configuration needs to be exactly
1319 * the same as the current output resolution of the sensor,
1320 * the input width of the isp needs to be 16 aligned,
1321 * the input height of the isp needs to be 8 aligned.
1322 * Can be cropped to standard resolution by this function,
1323 * otherwise it will crop out strange resolution according
1324 * to the alignment rules.
1325 */
sc500ai_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1326 static int sc500ai_get_selection(struct v4l2_subdev *sd,
1327 struct v4l2_subdev_pad_config *cfg,
1328 struct v4l2_subdev_selection *sel)
1329 {
1330 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) {
1331 sel->r.left = 0;
1332 sel->r.width = DST_WIDTH;
1333 sel->r.top = 2;
1334 sel->r.height = DST_HEIGHT;
1335 return 0;
1336 }
1337 return -EINVAL;
1338 }
1339
sc500ai_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1340 static int sc500ai_enum_frame_interval(struct v4l2_subdev *sd,
1341 struct v4l2_subdev_pad_config *cfg,
1342 struct v4l2_subdev_frame_interval_enum *fie)
1343 {
1344 if (fie->index >= ARRAY_SIZE(supported_modes))
1345 return -EINVAL;
1346
1347 fie->code = supported_modes[fie->index].bus_fmt;
1348 fie->width = supported_modes[fie->index].width;
1349 fie->height = supported_modes[fie->index].height;
1350 fie->interval = supported_modes[fie->index].max_fps;
1351 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1352 return 0;
1353 }
1354
1355 static const struct dev_pm_ops sc500ai_pm_ops = {
1356 SET_RUNTIME_PM_OPS(sc500ai_runtime_suspend,
1357 sc500ai_runtime_resume, NULL)
1358 };
1359
1360 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1361 static const struct v4l2_subdev_internal_ops sc500ai_internal_ops = {
1362 .open = sc500ai_open,
1363 };
1364 #endif
1365
1366 static const struct v4l2_subdev_core_ops sc500ai_core_ops = {
1367 .s_power = sc500ai_s_power,
1368 .ioctl = sc500ai_ioctl,
1369 #ifdef CONFIG_COMPAT
1370 .compat_ioctl32 = sc500ai_compat_ioctl32,
1371 #endif
1372 };
1373
1374 static const struct v4l2_subdev_video_ops sc500ai_video_ops = {
1375 .s_stream = sc500ai_s_stream,
1376 .g_frame_interval = sc500ai_g_frame_interval,
1377 };
1378
1379 static const struct v4l2_subdev_pad_ops sc500ai_pad_ops = {
1380 .enum_mbus_code = sc500ai_enum_mbus_code,
1381 .enum_frame_size = sc500ai_enum_frame_sizes,
1382 .enum_frame_interval = sc500ai_enum_frame_interval,
1383 .get_fmt = sc500ai_get_fmt,
1384 .set_fmt = sc500ai_set_fmt,
1385 .get_selection = sc500ai_get_selection,
1386 .get_mbus_config = sc500ai_g_mbus_config,
1387 };
1388
1389 static const struct v4l2_subdev_ops sc500ai_subdev_ops = {
1390 .core = &sc500ai_core_ops,
1391 .video = &sc500ai_video_ops,
1392 .pad = &sc500ai_pad_ops,
1393 };
1394
sc500ai_modify_fps_info(struct sc500ai * sc500ai)1395 static void sc500ai_modify_fps_info(struct sc500ai *sc500ai)
1396 {
1397 const struct sc500ai_mode *mode = sc500ai->cur_mode;
1398
1399 sc500ai->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
1400 sc500ai->cur_vts;
1401 }
1402
sc500ai_set_ctrl(struct v4l2_ctrl * ctrl)1403 static int sc500ai_set_ctrl(struct v4l2_ctrl *ctrl)
1404 {
1405 struct sc500ai *sc500ai = container_of(ctrl->handler,
1406 struct sc500ai, ctrl_handler);
1407 struct i2c_client *client = sc500ai->client;
1408 s64 max;
1409 u32 again = 0, again_fine = 0, dgain = 0, dgain_fine = 0;
1410 int ret = 0;
1411 u32 val = 0, vts = 0;
1412 u64 delay_time = 0;
1413 u32 cur_fps = 0;
1414 u32 def_fps = 0;
1415 u32 denominator = 0;
1416 u32 numerator = 0;
1417
1418 /* Propagate change of current control to all related controls */
1419 switch (ctrl->id) {
1420 case V4L2_CID_VBLANK:
1421 /* Update max exposure while meeting expected vblanking */
1422 max = sc500ai->cur_mode->height + ctrl->val - 5;
1423 __v4l2_ctrl_modify_range(sc500ai->exposure,
1424 sc500ai->exposure->minimum, max,
1425 sc500ai->exposure->step,
1426 sc500ai->exposure->default_value);
1427 break;
1428 }
1429
1430 if (!pm_runtime_get_if_in_use(&client->dev))
1431 return 0;
1432
1433 switch (ctrl->id) {
1434 case V4L2_CID_EXPOSURE:
1435 if (sc500ai->cur_mode->hdr_mode != NO_HDR)
1436 goto ctrl_end;
1437 val = ctrl->val << 1;
1438 ret = sc500ai_write_reg(sc500ai->client,
1439 SC500AI_REG_EXPOSURE_H,
1440 SC500AI_REG_VALUE_08BIT,
1441 SC500AI_FETCH_EXP_H(val));
1442 ret |= sc500ai_write_reg(sc500ai->client,
1443 SC500AI_REG_EXPOSURE_M,
1444 SC500AI_REG_VALUE_08BIT,
1445 SC500AI_FETCH_EXP_M(val));
1446 ret |= sc500ai_write_reg(sc500ai->client,
1447 SC500AI_REG_EXPOSURE_L,
1448 SC500AI_REG_VALUE_08BIT,
1449 SC500AI_FETCH_EXP_L(val));
1450
1451 dev_dbg(&client->dev, "set exposure 0x%x\n", val);
1452 break;
1453 case V4L2_CID_ANALOGUE_GAIN:
1454 if (sc500ai->cur_mode->hdr_mode != NO_HDR)
1455 goto ctrl_end;
1456
1457 sc500ai_get_gain_reg(ctrl->val, &again, &again_fine, &dgain, &dgain_fine);
1458 ret = sc500ai_write_reg(sc500ai->client,
1459 SC500AI_REG_DIG_GAIN,
1460 SC500AI_REG_VALUE_08BIT,
1461 dgain);
1462 ret |= sc500ai_write_reg(sc500ai->client,
1463 SC500AI_REG_DIG_FINE_GAIN,
1464 SC500AI_REG_VALUE_08BIT,
1465 dgain_fine);
1466 ret |= sc500ai_write_reg(sc500ai->client,
1467 SC500AI_REG_ANA_GAIN,
1468 SC500AI_REG_VALUE_08BIT,
1469 again);
1470 ret |= sc500ai_write_reg(sc500ai->client,
1471 SC500AI_REG_ANA_FINE_GAIN,
1472 SC500AI_REG_VALUE_08BIT,
1473 again_fine);
1474 sc500ai_set_hightemp_dpc(sc500ai, ctrl->val);
1475
1476 dev_dbg(&sc500ai->client->dev,
1477 "total_gain:%d again 0x%x, again_fine 0x%x, dgain 0x%x, dgain_fine 0x%x\n",
1478 ctrl->val, again, again_fine, dgain, dgain_fine);
1479 break;
1480 case V4L2_CID_VBLANK:
1481 vts = ctrl->val + sc500ai->cur_mode->height;
1482 ret = sc500ai_write_reg(sc500ai->client,
1483 SC500AI_REG_VTS_H,
1484 SC500AI_REG_VALUE_08BIT,
1485 (vts >> 8) & 0x7f);
1486 ret |= sc500ai_write_reg(sc500ai->client,
1487 SC500AI_REG_VTS_L,
1488 SC500AI_REG_VALUE_08BIT,
1489 vts & 0xff);
1490 if (!ret)
1491 sc500ai->cur_vts = vts;
1492 sc500ai_modify_fps_info(sc500ai);
1493 break;
1494 case V4L2_CID_HFLIP:
1495 ret = sc500ai_read_reg(sc500ai->client, SC500AI_FLIP_MIRROR_REG,
1496 SC500AI_REG_VALUE_08BIT, &val);
1497 if (ret)
1498 break;
1499 if (ctrl->val)
1500 val |= SC500AI_MIRROR_MASK;
1501 else
1502 val &= ~SC500AI_MIRROR_MASK;
1503 ret |= sc500ai_write_reg(sc500ai->client, SC500AI_FLIP_MIRROR_REG,
1504 SC500AI_REG_VALUE_08BIT, val);
1505 break;
1506 case V4L2_CID_VFLIP:
1507 ret = sc500ai_read_reg(sc500ai->client,
1508 SC500AI_FLIP_MIRROR_REG,
1509 SC500AI_REG_VALUE_08BIT, &val);
1510 if (ret)
1511 break;
1512 denominator = sc500ai->cur_mode->max_fps.denominator;
1513 numerator = sc500ai->cur_mode->max_fps.numerator;
1514 def_fps = denominator / numerator;
1515 cur_fps = def_fps * sc500ai->cur_mode->vts_def / sc500ai->cur_vts;
1516 if (cur_fps > 25) {
1517 vts = def_fps * sc500ai->cur_mode->vts_def / 25;
1518 ret = sc500ai_write_reg(sc500ai->client,
1519 SC500AI_REG_VTS_H,
1520 SC500AI_REG_VALUE_08BIT,
1521 (vts >> 8) & 0x7f);
1522 ret |= sc500ai_write_reg(sc500ai->client,
1523 SC500AI_REG_VTS_L,
1524 SC500AI_REG_VALUE_08BIT,
1525 vts & 0xff);
1526 delay_time = 1000000 / 25;//one frame interval
1527 delay_time *= 2;
1528 usleep_range(delay_time, delay_time + 1000);
1529 }
1530
1531 if (ctrl->val)
1532 val |= SC500AI_FLIP_MASK;
1533 else
1534 val &= ~SC500AI_FLIP_MASK;
1535
1536 ret |= sc500ai_write_reg(sc500ai->client,
1537 SC500AI_FLIP_MIRROR_REG,
1538 SC500AI_REG_VALUE_08BIT,
1539 val);
1540 if (cur_fps > 25) {
1541 usleep_range(delay_time, delay_time + 1000);
1542 vts = sc500ai->cur_vts;
1543 ret = sc500ai_write_reg(sc500ai->client,
1544 SC500AI_REG_VTS_H,
1545 SC500AI_REG_VALUE_08BIT,
1546 (vts >> 8) & 0x7f);
1547 ret |= sc500ai_write_reg(sc500ai->client,
1548 SC500AI_REG_VTS_L,
1549 SC500AI_REG_VALUE_08BIT,
1550 vts & 0xff);
1551 }
1552 break;
1553 default:
1554 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1555 __func__, ctrl->id, ctrl->val);
1556 break;
1557 }
1558
1559 ctrl_end:
1560 pm_runtime_put(&client->dev);
1561
1562 return ret;
1563 }
1564
1565 static const struct v4l2_ctrl_ops sc500ai_ctrl_ops = {
1566 .s_ctrl = sc500ai_set_ctrl,
1567 };
1568
sc500ai_initialize_controls(struct sc500ai * sc500ai)1569 static int sc500ai_initialize_controls(struct sc500ai *sc500ai)
1570 {
1571 const struct sc500ai_mode *mode;
1572 struct v4l2_ctrl_handler *handler;
1573 s64 exposure_max, vblank_def;
1574 u64 pixel_rate;
1575 u32 h_blank;
1576 int ret;
1577
1578 handler = &sc500ai->ctrl_handler;
1579 mode = sc500ai->cur_mode;
1580 ret = v4l2_ctrl_handler_init(handler, 8);
1581 if (ret)
1582 return ret;
1583 handler->lock = &sc500ai->mutex;
1584
1585 sc500ai->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
1586 V4L2_CID_LINK_FREQ,
1587 ARRAY_SIZE(link_freq_items) - 1, 0,
1588 link_freq_items);
1589 __v4l2_ctrl_s_ctrl(sc500ai->link_freq, mode->mipi_freq_idx);
1590
1591 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1592 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * SC500AI_LANES ;
1593 sc500ai->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
1594 V4L2_CID_PIXEL_RATE, 0, SC500AI_MAX_PIXEL_RATE,
1595 1, pixel_rate);
1596
1597 h_blank = mode->hts_def - mode->width;
1598 sc500ai->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1599 h_blank, h_blank, 1, h_blank);
1600 if (sc500ai->hblank)
1601 sc500ai->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1602
1603 vblank_def = mode->vts_def - mode->height;
1604 sc500ai->cur_vts = mode->vts_def;
1605 sc500ai->cur_fps = mode->max_fps;
1606 sc500ai->vblank = v4l2_ctrl_new_std(handler, &sc500ai_ctrl_ops,
1607 V4L2_CID_VBLANK, vblank_def,
1608 SC500AI_VTS_MAX - mode->height,
1609 1, vblank_def);
1610 exposure_max = mode->vts_def - 5;
1611 sc500ai->exposure = v4l2_ctrl_new_std(handler, &sc500ai_ctrl_ops,
1612 V4L2_CID_EXPOSURE, SC500AI_EXPOSURE_MIN,
1613 exposure_max, sc500ai_EXPOSURE_STEP,
1614 mode->exp_def);
1615
1616 sc500ai->anal_gain = v4l2_ctrl_new_std(handler, &sc500ai_ctrl_ops,
1617 V4L2_CID_ANALOGUE_GAIN, SC500AI_GAIN_MIN,
1618 SC500AI_GAIN_MAX, SC500AI_GAIN_STEP,
1619 SC500AI_GAIN_DEFAULT);
1620
1621 v4l2_ctrl_new_std(handler, &sc500ai_ctrl_ops,
1622 V4L2_CID_HFLIP, 0, 1, 1, 0);
1623
1624 v4l2_ctrl_new_std(handler, &sc500ai_ctrl_ops,
1625 V4L2_CID_VFLIP, 0, 1, 1, 0);
1626
1627 if (handler->error) {
1628 ret = handler->error;
1629 dev_err(&sc500ai->client->dev,
1630 "Failed to init controls(%d)\n", ret);
1631 goto err_free_handler;
1632 }
1633 sc500ai->subdev.ctrl_handler = handler;
1634 sc500ai->has_init_exp = false;
1635
1636 return 0;
1637
1638 err_free_handler:
1639 v4l2_ctrl_handler_free(handler);
1640 return ret;
1641 }
1642
sc500ai_check_sensor_id(struct sc500ai * sc500ai,struct i2c_client * client)1643 static int sc500ai_check_sensor_id(struct sc500ai *sc500ai,
1644 struct i2c_client *client)
1645 {
1646 struct device *dev = &sc500ai->client->dev;
1647 u32 id = 0;
1648 int ret;
1649
1650 ret = sc500ai_read_reg(client, SC500AI_REG_CHIP_ID,
1651 SC500AI_REG_VALUE_16BIT, &id);
1652 if (id != SC500AI_CHIP_ID) {
1653 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1654 return -ENODEV;
1655 }
1656
1657 dev_info(dev, "Detected SC%06x sensor\n", SC500AI_CHIP_ID);
1658
1659 return 0;
1660 }
1661
sc500ai_configure_regulators(struct sc500ai * sc500ai)1662 static int sc500ai_configure_regulators(struct sc500ai *sc500ai)
1663 {
1664 unsigned int i;
1665
1666 for (i = 0; i < sc500ai_NUM_SUPPLIES; i++)
1667 sc500ai->supplies[i].supply = sc500ai_supply_names[i];
1668
1669 return devm_regulator_bulk_get(&sc500ai->client->dev,
1670 sc500ai_NUM_SUPPLIES,
1671 sc500ai->supplies);
1672 }
1673
sc500ai_probe(struct i2c_client * client,const struct i2c_device_id * id)1674 static int sc500ai_probe(struct i2c_client *client,
1675 const struct i2c_device_id *id)
1676 {
1677 struct device *dev = &client->dev;
1678 struct device_node *node = dev->of_node;
1679 struct sc500ai *sc500ai;
1680 struct v4l2_subdev *sd;
1681 char facing[2];
1682 int ret;
1683 u32 i, hdr_mode = 0;
1684
1685 dev_info(dev, "driver version: %02x.%02x.%02x",
1686 DRIVER_VERSION >> 16,
1687 (DRIVER_VERSION & 0xff00) >> 8,
1688 DRIVER_VERSION & 0x00ff);
1689
1690 sc500ai = devm_kzalloc(dev, sizeof(*sc500ai), GFP_KERNEL);
1691 if (!sc500ai)
1692 return -ENOMEM;
1693
1694 of_property_read_u32(node, OF_CAMERA_HDR_MODE, &hdr_mode);
1695 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1696 &sc500ai->module_index);
1697 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1698 &sc500ai->module_facing);
1699 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1700 &sc500ai->module_name);
1701 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1702 &sc500ai->len_name);
1703 if (ret) {
1704 dev_err(dev, "could not get module information!\n");
1705 return -EINVAL;
1706 }
1707
1708 sc500ai->client = client;
1709 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1710 if (hdr_mode == supported_modes[i].hdr_mode) {
1711 sc500ai->cur_mode = &supported_modes[i];
1712 break;
1713 }
1714 }
1715 if (i == ARRAY_SIZE(supported_modes))
1716 sc500ai->cur_mode = &supported_modes[0];
1717
1718 sc500ai->xvclk = devm_clk_get(dev, "xvclk");
1719 if (IS_ERR(sc500ai->xvclk)) {
1720 dev_err(dev, "Failed to get xvclk\n");
1721 return -EINVAL;
1722 }
1723
1724 sc500ai->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1725 if (IS_ERR(sc500ai->reset_gpio))
1726 dev_warn(dev, "Failed to get reset-gpios\n");
1727
1728 sc500ai->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1729 if (IS_ERR(sc500ai->pwdn_gpio))
1730 dev_warn(dev, "Failed to get pwdn-gpios\n");
1731
1732 sc500ai->pinctrl = devm_pinctrl_get(dev);
1733 if (!IS_ERR(sc500ai->pinctrl)) {
1734 sc500ai->pins_default =
1735 pinctrl_lookup_state(sc500ai->pinctrl,
1736 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1737 if (IS_ERR(sc500ai->pins_default))
1738 dev_err(dev, "could not get default pinstate\n");
1739
1740 sc500ai->pins_sleep =
1741 pinctrl_lookup_state(sc500ai->pinctrl,
1742 OF_CAMERA_PINCTRL_STATE_SLEEP);
1743 if (IS_ERR(sc500ai->pins_sleep))
1744 dev_err(dev, "could not get sleep pinstate\n");
1745 } else {
1746 dev_err(dev, "no pinctrl\n");
1747 }
1748
1749 ret = sc500ai_configure_regulators(sc500ai);
1750 if (ret) {
1751 dev_err(dev, "Failed to get power regulators\n");
1752 return ret;
1753 }
1754
1755 mutex_init(&sc500ai->mutex);
1756
1757 sd = &sc500ai->subdev;
1758 v4l2_i2c_subdev_init(sd, client, &sc500ai_subdev_ops);
1759 ret = sc500ai_initialize_controls(sc500ai);
1760 if (ret)
1761 goto err_destroy_mutex;
1762
1763 ret = __sc500ai_power_on(sc500ai);
1764 if (ret)
1765 goto err_free_handler;
1766
1767 ret = sc500ai_check_sensor_id(sc500ai, client);
1768 if (ret)
1769 goto err_power_off;
1770
1771 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1772 sd->internal_ops = &sc500ai_internal_ops;
1773 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1774 V4L2_SUBDEV_FL_HAS_EVENTS;
1775 #endif
1776 #if defined(CONFIG_MEDIA_CONTROLLER)
1777 sc500ai->pad.flags = MEDIA_PAD_FL_SOURCE;
1778 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1779 ret = media_entity_pads_init(&sd->entity, 1, &sc500ai->pad);
1780 if (ret < 0)
1781 goto err_power_off;
1782 #endif
1783
1784 memset(facing, 0, sizeof(facing));
1785 if (strcmp(sc500ai->module_facing, "back") == 0)
1786 facing[0] = 'b';
1787 else
1788 facing[0] = 'f';
1789
1790 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1791 sc500ai->module_index, facing,
1792 SC500AI_NAME, dev_name(sd->dev));
1793 ret = v4l2_async_register_subdev_sensor_common(sd);
1794 if (ret) {
1795 dev_err(dev, "v4l2 async register subdev failed\n");
1796 goto err_clean_entity;
1797 }
1798
1799 pm_runtime_set_active(dev);
1800 pm_runtime_enable(dev);
1801 pm_runtime_idle(dev);
1802
1803 return 0;
1804
1805 err_clean_entity:
1806 #if defined(CONFIG_MEDIA_CONTROLLER)
1807 media_entity_cleanup(&sd->entity);
1808 #endif
1809 err_power_off:
1810 __sc500ai_power_off(sc500ai);
1811 err_free_handler:
1812 v4l2_ctrl_handler_free(&sc500ai->ctrl_handler);
1813 err_destroy_mutex:
1814 mutex_destroy(&sc500ai->mutex);
1815
1816 return ret;
1817 }
1818
sc500ai_remove(struct i2c_client * client)1819 static int sc500ai_remove(struct i2c_client *client)
1820 {
1821 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1822 struct sc500ai *sc500ai = to_sc500ai(sd);
1823
1824 v4l2_async_unregister_subdev(sd);
1825 #if defined(CONFIG_MEDIA_CONTROLLER)
1826 media_entity_cleanup(&sd->entity);
1827 #endif
1828 v4l2_ctrl_handler_free(&sc500ai->ctrl_handler);
1829 mutex_destroy(&sc500ai->mutex);
1830
1831 pm_runtime_disable(&client->dev);
1832 if (!pm_runtime_status_suspended(&client->dev))
1833 __sc500ai_power_off(sc500ai);
1834 pm_runtime_set_suspended(&client->dev);
1835
1836 return 0;
1837 }
1838
1839 #if IS_ENABLED(CONFIG_OF)
1840 static const struct of_device_id sc500ai_of_match[] = {
1841 { .compatible = "smartsens,sc500ai" },
1842 {},
1843 };
1844 MODULE_DEVICE_TABLE(of, sc500ai_of_match);
1845 #endif
1846
1847 static const struct i2c_device_id sc500ai_match_id[] = {
1848 { "smartsens,sc500ai", 0 },
1849 { },
1850 };
1851
1852 static struct i2c_driver sc500ai_i2c_driver = {
1853 .driver = {
1854 .name = SC500AI_NAME,
1855 .pm = &sc500ai_pm_ops,
1856 .of_match_table = of_match_ptr(sc500ai_of_match),
1857 },
1858 .probe = &sc500ai_probe,
1859 .remove = &sc500ai_remove,
1860 .id_table = sc500ai_match_id,
1861 };
1862
sensor_mod_init(void)1863 static int __init sensor_mod_init(void)
1864 {
1865 return i2c_add_driver(&sc500ai_i2c_driver);
1866 }
1867
sensor_mod_exit(void)1868 static void __exit sensor_mod_exit(void)
1869 {
1870 i2c_del_driver(&sc500ai_i2c_driver);
1871 }
1872
1873 device_initcall_sync(sensor_mod_init);
1874 module_exit(sensor_mod_exit);
1875
1876 MODULE_DESCRIPTION("smartsens sc500ai sensor driver");
1877 MODULE_LICENSE("GPL v2");
1878