1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * sc2336 driver
4 *
5 * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 first version
8 */
9
10 //#define DEBUG
11 #include <linux/clk.h>
12 #include <linux/device.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/sysfs.h>
20 #include <linux/slab.h>
21 #include <linux/version.h>
22 #include <linux/rk-camera-module.h>
23 #include <linux/rk-preisp.h>
24 #include <media/media-entity.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-subdev.h>
28 #include <linux/pinctrl/consumer.h>
29 #include "../platform/rockchip/isp/rkisp_tb_helper.h"
30
31 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
32
33 #ifndef V4L2_CID_DIGITAL_GAIN
34 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
35 #endif
36
37 #define SC2336_LANES 2
38 #define SC2336_BITS_PER_SAMPLE 10
39 #define SC2336_LINK_FREQ_405 202500000
40
41 #define PIXEL_RATE_WITH_405M_10BIT (SC2336_LINK_FREQ_405 * 2 * \
42 SC2336_LANES / SC2336_BITS_PER_SAMPLE)
43
44 #define CHIP_ID 0xcb3a
45 #define SC2336_REG_CHIP_ID 0x3107
46
47 #define SC2336_REG_CTRL_MODE 0x0100
48 #define SC2336_MODE_SW_STANDBY 0x0
49 #define SC2336_MODE_STREAMING BIT(0)
50
51 #define SC2336_REG_EXPOSURE_H 0x3e00
52 #define SC2336_REG_EXPOSURE_M 0x3e01
53 #define SC2336_REG_EXPOSURE_L 0x3e02
54 #define SC2336_EXPOSURE_MIN 1
55 #define SC2336_EXPOSURE_STEP 1
56 #define SC2336_VTS_MAX 0x7fff
57
58 #define SC2336_REG_DIG_GAIN 0x3e06
59 #define SC2336_REG_DIG_FINE_GAIN 0x3e07
60 #define SC2336_REG_ANA_GAIN 0x3e09
61 #define SC2336_GAIN_MIN 0x0020
62 #define SC2336_GAIN_MAX (4096) //32*4*32
63 #define SC2336_GAIN_STEP 1
64 #define SC2336_GAIN_DEFAULT 0x80
65
66
67 #define SC2336_REG_GROUP_HOLD 0x3812
68 #define SC2336_GROUP_HOLD_START 0x00
69 #define SC2336_GROUP_HOLD_END 0x30
70
71 #define SC2336_REG_TEST_PATTERN 0x4501
72 #define SC2336_TEST_PATTERN_BIT_MASK BIT(3)
73
74 #define SC2336_REG_VTS_H 0x320e
75 #define SC2336_REG_VTS_L 0x320f
76
77 #define SC2336_FLIP_MIRROR_REG 0x3221
78
79 #define SC2336_FETCH_EXP_H(VAL) (((VAL) >> 12) & 0xF)
80 #define SC2336_FETCH_EXP_M(VAL) (((VAL) >> 4) & 0xFF)
81 #define SC2336_FETCH_EXP_L(VAL) (((VAL) & 0xF) << 4)
82
83 #define SC2336_FETCH_AGAIN_H(VAL) (((VAL) >> 8) & 0x03)
84 #define SC2336_FETCH_AGAIN_L(VAL) ((VAL) & 0xFF)
85
86 #define SC2336_FETCH_MIRROR(VAL, ENABLE) (ENABLE ? VAL | 0x06 : VAL & 0xf9)
87 #define SC2336_FETCH_FLIP(VAL, ENABLE) (ENABLE ? VAL | 0x60 : VAL & 0x9f)
88
89 #define REG_DELAY 0xFFFE
90 #define REG_NULL 0xFFFF
91
92 #define SC2336_REG_VALUE_08BIT 1
93 #define SC2336_REG_VALUE_16BIT 2
94 #define SC2336_REG_VALUE_24BIT 3
95
96 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
97 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
98 #define SC2336_NAME "sc2336"
99
100 static const char * const sc2336_supply_names[] = {
101 "avdd", /* Analog power */
102 "dovdd", /* Digital I/O power */
103 "dvdd", /* Digital core power */
104 };
105
106 #define SC2336_NUM_SUPPLIES ARRAY_SIZE(sc2336_supply_names)
107
108 struct regval {
109 u16 addr;
110 u8 val;
111 };
112
113 struct sc2336_mode {
114 u32 bus_fmt;
115 u32 width;
116 u32 height;
117 struct v4l2_fract max_fps;
118 u32 hts_def;
119 u32 vts_def;
120 u32 exp_def;
121 const struct regval *reg_list;
122 u32 hdr_mode;
123 u32 xvclk_freq;
124 u32 link_freq_idx;
125 u32 vc[PAD_MAX];
126 };
127
128 struct sc2336 {
129 struct i2c_client *client;
130 struct clk *xvclk;
131 struct gpio_desc *reset_gpio;
132 struct regulator_bulk_data supplies[SC2336_NUM_SUPPLIES];
133
134 struct pinctrl *pinctrl;
135 struct pinctrl_state *pins_default;
136 struct pinctrl_state *pins_sleep;
137
138 struct v4l2_subdev subdev;
139 struct media_pad pad;
140 struct v4l2_ctrl_handler ctrl_handler;
141 struct v4l2_ctrl *exposure;
142 struct v4l2_ctrl *anal_gain;
143 struct v4l2_ctrl *digi_gain;
144 struct v4l2_ctrl *hblank;
145 struct v4l2_ctrl *vblank;
146 struct v4l2_ctrl *pixel_rate;
147 struct v4l2_ctrl *link_freq;
148 struct v4l2_ctrl *test_pattern;
149 struct mutex mutex;
150 bool streaming;
151 bool power_on;
152 const struct sc2336_mode *cur_mode;
153 u32 module_index;
154 const char *module_facing;
155 const char *module_name;
156 const char *len_name;
157 u32 cur_vts;
158 bool has_init_exp;
159 bool is_thunderboot;
160 bool is_first_streamoff;
161 struct preisp_hdrae_exp_s init_hdrae_exp;
162 };
163
164 #define to_sc2336(sd) container_of(sd, struct sc2336, subdev)
165
166 /*
167 * Xclk 24Mhz
168 */
169 static const struct regval sc2336_global_regs[] = {
170 {REG_NULL, 0x00},
171 };
172
173 /*
174 * Xclk 24Mhz
175 * max_framerate 30fps
176 * mipi_datarate per lane 405Mbps, 2lane
177 */
178 static const struct regval sc2336_linear_10_1920x1080_30fps_regs[] = {
179 {0x0103, 0x01},
180 {0x0100, 0x00},
181 {0x36e9, 0x80},
182 {0x37f9, 0x80},
183 {0x301f, 0x02},
184 {0x3106, 0x05},
185 {0x320c, 0x08},
186 {0x320d, 0xca},
187 {0x320e, 0x04},
188 {0x320f, 0xb0},
189 {0x3248, 0x04},
190 {0x3249, 0x0b},
191 {0x3253, 0x08},
192 {0x3301, 0x09},
193 {0x3302, 0xff},
194 {0x3303, 0x10},
195 {0x3306, 0x60},
196 {0x3307, 0x02},
197 {0x330a, 0x01},
198 {0x330b, 0x10},
199 {0x330c, 0x16},
200 {0x330d, 0xff},
201 {0x3318, 0x02},
202 {0x3321, 0x0a},
203 {0x3327, 0x0e},
204 {0x332b, 0x12},
205 {0x3333, 0x10},
206 {0x3334, 0x40},
207 {0x335e, 0x06},
208 {0x335f, 0x0a},
209 {0x3364, 0x1f},
210 {0x337c, 0x02},
211 {0x337d, 0x0e},
212 {0x3390, 0x09},
213 {0x3391, 0x0f},
214 {0x3392, 0x1f},
215 {0x3393, 0x20},
216 {0x3394, 0x20},
217 {0x3395, 0xff},
218 {0x33a2, 0x04},
219 {0x33b1, 0x80},
220 {0x33b2, 0x68},
221 {0x33b3, 0x42},
222 {0x33f9, 0x70},
223 {0x33fb, 0xd0},
224 {0x33fc, 0x0f},
225 {0x33fd, 0x1f},
226 {0x349f, 0x03},
227 {0x34a6, 0x0f},
228 {0x34a7, 0x1f},
229 {0x34a8, 0x42},
230 {0x34a9, 0x06},
231 {0x34aa, 0x01},
232 {0x34ab, 0x23},
233 {0x34ac, 0x01},
234 {0x34ad, 0x84},
235 {0x3630, 0xf4},
236 {0x3633, 0x22},
237 {0x3639, 0xf4},
238 {0x363c, 0x47},
239 {0x3670, 0x09},
240 {0x3674, 0xf4},
241 {0x3675, 0xfb},
242 {0x3676, 0xed},
243 {0x367c, 0x09},
244 {0x367d, 0x0f},
245 {0x3690, 0x33},
246 {0x3691, 0x33},
247 {0x3692, 0x43},
248 {0x3698, 0x89},
249 {0x3699, 0x96},
250 {0x369a, 0xd0},
251 {0x369b, 0xd0},
252 {0x369c, 0x09},
253 {0x369d, 0x0f},
254 {0x36a2, 0x09},
255 {0x36a3, 0x0f},
256 {0x36a4, 0x1f},
257 {0x36d0, 0x01},
258 {0x36ea, 0x09},
259 {0x36eb, 0x0c},
260 {0x36ec, 0x1c},
261 {0x36ed, 0x28},
262 {0x3722, 0xe1},
263 {0x3724, 0x41},
264 {0x3725, 0xc1},
265 {0x3728, 0x20},
266 {0x37fa, 0x09},
267 {0x37fb, 0x32},
268 {0x37fc, 0x11},
269 {0x37fd, 0x37},
270 {0x3900, 0x0d},
271 {0x3905, 0x98},
272 {0x391b, 0x81},
273 {0x391c, 0x10},
274 {0x3933, 0x81},
275 {0x3934, 0xc5},
276 {0x3940, 0x68},
277 {0x3941, 0x00},
278 {0x3942, 0x01},
279 {0x3943, 0xc6},
280 {0x3952, 0x02},
281 {0x3953, 0x0f},
282 {0x3e01, 0x4a},
283 {0x3e02, 0xa0},
284 {0x3e08, 0x1f},
285 {0x3e1b, 0x14},
286 {0x440e, 0x02},
287 {0x4509, 0x38},
288 {0x4819, 0x06},
289 {0x481b, 0x03},
290 {0x481d, 0x0b},
291 {0x481f, 0x03},
292 {0x4821, 0x08},
293 {0x4823, 0x03},
294 {0x4825, 0x03},
295 {0x4827, 0x03},
296 {0x4829, 0x05},
297 {0x5799, 0x06},
298 {0x5ae0, 0xfe},
299 {0x5ae1, 0x40},
300 {0x5ae2, 0x30},
301 {0x5ae3, 0x28},
302 {0x5ae4, 0x20},
303 {0x5ae5, 0x30},
304 {0x5ae6, 0x28},
305 {0x5ae7, 0x20},
306 {0x5ae8, 0x3c},
307 {0x5ae9, 0x30},
308 {0x5aea, 0x28},
309 {0x5aeb, 0x3c},
310 {0x5aec, 0x30},
311 {0x5aed, 0x28},
312 {0x5aee, 0xfe},
313 {0x5aef, 0x40},
314 {0x5af4, 0x30},
315 {0x5af5, 0x28},
316 {0x5af6, 0x20},
317 {0x5af7, 0x30},
318 {0x5af8, 0x28},
319 {0x5af9, 0x20},
320 {0x5afa, 0x3c},
321 {0x5afb, 0x30},
322 {0x5afc, 0x28},
323 {0x5afd, 0x3c},
324 {0x5afe, 0x30},
325 {0x5aff, 0x28},
326 {0x36e9, 0x53},
327 {0x37f9, 0x53},
328 {REG_NULL, 0x00},
329 };
330
331 static const struct sc2336_mode supported_modes[] = {
332 {
333 .width = 1920,
334 .height = 1080,
335 .max_fps = {
336 .numerator = 10000,
337 .denominator = 300000,
338 },
339 .exp_def = 0x080,
340 .hts_def = 0x08ca,
341 .vts_def = 0x04b0,
342 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
343 .reg_list = sc2336_linear_10_1920x1080_30fps_regs,
344 .hdr_mode = NO_HDR,
345 .xvclk_freq = 24000000,
346 .link_freq_idx = 0,
347 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
348 },
349 };
350
351 static const s64 link_freq_menu_items[] = {
352 SC2336_LINK_FREQ_405,
353 };
354
355 static const char * const sc2336_test_pattern_menu[] = {
356 "Disabled",
357 "Vertical Color Bar Type 1",
358 "Vertical Color Bar Type 2",
359 "Vertical Color Bar Type 3",
360 "Vertical Color Bar Type 4",
361 };
362
363 /* Write registers up to 4 at a time */
sc2336_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)364 static int sc2336_write_reg(struct i2c_client *client, u16 reg,
365 u32 len, u32 val)
366 {
367 u32 buf_i, val_i;
368 u8 buf[6];
369 u8 *val_p;
370 __be32 val_be;
371
372 if (len > 4)
373 return -EINVAL;
374
375 buf[0] = reg >> 8;
376 buf[1] = reg & 0xff;
377
378 val_be = cpu_to_be32(val);
379 val_p = (u8 *)&val_be;
380 buf_i = 2;
381 val_i = 4 - len;
382
383 while (val_i < 4)
384 buf[buf_i++] = val_p[val_i++];
385
386 if (i2c_master_send(client, buf, len + 2) != len + 2)
387 return -EIO;
388 return 0;
389 }
390
sc2336_write_array(struct i2c_client * client,const struct regval * regs)391 static int sc2336_write_array(struct i2c_client *client,
392 const struct regval *regs)
393 {
394 u32 i;
395 int ret = 0;
396
397 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
398 ret = sc2336_write_reg(client, regs[i].addr,
399 SC2336_REG_VALUE_08BIT, regs[i].val);
400
401 return ret;
402 }
403
404 /* Read registers up to 4 at a time */
sc2336_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)405 static int sc2336_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
406 u32 *val)
407 {
408 struct i2c_msg msgs[2];
409 u8 *data_be_p;
410 __be32 data_be = 0;
411 __be16 reg_addr_be = cpu_to_be16(reg);
412 int ret;
413
414 if (len > 4 || !len)
415 return -EINVAL;
416
417 data_be_p = (u8 *)&data_be;
418 /* Write register address */
419 msgs[0].addr = client->addr;
420 msgs[0].flags = 0;
421 msgs[0].len = 2;
422 msgs[0].buf = (u8 *)®_addr_be;
423
424 /* Read data from register */
425 msgs[1].addr = client->addr;
426 msgs[1].flags = I2C_M_RD;
427 msgs[1].len = len;
428 msgs[1].buf = &data_be_p[4 - len];
429
430 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
431 if (ret != ARRAY_SIZE(msgs))
432 return -EIO;
433
434 *val = be32_to_cpu(data_be);
435
436 return 0;
437 }
438
sc2336_set_gain_reg(struct sc2336 * sc2336,u32 gain)439 static int sc2336_set_gain_reg(struct sc2336 *sc2336, u32 gain)
440 {
441 u32 coarse_again = 0, coarse_dgain = 0, fine_dgain = 0;
442 u32 gain_factor;
443 int ret = 0;
444
445 gain_factor = gain * 1000 / 32;
446 if (gain_factor < 1000) {
447 coarse_again = 0x00;
448 coarse_dgain = 0x00;
449 fine_dgain = 0x80;
450 } else if (gain_factor < 1000 * 2) { /*1x ~ 2x gain*/
451 coarse_again = 0x00;
452 coarse_dgain = 0x00;
453 fine_dgain = gain_factor * 128 / 1000;
454 } else if (gain_factor < 1000 * 4) { /*2x ~ 4x gain*/
455 coarse_again = 0x01;
456 coarse_dgain = 0x00;
457 fine_dgain = gain_factor * 128 / 1000 / 2;
458 } else if (gain_factor < 1000 * 8) { /*4x ~ 8x gain*/
459 coarse_again = 0x03;
460 coarse_dgain = 0x00;
461 fine_dgain = gain_factor * 128 / 1000 / 4;
462 } else if (gain_factor < 1000 * 16) { /*8x ~ 16x gain*/
463 coarse_again = 0x07;
464 coarse_dgain = 0x00;
465 fine_dgain = gain_factor * 128 / 1000 / 8;
466 } else if (gain_factor < 1000 * 32) { /*16x ~ 32x gain*/
467 coarse_again = 0x0f;
468 coarse_dgain = 0x00;
469 fine_dgain = gain_factor * 128 / 1000 / 16;
470 //open dgain begin max digital gain 4X
471 } else if (gain_factor < 1000 * 64) { /*32x ~ 64x gain*/
472 coarse_again = 0x1f;
473 coarse_dgain = 0x00;
474 fine_dgain = gain_factor * 128 / 1000 / 32;
475 } else if (gain_factor < 1000 * 128) { /*64x ~ 128x gain*/
476 coarse_again = 0x1f;
477 coarse_dgain = 0x01;
478 fine_dgain = gain_factor * 128 / 1000 / 64;
479 } else { /*max 128x gain*/
480 coarse_again = 0x1f;
481 coarse_dgain = 0x03;
482 fine_dgain = 0x80;
483 }
484 dev_dbg(&sc2336->client->dev,
485 "total_gain: 0x%x, d_gain: 0x%x, d_fine_gain: 0x%x, c_gain: 0x%x\n",
486 gain, coarse_dgain, fine_dgain, coarse_again);
487
488 ret = sc2336_write_reg(sc2336->client,
489 SC2336_REG_DIG_GAIN,
490 SC2336_REG_VALUE_08BIT,
491 coarse_dgain);
492 ret |= sc2336_write_reg(sc2336->client,
493 SC2336_REG_DIG_FINE_GAIN,
494 SC2336_REG_VALUE_08BIT,
495 fine_dgain);
496 ret |= sc2336_write_reg(sc2336->client,
497 SC2336_REG_ANA_GAIN,
498 SC2336_REG_VALUE_08BIT,
499 coarse_again);
500
501 return ret;
502 }
503
sc2336_get_reso_dist(const struct sc2336_mode * mode,struct v4l2_mbus_framefmt * framefmt)504 static int sc2336_get_reso_dist(const struct sc2336_mode *mode,
505 struct v4l2_mbus_framefmt *framefmt)
506 {
507 return abs(mode->width - framefmt->width) +
508 abs(mode->height - framefmt->height);
509 }
510
511 static const struct sc2336_mode *
sc2336_find_best_fit(struct v4l2_subdev_format * fmt)512 sc2336_find_best_fit(struct v4l2_subdev_format *fmt)
513 {
514 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
515 int dist;
516 int cur_best_fit = 0;
517 int cur_best_fit_dist = -1;
518 unsigned int i;
519
520 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
521 dist = sc2336_get_reso_dist(&supported_modes[i], framefmt);
522 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
523 cur_best_fit_dist = dist;
524 cur_best_fit = i;
525 }
526 }
527
528 return &supported_modes[cur_best_fit];
529 }
530
sc2336_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)531 static int sc2336_set_fmt(struct v4l2_subdev *sd,
532 struct v4l2_subdev_pad_config *cfg,
533 struct v4l2_subdev_format *fmt)
534 {
535 struct sc2336 *sc2336 = to_sc2336(sd);
536 const struct sc2336_mode *mode;
537 s64 h_blank, vblank_def;
538 u64 dst_link_freq = 0;
539 u64 dst_pixel_rate = 0;
540
541 mutex_lock(&sc2336->mutex);
542
543 mode = sc2336_find_best_fit(fmt);
544 fmt->format.code = mode->bus_fmt;
545 fmt->format.width = mode->width;
546 fmt->format.height = mode->height;
547 fmt->format.field = V4L2_FIELD_NONE;
548 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
549 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
550 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
551 #else
552 mutex_unlock(&sc2336->mutex);
553 return -ENOTTY;
554 #endif
555 } else {
556 sc2336->cur_mode = mode;
557 h_blank = mode->hts_def - mode->width;
558 __v4l2_ctrl_modify_range(sc2336->hblank, h_blank,
559 h_blank, 1, h_blank);
560 vblank_def = mode->vts_def - mode->height;
561 __v4l2_ctrl_modify_range(sc2336->vblank, vblank_def,
562 SC2336_VTS_MAX - mode->height,
563 1, vblank_def);
564 dst_link_freq = mode->link_freq_idx;
565 dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
566 SC2336_BITS_PER_SAMPLE * 2 * SC2336_LANES;
567 __v4l2_ctrl_s_ctrl_int64(sc2336->pixel_rate,
568 dst_pixel_rate);
569 __v4l2_ctrl_s_ctrl(sc2336->link_freq,
570 dst_link_freq);
571 }
572
573 mutex_unlock(&sc2336->mutex);
574
575 return 0;
576 }
577
sc2336_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)578 static int sc2336_get_fmt(struct v4l2_subdev *sd,
579 struct v4l2_subdev_pad_config *cfg,
580 struct v4l2_subdev_format *fmt)
581 {
582 struct sc2336 *sc2336 = to_sc2336(sd);
583 const struct sc2336_mode *mode = sc2336->cur_mode;
584
585 mutex_lock(&sc2336->mutex);
586 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
587 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
588 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
589 #else
590 mutex_unlock(&sc2336->mutex);
591 return -ENOTTY;
592 #endif
593 } else {
594 fmt->format.width = mode->width;
595 fmt->format.height = mode->height;
596 fmt->format.code = mode->bus_fmt;
597 fmt->format.field = V4L2_FIELD_NONE;
598 /* format info: width/height/data type/virctual channel */
599 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
600 fmt->reserved[0] = mode->vc[fmt->pad];
601 else
602 fmt->reserved[0] = mode->vc[PAD0];
603 }
604 mutex_unlock(&sc2336->mutex);
605
606 return 0;
607 }
608
sc2336_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)609 static int sc2336_enum_mbus_code(struct v4l2_subdev *sd,
610 struct v4l2_subdev_pad_config *cfg,
611 struct v4l2_subdev_mbus_code_enum *code)
612 {
613 struct sc2336 *sc2336 = to_sc2336(sd);
614
615 if (code->index != 0)
616 return -EINVAL;
617 code->code = sc2336->cur_mode->bus_fmt;
618
619 return 0;
620 }
621
sc2336_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)622 static int sc2336_enum_frame_sizes(struct v4l2_subdev *sd,
623 struct v4l2_subdev_pad_config *cfg,
624 struct v4l2_subdev_frame_size_enum *fse)
625 {
626 if (fse->index >= ARRAY_SIZE(supported_modes))
627 return -EINVAL;
628
629 if (fse->code != supported_modes[0].bus_fmt)
630 return -EINVAL;
631
632 fse->min_width = supported_modes[fse->index].width;
633 fse->max_width = supported_modes[fse->index].width;
634 fse->max_height = supported_modes[fse->index].height;
635 fse->min_height = supported_modes[fse->index].height;
636
637 return 0;
638 }
639
sc2336_enable_test_pattern(struct sc2336 * sc2336,u32 pattern)640 static int sc2336_enable_test_pattern(struct sc2336 *sc2336, u32 pattern)
641 {
642 u32 val = 0;
643 int ret = 0;
644
645 ret = sc2336_read_reg(sc2336->client, SC2336_REG_TEST_PATTERN,
646 SC2336_REG_VALUE_08BIT, &val);
647 if (pattern)
648 val |= SC2336_TEST_PATTERN_BIT_MASK;
649 else
650 val &= ~SC2336_TEST_PATTERN_BIT_MASK;
651
652 ret |= sc2336_write_reg(sc2336->client, SC2336_REG_TEST_PATTERN,
653 SC2336_REG_VALUE_08BIT, val);
654 return ret;
655 }
656
sc2336_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)657 static int sc2336_g_frame_interval(struct v4l2_subdev *sd,
658 struct v4l2_subdev_frame_interval *fi)
659 {
660 struct sc2336 *sc2336 = to_sc2336(sd);
661 const struct sc2336_mode *mode = sc2336->cur_mode;
662
663 fi->interval = mode->max_fps;
664
665 return 0;
666 }
667
sc2336_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)668 static int sc2336_g_mbus_config(struct v4l2_subdev *sd,
669 unsigned int pad_id,
670 struct v4l2_mbus_config *config)
671 {
672 struct sc2336 *sc2336 = to_sc2336(sd);
673 const struct sc2336_mode *mode = sc2336->cur_mode;
674
675 u32 val = 1 << (SC2336_LANES - 1) |
676 V4L2_MBUS_CSI2_CHANNEL_0 |
677 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
678
679 if (mode->hdr_mode != NO_HDR)
680 val |= V4L2_MBUS_CSI2_CHANNEL_1;
681 if (mode->hdr_mode == HDR_X3)
682 val |= V4L2_MBUS_CSI2_CHANNEL_2;
683
684 config->type = V4L2_MBUS_CSI2_DPHY;
685 config->flags = val;
686
687 return 0;
688 }
689
sc2336_get_module_inf(struct sc2336 * sc2336,struct rkmodule_inf * inf)690 static void sc2336_get_module_inf(struct sc2336 *sc2336,
691 struct rkmodule_inf *inf)
692 {
693 memset(inf, 0, sizeof(*inf));
694 strscpy(inf->base.sensor, SC2336_NAME, sizeof(inf->base.sensor));
695 strscpy(inf->base.module, sc2336->module_name,
696 sizeof(inf->base.module));
697 strscpy(inf->base.lens, sc2336->len_name, sizeof(inf->base.lens));
698 }
699
sc2336_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)700 static long sc2336_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
701 {
702 struct sc2336 *sc2336 = to_sc2336(sd);
703 struct rkmodule_hdr_cfg *hdr;
704 u32 i, h, w;
705 long ret = 0;
706 u32 stream = 0;
707
708 switch (cmd) {
709 case RKMODULE_GET_MODULE_INFO:
710 sc2336_get_module_inf(sc2336, (struct rkmodule_inf *)arg);
711 break;
712 case RKMODULE_GET_HDR_CFG:
713 hdr = (struct rkmodule_hdr_cfg *)arg;
714 hdr->esp.mode = HDR_NORMAL_VC;
715 hdr->hdr_mode = sc2336->cur_mode->hdr_mode;
716 break;
717 case RKMODULE_SET_HDR_CFG:
718 hdr = (struct rkmodule_hdr_cfg *)arg;
719 w = sc2336->cur_mode->width;
720 h = sc2336->cur_mode->height;
721 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
722 if (w == supported_modes[i].width &&
723 h == supported_modes[i].height &&
724 supported_modes[i].hdr_mode == hdr->hdr_mode) {
725 sc2336->cur_mode = &supported_modes[i];
726 break;
727 }
728 }
729 if (i == ARRAY_SIZE(supported_modes)) {
730 dev_err(&sc2336->client->dev,
731 "not find hdr mode:%d %dx%d config\n",
732 hdr->hdr_mode, w, h);
733 ret = -EINVAL;
734 } else {
735 w = sc2336->cur_mode->hts_def - sc2336->cur_mode->width;
736 h = sc2336->cur_mode->vts_def - sc2336->cur_mode->height;
737 __v4l2_ctrl_modify_range(sc2336->hblank, w, w, 1, w);
738 __v4l2_ctrl_modify_range(sc2336->vblank, h,
739 SC2336_VTS_MAX - sc2336->cur_mode->height, 1, h);
740 }
741 break;
742 case PREISP_CMD_SET_HDRAE_EXP:
743 break;
744 case RKMODULE_SET_QUICK_STREAM:
745
746 stream = *((u32 *)arg);
747
748 if (stream)
749 ret = sc2336_write_reg(sc2336->client, SC2336_REG_CTRL_MODE,
750 SC2336_REG_VALUE_08BIT, SC2336_MODE_STREAMING);
751 else
752 ret = sc2336_write_reg(sc2336->client, SC2336_REG_CTRL_MODE,
753 SC2336_REG_VALUE_08BIT, SC2336_MODE_SW_STANDBY);
754 break;
755 default:
756 ret = -ENOIOCTLCMD;
757 break;
758 }
759
760 return ret;
761 }
762
763 #ifdef CONFIG_COMPAT
sc2336_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)764 static long sc2336_compat_ioctl32(struct v4l2_subdev *sd,
765 unsigned int cmd, unsigned long arg)
766 {
767 void __user *up = compat_ptr(arg);
768 struct rkmodule_inf *inf;
769 struct rkmodule_hdr_cfg *hdr;
770 struct preisp_hdrae_exp_s *hdrae;
771 long ret;
772 u32 stream = 0;
773
774 switch (cmd) {
775 case RKMODULE_GET_MODULE_INFO:
776 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
777 if (!inf) {
778 ret = -ENOMEM;
779 return ret;
780 }
781
782 ret = sc2336_ioctl(sd, cmd, inf);
783 if (!ret) {
784 if (copy_to_user(up, inf, sizeof(*inf)))
785 ret = -EFAULT;
786 }
787 kfree(inf);
788 break;
789 case RKMODULE_GET_HDR_CFG:
790 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
791 if (!hdr) {
792 ret = -ENOMEM;
793 return ret;
794 }
795
796 ret = sc2336_ioctl(sd, cmd, hdr);
797 if (!ret) {
798 if (copy_to_user(up, hdr, sizeof(*hdr)))
799 ret = -EFAULT;
800 }
801 kfree(hdr);
802 break;
803 case RKMODULE_SET_HDR_CFG:
804 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
805 if (!hdr) {
806 ret = -ENOMEM;
807 return ret;
808 }
809
810 ret = copy_from_user(hdr, up, sizeof(*hdr));
811 if (!ret)
812 ret = sc2336_ioctl(sd, cmd, hdr);
813 else
814 ret = -EFAULT;
815 kfree(hdr);
816 break;
817 case PREISP_CMD_SET_HDRAE_EXP:
818 hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
819 if (!hdrae) {
820 ret = -ENOMEM;
821 return ret;
822 }
823
824 ret = copy_from_user(hdrae, up, sizeof(*hdrae));
825 if (!ret)
826 ret = sc2336_ioctl(sd, cmd, hdrae);
827 else
828 ret = -EFAULT;
829 kfree(hdrae);
830 break;
831 case RKMODULE_SET_QUICK_STREAM:
832 ret = copy_from_user(&stream, up, sizeof(u32));
833 if (!ret)
834 ret = sc2336_ioctl(sd, cmd, &stream);
835 else
836 ret = -EFAULT;
837 break;
838 default:
839 ret = -ENOIOCTLCMD;
840 break;
841 }
842
843 return ret;
844 }
845 #endif
846
__sc2336_start_stream(struct sc2336 * sc2336)847 static int __sc2336_start_stream(struct sc2336 *sc2336)
848 {
849 int ret;
850
851 if (!sc2336->is_thunderboot) {
852 ret = sc2336_write_array(sc2336->client, sc2336->cur_mode->reg_list);
853 if (ret)
854 return ret;
855 /* In case these controls are set before streaming */
856 ret = __v4l2_ctrl_handler_setup(&sc2336->ctrl_handler);
857 if (ret)
858 return ret;
859 if (sc2336->has_init_exp && sc2336->cur_mode->hdr_mode != NO_HDR) {
860 ret = sc2336_ioctl(&sc2336->subdev, PREISP_CMD_SET_HDRAE_EXP,
861 &sc2336->init_hdrae_exp);
862 if (ret) {
863 dev_err(&sc2336->client->dev,
864 "init exp fail in hdr mode\n");
865 return ret;
866 }
867 }
868 }
869 ret = sc2336_write_reg(sc2336->client, SC2336_REG_CTRL_MODE,
870 SC2336_REG_VALUE_08BIT, SC2336_MODE_STREAMING);
871 return ret;
872 }
873
__sc2336_stop_stream(struct sc2336 * sc2336)874 static int __sc2336_stop_stream(struct sc2336 *sc2336)
875 {
876 sc2336->has_init_exp = false;
877 if (sc2336->is_thunderboot) {
878 sc2336->is_first_streamoff = true;
879 pm_runtime_put(&sc2336->client->dev);
880 }
881 return sc2336_write_reg(sc2336->client, SC2336_REG_CTRL_MODE,
882 SC2336_REG_VALUE_08BIT, SC2336_MODE_SW_STANDBY);
883 }
884
885 static int __sc2336_power_on(struct sc2336 *sc2336);
sc2336_s_stream(struct v4l2_subdev * sd,int on)886 static int sc2336_s_stream(struct v4l2_subdev *sd, int on)
887 {
888 struct sc2336 *sc2336 = to_sc2336(sd);
889 struct i2c_client *client = sc2336->client;
890 int ret = 0;
891
892 mutex_lock(&sc2336->mutex);
893 on = !!on;
894 if (on == sc2336->streaming)
895 goto unlock_and_return;
896 if (on) {
897 if (sc2336->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
898 sc2336->is_thunderboot = false;
899 __sc2336_power_on(sc2336);
900 }
901 ret = pm_runtime_get_sync(&client->dev);
902 if (ret < 0) {
903 pm_runtime_put_noidle(&client->dev);
904 goto unlock_and_return;
905 }
906 ret = __sc2336_start_stream(sc2336);
907 if (ret) {
908 v4l2_err(sd, "start stream failed while write regs\n");
909 pm_runtime_put(&client->dev);
910 goto unlock_and_return;
911 }
912 } else {
913 __sc2336_stop_stream(sc2336);
914 pm_runtime_put(&client->dev);
915 }
916
917 sc2336->streaming = on;
918 unlock_and_return:
919 mutex_unlock(&sc2336->mutex);
920 return ret;
921 }
922
sc2336_s_power(struct v4l2_subdev * sd,int on)923 static int sc2336_s_power(struct v4l2_subdev *sd, int on)
924 {
925 struct sc2336 *sc2336 = to_sc2336(sd);
926 struct i2c_client *client = sc2336->client;
927 int ret = 0;
928
929 mutex_lock(&sc2336->mutex);
930
931 /* If the power state is not modified - no work to do. */
932 if (sc2336->power_on == !!on)
933 goto unlock_and_return;
934
935 if (on) {
936 ret = pm_runtime_get_sync(&client->dev);
937 if (ret < 0) {
938 pm_runtime_put_noidle(&client->dev);
939 goto unlock_and_return;
940 }
941
942 if (!sc2336->is_thunderboot) {
943 ret = sc2336_write_array(sc2336->client, sc2336_global_regs);
944 if (ret) {
945 v4l2_err(sd, "could not set init registers\n");
946 pm_runtime_put_noidle(&client->dev);
947 goto unlock_and_return;
948 }
949 }
950
951 sc2336->power_on = true;
952 } else {
953 pm_runtime_put(&client->dev);
954 sc2336->power_on = false;
955 }
956
957 unlock_and_return:
958 mutex_unlock(&sc2336->mutex);
959
960 return ret;
961 }
962
963 /* Calculate the delay in us by clock rate and clock cycles */
sc2336_cal_delay(u32 cycles,struct sc2336 * sc2336)964 static inline u32 sc2336_cal_delay(u32 cycles, struct sc2336 *sc2336)
965 {
966 return DIV_ROUND_UP(cycles, sc2336->cur_mode->xvclk_freq / 1000 / 1000);
967 }
968
__sc2336_power_on(struct sc2336 * sc2336)969 static int __sc2336_power_on(struct sc2336 *sc2336)
970 {
971 int ret;
972 u32 delay_us;
973 struct device *dev = &sc2336->client->dev;
974
975 if (!IS_ERR_OR_NULL(sc2336->pins_default)) {
976 ret = pinctrl_select_state(sc2336->pinctrl,
977 sc2336->pins_default);
978 if (ret < 0)
979 dev_err(dev, "could not set pins\n");
980 }
981 ret = clk_set_rate(sc2336->xvclk, sc2336->cur_mode->xvclk_freq);
982 if (ret < 0)
983 dev_warn(dev, "Failed to set xvclk rate (%dHz)\n", sc2336->cur_mode->xvclk_freq);
984 if (clk_get_rate(sc2336->xvclk) != sc2336->cur_mode->xvclk_freq)
985 dev_warn(dev, "xvclk mismatched, modes are based on %dHz\n",
986 sc2336->cur_mode->xvclk_freq);
987 ret = clk_prepare_enable(sc2336->xvclk);
988 if (ret < 0) {
989 dev_err(dev, "Failed to enable xvclk\n");
990 return ret;
991 }
992
993 if (sc2336->is_thunderboot)
994 return 0;
995
996 if (!IS_ERR(sc2336->reset_gpio))
997 gpiod_set_value_cansleep(sc2336->reset_gpio, 0);
998
999 ret = regulator_bulk_enable(SC2336_NUM_SUPPLIES, sc2336->supplies);
1000 if (ret < 0) {
1001 dev_err(dev, "Failed to enable regulators\n");
1002 goto disable_clk;
1003 }
1004
1005 if (!IS_ERR(sc2336->reset_gpio))
1006 gpiod_set_value_cansleep(sc2336->reset_gpio, 1);
1007
1008 usleep_range(500, 1000);
1009
1010 if (!IS_ERR(sc2336->reset_gpio))
1011 usleep_range(6000, 8000);
1012 else
1013 usleep_range(12000, 16000);
1014
1015 /* 8192 cycles prior to first SCCB transaction */
1016 delay_us = sc2336_cal_delay(8192, sc2336);
1017 usleep_range(delay_us, delay_us * 2);
1018
1019 return 0;
1020
1021 disable_clk:
1022 clk_disable_unprepare(sc2336->xvclk);
1023
1024 return ret;
1025 }
1026
__sc2336_power_off(struct sc2336 * sc2336)1027 static void __sc2336_power_off(struct sc2336 *sc2336)
1028 {
1029 int ret;
1030 struct device *dev = &sc2336->client->dev;
1031
1032 clk_disable_unprepare(sc2336->xvclk);
1033 if (sc2336->is_thunderboot) {
1034 if (sc2336->is_first_streamoff) {
1035 sc2336->is_thunderboot = false;
1036 sc2336->is_first_streamoff = false;
1037 } else {
1038 return;
1039 }
1040 }
1041
1042 if (!IS_ERR(sc2336->reset_gpio))
1043 gpiod_set_value_cansleep(sc2336->reset_gpio, 0);
1044 if (!IS_ERR_OR_NULL(sc2336->pins_sleep)) {
1045 ret = pinctrl_select_state(sc2336->pinctrl,
1046 sc2336->pins_sleep);
1047 if (ret < 0)
1048 dev_dbg(dev, "could not set pins\n");
1049 }
1050 regulator_bulk_disable(SC2336_NUM_SUPPLIES, sc2336->supplies);
1051 }
1052
sc2336_runtime_resume(struct device * dev)1053 static int sc2336_runtime_resume(struct device *dev)
1054 {
1055 struct i2c_client *client = to_i2c_client(dev);
1056 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1057 struct sc2336 *sc2336 = to_sc2336(sd);
1058
1059 return __sc2336_power_on(sc2336);
1060 }
1061
sc2336_runtime_suspend(struct device * dev)1062 static int sc2336_runtime_suspend(struct device *dev)
1063 {
1064 struct i2c_client *client = to_i2c_client(dev);
1065 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1066 struct sc2336 *sc2336 = to_sc2336(sd);
1067
1068 __sc2336_power_off(sc2336);
1069
1070 return 0;
1071 }
1072
1073 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sc2336_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1074 static int sc2336_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1075 {
1076 struct sc2336 *sc2336 = to_sc2336(sd);
1077 struct v4l2_mbus_framefmt *try_fmt =
1078 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1079 const struct sc2336_mode *def_mode = &supported_modes[0];
1080
1081 mutex_lock(&sc2336->mutex);
1082 /* Initialize try_fmt */
1083 try_fmt->width = def_mode->width;
1084 try_fmt->height = def_mode->height;
1085 try_fmt->code = def_mode->bus_fmt;
1086 try_fmt->field = V4L2_FIELD_NONE;
1087
1088 mutex_unlock(&sc2336->mutex);
1089 /* No crop or compose */
1090
1091 return 0;
1092 }
1093 #endif
1094
sc2336_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1095 static int sc2336_enum_frame_interval(struct v4l2_subdev *sd,
1096 struct v4l2_subdev_pad_config *cfg,
1097 struct v4l2_subdev_frame_interval_enum *fie)
1098 {
1099 if (fie->index >= ARRAY_SIZE(supported_modes))
1100 return -EINVAL;
1101
1102 fie->code = supported_modes[fie->index].bus_fmt;
1103 fie->width = supported_modes[fie->index].width;
1104 fie->height = supported_modes[fie->index].height;
1105 fie->interval = supported_modes[fie->index].max_fps;
1106 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1107 return 0;
1108 }
1109
1110 static const struct dev_pm_ops sc2336_pm_ops = {
1111 SET_RUNTIME_PM_OPS(sc2336_runtime_suspend,
1112 sc2336_runtime_resume, NULL)
1113 };
1114
1115 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1116 static const struct v4l2_subdev_internal_ops sc2336_internal_ops = {
1117 .open = sc2336_open,
1118 };
1119 #endif
1120
1121 static const struct v4l2_subdev_core_ops sc2336_core_ops = {
1122 .s_power = sc2336_s_power,
1123 .ioctl = sc2336_ioctl,
1124 #ifdef CONFIG_COMPAT
1125 .compat_ioctl32 = sc2336_compat_ioctl32,
1126 #endif
1127 };
1128
1129 static const struct v4l2_subdev_video_ops sc2336_video_ops = {
1130 .s_stream = sc2336_s_stream,
1131 .g_frame_interval = sc2336_g_frame_interval,
1132 };
1133
1134 static const struct v4l2_subdev_pad_ops sc2336_pad_ops = {
1135 .enum_mbus_code = sc2336_enum_mbus_code,
1136 .enum_frame_size = sc2336_enum_frame_sizes,
1137 .enum_frame_interval = sc2336_enum_frame_interval,
1138 .get_fmt = sc2336_get_fmt,
1139 .set_fmt = sc2336_set_fmt,
1140 .get_mbus_config = sc2336_g_mbus_config,
1141 };
1142
1143 static const struct v4l2_subdev_ops sc2336_subdev_ops = {
1144 .core = &sc2336_core_ops,
1145 .video = &sc2336_video_ops,
1146 .pad = &sc2336_pad_ops,
1147 };
1148
sc2336_set_ctrl(struct v4l2_ctrl * ctrl)1149 static int sc2336_set_ctrl(struct v4l2_ctrl *ctrl)
1150 {
1151 struct sc2336 *sc2336 = container_of(ctrl->handler,
1152 struct sc2336, ctrl_handler);
1153 struct i2c_client *client = sc2336->client;
1154 s64 max;
1155 int ret = 0;
1156 u32 val = 0;
1157
1158 /* Propagate change of current control to all related controls */
1159 switch (ctrl->id) {
1160 case V4L2_CID_VBLANK:
1161 /* Update max exposure while meeting expected vblanking */
1162 max = sc2336->cur_mode->height + ctrl->val - 8;
1163 __v4l2_ctrl_modify_range(sc2336->exposure,
1164 sc2336->exposure->minimum, max,
1165 sc2336->exposure->step,
1166 sc2336->exposure->default_value);
1167 break;
1168 }
1169
1170 if (!pm_runtime_get_if_in_use(&client->dev))
1171 return 0;
1172
1173 switch (ctrl->id) {
1174 case V4L2_CID_EXPOSURE:
1175 dev_dbg(&client->dev, "set exposure 0x%x\n", ctrl->val);
1176 if (sc2336->cur_mode->hdr_mode == NO_HDR) {
1177 val = ctrl->val;
1178 /* 4 least significant bits of expsoure are fractional part */
1179 ret = sc2336_write_reg(sc2336->client,
1180 SC2336_REG_EXPOSURE_H,
1181 SC2336_REG_VALUE_08BIT,
1182 SC2336_FETCH_EXP_H(val));
1183 ret |= sc2336_write_reg(sc2336->client,
1184 SC2336_REG_EXPOSURE_M,
1185 SC2336_REG_VALUE_08BIT,
1186 SC2336_FETCH_EXP_M(val));
1187 ret |= sc2336_write_reg(sc2336->client,
1188 SC2336_REG_EXPOSURE_L,
1189 SC2336_REG_VALUE_08BIT,
1190 SC2336_FETCH_EXP_L(val));
1191 }
1192 break;
1193 case V4L2_CID_ANALOGUE_GAIN:
1194 dev_dbg(&client->dev, "set gain 0x%x\n", ctrl->val);
1195 if (sc2336->cur_mode->hdr_mode == NO_HDR)
1196 ret = sc2336_set_gain_reg(sc2336, ctrl->val);
1197 break;
1198 case V4L2_CID_VBLANK:
1199 dev_dbg(&client->dev, "set vblank 0x%x\n", ctrl->val);
1200 ret = sc2336_write_reg(sc2336->client,
1201 SC2336_REG_VTS_H,
1202 SC2336_REG_VALUE_08BIT,
1203 (ctrl->val + sc2336->cur_mode->height)
1204 >> 8);
1205 ret |= sc2336_write_reg(sc2336->client,
1206 SC2336_REG_VTS_L,
1207 SC2336_REG_VALUE_08BIT,
1208 (ctrl->val + sc2336->cur_mode->height)
1209 & 0xff);
1210 sc2336->cur_vts = ctrl->val + sc2336->cur_mode->height;
1211 break;
1212 case V4L2_CID_TEST_PATTERN:
1213 ret = sc2336_enable_test_pattern(sc2336, ctrl->val);
1214 break;
1215 case V4L2_CID_HFLIP:
1216 ret = sc2336_read_reg(sc2336->client, SC2336_FLIP_MIRROR_REG,
1217 SC2336_REG_VALUE_08BIT, &val);
1218 ret |= sc2336_write_reg(sc2336->client, SC2336_FLIP_MIRROR_REG,
1219 SC2336_REG_VALUE_08BIT,
1220 SC2336_FETCH_MIRROR(val, ctrl->val));
1221 break;
1222 case V4L2_CID_VFLIP:
1223 ret = sc2336_read_reg(sc2336->client, SC2336_FLIP_MIRROR_REG,
1224 SC2336_REG_VALUE_08BIT, &val);
1225 ret |= sc2336_write_reg(sc2336->client, SC2336_FLIP_MIRROR_REG,
1226 SC2336_REG_VALUE_08BIT,
1227 SC2336_FETCH_FLIP(val, ctrl->val));
1228 break;
1229 default:
1230 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1231 __func__, ctrl->id, ctrl->val);
1232 break;
1233 }
1234
1235 pm_runtime_put(&client->dev);
1236
1237 return ret;
1238 }
1239
1240 static const struct v4l2_ctrl_ops sc2336_ctrl_ops = {
1241 .s_ctrl = sc2336_set_ctrl,
1242 };
1243
sc2336_initialize_controls(struct sc2336 * sc2336)1244 static int sc2336_initialize_controls(struct sc2336 *sc2336)
1245 {
1246 const struct sc2336_mode *mode;
1247 struct v4l2_ctrl_handler *handler;
1248 s64 exposure_max, vblank_def;
1249 u32 h_blank;
1250 int ret;
1251 u64 dst_link_freq = 0;
1252 u64 dst_pixel_rate = 0;
1253
1254 handler = &sc2336->ctrl_handler;
1255 mode = sc2336->cur_mode;
1256 ret = v4l2_ctrl_handler_init(handler, 9);
1257 if (ret)
1258 return ret;
1259 handler->lock = &sc2336->mutex;
1260
1261 sc2336->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
1262 V4L2_CID_LINK_FREQ,
1263 ARRAY_SIZE(link_freq_menu_items) - 1, 0, link_freq_menu_items);
1264 if (sc2336->link_freq)
1265 sc2336->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1266
1267 dst_link_freq = mode->link_freq_idx;
1268 dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
1269 SC2336_BITS_PER_SAMPLE * 2 * SC2336_LANES;
1270 sc2336->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1271 0, PIXEL_RATE_WITH_405M_10BIT, 1, dst_pixel_rate);
1272
1273 __v4l2_ctrl_s_ctrl(sc2336->link_freq, dst_link_freq);
1274
1275 h_blank = mode->hts_def - mode->width;
1276 sc2336->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1277 h_blank, h_blank, 1, h_blank);
1278 if (sc2336->hblank)
1279 sc2336->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1280 vblank_def = mode->vts_def - mode->height;
1281 sc2336->vblank = v4l2_ctrl_new_std(handler, &sc2336_ctrl_ops,
1282 V4L2_CID_VBLANK, vblank_def,
1283 SC2336_VTS_MAX - mode->height,
1284 1, vblank_def);
1285 exposure_max = mode->vts_def - 8;
1286 sc2336->exposure = v4l2_ctrl_new_std(handler, &sc2336_ctrl_ops,
1287 V4L2_CID_EXPOSURE, SC2336_EXPOSURE_MIN,
1288 exposure_max, SC2336_EXPOSURE_STEP,
1289 mode->exp_def);
1290 sc2336->anal_gain = v4l2_ctrl_new_std(handler, &sc2336_ctrl_ops,
1291 V4L2_CID_ANALOGUE_GAIN, SC2336_GAIN_MIN,
1292 SC2336_GAIN_MAX, SC2336_GAIN_STEP,
1293 SC2336_GAIN_DEFAULT);
1294 sc2336->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1295 &sc2336_ctrl_ops,
1296 V4L2_CID_TEST_PATTERN,
1297 ARRAY_SIZE(sc2336_test_pattern_menu) - 1,
1298 0, 0, sc2336_test_pattern_menu);
1299 v4l2_ctrl_new_std(handler, &sc2336_ctrl_ops,
1300 V4L2_CID_HFLIP, 0, 1, 1, 0);
1301 v4l2_ctrl_new_std(handler, &sc2336_ctrl_ops,
1302 V4L2_CID_VFLIP, 0, 1, 1, 0);
1303 if (handler->error) {
1304 ret = handler->error;
1305 dev_err(&sc2336->client->dev,
1306 "Failed to init controls(%d)\n", ret);
1307 goto err_free_handler;
1308 }
1309
1310 sc2336->subdev.ctrl_handler = handler;
1311 sc2336->has_init_exp = false;
1312
1313 return 0;
1314
1315 err_free_handler:
1316 v4l2_ctrl_handler_free(handler);
1317
1318 return ret;
1319 }
1320
sc2336_check_sensor_id(struct sc2336 * sc2336,struct i2c_client * client)1321 static int sc2336_check_sensor_id(struct sc2336 *sc2336,
1322 struct i2c_client *client)
1323 {
1324 struct device *dev = &sc2336->client->dev;
1325 u32 id = 0;
1326 int ret;
1327
1328 if (sc2336->is_thunderboot) {
1329 dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
1330 return 0;
1331 }
1332
1333 ret = sc2336_read_reg(client, SC2336_REG_CHIP_ID,
1334 SC2336_REG_VALUE_16BIT, &id);
1335 if (id != CHIP_ID) {
1336 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1337 return -ENODEV;
1338 }
1339
1340 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1341
1342 return 0;
1343 }
1344
sc2336_configure_regulators(struct sc2336 * sc2336)1345 static int sc2336_configure_regulators(struct sc2336 *sc2336)
1346 {
1347 unsigned int i;
1348
1349 for (i = 0; i < SC2336_NUM_SUPPLIES; i++)
1350 sc2336->supplies[i].supply = sc2336_supply_names[i];
1351
1352 return devm_regulator_bulk_get(&sc2336->client->dev,
1353 SC2336_NUM_SUPPLIES,
1354 sc2336->supplies);
1355 }
1356
sc2336_probe(struct i2c_client * client,const struct i2c_device_id * id)1357 static int sc2336_probe(struct i2c_client *client,
1358 const struct i2c_device_id *id)
1359 {
1360 struct device *dev = &client->dev;
1361 struct device_node *node = dev->of_node;
1362 struct sc2336 *sc2336;
1363 struct v4l2_subdev *sd;
1364 char facing[2];
1365 int ret;
1366 int i, hdr_mode = 0;
1367
1368 dev_info(dev, "driver version: %02x.%02x.%02x",
1369 DRIVER_VERSION >> 16,
1370 (DRIVER_VERSION & 0xff00) >> 8,
1371 DRIVER_VERSION & 0x00ff);
1372
1373 sc2336 = devm_kzalloc(dev, sizeof(*sc2336), GFP_KERNEL);
1374 if (!sc2336)
1375 return -ENOMEM;
1376
1377 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1378 &sc2336->module_index);
1379 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1380 &sc2336->module_facing);
1381 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1382 &sc2336->module_name);
1383 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1384 &sc2336->len_name);
1385 if (ret) {
1386 dev_err(dev, "could not get module information!\n");
1387 return -EINVAL;
1388 }
1389
1390 sc2336->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
1391
1392 sc2336->client = client;
1393 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1394 if (hdr_mode == supported_modes[i].hdr_mode) {
1395 sc2336->cur_mode = &supported_modes[i];
1396 break;
1397 }
1398 }
1399 if (i == ARRAY_SIZE(supported_modes))
1400 sc2336->cur_mode = &supported_modes[0];
1401
1402 sc2336->xvclk = devm_clk_get(dev, "xvclk");
1403 if (IS_ERR(sc2336->xvclk)) {
1404 dev_err(dev, "Failed to get xvclk\n");
1405 return -EINVAL;
1406 }
1407
1408 if (sc2336->is_thunderboot) {
1409 sc2336->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
1410 if (IS_ERR(sc2336->reset_gpio))
1411 dev_warn(dev, "Failed to get reset-gpios\n");
1412 } else {
1413 sc2336->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1414 if (IS_ERR(sc2336->reset_gpio))
1415 dev_warn(dev, "Failed to get reset-gpios\n");
1416 }
1417
1418 sc2336->pinctrl = devm_pinctrl_get(dev);
1419 if (!IS_ERR(sc2336->pinctrl)) {
1420 sc2336->pins_default =
1421 pinctrl_lookup_state(sc2336->pinctrl,
1422 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1423 if (IS_ERR(sc2336->pins_default))
1424 dev_err(dev, "could not get default pinstate\n");
1425
1426 sc2336->pins_sleep =
1427 pinctrl_lookup_state(sc2336->pinctrl,
1428 OF_CAMERA_PINCTRL_STATE_SLEEP);
1429 if (IS_ERR(sc2336->pins_sleep))
1430 dev_err(dev, "could not get sleep pinstate\n");
1431 } else {
1432 dev_err(dev, "no pinctrl\n");
1433 }
1434
1435 ret = sc2336_configure_regulators(sc2336);
1436 if (ret) {
1437 dev_err(dev, "Failed to get power regulators\n");
1438 return ret;
1439 }
1440
1441 mutex_init(&sc2336->mutex);
1442
1443 sd = &sc2336->subdev;
1444 v4l2_i2c_subdev_init(sd, client, &sc2336_subdev_ops);
1445 ret = sc2336_initialize_controls(sc2336);
1446 if (ret)
1447 goto err_destroy_mutex;
1448
1449 ret = __sc2336_power_on(sc2336);
1450 if (ret)
1451 goto err_free_handler;
1452
1453 ret = sc2336_check_sensor_id(sc2336, client);
1454 if (ret)
1455 goto err_power_off;
1456
1457 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1458 sd->internal_ops = &sc2336_internal_ops;
1459 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1460 V4L2_SUBDEV_FL_HAS_EVENTS;
1461 #endif
1462 #if defined(CONFIG_MEDIA_CONTROLLER)
1463 sc2336->pad.flags = MEDIA_PAD_FL_SOURCE;
1464 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1465 ret = media_entity_pads_init(&sd->entity, 1, &sc2336->pad);
1466 if (ret < 0)
1467 goto err_power_off;
1468 #endif
1469
1470 memset(facing, 0, sizeof(facing));
1471 if (strcmp(sc2336->module_facing, "back") == 0)
1472 facing[0] = 'b';
1473 else
1474 facing[0] = 'f';
1475
1476 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1477 sc2336->module_index, facing,
1478 SC2336_NAME, dev_name(sd->dev));
1479 ret = v4l2_async_register_subdev_sensor_common(sd);
1480 if (ret) {
1481 dev_err(dev, "v4l2 async register subdev failed\n");
1482 goto err_clean_entity;
1483 }
1484
1485 pm_runtime_set_active(dev);
1486 pm_runtime_enable(dev);
1487 if (sc2336->is_thunderboot)
1488 pm_runtime_get_sync(dev);
1489 else
1490 pm_runtime_idle(dev);
1491
1492 return 0;
1493
1494 err_clean_entity:
1495 #if defined(CONFIG_MEDIA_CONTROLLER)
1496 media_entity_cleanup(&sd->entity);
1497 #endif
1498 err_power_off:
1499 __sc2336_power_off(sc2336);
1500 err_free_handler:
1501 v4l2_ctrl_handler_free(&sc2336->ctrl_handler);
1502 err_destroy_mutex:
1503 mutex_destroy(&sc2336->mutex);
1504
1505 return ret;
1506 }
1507
sc2336_remove(struct i2c_client * client)1508 static int sc2336_remove(struct i2c_client *client)
1509 {
1510 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1511 struct sc2336 *sc2336 = to_sc2336(sd);
1512
1513 v4l2_async_unregister_subdev(sd);
1514 #if defined(CONFIG_MEDIA_CONTROLLER)
1515 media_entity_cleanup(&sd->entity);
1516 #endif
1517 v4l2_ctrl_handler_free(&sc2336->ctrl_handler);
1518 mutex_destroy(&sc2336->mutex);
1519
1520 pm_runtime_disable(&client->dev);
1521 if (!pm_runtime_status_suspended(&client->dev))
1522 __sc2336_power_off(sc2336);
1523 pm_runtime_set_suspended(&client->dev);
1524
1525 return 0;
1526 }
1527
1528 #if IS_ENABLED(CONFIG_OF)
1529 static const struct of_device_id sc2336_of_match[] = {
1530 { .compatible = "smartsens,sc2336" },
1531 {},
1532 };
1533 MODULE_DEVICE_TABLE(of, sc2336_of_match);
1534 #endif
1535
1536 static const struct i2c_device_id sc2336_match_id[] = {
1537 { "smartsens,sc2336", 0 },
1538 { },
1539 };
1540
1541 static struct i2c_driver sc2336_i2c_driver = {
1542 .driver = {
1543 .name = SC2336_NAME,
1544 .pm = &sc2336_pm_ops,
1545 .of_match_table = of_match_ptr(sc2336_of_match),
1546 },
1547 .probe = &sc2336_probe,
1548 .remove = &sc2336_remove,
1549 .id_table = sc2336_match_id,
1550 };
1551
sensor_mod_init(void)1552 static int __init sensor_mod_init(void)
1553 {
1554 return i2c_add_driver(&sc2336_i2c_driver);
1555 }
1556
sensor_mod_exit(void)1557 static void __exit sensor_mod_exit(void)
1558 {
1559 i2c_del_driver(&sc2336_i2c_driver);
1560 }
1561
1562 #if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC)
1563 subsys_initcall(sensor_mod_init);
1564 #else
1565 device_initcall_sync(sensor_mod_init);
1566 #endif
1567 module_exit(sensor_mod_exit);
1568
1569 MODULE_DESCRIPTION("smartsens sc2336 sensor driver");
1570 MODULE_LICENSE("GPL");
1571