1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov9281 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
7 * V0.0X01.0X03 add enum_frame_interval function.
8 * V0.0X01.0X04 add quick stream on/off
9 * V0.0X01.0X05 add function g_mbus_config
10 */
11
12 #include <linux/clk.h>
13 #include <linux/device.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/sysfs.h>
21 #include <linux/slab.h>
22 #include <linux/rk-camera-module.h>
23 #include <media/media-entity.h>
24 #include <media/v4l2-async.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-subdev.h>
27 #include <linux/pinctrl/consumer.h>
28 #include <linux/version.h>
29
30 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x5)
31
32 #ifndef V4L2_CID_DIGITAL_GAIN
33 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
34 #endif
35
36 #define OV9281_LINK_FREQ_400MHZ 400000000
37 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
38 #define OV9281_PIXEL_RATE (OV9281_LINK_FREQ_400MHZ * 2 * 2 / 10)
39 #define OV9281_XVCLK_FREQ 24000000
40
41 #define CHIP_ID 0x9281
42 #define OV9281_REG_CHIP_ID 0x300a
43
44 #define OV9281_REG_CTRL_MODE 0x0100
45 #define OV9281_MODE_SW_STANDBY 0x0
46 #define OV9281_MODE_STREAMING BIT(0)
47
48 #define OV9281_REG_EXPOSURE 0x3500
49 #define OV9281_EXPOSURE_MIN 4
50 #define OV9281_EXPOSURE_STEP 1
51 #define OV9281_VTS_MAX 0x7fff
52
53 #define OV9281_REG_GAIN_H 0x3508
54 #define OV9281_REG_GAIN_L 0x3509
55 #define OV9281_GAIN_H_MASK 0x07
56 #define OV9281_GAIN_H_SHIFT 8
57 #define OV9281_GAIN_L_MASK 0xff
58 #define OV9281_GAIN_MIN 0x10
59 #define OV9281_GAIN_MAX 0xf8
60 #define OV9281_GAIN_STEP 1
61 #define OV9281_GAIN_DEFAULT 0x10
62
63 #define OV9281_REG_TEST_PATTERN 0x5e00
64 #define OV9281_TEST_PATTERN_ENABLE 0x80
65 #define OV9281_TEST_PATTERN_DISABLE 0x0
66
67 #define OV9281_REG_VTS 0x380e
68
69 #define OV9281_AEC_STROBE_REG 0x3927
70 #define OV9281_AEC_STROBE_REG_H 0x3927
71 #define OV9281_AEC_STROBE_REG_L 0x3928
72
73 #define OV9282_AEC_GROUP_UPDATE_ADDRESS 0x3208
74 #define OV9282_AEC_GROUP_UPDATE_START_DATA 0x00
75 #define OV9282_AEC_GROUP_UPDATE_END_DATA 0x10
76 #define OV9282_AEC_GROUP_UPDATE_END_LAUNCH 0xA0
77
78 #define REG_NULL 0xFFFF
79
80 #define OV9281_REG_VALUE_08BIT 1
81 #define OV9281_REG_VALUE_16BIT 2
82 #define OV9281_REG_VALUE_24BIT 3
83
84 #define OV9281_LANES 2
85 #define OV9281_BITS_PER_SAMPLE 10
86
87 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
88 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
89
90 #define OV9281_NAME "ov9281"
91
92
93 //for SL
94 #define OV9282_FPS 30
95 #define OV9282_FLIP_ENABLE 1
96 #define EXP_DEFAULT_TIME_US 3000
97 #define OV9282_DEFAULT_GAIN 1
98
99 #define OV9282_VTS_30_FPS 0xe48
100 #define OV9282_HTS_30_FPS 0x2d8
101
102 #define FPS_HTS_MODE 1
103 #if FPS_HTS_MODE
104 #define OV9282_VTS OV9282_VTS_30_FPS
105 #define OV9282_HTS (OV9282_HTS_30_FPS * 30 / OV9282_FPS)
106 #else
107 #define OV9282_VTS (OV9282_HTS_30_FPS * 30 / OV9282_FPS)
108 #define OV9282_HTS OV9282_VTS_30_FPS
109 #endif
110
111 #define TIME_MS 1000
112
113 #define OV9282_EXP_TIME_REG ((uint16_t)(EXP_DEFAULT_TIME_US / 1000 * \
114 OV9282_FPS * OV9282_VTS / TIME_MS) << 4)
115 #define OV9282_STROBE_TIME_REG (OV9282_EXP_TIME_REG >> 4)
116
117
118 static const char * const ov9281_supply_names[] = {
119 "avdd", /* Analog power */
120 "dovdd", /* Digital I/O power */
121 "dvdd", /* Digital core power */
122 };
123
124 #define OV9281_NUM_SUPPLIES ARRAY_SIZE(ov9281_supply_names)
125
126 struct regval {
127 u16 addr;
128 u8 val;
129 };
130
131 struct ov9281_mode {
132 u32 width;
133 u32 height;
134 struct v4l2_fract max_fps;
135 u32 hts_def;
136 u32 vts_def;
137 u32 exp_def;
138 const struct regval *reg_list;
139 };
140
141 struct ov9281 {
142 struct i2c_client *client;
143 struct clk *xvclk;
144 struct gpio_desc *reset_gpio;
145 struct gpio_desc *pwdn_gpio;
146 struct regulator_bulk_data supplies[OV9281_NUM_SUPPLIES];
147
148 struct pinctrl *pinctrl;
149 struct pinctrl_state *pins_default;
150 struct pinctrl_state *pins_sleep;
151
152 struct v4l2_subdev subdev;
153 struct media_pad pad;
154 struct v4l2_ctrl_handler ctrl_handler;
155 struct v4l2_ctrl *exposure;
156 struct v4l2_ctrl *anal_gain;
157 struct v4l2_ctrl *digi_gain;
158 struct v4l2_ctrl *hblank;
159 struct v4l2_ctrl *vblank;
160 struct v4l2_ctrl *test_pattern;
161 struct v4l2_ctrl *strobe;
162 struct mutex mutex;
163 bool streaming;
164 bool power_on;
165 bool is_thunderboot;
166 bool is_thunderboot_ng;
167 bool is_first_streamoff;
168 const struct ov9281_mode *cur_mode;
169 u32 module_index;
170 const char *module_facing;
171 const char *module_name;
172 const char *len_name;
173 };
174
175 #define to_ov9281(sd) container_of(sd, struct ov9281, subdev)
176
177 /*
178 * Xclk 24Mhz
179 */
180 static const struct regval ov9281_global_regs[] = {
181 {REG_NULL, 0x00},
182 };
183
184 /*
185 * Xclk 24Mhz
186 * max_framerate 120fps
187 * mipi_datarate per lane 800Mbps
188 */
189 static const struct regval ov9281_1280x800_regs[] = {
190 {0x0103, 0x01},
191 {0x0302, 0x32},
192 {0x030d, 0x50},
193 {0x030e, 0x02},
194 {0x3001, 0x00},
195 {0x3004, 0x00},
196 {0x3005, 0x00},
197 {0x3006, 0x04},
198 {0x3011, 0x0a},
199 {0x3013, 0x18},
200 {0x3022, 0x01},
201 {0x3023, 0x00},
202 {0x302c, 0x00},
203 {0x302f, 0x00},
204 {0x3030, 0x04},
205 {0x3039, 0x32},
206 {0x303a, 0x00},
207 {0x303f, 0x01},
208 {0x3500, 0x00},
209 {0x3501, 0x2a},
210 {0x3502, 0x90},
211 {0x3503, 0x08},
212 {0x3505, 0x8c},
213 {0x3507, 0x03},
214 {0x3508, 0x00},
215 {0x3509, 0x10},
216 {0x3610, 0x80},
217 {0x3611, 0xa0},
218 {0x3620, 0x6f},
219 {0x3632, 0x56},
220 {0x3633, 0x78},
221 {0x3662, 0x05},
222 {0x3666, 0x00},
223 {0x366f, 0x5a},
224 {0x3680, 0x84},
225 {0x3712, 0x80},
226 {0x372d, 0x22},
227 {0x3731, 0x80},
228 {0x3732, 0x30},
229 {0x3778, 0x00},
230 {0x377d, 0x22},
231 {0x3788, 0x02},
232 {0x3789, 0xa4},
233 {0x378a, 0x00},
234 {0x378b, 0x4a},
235 {0x3799, 0x20},
236 {0x3800, 0x00},
237 {0x3801, 0x00},
238 {0x3802, 0x00},
239 {0x3803, 0x00},
240 {0x3804, 0x05},
241 {0x3805, 0x0f},
242 {0x3806, 0x03},
243 {0x3807, 0x2f},
244 {0x3808, 0x05},
245 {0x3809, 0x00},
246 {0x380a, 0x03},
247 {0x380b, 0x20},
248 {0x380c, 0x02},
249 {0x380d, 0xd8},
250 {0x380e, 0x03},
251 {0x380f, 0x8e},
252 {0x3810, 0x00},
253 {0x3811, 0x08},
254 {0x3812, 0x00},
255 {0x3813, 0x08},
256 {0x3814, 0x11},
257 {0x3815, 0x11},
258 {0x3820, 0x40},
259 {0x3821, 0x00},
260 {0x3881, 0x42},
261 {0x38b1, 0x00},
262 {0x3920, 0xff},
263 {0x4003, 0x40},
264 {0x4008, 0x04},
265 {0x4009, 0x0b},
266 {0x400c, 0x00},
267 {0x400d, 0x07},
268 {0x4010, 0x40},
269 {0x4043, 0x40},
270 {0x4307, 0x30},
271 {0x4317, 0x00},
272 {0x4501, 0x00},
273 {0x4507, 0x00},
274 {0x4509, 0x00},
275 {0x450a, 0x08},
276 {0x4601, 0x04},
277 {0x470f, 0x00},
278 {0x4f07, 0x00},
279 {0x4800, 0x00},
280 {0x5000, 0x9f},
281 {0x5001, 0x00},
282 {0x5e00, 0x00},
283 {0x5d00, 0x07},
284 {0x5d01, 0x00},
285 {REG_NULL, 0x00},
286 };
287
288
289 static const struct regval ov9281_1280x800_30fps_regs[] = {
290 {0x0103, 0x01},/* software sleep */
291 {0x0100, 0x00},/* software reset */
292
293 /* use 20171222 strobe ok data ok */
294 {0x0302, 0x32},
295 {0x030d, 0x50},
296 {0x030e, 0x02},
297 {0x3001, 0x00},
298 {0x3004, 0x00},
299 {0x3005, 0x00},
300 {0x3011, 0x0a},
301 {0x3013, 0x18},
302 {0x3022, 0x01},
303 {0x3030, 0x10},
304 {0x3039, 0x32},
305 {0x303a, 0x00},
306 {0x3500, 0x00}, //exposure[19:16]
307 {0x3501, 0x2a}, //exposure[15:8]
308 {0x3502, 0x90}, //exposure[7:0]
309 {0x3503, 0x08}, //exposure change delay 1 frame,gain change select
310 {0x3505, 0x8c},
311 {0x3507, 0x03},
312 {0x3508, 0x00},
313 {0x3509, ((OV9282_DEFAULT_GAIN & 0x0f) << 4)}, //gain (gain<<4)
314 {0x3610, 0x80},
315 {0x3611, 0xa0},
316 {0x3620, 0x6f},
317 {0x3632, 0x56},
318 {0x3633, 0x78},
319 {0x3662, 0x05},
320 {0x3666, 0x00},
321 {0x366f, 0x5a},
322 {0x3680, 0x84},
323 {0x3712, 0x80},
324 {0x372d, 0x22},
325 {0x3731, 0x80},
326 {0x3732, 0x30},
327 {0x3778, 0x00},
328 {0x377d, 0x22},
329 {0x3788, 0x02},
330 {0x3789, 0xa4},
331 {0x378a, 0x00},
332 {0x378b, 0x4a},
333 {0x3799, 0x20},
334 {0x3800, 0x00},
335 {0x3801, 0x00},
336 {0x3802, 0x00},
337 {0x3803, 0x00},
338 {0x3804, 0x05},
339 {0x3805, 0x0f},
340 {0x3806, 0x03},
341 {0x3807, 0x2f},
342 {0x3808, 0x05},
343 {0x3809, 0x00},
344 {0x380a, 0x03}, /* 1280x800 output */
345 {0x380b, 0x20},
346 {0x380c, (OV9282_HTS >> 8)},
347 {0x380d, (OV9282_HTS & 0xff)},
348
349 {0x380e, OV9282_VTS >> 8},
350 {0x380f, OV9282_VTS & 0xff},
351
352 {0x3810, 0x00},
353 {0x3811, 0x08},
354 {0x3812, 0x00},
355 {0x3813, 0x08}, /* 1280x800 v offset */
356 {0x3814, 0x11},
357 {0x3815, 0x11},
358 #if OV9282_FLIP_ENABLE
359 {0x3820, 0x40},
360 {0x3821, 0x04},
361 #else
362 {0x3820, 0x44},
363 {0x3821, 0x00},
364 #endif
365 {0x3881, 0x42},
366 {0x38b1, 0x00},
367 {0x3920, 0xff},
368 {0x4003, 0x40},
369 {0x4008, 0x04},
370 {0x4009, 0x0b},
371 {0x400c, 0x00},
372 {0x400d, 0x07},
373 {0x4010, 0x40},
374 {0x4043, 0x40},
375 {0x4307, 0x30},
376 {0x4317, 0x00},
377 {0x4501, 0x00},
378 {0x4507, 0x00},
379 {0x4509, 0x00},
380 {0x450a, 0x08},
381 {0x4601, 0x04},
382 {0x470f, 0x00},
383 {0x4f07, 0x00},
384 {0x4800, 0x00},
385 {0x5000, 0x9f},
386 {0x5001, 0x00},
387 {0x5e00, 0x00}, //color bar
388 {0x5d00, 0x07},
389 {0x5d01, 0x00},
390 /* for vsync width 630us */
391 {0x4311, 0xc8},
392 {0x4312, 0x00},
393 //{0x0100, 0x01},
394
395 /* for strobe */
396 {0x3006, 0x0a},
397
398 /* exposure control */
399 {0x3500, 0x00}, //exposure[19:16]
400 {0x3501, OV9282_EXP_TIME_REG >> 8}, //exposure[15:8]
401 {0x3502, OV9282_EXP_TIME_REG & 0xff}, //exposure[7:0] //low4 bit fraction bit
402
403 /* for strobe control */
404 //{0x3921,0x00}, //bit[7] shift direction, default 0 positive
405 {0x3924, 0x00}, //strobe shift[7:0]
406 {0x3925, 0x00}, //span[31:24]
407 {0x3926, 0x00}, //span[23:16]
408
409 {0x3927, OV9282_STROBE_TIME_REG >> 8}, //span[15:8]
410 {0x3928, OV9282_STROBE_TIME_REG & 0xff},//span[7:0] exposure 0xa4
411 {REG_NULL, 0x00},
412 };
413
414 static const struct ov9281_mode supported_modes[] = {
415 {
416 .width = 1280,
417 .height = 800,
418 .max_fps = {
419 .numerator = 10000,
420 .denominator = 300000,
421 },
422 .exp_def = 0x0320,
423 .hts_def = 0x02d8,
424 .vts_def = 0x0e48,
425 .reg_list = ov9281_1280x800_30fps_regs,
426 },
427
428 {
429 .width = 1280,
430 .height = 800,
431 .max_fps = {
432 .numerator = 10000,
433 .denominator = 1200000,
434 },
435 .exp_def = 0x0320,
436 .hts_def = 0x0b60,//0x2d8*4
437 .vts_def = 0x038e,
438 .reg_list = ov9281_1280x800_regs,
439 },
440 };
441
442 static const s64 link_freq_menu_items[] = {
443 OV9281_LINK_FREQ_400MHZ
444 };
445
446 static const char * const ov9281_test_pattern_menu[] = {
447 "Disabled",
448 "Vertical Color Bar Type 1",
449 "Vertical Color Bar Type 2",
450 "Vertical Color Bar Type 3",
451 "Vertical Color Bar Type 4"
452 };
453
454 /* Write registers up to 4 at a time */
ov9281_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)455 static int ov9281_write_reg(struct i2c_client *client, u16 reg,
456 u32 len, u32 val)
457 {
458 u32 buf_i, val_i;
459 u8 buf[6];
460 u8 *val_p;
461 __be32 val_be;
462
463 if (len > 4)
464 return -EINVAL;
465
466 buf[0] = reg >> 8;
467 buf[1] = reg & 0xff;
468
469 val_be = cpu_to_be32(val);
470 val_p = (u8 *)&val_be;
471 buf_i = 2;
472 val_i = 4 - len;
473
474 while (val_i < 4)
475 buf[buf_i++] = val_p[val_i++];
476
477 if (i2c_master_send(client, buf, len + 2) != len + 2)
478 return -EIO;
479
480 return 0;
481 }
482
ov9281_write_array(struct i2c_client * client,const struct regval * regs)483 static int ov9281_write_array(struct i2c_client *client,
484 const struct regval *regs)
485 {
486 u32 i;
487 int ret = 0;
488
489 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
490 ret = ov9281_write_reg(client, regs[i].addr,
491 OV9281_REG_VALUE_08BIT, regs[i].val);
492
493 return ret;
494 }
495
496 /* Read registers up to 4 at a time */
ov9281_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)497 static int ov9281_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
498 u32 *val)
499 {
500 struct i2c_msg msgs[2];
501 u8 *data_be_p;
502 __be32 data_be = 0;
503 __be16 reg_addr_be = cpu_to_be16(reg);
504 int ret;
505
506 if (len > 4 || !len)
507 return -EINVAL;
508
509 data_be_p = (u8 *)&data_be;
510 /* Write register address */
511 msgs[0].addr = client->addr;
512 msgs[0].flags = 0;
513 msgs[0].len = 2;
514 msgs[0].buf = (u8 *)®_addr_be;
515
516 /* Read data from register */
517 msgs[1].addr = client->addr;
518 msgs[1].flags = I2C_M_RD;
519 msgs[1].len = len;
520 msgs[1].buf = &data_be_p[4 - len];
521
522 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
523 if (ret != ARRAY_SIZE(msgs))
524 return -EIO;
525
526 *val = be32_to_cpu(data_be);
527
528 return 0;
529 }
530
ov9281_get_reso_dist(const struct ov9281_mode * mode,struct v4l2_mbus_framefmt * framefmt)531 static int ov9281_get_reso_dist(const struct ov9281_mode *mode,
532 struct v4l2_mbus_framefmt *framefmt)
533 {
534 return abs(mode->width - framefmt->width) +
535 abs(mode->height - framefmt->height);
536 }
537
538 static const struct ov9281_mode *
ov9281_find_best_fit(struct v4l2_subdev_format * fmt)539 ov9281_find_best_fit(struct v4l2_subdev_format *fmt)
540 {
541 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
542 int dist;
543 int cur_best_fit = 0;
544 int cur_best_fit_dist = -1;
545 unsigned int i;
546
547 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
548 dist = ov9281_get_reso_dist(&supported_modes[i], framefmt);
549 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
550 cur_best_fit_dist = dist;
551 cur_best_fit = i;
552 }
553 }
554
555 return &supported_modes[cur_best_fit];
556 }
557
ov9281_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)558 static int ov9281_set_fmt(struct v4l2_subdev *sd,
559 struct v4l2_subdev_pad_config *cfg,
560 struct v4l2_subdev_format *fmt)
561 {
562 struct ov9281 *ov9281 = to_ov9281(sd);
563 const struct ov9281_mode *mode;
564 s64 h_blank, vblank_def;
565
566 mutex_lock(&ov9281->mutex);
567
568 mode = ov9281_find_best_fit(fmt);
569 fmt->format.code = MEDIA_BUS_FMT_Y10_1X10;
570 fmt->format.width = mode->width;
571 fmt->format.height = mode->height;
572 fmt->format.field = V4L2_FIELD_NONE;
573 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
574 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
575 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
576 #else
577 mutex_unlock(&ov9281->mutex);
578 return -ENOTTY;
579 #endif
580 } else {
581 ov9281->cur_mode = mode;
582 h_blank = mode->hts_def - mode->width;
583 __v4l2_ctrl_modify_range(ov9281->hblank, h_blank,
584 h_blank, 1, h_blank);
585 vblank_def = mode->vts_def - mode->height;
586 __v4l2_ctrl_modify_range(ov9281->vblank, vblank_def,
587 OV9281_VTS_MAX - mode->height,
588 1, vblank_def);
589 }
590
591 mutex_unlock(&ov9281->mutex);
592
593 return 0;
594 }
595
ov9281_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)596 static int ov9281_get_fmt(struct v4l2_subdev *sd,
597 struct v4l2_subdev_pad_config *cfg,
598 struct v4l2_subdev_format *fmt)
599 {
600 struct ov9281 *ov9281 = to_ov9281(sd);
601 const struct ov9281_mode *mode = ov9281->cur_mode;
602
603 mutex_lock(&ov9281->mutex);
604 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
605 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
606 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
607 #else
608 mutex_unlock(&ov9281->mutex);
609 return -ENOTTY;
610 #endif
611 } else {
612 fmt->format.width = mode->width;
613 fmt->format.height = mode->height;
614 fmt->format.code = MEDIA_BUS_FMT_Y10_1X10;
615 fmt->format.field = V4L2_FIELD_NONE;
616 }
617 mutex_unlock(&ov9281->mutex);
618
619 return 0;
620 }
621
ov9281_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)622 static int ov9281_enum_mbus_code(struct v4l2_subdev *sd,
623 struct v4l2_subdev_pad_config *cfg,
624 struct v4l2_subdev_mbus_code_enum *code)
625 {
626 if (code->index != 0)
627 return -EINVAL;
628 code->code = MEDIA_BUS_FMT_Y10_1X10;
629
630 return 0;
631 }
632
ov9281_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)633 static int ov9281_enum_frame_sizes(struct v4l2_subdev *sd,
634 struct v4l2_subdev_pad_config *cfg,
635 struct v4l2_subdev_frame_size_enum *fse)
636 {
637 if (fse->index >= ARRAY_SIZE(supported_modes))
638 return -EINVAL;
639
640 if (fse->code != MEDIA_BUS_FMT_Y10_1X10)
641 return -EINVAL;
642
643 fse->min_width = supported_modes[fse->index].width;
644 fse->max_width = supported_modes[fse->index].width;
645 fse->max_height = supported_modes[fse->index].height;
646 fse->min_height = supported_modes[fse->index].height;
647
648 return 0;
649 }
650
ov9281_enable_test_pattern(struct ov9281 * ov9281,u32 pattern)651 static int ov9281_enable_test_pattern(struct ov9281 *ov9281, u32 pattern)
652 {
653 u32 val;
654
655 if (pattern)
656 val = (pattern - 1) | OV9281_TEST_PATTERN_ENABLE;
657 else
658 val = OV9281_TEST_PATTERN_DISABLE;
659
660 return ov9281_write_reg(ov9281->client, OV9281_REG_TEST_PATTERN,
661 OV9281_REG_VALUE_08BIT, val);
662 }
663
ov9281_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)664 static int ov9281_g_frame_interval(struct v4l2_subdev *sd,
665 struct v4l2_subdev_frame_interval *fi)
666 {
667 struct ov9281 *ov9281 = to_ov9281(sd);
668 const struct ov9281_mode *mode = ov9281->cur_mode;
669
670 fi->interval = mode->max_fps;
671
672 return 0;
673 }
674
ov9281_get_module_inf(struct ov9281 * ov9281,struct rkmodule_inf * inf)675 static void ov9281_get_module_inf(struct ov9281 *ov9281,
676 struct rkmodule_inf *inf)
677 {
678 memset(inf, 0, sizeof(*inf));
679 strlcpy(inf->base.sensor, OV9281_NAME, sizeof(inf->base.sensor));
680 strlcpy(inf->base.module, ov9281->module_name,
681 sizeof(inf->base.module));
682 strlcpy(inf->base.lens, ov9281->len_name, sizeof(inf->base.lens));
683 }
684
ov9281_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)685 static long ov9281_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
686 {
687 struct ov9281 *ov9281 = to_ov9281(sd);
688 long ret = 0;
689 u32 stream = 0;
690
691 switch (cmd) {
692 case RKMODULE_GET_MODULE_INFO:
693 ov9281_get_module_inf(ov9281, (struct rkmodule_inf *)arg);
694 break;
695 case RKMODULE_SET_QUICK_STREAM:
696
697 stream = *((u32 *)arg);
698
699 if (stream)
700 ret = ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
701 OV9281_REG_VALUE_08BIT, OV9281_MODE_STREAMING);
702 else
703 ret = ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
704 OV9281_REG_VALUE_08BIT, OV9281_MODE_SW_STANDBY);
705 break;
706 default:
707 ret = -ENOIOCTLCMD;
708 break;
709 }
710
711 return ret;
712 }
713
714 #ifdef CONFIG_COMPAT
ov9281_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)715 static long ov9281_compat_ioctl32(struct v4l2_subdev *sd,
716 unsigned int cmd, unsigned long arg)
717 {
718 void __user *up = compat_ptr(arg);
719 struct rkmodule_inf *inf;
720 struct rkmodule_awb_cfg *cfg;
721 long ret;
722 u32 stream = 0;
723
724 switch (cmd) {
725 case RKMODULE_GET_MODULE_INFO:
726 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
727 if (!inf) {
728 ret = -ENOMEM;
729 return ret;
730 }
731
732 ret = ov9281_ioctl(sd, cmd, inf);
733 if (!ret)
734 ret = copy_to_user(up, inf, sizeof(*inf));
735 kfree(inf);
736 break;
737 case RKMODULE_AWB_CFG:
738 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
739 if (!cfg) {
740 ret = -ENOMEM;
741 return ret;
742 }
743
744 ret = copy_from_user(cfg, up, sizeof(*cfg));
745 if (!ret)
746 ret = ov9281_ioctl(sd, cmd, cfg);
747 kfree(cfg);
748 break;
749 case RKMODULE_SET_QUICK_STREAM:
750 ret = copy_from_user(&stream, up, sizeof(u32));
751 if (!ret)
752 ret = ov9281_ioctl(sd, cmd, &stream);
753 break;
754 default:
755 ret = -ENOIOCTLCMD;
756 break;
757 }
758
759 return ret;
760 }
761 #endif
762
__ov9281_start_stream(struct ov9281 * ov9281)763 static int __ov9281_start_stream(struct ov9281 *ov9281)
764 {
765 int ret;
766
767 if (!ov9281->is_thunderboot) {
768 ret = ov9281_write_array(ov9281->client, ov9281->cur_mode->reg_list);
769 if (ret)
770 return ret;
771 }
772 /* In case these controls are set before streaming */
773 mutex_unlock(&ov9281->mutex);
774 ret = v4l2_ctrl_handler_setup(&ov9281->ctrl_handler);
775 mutex_lock(&ov9281->mutex);
776 if (ret)
777 return ret;
778
779 return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
780 OV9281_REG_VALUE_08BIT, OV9281_MODE_STREAMING);
781 }
782
__ov9281_stop_stream(struct ov9281 * ov9281)783 static int __ov9281_stop_stream(struct ov9281 *ov9281)
784 {
785 if (ov9281->is_thunderboot)
786 ov9281->is_first_streamoff = true;
787 return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
788 OV9281_REG_VALUE_08BIT, OV9281_MODE_SW_STANDBY);
789 }
790
ov9281_s_stream(struct v4l2_subdev * sd,int on)791 static int ov9281_s_stream(struct v4l2_subdev *sd, int on)
792 {
793 struct ov9281 *ov9281 = to_ov9281(sd);
794 struct i2c_client *client = ov9281->client;
795 int ret = 0;
796
797 mutex_lock(&ov9281->mutex);
798 on = !!on;
799 if (on == ov9281->streaming)
800 goto unlock_and_return;
801
802 if (on) {
803 ret = pm_runtime_get_sync(&client->dev);
804 if (ret < 0) {
805 pm_runtime_put_noidle(&client->dev);
806 goto unlock_and_return;
807 }
808
809 ret = __ov9281_start_stream(ov9281);
810 if (ret) {
811 v4l2_err(sd, "start stream failed while write regs\n");
812 pm_runtime_put(&client->dev);
813 goto unlock_and_return;
814 }
815 } else {
816 __ov9281_stop_stream(ov9281);
817 pm_runtime_put(&client->dev);
818 }
819
820 ov9281->streaming = on;
821
822 unlock_and_return:
823 mutex_unlock(&ov9281->mutex);
824
825 return ret;
826 }
827
ov9281_s_power(struct v4l2_subdev * sd,int on)828 static int ov9281_s_power(struct v4l2_subdev *sd, int on)
829 {
830 struct ov9281 *ov9281 = to_ov9281(sd);
831 struct i2c_client *client = ov9281->client;
832 int ret = 0;
833
834 mutex_lock(&ov9281->mutex);
835
836 /* If the power state is not modified - no work to do. */
837 if (ov9281->power_on == !!on)
838 goto unlock_and_return;
839
840 if (on) {
841 ret = pm_runtime_get_sync(&client->dev);
842 if (ret < 0) {
843 pm_runtime_put_noidle(&client->dev);
844 goto unlock_and_return;
845 }
846 ret = ov9281_write_array(ov9281->client, ov9281_global_regs);
847 if (ret) {
848 v4l2_err(sd, "could not set init registers\n");
849 pm_runtime_put_noidle(&client->dev);
850 goto unlock_and_return;
851 }
852 ov9281->power_on = true;
853 } else {
854 pm_runtime_put(&client->dev);
855 ov9281->power_on = false;
856 }
857
858 unlock_and_return:
859 mutex_unlock(&ov9281->mutex);
860
861 return ret;
862 }
863
864 /* Calculate the delay in us by clock rate and clock cycles */
ov9281_cal_delay(u32 cycles)865 static inline u32 ov9281_cal_delay(u32 cycles)
866 {
867 return DIV_ROUND_UP(cycles, OV9281_XVCLK_FREQ / 1000 / 1000);
868 }
869
__ov9281_power_on(struct ov9281 * ov9281)870 static int __ov9281_power_on(struct ov9281 *ov9281)
871 {
872 int ret;
873 u32 delay_us;
874 struct device *dev = &ov9281->client->dev;
875
876 /* No need when thunderboot. */
877 if (ov9281->is_thunderboot) {
878 return 0;
879 }
880
881 if (!IS_ERR_OR_NULL(ov9281->pins_default)) {
882 ret = pinctrl_select_state(ov9281->pinctrl,
883 ov9281->pins_default);
884 if (ret < 0)
885 dev_err(dev, "could not set pins\n");
886 }
887
888 ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
889 if (ret < 0)
890 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
891 if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
892 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
893 ret = clk_prepare_enable(ov9281->xvclk);
894 if (ret < 0) {
895 dev_err(dev, "Failed to enable xvclk\n");
896 return ret;
897 }
898
899 if (!IS_ERR(ov9281->reset_gpio))
900 gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
901
902 ret = regulator_bulk_enable(OV9281_NUM_SUPPLIES, ov9281->supplies);
903 if (ret < 0) {
904 dev_err(dev, "Failed to enable regulators\n");
905 goto disable_clk;
906 }
907
908 if (!IS_ERR(ov9281->reset_gpio))
909 gpiod_set_value_cansleep(ov9281->reset_gpio, 1);
910
911 usleep_range(500, 1000);
912 if (!IS_ERR(ov9281->pwdn_gpio))
913 gpiod_set_value_cansleep(ov9281->pwdn_gpio, 1);
914
915 /* 8192 cycles prior to first SCCB transaction */
916 delay_us = ov9281_cal_delay(8192);
917 usleep_range(delay_us, delay_us * 2);
918
919 return 0;
920
921 disable_clk:
922 clk_disable_unprepare(ov9281->xvclk);
923
924 return ret;
925 }
926
__ov9281_power_off(struct ov9281 * ov9281)927 static void __ov9281_power_off(struct ov9281 *ov9281)
928 {
929 int ret;
930 struct device *dev = &ov9281->client->dev;
931
932 if (ov9281->is_thunderboot) {
933 if (ov9281->is_first_streamoff) {
934 ov9281->is_thunderboot = false;
935 ov9281->is_first_streamoff = false;
936 } else {
937 return;
938 }
939 }
940
941 if (!IS_ERR(ov9281->pwdn_gpio))
942 gpiod_set_value_cansleep(ov9281->pwdn_gpio, 0);
943 clk_disable_unprepare(ov9281->xvclk);
944 if (!IS_ERR(ov9281->reset_gpio))
945 gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
946 if (!IS_ERR_OR_NULL(ov9281->pins_sleep)) {
947 ret = pinctrl_select_state(ov9281->pinctrl,
948 ov9281->pins_sleep);
949 if (ret < 0)
950 dev_dbg(dev, "could not set pins\n");
951 }
952 regulator_bulk_disable(OV9281_NUM_SUPPLIES, ov9281->supplies);
953 }
954
ov9281_runtime_resume(struct device * dev)955 static int ov9281_runtime_resume(struct device *dev)
956 {
957 struct i2c_client *client = to_i2c_client(dev);
958 struct v4l2_subdev *sd = i2c_get_clientdata(client);
959 struct ov9281 *ov9281 = to_ov9281(sd);
960
961 return __ov9281_power_on(ov9281);
962 }
963
ov9281_runtime_suspend(struct device * dev)964 static int ov9281_runtime_suspend(struct device *dev)
965 {
966 struct i2c_client *client = to_i2c_client(dev);
967 struct v4l2_subdev *sd = i2c_get_clientdata(client);
968 struct ov9281 *ov9281 = to_ov9281(sd);
969
970 __ov9281_power_off(ov9281);
971
972 return 0;
973 }
974
975 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov9281_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)976 static int ov9281_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
977 {
978 struct ov9281 *ov9281 = to_ov9281(sd);
979 struct v4l2_mbus_framefmt *try_fmt =
980 v4l2_subdev_get_try_format(sd, fh->pad, 0);
981 const struct ov9281_mode *def_mode = &supported_modes[0];
982
983 mutex_lock(&ov9281->mutex);
984 /* Initialize try_fmt */
985 try_fmt->width = def_mode->width;
986 try_fmt->height = def_mode->height;
987 try_fmt->code = MEDIA_BUS_FMT_Y10_1X10;
988 try_fmt->field = V4L2_FIELD_NONE;
989
990 mutex_unlock(&ov9281->mutex);
991 /* No crop or compose */
992
993 return 0;
994 }
995 #endif
996
ov9281_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)997 static int ov9281_enum_frame_interval(struct v4l2_subdev *sd,
998 struct v4l2_subdev_pad_config *cfg,
999 struct v4l2_subdev_frame_interval_enum *fie)
1000 {
1001 if (fie->index >= ARRAY_SIZE(supported_modes))
1002 return -EINVAL;
1003
1004 if (fie->code != MEDIA_BUS_FMT_Y10_1X10)
1005 return -EINVAL;
1006
1007 fie->width = supported_modes[fie->index].width;
1008 fie->height = supported_modes[fie->index].height;
1009 fie->interval = supported_modes[fie->index].max_fps;
1010 return 0;
1011 }
1012
ov9281_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1013 static int ov9281_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
1014 struct v4l2_mbus_config *config)
1015 {
1016 u32 val = 0;
1017
1018 val = 1 << (OV9281_LANES - 1) |
1019 V4L2_MBUS_CSI2_CHANNEL_0 |
1020 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1021 config->type = V4L2_MBUS_CSI2_DPHY;
1022 config->flags = val;
1023
1024 return 0;
1025 }
1026
1027 static const struct dev_pm_ops ov9281_pm_ops = {
1028 SET_RUNTIME_PM_OPS(ov9281_runtime_suspend,
1029 ov9281_runtime_resume, NULL)
1030 };
1031
1032 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1033 static const struct v4l2_subdev_internal_ops ov9281_internal_ops = {
1034 .open = ov9281_open,
1035 };
1036 #endif
1037
1038 static const struct v4l2_subdev_core_ops ov9281_core_ops = {
1039 .s_power = ov9281_s_power,
1040 .ioctl = ov9281_ioctl,
1041 #ifdef CONFIG_COMPAT
1042 .compat_ioctl32 = ov9281_compat_ioctl32,
1043 #endif
1044 };
1045
1046 static const struct v4l2_subdev_video_ops ov9281_video_ops = {
1047 .s_stream = ov9281_s_stream,
1048 .g_frame_interval = ov9281_g_frame_interval,
1049 };
1050
1051 static const struct v4l2_subdev_pad_ops ov9281_pad_ops = {
1052 .enum_mbus_code = ov9281_enum_mbus_code,
1053 .enum_frame_size = ov9281_enum_frame_sizes,
1054 .enum_frame_interval = ov9281_enum_frame_interval,
1055 .get_fmt = ov9281_get_fmt,
1056 .set_fmt = ov9281_set_fmt,
1057 .get_mbus_config = ov9281_g_mbus_config,
1058 };
1059
1060 static const struct v4l2_subdev_ops ov9281_subdev_ops = {
1061 .core = &ov9281_core_ops,
1062 .video = &ov9281_video_ops,
1063 .pad = &ov9281_pad_ops,
1064 };
1065
ov9281_set_ctrl(struct v4l2_ctrl * ctrl)1066 static int ov9281_set_ctrl(struct v4l2_ctrl *ctrl)
1067 {
1068 struct ov9281 *ov9281 = container_of(ctrl->handler,
1069 struct ov9281, ctrl_handler);
1070 struct i2c_client *client = ov9281->client;
1071 s64 max;
1072 int ret = 0;
1073
1074 /* Propagate change of current control to all related controls */
1075 switch (ctrl->id) {
1076 case V4L2_CID_VBLANK:
1077 /* Update max exposure while meeting expected vblanking */
1078 max = ov9281->cur_mode->height + ctrl->val - 4;
1079 __v4l2_ctrl_modify_range(ov9281->exposure,
1080 ov9281->exposure->minimum, max,
1081 ov9281->exposure->step,
1082 ov9281->exposure->default_value);
1083 break;
1084 }
1085
1086 if (!pm_runtime_get_if_in_use(&client->dev))
1087 return 0;
1088
1089 switch (ctrl->id) {
1090 case V4L2_CID_EXPOSURE:
1091 ov9281_write_reg(ov9281->client, OV9282_AEC_GROUP_UPDATE_ADDRESS,
1092 OV9281_REG_VALUE_08BIT, OV9282_AEC_GROUP_UPDATE_START_DATA);
1093
1094 /* 4 least significant bits of expsoure are fractional part */
1095 ret = ov9281_write_reg(ov9281->client, OV9281_REG_EXPOSURE,
1096 OV9281_REG_VALUE_24BIT, ctrl->val << 4);
1097
1098 ov9281_write_reg(ov9281->client, OV9282_AEC_GROUP_UPDATE_ADDRESS,
1099 OV9281_REG_VALUE_08BIT, OV9282_AEC_GROUP_UPDATE_END_DATA);
1100 ov9281_write_reg(ov9281->client, OV9282_AEC_GROUP_UPDATE_ADDRESS,
1101 OV9281_REG_VALUE_08BIT, OV9282_AEC_GROUP_UPDATE_END_LAUNCH);
1102 break;
1103 case V4L2_CID_ANALOGUE_GAIN:
1104 ret = ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_H,
1105 OV9281_REG_VALUE_08BIT,
1106 (ctrl->val >> OV9281_GAIN_H_SHIFT) & OV9281_GAIN_H_MASK);
1107 ret |= ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_L,
1108 OV9281_REG_VALUE_08BIT,
1109 ctrl->val & OV9281_GAIN_L_MASK);
1110 break;
1111 case V4L2_CID_VBLANK:
1112 ret = ov9281_write_reg(ov9281->client, OV9281_REG_VTS,
1113 OV9281_REG_VALUE_16BIT,
1114 ctrl->val + ov9281->cur_mode->height);
1115 break;
1116 case V4L2_CID_BRIGHTNESS:
1117 ret = ov9281_write_reg(ov9281->client, OV9281_AEC_STROBE_REG_H,
1118 OV9281_REG_VALUE_08BIT,
1119 (ctrl->val >> 8) & 0xff);
1120 ret |= ov9281_write_reg(ov9281->client, OV9281_AEC_STROBE_REG_L,
1121 OV9281_REG_VALUE_08BIT,
1122 ctrl->val & 0xff);
1123 break;
1124 case V4L2_CID_TEST_PATTERN:
1125 ret = ov9281_enable_test_pattern(ov9281, ctrl->val);
1126 break;
1127 default:
1128 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1129 __func__, ctrl->id, ctrl->val);
1130 break;
1131 }
1132
1133 pm_runtime_put(&client->dev);
1134
1135 return ret;
1136 }
1137
1138 static const struct v4l2_ctrl_ops ov9281_ctrl_ops = {
1139 .s_ctrl = ov9281_set_ctrl,
1140 };
1141
ov9281_initialize_controls(struct ov9281 * ov9281)1142 static int ov9281_initialize_controls(struct ov9281 *ov9281)
1143 {
1144 const struct ov9281_mode *mode;
1145 struct v4l2_ctrl_handler *handler;
1146 struct v4l2_ctrl *ctrl;
1147 s64 exposure_max, vblank_def;
1148 u32 h_blank;
1149 int ret;
1150
1151 handler = &ov9281->ctrl_handler;
1152 mode = ov9281->cur_mode;
1153 ret = v4l2_ctrl_handler_init(handler, 8);
1154 if (ret)
1155 return ret;
1156 handler->lock = &ov9281->mutex;
1157
1158 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1159 0, 0, link_freq_menu_items);
1160 if (ctrl)
1161 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1162
1163 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1164 0, OV9281_PIXEL_RATE, 1, OV9281_PIXEL_RATE);
1165
1166 h_blank = mode->hts_def - mode->width;
1167 ov9281->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1168 h_blank, h_blank, 1, h_blank);
1169 if (ov9281->hblank)
1170 ov9281->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1171
1172 vblank_def = mode->vts_def - mode->height;
1173 ov9281->vblank = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1174 V4L2_CID_VBLANK, vblank_def,
1175 OV9281_VTS_MAX - mode->height,
1176 1, vblank_def);
1177
1178 exposure_max = mode->vts_def - 4;
1179 ov9281->exposure = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1180 V4L2_CID_EXPOSURE, OV9281_EXPOSURE_MIN,
1181 exposure_max, OV9281_EXPOSURE_STEP,
1182 mode->exp_def);
1183
1184 ov9281->anal_gain = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1185 V4L2_CID_ANALOGUE_GAIN, OV9281_GAIN_MIN,
1186 OV9281_GAIN_MAX, OV9281_GAIN_STEP,
1187 OV9281_GAIN_DEFAULT);
1188
1189 ov9281->strobe = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1190 V4L2_CID_BRIGHTNESS, 1,
1191 exposure_max/16, 1,
1192 0xc8);
1193
1194 ov9281->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1195 &ov9281_ctrl_ops, V4L2_CID_TEST_PATTERN,
1196 ARRAY_SIZE(ov9281_test_pattern_menu) - 1,
1197 0, 0, ov9281_test_pattern_menu);
1198
1199 if (handler->error) {
1200 ret = handler->error;
1201 dev_err(&ov9281->client->dev,
1202 "Failed to init controls(%d)\n", ret);
1203 goto err_free_handler;
1204 }
1205
1206 ov9281->subdev.ctrl_handler = handler;
1207
1208 return 0;
1209
1210 err_free_handler:
1211 v4l2_ctrl_handler_free(handler);
1212
1213 return ret;
1214 }
1215
ov9281_check_sensor_id(struct ov9281 * ov9281,struct i2c_client * client)1216 static int ov9281_check_sensor_id(struct ov9281 *ov9281,
1217 struct i2c_client *client)
1218 {
1219 struct device *dev = &ov9281->client->dev;
1220 u32 id = 0;
1221 int ret;
1222
1223 if (ov9281->is_thunderboot) {
1224 dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
1225 return 0;
1226 }
1227
1228 ret = ov9281_read_reg(client, OV9281_REG_CHIP_ID,
1229 OV9281_REG_VALUE_16BIT, &id);
1230 if (id != CHIP_ID) {
1231 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1232 return -ENODEV;
1233 }
1234
1235 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1236
1237 return 0;
1238 }
1239
ov9281_configure_regulators(struct ov9281 * ov9281)1240 static int ov9281_configure_regulators(struct ov9281 *ov9281)
1241 {
1242 unsigned int i;
1243
1244 for (i = 0; i < OV9281_NUM_SUPPLIES; i++)
1245 ov9281->supplies[i].supply = ov9281_supply_names[i];
1246
1247 return devm_regulator_bulk_get(&ov9281->client->dev,
1248 OV9281_NUM_SUPPLIES,
1249 ov9281->supplies);
1250 }
1251
ov9281_probe(struct i2c_client * client,const struct i2c_device_id * id)1252 static int ov9281_probe(struct i2c_client *client,
1253 const struct i2c_device_id *id)
1254 {
1255 struct device *dev = &client->dev;
1256 struct device_node *node = dev->of_node;
1257 struct ov9281 *ov9281;
1258 struct v4l2_subdev *sd;
1259 char facing[2];
1260 int ret;
1261
1262 dev_info(dev, "driver version: %02x.%02x.%02x",
1263 DRIVER_VERSION >> 16,
1264 (DRIVER_VERSION & 0xff00) >> 8,
1265 DRIVER_VERSION & 0x00ff);
1266
1267 ov9281 = devm_kzalloc(dev, sizeof(*ov9281), GFP_KERNEL);
1268 if (!ov9281)
1269 return -ENOMEM;
1270
1271 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1272 &ov9281->module_index);
1273 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1274 &ov9281->module_facing);
1275 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1276 &ov9281->module_name);
1277 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1278 &ov9281->len_name);
1279 if (ret) {
1280 dev_err(dev, "could not get module information!\n");
1281 return -EINVAL;
1282 }
1283
1284 ov9281->client = client;
1285 ov9281->cur_mode = &supported_modes[0];
1286 ov9281->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
1287
1288 ov9281->xvclk = devm_clk_get(dev, "xvclk");
1289 if (IS_ERR(ov9281->xvclk)) {
1290 dev_err(dev, "Failed to get xvclk\n");
1291 return -EINVAL;
1292 }
1293
1294 ov9281->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
1295 if (IS_ERR(ov9281->reset_gpio))
1296 dev_warn(dev, "Failed to get reset-gpios\n");
1297
1298 ov9281->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_ASIS);
1299 if (IS_ERR(ov9281->pwdn_gpio))
1300 dev_warn(dev, "Failed to get pwdn-gpios\n");
1301
1302 ov9281->pinctrl = devm_pinctrl_get(dev);
1303 if (!IS_ERR(ov9281->pinctrl)) {
1304 ov9281->pins_default =
1305 pinctrl_lookup_state(ov9281->pinctrl,
1306 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1307 if (IS_ERR(ov9281->pins_default))
1308 dev_err(dev, "could not get default pinstate\n");
1309
1310 ov9281->pins_sleep =
1311 pinctrl_lookup_state(ov9281->pinctrl,
1312 OF_CAMERA_PINCTRL_STATE_SLEEP);
1313 if (IS_ERR(ov9281->pins_sleep))
1314 dev_err(dev, "could not get sleep pinstate\n");
1315 } else {
1316 dev_err(dev, "no pinctrl\n");
1317 }
1318
1319 ret = ov9281_configure_regulators(ov9281);
1320 if (ret) {
1321 dev_err(dev, "Failed to get power regulators\n");
1322 return ret;
1323 }
1324
1325 mutex_init(&ov9281->mutex);
1326
1327 sd = &ov9281->subdev;
1328 v4l2_i2c_subdev_init(sd, client, &ov9281_subdev_ops);
1329 ret = ov9281_initialize_controls(ov9281);
1330 if (ret)
1331 goto err_destroy_mutex;
1332
1333 ret = __ov9281_power_on(ov9281);
1334 if (ret)
1335 goto err_free_handler;
1336
1337 ret = ov9281_check_sensor_id(ov9281, client);
1338 if (ret)
1339 goto err_power_off;
1340
1341 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1342 sd->internal_ops = &ov9281_internal_ops;
1343 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1344 V4L2_SUBDEV_FL_HAS_EVENTS;
1345 #endif
1346 #if defined(CONFIG_MEDIA_CONTROLLER)
1347 ov9281->pad.flags = MEDIA_PAD_FL_SOURCE;
1348 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1349 ret = media_entity_pads_init(&sd->entity, 1, &ov9281->pad);
1350 if (ret < 0)
1351 goto err_power_off;
1352 #endif
1353
1354 memset(facing, 0, sizeof(facing));
1355 if (strcmp(ov9281->module_facing, "back") == 0)
1356 facing[0] = 'b';
1357 else
1358 facing[0] = 'f';
1359
1360 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1361 ov9281->module_index, facing,
1362 OV9281_NAME, dev_name(sd->dev));
1363 ret = v4l2_async_register_subdev_sensor_common(sd);
1364 if (ret) {
1365 dev_err(dev, "v4l2 async register subdev failed\n");
1366 goto err_clean_entity;
1367 }
1368
1369 pm_runtime_set_active(dev);
1370 pm_runtime_enable(dev);
1371 pm_runtime_idle(dev);
1372
1373 return 0;
1374
1375 err_clean_entity:
1376 #if defined(CONFIG_MEDIA_CONTROLLER)
1377 media_entity_cleanup(&sd->entity);
1378 #endif
1379 err_power_off:
1380 __ov9281_power_off(ov9281);
1381 err_free_handler:
1382 v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
1383 err_destroy_mutex:
1384 mutex_destroy(&ov9281->mutex);
1385
1386 return ret;
1387 }
1388
ov9281_remove(struct i2c_client * client)1389 static int ov9281_remove(struct i2c_client *client)
1390 {
1391 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1392 struct ov9281 *ov9281 = to_ov9281(sd);
1393
1394 v4l2_async_unregister_subdev(sd);
1395 #if defined(CONFIG_MEDIA_CONTROLLER)
1396 media_entity_cleanup(&sd->entity);
1397 #endif
1398 v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
1399 mutex_destroy(&ov9281->mutex);
1400
1401 pm_runtime_disable(&client->dev);
1402 if (!pm_runtime_status_suspended(&client->dev))
1403 __ov9281_power_off(ov9281);
1404 pm_runtime_set_suspended(&client->dev);
1405
1406 return 0;
1407 }
1408
1409 #if IS_ENABLED(CONFIG_OF)
1410 static const struct of_device_id ov9281_of_match[] = {
1411 { .compatible = "ovti,ov9281" },
1412 {},
1413 };
1414 MODULE_DEVICE_TABLE(of, ov9281_of_match);
1415 #endif
1416
1417 static const struct i2c_device_id ov9281_match_id[] = {
1418 { "ovti,ov9281", 0 },
1419 { },
1420 };
1421
1422 static struct i2c_driver ov9281_i2c_driver = {
1423 .driver = {
1424 .name = OV9281_NAME,
1425 .pm = &ov9281_pm_ops,
1426 .of_match_table = of_match_ptr(ov9281_of_match),
1427 },
1428 .probe = &ov9281_probe,
1429 .remove = &ov9281_remove,
1430 .id_table = ov9281_match_id,
1431 };
1432
sensor_mod_init(void)1433 static int __init sensor_mod_init(void)
1434 {
1435 return i2c_add_driver(&ov9281_i2c_driver);
1436 }
1437
sensor_mod_exit(void)1438 static void __exit sensor_mod_exit(void)
1439 {
1440 i2c_del_driver(&ov9281_i2c_driver);
1441 }
1442
1443 device_initcall_sync(sensor_mod_init);
1444 module_exit(sensor_mod_exit);
1445
1446 MODULE_DESCRIPTION("OmniVision ov9281 sensor driver");
1447 MODULE_LICENSE("GPL v2");
1448