1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov5695 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 add poweron function.
8 * V0.0X01.0X02 add enum_frame_interval function.
9 * V0.0X01.0X03 add quick stream on/off
10 * V0.0X01.0X04 add function g_mbus_config
11 */
12
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/sysfs.h>
22 #include <linux/slab.h>
23 #include <linux/version.h>
24 #include <linux/rk-camera-module.h>
25 #include <media/media-entity.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-subdev.h>
29
30 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x04)
31
32 #ifndef V4L2_CID_DIGITAL_GAIN
33 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
34 #endif
35
36 /* 45Mhz * 4 Binning */
37 #define OV5695_PIXEL_RATE (45 * 1000 * 1000 * 4)
38 #define OV5695_XVCLK_FREQ 24000000
39
40 #define CHIP_ID 0x005695
41 #define OV5695_REG_CHIP_ID 0x300a
42
43 #define OV5695_REG_CTRL_MODE 0x0100
44 #define OV5695_MODE_SW_STANDBY 0x0
45 #define OV5695_MODE_STREAMING BIT(0)
46
47 #define OV5695_REG_EXPOSURE 0x3500
48 #define OV5695_EXPOSURE_MIN 4
49 #define OV5695_EXPOSURE_STEP 1
50 #define OV5695_VTS_MAX 0x7fff
51
52 #define OV5695_REG_ANALOG_GAIN 0x3509
53 #define ANALOG_GAIN_MIN 0x10
54 #define ANALOG_GAIN_MAX 0xf8
55 #define ANALOG_GAIN_STEP 1
56 #define ANALOG_GAIN_DEFAULT 0xf8
57
58 #define OV5695_REG_DIGI_GAIN_H 0x350a
59 #define OV5695_REG_DIGI_GAIN_L 0x350b
60 #define OV5695_DIGI_GAIN_L_MASK 0x3f
61 #define OV5695_DIGI_GAIN_H_SHIFT 6
62 #define OV5695_DIGI_GAIN_MIN 0
63 #define OV5695_DIGI_GAIN_MAX (0x4000 - 1)
64 #define OV5695_DIGI_GAIN_STEP 1
65 #define OV5695_DIGI_GAIN_DEFAULT 1024
66
67 #define OV5695_REG_TEST_PATTERN 0x4503
68 #define OV5695_TEST_PATTERN_ENABLE 0x80
69 #define OV5695_TEST_PATTERN_DISABLE 0x0
70
71 #define OV5695_REG_VTS 0x380e
72
73 #define REG_NULL 0xFFFF
74
75 #define OV5695_REG_VALUE_08BIT 1
76 #define OV5695_REG_VALUE_16BIT 2
77 #define OV5695_REG_VALUE_24BIT 3
78
79 #define OV5695_LANES 2
80 #define OV5695_BITS_PER_SAMPLE 10
81
82 #define I2C_M_WR 0
83 #define I2C_MSG_MAX 300
84 #define I2C_DATA_MAX (I2C_MSG_MAX * 3)
85
86 #define OV5695_NAME "ov5695"
87
88 static const char * const ov5695_supply_names[] = {
89 "avdd", /* Analog power */
90 "dovdd", /* Digital I/O power */
91 "dvdd", /* Digital core power */
92 };
93
94 #define OV5695_NUM_SUPPLIES ARRAY_SIZE(ov5695_supply_names)
95
96 struct regval {
97 u16 addr;
98 u8 val;
99 };
100
101 struct ov5695_mode {
102 u32 width;
103 u32 height;
104 struct v4l2_fract max_fps;
105 u32 hts_def;
106 u32 vts_def;
107 u32 exp_def;
108 const struct regval *reg_list;
109 };
110
111 struct ov5695 {
112 struct i2c_client *client;
113 struct clk *xvclk;
114 struct gpio_desc *reset_gpio;
115 struct gpio_desc *pwdn_gpio;
116 struct regulator_bulk_data supplies[OV5695_NUM_SUPPLIES];
117
118 struct v4l2_subdev subdev;
119 struct media_pad pad;
120 struct v4l2_ctrl_handler ctrl_handler;
121 struct v4l2_ctrl *exposure;
122 struct v4l2_ctrl *anal_gain;
123 struct v4l2_ctrl *digi_gain;
124 struct v4l2_ctrl *hblank;
125 struct v4l2_ctrl *vblank;
126 struct v4l2_ctrl *test_pattern;
127 struct mutex mutex;
128 bool streaming;
129 bool power_on;
130 const struct ov5695_mode *cur_mode;
131 u32 module_index;
132 const char *module_facing;
133 const char *module_name;
134 const char *len_name;
135 };
136
137 #define to_ov5695(sd) container_of(sd, struct ov5695, subdev)
138
139 /*
140 * Xclk 24Mhz
141 * Pclk 45Mhz
142 * linelength 672(0x2a0)
143 * framelength 2232(0x8b8)
144 * grabwindow_width 1296
145 * grabwindow_height 972
146 * max_framerate 30fps
147 * mipi_datarate per lane 840Mbps
148 */
149 static const struct regval ov5695_global_regs[] = {
150 {0x0103, 0x01},
151 {0x0100, 0x00},
152 {0x0300, 0x04},
153 {0x0301, 0x00},
154 {0x0302, 0x69},
155 {0x0303, 0x00},
156 {0x0304, 0x00},
157 {0x0305, 0x01},
158 {0x0307, 0x00},
159 {0x030b, 0x00},
160 {0x030c, 0x00},
161 {0x030d, 0x1e},
162 {0x030e, 0x04},
163 {0x030f, 0x03},
164 {0x0312, 0x01},
165 {0x3000, 0x00},
166 {0x3002, 0xa1},
167 {0x3008, 0x00},
168 {0x3010, 0x00},
169 {0x3022, 0x51},
170 {0x3106, 0x15},
171 {0x3107, 0x01},
172 {0x3108, 0x05},
173 {0x3500, 0x00},
174 {0x3501, 0x45},
175 {0x3502, 0x00},
176 {0x3503, 0x08},
177 {0x3504, 0x03},
178 {0x3505, 0x8c},
179 {0x3507, 0x03},
180 {0x3508, 0x00},
181 {0x3509, 0x10},
182 {0x350c, 0x00},
183 {0x350d, 0x80},
184 {0x3510, 0x00},
185 {0x3511, 0x02},
186 {0x3512, 0x00},
187 {0x3601, 0x55},
188 {0x3602, 0x58},
189 {0x3614, 0x30},
190 {0x3615, 0x77},
191 {0x3621, 0x08},
192 {0x3624, 0x40},
193 {0x3633, 0x0c},
194 {0x3634, 0x0c},
195 {0x3635, 0x0c},
196 {0x3636, 0x0c},
197 {0x3638, 0x00},
198 {0x3639, 0x00},
199 {0x363a, 0x00},
200 {0x363b, 0x00},
201 {0x363c, 0xff},
202 {0x363d, 0xfa},
203 {0x3650, 0x44},
204 {0x3651, 0x44},
205 {0x3652, 0x44},
206 {0x3653, 0x44},
207 {0x3654, 0x44},
208 {0x3655, 0x44},
209 {0x3656, 0x44},
210 {0x3657, 0x44},
211 {0x3660, 0x00},
212 {0x3661, 0x00},
213 {0x3662, 0x00},
214 {0x366a, 0x00},
215 {0x366e, 0x0c},
216 {0x3673, 0x04},
217 {0x3700, 0x14},
218 {0x3703, 0x0c},
219 {0x3715, 0x01},
220 {0x3733, 0x10},
221 {0x3734, 0x40},
222 {0x373f, 0xa0},
223 {0x3765, 0x20},
224 {0x37a1, 0x1d},
225 {0x37a8, 0x26},
226 {0x37ab, 0x14},
227 {0x37c2, 0x04},
228 {0x37cb, 0x09},
229 {0x37cc, 0x13},
230 {0x37cd, 0x1f},
231 {0x37ce, 0x1f},
232 {0x3800, 0x00},
233 {0x3801, 0x00},
234 {0x3802, 0x00},
235 {0x3803, 0x00},
236 {0x3804, 0x0a},
237 {0x3805, 0x3f},
238 {0x3806, 0x07},
239 {0x3807, 0xaf},
240 {0x3808, 0x05},
241 {0x3809, 0x10},
242 {0x380a, 0x03},
243 {0x380b, 0xcc},
244 {0x380c, 0x02},
245 {0x380d, 0xa0},
246 {0x380e, 0x08},
247 {0x380f, 0xb8},
248 {0x3810, 0x00},
249 {0x3811, 0x06},
250 {0x3812, 0x00},
251 {0x3813, 0x06},
252 {0x3814, 0x03},
253 {0x3815, 0x01},
254 {0x3816, 0x03},
255 {0x3817, 0x01},
256 {0x3818, 0x00},
257 {0x3819, 0x00},
258 {0x381a, 0x00},
259 {0x381b, 0x01},
260 {0x3820, 0x8b},
261 {0x3821, 0x01},
262 {0x3c80, 0x08},
263 {0x3c82, 0x00},
264 {0x3c83, 0x00},
265 {0x3c88, 0x00},
266 {0x3d85, 0x14},
267 {0x3f02, 0x08},
268 {0x3f03, 0x10},
269 {0x4008, 0x02},
270 {0x4009, 0x09},
271 {0x404e, 0x20},
272 {0x4501, 0x00},
273 {0x4502, 0x10},
274 {0x4800, 0x00},
275 {0x481f, 0x2a},
276 {0x4837, 0x13},
277 {0x5000, 0x17},
278 {0x5780, 0x3e},
279 {0x5781, 0x0f},
280 {0x5782, 0x44},
281 {0x5783, 0x02},
282 {0x5784, 0x01},
283 {0x5785, 0x01},
284 {0x5786, 0x00},
285 {0x5787, 0x04},
286 {0x5788, 0x02},
287 {0x5789, 0x0f},
288 {0x578a, 0xfd},
289 {0x578b, 0xf5},
290 {0x578c, 0xf5},
291 {0x578d, 0x03},
292 {0x578e, 0x08},
293 {0x578f, 0x0c},
294 {0x5790, 0x08},
295 {0x5791, 0x06},
296 {0x5792, 0x00},
297 {0x5793, 0x52},
298 {0x5794, 0xa3},
299 {0x5b00, 0x00},
300 {0x5b01, 0x1c},
301 {0x5b02, 0x00},
302 {0x5b03, 0x7f},
303 {0x5b05, 0x6c},
304 {0x5e10, 0xfc},
305 {0x4010, 0xf1},
306 {0x3503, 0x08},
307 {0x3505, 0x8c},
308 {0x3507, 0x03},
309 {0x3508, 0x00},
310 {0x3509, 0xf8},
311 {REG_NULL, 0x00},
312 };
313
314 /*
315 * Xclk 24Mhz
316 * Pclk 45Mhz
317 * linelength 740(0x2e4)
318 * framelength 2024(0x7e8)
319 * grabwindow_width 2592
320 * grabwindow_height 1944
321 * max_framerate 30fps
322 * mipi_datarate per lane 840Mbps
323 */
324 static const struct regval ov5695_2592x1944_regs[] = {
325 {0x3501, 0x7e},
326 {0x366e, 0x18},
327 {0x3800, 0x00},
328 {0x3801, 0x00},
329 {0x3802, 0x00},
330 {0x3803, 0x04},
331 {0x3804, 0x0a},
332 {0x3805, 0x3f},
333 {0x3806, 0x07},
334 {0x3807, 0xab},
335 {0x3808, 0x0a},
336 {0x3809, 0x20},
337 {0x380a, 0x07},
338 {0x380b, 0x98},
339 {0x380c, 0x02},
340 {0x380d, 0xe4},
341 {0x380e, 0x07},
342 {0x380f, 0xe8},
343 {0x3811, 0x06},
344 {0x3813, 0x08},
345 {0x3814, 0x01},
346 {0x3816, 0x01},
347 {0x3817, 0x01},
348 {0x3820, 0x88},
349 {0x3821, 0x00},
350 {0x4501, 0x00},
351 {0x4008, 0x04},
352 {0x4009, 0x13},
353 {REG_NULL, 0x00},
354 };
355
356 /*
357 * Xclk 24Mhz
358 * Pclk 45Mhz
359 * linelength 672(0x2a0)
360 * framelength 2232(0x8b8)
361 * grabwindow_width 1920
362 * grabwindow_height 1080
363 * max_framerate 30fps
364 * mipi_datarate per lane 840Mbps
365 */
366 static const struct regval ov5695_1920x1080_regs[] = {
367 {0x3501, 0x45},
368 {0x366e, 0x18},
369 {0x3800, 0x01},
370 {0x3801, 0x50},
371 {0x3802, 0x01},
372 {0x3803, 0xb8},
373 {0x3804, 0x08},
374 {0x3805, 0xef},
375 {0x3806, 0x05},
376 {0x3807, 0xf7},
377 {0x3808, 0x07},
378 {0x3809, 0x80},
379 {0x380a, 0x04},
380 {0x380b, 0x38},
381 {0x380c, 0x02},
382 {0x380d, 0xa0},
383 {0x380e, 0x08},
384 {0x380f, 0xb8},
385 {0x3811, 0x06},
386 {0x3813, 0x04},
387 {0x3814, 0x01},
388 {0x3816, 0x01},
389 {0x3817, 0x01},
390 {0x3820, 0x88},
391 {0x3821, 0x00},
392 {0x4501, 0x00},
393 {0x4008, 0x04},
394 {0x4009, 0x13},
395 {REG_NULL, 0x00}
396 };
397
398 /*
399 * Xclk 24Mhz
400 * Pclk 45Mhz
401 * linelength 740(0x02e4)
402 * framelength 1012(0x03f4)
403 * grabwindow_width 1296
404 * grabwindow_height 972
405 * max_framerate 60fps
406 * mipi_datarate per lane 840Mbps
407 */
408 static const struct regval ov5695_1296x972_regs[] = {
409 {0x3501, 0x3e},
410 {0x3611, 0x58},
411 {0x3706, 0x24},
412 {0x3714, 0x27},
413 {0x3716, 0x00},
414 {0x3717, 0x02},
415 {0x37c3, 0xf0},
416 {0x380d, 0xe4},
417 {0x380e, 0x03},
418 {0x380f, 0xf4},
419 {0x3811, 0x00},
420 {0x5000, 0x13},
421 {REG_NULL, 0x00}
422 };
423
424 /*
425 * Xclk 24Mhz
426 * Pclk 45Mhz
427 * linelength 672(0x2a0)
428 * framelength 2232(0x8b8)
429 * grabwindow_width 1280
430 * grabwindow_height 720
431 * max_framerate 30fps
432 * mipi_datarate per lane 840Mbps
433 */
434 static const struct regval ov5695_1280x720_regs[] = {
435 {0x3501, 0x45},
436 {0x366e, 0x0c},
437 {0x3800, 0x00},
438 {0x3801, 0x00},
439 {0x3802, 0x01},
440 {0x3803, 0x00},
441 {0x3804, 0x0a},
442 {0x3805, 0x3f},
443 {0x3806, 0x06},
444 {0x3807, 0xaf},
445 {0x3808, 0x05},
446 {0x3809, 0x00},
447 {0x380a, 0x02},
448 {0x380b, 0xd0},
449 {0x380c, 0x02},
450 {0x380d, 0xa0},
451 {0x380e, 0x08},
452 {0x380f, 0xb8},
453 {0x3811, 0x06},
454 {0x3813, 0x02},
455 {0x3814, 0x03},
456 {0x3816, 0x03},
457 {0x3817, 0x01},
458 {0x3820, 0x8b},
459 {0x3821, 0x01},
460 {0x4501, 0x00},
461 {0x4008, 0x02},
462 {0x4009, 0x09},
463 {REG_NULL, 0x00}
464 };
465
466 /*
467 * Xclk 24Mhz
468 * Pclk 45Mhz
469 * linelength 672(0x2a0)
470 * framelength 558(0x22e)
471 * grabwindow_width 640
472 * grabwindow_height 480
473 * max_framerate 120fps
474 * mipi_datarate per lane 840Mbps
475 */
476 static const struct regval ov5695_640x480_regs[] = {
477 {0x3501, 0x22},
478 {0x366e, 0x0c},
479 {0x3800, 0x00},
480 {0x3801, 0x00},
481 {0x3802, 0x00},
482 {0x3803, 0x08},
483 {0x3804, 0x0a},
484 {0x3805, 0x3f},
485 {0x3806, 0x07},
486 {0x3807, 0xa7},
487 {0x3808, 0x02},
488 {0x3809, 0x80},
489 {0x380a, 0x01},
490 {0x380b, 0xe0},
491 {0x380c, 0x02},
492 {0x380d, 0xa0},
493 {0x380e, 0x02},
494 {0x380f, 0x2e},
495 {0x3811, 0x06},
496 {0x3813, 0x04},
497 {0x3814, 0x07},
498 {0x3816, 0x05},
499 {0x3817, 0x03},
500 {0x3820, 0x8d},
501 {0x3821, 0x01},
502 {0x4501, 0x00},
503 {0x4008, 0x02},
504 {0x4009, 0x09},
505 {REG_NULL, 0x00}
506 };
507
508 static const struct ov5695_mode supported_modes[] = {
509 {
510 .width = 2592,
511 .height = 1944,
512 .max_fps = {
513 .numerator = 10000,
514 .denominator = 300000,
515 },
516 .exp_def = 0x0450,
517 .hts_def = 0x02e4 * 4,
518 .vts_def = 0x07e8,
519 .reg_list = ov5695_2592x1944_regs,
520 },
521 {
522 .width = 1920,
523 .height = 1080,
524 .max_fps = {
525 .numerator = 10000,
526 .denominator = 300000,
527 },
528 .exp_def = 0x0450,
529 .hts_def = 0x02a0 * 4,
530 .vts_def = 0x08b8,
531 .reg_list = ov5695_1920x1080_regs,
532 },
533 {
534 .width = 1296,
535 .height = 972,
536 .max_fps = {
537 .numerator = 10000,
538 .denominator = 600000,
539 },
540 .exp_def = 0x03e0,
541 .hts_def = 0x02e4 * 4,
542 .vts_def = 0x03f4,
543 .reg_list = ov5695_1296x972_regs,
544 },
545 {
546 .width = 1280,
547 .height = 720,
548 .max_fps = {
549 .numerator = 10000,
550 .denominator = 300000,
551 },
552 .exp_def = 0x0450,
553 .hts_def = 0x02a0 * 4,
554 .vts_def = 0x08b8,
555 .reg_list = ov5695_1280x720_regs,
556 },
557 {
558 .width = 640,
559 .height = 480,
560 .max_fps = {
561 .numerator = 10000,
562 .denominator = 1200000,
563 },
564 .exp_def = 0x0200,
565 .hts_def = 0x02a0 * 4,
566 .vts_def = 0x022e,
567 .reg_list = ov5695_640x480_regs,
568 },
569 };
570
571 #define OV5695_LINK_FREQ_420MHZ 420000000
572 static const s64 link_freq_menu_items[] = {
573 OV5695_LINK_FREQ_420MHZ
574 };
575
576 static const char * const ov5695_test_pattern_menu[] = {
577 "Disabled",
578 "Vertical Color Bar Type 1",
579 "Vertical Color Bar Type 2",
580 "Vertical Color Bar Type 3",
581 "Vertical Color Bar Type 4"
582 };
583
584 /* Write registers up to 4 at a time */
ov5695_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)585 static int ov5695_write_reg(struct i2c_client *client, u16 reg,
586 u32 len, u32 val)
587 {
588 u32 buf_i, val_i;
589 u8 buf[6];
590 u8 *val_p;
591 __be32 val_be;
592
593 if (len > 4)
594 return -EINVAL;
595
596 buf[0] = reg >> 8;
597 buf[1] = reg & 0xff;
598
599 val_be = cpu_to_be32(val);
600 val_p = (u8 *)&val_be;
601 buf_i = 2;
602 val_i = 4 - len;
603
604 while (val_i < 4)
605 buf[buf_i++] = val_p[val_i++];
606
607 if (i2c_master_send(client, buf, len + 2) != len + 2)
608 return -EIO;
609
610 return 0;
611 }
612
ov5695_write_array(struct i2c_client * client,const struct regval * regs)613 static int ov5695_write_array(struct i2c_client *client,
614 const struct regval *regs)
615 {
616 u8 *data;
617 u32 i, j = 0, k = 0;
618 int ret = 0;
619 struct i2c_msg *msg;
620
621 msg = kmalloc((sizeof(struct i2c_msg) * I2C_MSG_MAX),
622 GFP_KERNEL);
623 if (!msg)
624 return -ENOMEM;
625
626 data = kmalloc((sizeof(unsigned char) * I2C_DATA_MAX),
627 GFP_KERNEL);
628 if (!data) {
629 kfree(msg);
630 return -ENOMEM;
631 }
632
633 for (i = 0; regs[i].addr != REG_NULL; i++) {
634 (msg + j)->addr = client->addr;
635 (msg + j)->flags = I2C_M_WR;
636 (msg + j)->buf = (data + k);
637
638 data[k + 0] = (u8)(regs[i].addr >> 8);
639 data[k + 1] = (u8)(regs[i].addr & 0xFF);
640 data[k + 2] = (u8)(regs[i].val & 0xFF);
641 k = k + 3;
642 (msg + j)->len = 3;
643
644 if (j++ == (I2C_MSG_MAX - 1)) {
645 ret = i2c_transfer(client->adapter, msg, j);
646 if (ret < 0) {
647 kfree(msg);
648 kfree(data);
649 return ret;
650 }
651 j = 0;
652 k = 0;
653 }
654 }
655
656 if (j != 0) {
657 ret = i2c_transfer(client->adapter, msg, j);
658 if (ret < 0) {
659 kfree(msg);
660 kfree(data);
661 return ret;
662 }
663 }
664 kfree(msg);
665 kfree(data);
666
667 return 0;
668 }
669
670 /* Read registers up to 4 at a time */
ov5695_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)671 static int ov5695_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
672 u32 *val)
673 {
674 struct i2c_msg msgs[2];
675 u8 *data_be_p;
676 __be32 data_be = 0;
677 __be16 reg_addr_be = cpu_to_be16(reg);
678 int ret;
679
680 if (len > 4 || !len)
681 return -EINVAL;
682
683 data_be_p = (u8 *)&data_be;
684 /* Write register address */
685 msgs[0].addr = client->addr;
686 msgs[0].flags = 0;
687 msgs[0].len = 2;
688 msgs[0].buf = (u8 *)®_addr_be;
689
690 /* Read data from register */
691 msgs[1].addr = client->addr;
692 msgs[1].flags = I2C_M_RD;
693 msgs[1].len = len;
694 msgs[1].buf = &data_be_p[4 - len];
695
696 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
697 if (ret != ARRAY_SIZE(msgs))
698 return -EIO;
699
700 *val = be32_to_cpu(data_be);
701
702 return 0;
703 }
704
ov5695_get_reso_dist(const struct ov5695_mode * mode,struct v4l2_mbus_framefmt * framefmt)705 static int ov5695_get_reso_dist(const struct ov5695_mode *mode,
706 struct v4l2_mbus_framefmt *framefmt)
707 {
708 return abs(mode->width - framefmt->width) +
709 abs(mode->height - framefmt->height);
710 }
711
712 static const struct ov5695_mode *
ov5695_find_best_fit(struct v4l2_subdev_format * fmt)713 ov5695_find_best_fit(struct v4l2_subdev_format *fmt)
714 {
715 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
716 int dist;
717 int cur_best_fit = 0;
718 int cur_best_fit_dist = -1;
719 int i;
720
721 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
722 dist = ov5695_get_reso_dist(&supported_modes[i], framefmt);
723 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
724 cur_best_fit_dist = dist;
725 cur_best_fit = i;
726 }
727 }
728
729 return &supported_modes[cur_best_fit];
730 }
731
ov5695_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)732 static int ov5695_set_fmt(struct v4l2_subdev *sd,
733 struct v4l2_subdev_pad_config *cfg,
734 struct v4l2_subdev_format *fmt)
735 {
736 struct ov5695 *ov5695 = to_ov5695(sd);
737 const struct ov5695_mode *mode;
738 s64 h_blank, vblank_def;
739
740 mutex_lock(&ov5695->mutex);
741
742 mode = ov5695_find_best_fit(fmt);
743 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
744 fmt->format.width = mode->width;
745 fmt->format.height = mode->height;
746 fmt->format.field = V4L2_FIELD_NONE;
747 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
748 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
749 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
750 #else
751 mutex_unlock(&ov5695->mutex);
752 return -ENOTTY;
753 #endif
754 } else {
755 ov5695->cur_mode = mode;
756 h_blank = mode->hts_def - mode->width;
757 __v4l2_ctrl_modify_range(ov5695->hblank, h_blank,
758 h_blank, 1, h_blank);
759 vblank_def = mode->vts_def - mode->height;
760 __v4l2_ctrl_modify_range(ov5695->vblank, vblank_def,
761 OV5695_VTS_MAX - mode->height,
762 1, vblank_def);
763 }
764
765 mutex_unlock(&ov5695->mutex);
766
767 return 0;
768 }
769
ov5695_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)770 static int ov5695_get_fmt(struct v4l2_subdev *sd,
771 struct v4l2_subdev_pad_config *cfg,
772 struct v4l2_subdev_format *fmt)
773 {
774 struct ov5695 *ov5695 = to_ov5695(sd);
775 const struct ov5695_mode *mode = ov5695->cur_mode;
776
777 mutex_lock(&ov5695->mutex);
778 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
779 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
780 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
781 #else
782 mutex_unlock(&ov5695->mutex);
783 return -ENOTTY;
784 #endif
785 } else {
786 fmt->format.width = mode->width;
787 fmt->format.height = mode->height;
788 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
789 fmt->format.field = V4L2_FIELD_NONE;
790 }
791 mutex_unlock(&ov5695->mutex);
792
793 return 0;
794 }
795
ov5695_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)796 static int ov5695_enum_mbus_code(struct v4l2_subdev *sd,
797 struct v4l2_subdev_pad_config *cfg,
798 struct v4l2_subdev_mbus_code_enum *code)
799 {
800 if (code->index != 0)
801 return -EINVAL;
802 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
803
804 return 0;
805 }
806
ov5695_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)807 static int ov5695_enum_frame_sizes(struct v4l2_subdev *sd,
808 struct v4l2_subdev_pad_config *cfg,
809 struct v4l2_subdev_frame_size_enum *fse)
810 {
811 if (fse->index >= ARRAY_SIZE(supported_modes))
812 return -EINVAL;
813
814 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
815 return -EINVAL;
816
817 fse->min_width = supported_modes[fse->index].width;
818 fse->max_width = supported_modes[fse->index].width;
819 fse->max_height = supported_modes[fse->index].height;
820 fse->min_height = supported_modes[fse->index].height;
821
822 return 0;
823 }
824
ov5695_enable_test_pattern(struct ov5695 * ov5695,u32 pattern)825 static int ov5695_enable_test_pattern(struct ov5695 *ov5695, u32 pattern)
826 {
827 u32 val;
828
829 if (pattern)
830 val = (pattern - 1) | OV5695_TEST_PATTERN_ENABLE;
831 else
832 val = OV5695_TEST_PATTERN_DISABLE;
833
834 return ov5695_write_reg(ov5695->client, OV5695_REG_TEST_PATTERN,
835 OV5695_REG_VALUE_08BIT, val);
836 }
837
ov5695_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)838 static int ov5695_g_frame_interval(struct v4l2_subdev *sd,
839 struct v4l2_subdev_frame_interval *fi)
840 {
841 struct ov5695 *ov5695 = to_ov5695(sd);
842 const struct ov5695_mode *mode = ov5695->cur_mode;
843
844 fi->interval = mode->max_fps;
845
846 return 0;
847 }
848
ov5695_get_module_inf(struct ov5695 * ov5695,struct rkmodule_inf * inf)849 static void ov5695_get_module_inf(struct ov5695 *ov5695,
850 struct rkmodule_inf *inf)
851 {
852 memset(inf, 0, sizeof(*inf));
853 strscpy(inf->base.sensor, OV5695_NAME, sizeof(inf->base.sensor));
854 strscpy(inf->base.module, ov5695->module_name,
855 sizeof(inf->base.module));
856 strscpy(inf->base.lens, ov5695->len_name, sizeof(inf->base.lens));
857 }
858
ov5695_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)859 static long ov5695_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
860 {
861 struct ov5695 *ov5695 = to_ov5695(sd);
862 long ret = 0;
863 u32 stream = 0;
864
865 switch (cmd) {
866 case RKMODULE_GET_MODULE_INFO:
867 ov5695_get_module_inf(ov5695, (struct rkmodule_inf *)arg);
868 break;
869 case RKMODULE_SET_QUICK_STREAM:
870
871 stream = *((u32 *)arg);
872
873 if (stream)
874 ret = ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
875 OV5695_REG_VALUE_08BIT, OV5695_MODE_STREAMING);
876 else
877 ret = ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
878 OV5695_REG_VALUE_08BIT, OV5695_MODE_SW_STANDBY);
879 break;
880 default:
881 ret = -ENOIOCTLCMD;
882 break;
883 }
884
885 return ret;
886 }
887
888 #ifdef CONFIG_COMPAT
ov5695_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)889 static long ov5695_compat_ioctl32(struct v4l2_subdev *sd,
890 unsigned int cmd, unsigned long arg)
891 {
892 void __user *up = compat_ptr(arg);
893 struct rkmodule_inf *inf;
894 struct rkmodule_awb_cfg *cfg;
895 long ret;
896 u32 stream = 0;
897
898 switch (cmd) {
899 case RKMODULE_GET_MODULE_INFO:
900 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
901 if (!inf) {
902 ret = -ENOMEM;
903 return ret;
904 }
905
906 ret = ov5695_ioctl(sd, cmd, inf);
907 if (!ret) {
908 ret = copy_to_user(up, inf, sizeof(*inf));
909 if (ret)
910 ret = -EFAULT;
911 }
912 kfree(inf);
913 break;
914 case RKMODULE_AWB_CFG:
915 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
916 if (!cfg) {
917 ret = -ENOMEM;
918 return ret;
919 }
920
921 ret = copy_from_user(cfg, up, sizeof(*cfg));
922 if (!ret)
923 ret = ov5695_ioctl(sd, cmd, cfg);
924 else
925 ret = -EFAULT;
926 kfree(cfg);
927 break;
928 case RKMODULE_SET_QUICK_STREAM:
929 ret = copy_from_user(&stream, up, sizeof(u32));
930 if (!ret)
931 ret = ov5695_ioctl(sd, cmd, &stream);
932 else
933 ret = -EFAULT;
934 break;
935 default:
936 ret = -ENOIOCTLCMD;
937 break;
938 }
939
940 return ret;
941 }
942 #endif
943
__ov5695_start_stream(struct ov5695 * ov5695)944 static int __ov5695_start_stream(struct ov5695 *ov5695)
945 {
946 int ret;
947
948 ret = ov5695_write_array(ov5695->client, ov5695->cur_mode->reg_list);
949 if (ret)
950 return ret;
951
952 /* In case these controls are set before streaming */
953 mutex_unlock(&ov5695->mutex);
954 ret = v4l2_ctrl_handler_setup(&ov5695->ctrl_handler);
955 mutex_lock(&ov5695->mutex);
956 if (ret)
957 return ret;
958
959 return ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
960 OV5695_REG_VALUE_08BIT, OV5695_MODE_STREAMING);
961 }
962
__ov5695_stop_stream(struct ov5695 * ov5695)963 static int __ov5695_stop_stream(struct ov5695 *ov5695)
964 {
965 return ov5695_write_reg(ov5695->client, OV5695_REG_CTRL_MODE,
966 OV5695_REG_VALUE_08BIT, OV5695_MODE_SW_STANDBY);
967 }
968
ov5695_s_stream(struct v4l2_subdev * sd,int on)969 static int ov5695_s_stream(struct v4l2_subdev *sd, int on)
970 {
971 struct ov5695 *ov5695 = to_ov5695(sd);
972 struct i2c_client *client = ov5695->client;
973 int ret = 0;
974
975 mutex_lock(&ov5695->mutex);
976 on = !!on;
977 if (on == ov5695->streaming)
978 goto unlock_and_return;
979
980 if (on) {
981 ret = pm_runtime_get_sync(&client->dev);
982 if (ret < 0) {
983 pm_runtime_put_noidle(&client->dev);
984 goto unlock_and_return;
985 }
986
987 ret = __ov5695_start_stream(ov5695);
988 if (ret) {
989 v4l2_err(sd, "start stream failed while write regs\n");
990 pm_runtime_put(&client->dev);
991 goto unlock_and_return;
992 }
993 } else {
994 __ov5695_stop_stream(ov5695);
995 pm_runtime_put(&client->dev);
996 }
997
998 ov5695->streaming = on;
999
1000 unlock_and_return:
1001 mutex_unlock(&ov5695->mutex);
1002
1003 return ret;
1004 }
1005
ov5695_s_power(struct v4l2_subdev * sd,int on)1006 static int ov5695_s_power(struct v4l2_subdev *sd, int on)
1007 {
1008 struct ov5695 *ov5695 = to_ov5695(sd);
1009 struct i2c_client *client = ov5695->client;
1010 int ret = 0;
1011
1012 mutex_lock(&ov5695->mutex);
1013
1014 /* If the power state is not modified - no work to do. */
1015 if (ov5695->power_on == !!on)
1016 goto unlock_and_return;
1017
1018 if (on) {
1019 ret = pm_runtime_get_sync(&client->dev);
1020 if (ret < 0) {
1021 pm_runtime_put_noidle(&client->dev);
1022 goto unlock_and_return;
1023 }
1024
1025 ret = ov5695_write_array(ov5695->client, ov5695_global_regs);
1026 if (ret) {
1027 v4l2_err(sd, "could not set init registers\n");
1028 pm_runtime_put_noidle(&client->dev);
1029 goto unlock_and_return;
1030 }
1031
1032 ov5695->power_on = true;
1033 } else {
1034 pm_runtime_put(&client->dev);
1035 ov5695->power_on = false;
1036 }
1037
1038 unlock_and_return:
1039 mutex_unlock(&ov5695->mutex);
1040
1041 return ret;
1042 }
1043
1044 /* Calculate the delay in us by clock rate and clock cycles */
ov5695_cal_delay(u32 cycles)1045 static inline u32 ov5695_cal_delay(u32 cycles)
1046 {
1047 return DIV_ROUND_UP(cycles, OV5695_XVCLK_FREQ / 1000 / 1000);
1048 }
1049
__ov5695_power_on(struct ov5695 * ov5695)1050 static int __ov5695_power_on(struct ov5695 *ov5695)
1051 {
1052 int ret;
1053 u32 delay_us;
1054 struct device *dev = &ov5695->client->dev;
1055
1056 ret = clk_set_rate(ov5695->xvclk, OV5695_XVCLK_FREQ);
1057 if (ret < 0) {
1058 dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
1059 return ret;
1060 }
1061 if (clk_get_rate(ov5695->xvclk) != OV5695_XVCLK_FREQ)
1062 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1063 ret = clk_prepare_enable(ov5695->xvclk);
1064 if (ret < 0) {
1065 dev_err(dev, "Failed to enable xvclk\n");
1066 return ret;
1067 }
1068
1069 if (!IS_ERR(ov5695->reset_gpio))
1070 gpiod_set_value_cansleep(ov5695->reset_gpio, 1);
1071
1072 ret = regulator_bulk_enable(OV5695_NUM_SUPPLIES, ov5695->supplies);
1073 if (ret < 0) {
1074 dev_err(dev, "Failed to enable regulators\n");
1075 goto disable_clk;
1076 }
1077
1078 if (!IS_ERR(ov5695->reset_gpio))
1079 gpiod_set_value_cansleep(ov5695->reset_gpio, 0);
1080
1081 if (!IS_ERR(ov5695->pwdn_gpio))
1082 gpiod_set_value_cansleep(ov5695->pwdn_gpio, 1);
1083
1084 /* 8192 cycles prior to first SCCB transaction */
1085 delay_us = ov5695_cal_delay(8192);
1086 usleep_range(delay_us, delay_us * 2);
1087
1088 return 0;
1089
1090 disable_clk:
1091 clk_disable_unprepare(ov5695->xvclk);
1092
1093 return ret;
1094 }
1095
__ov5695_power_off(struct ov5695 * ov5695)1096 static void __ov5695_power_off(struct ov5695 *ov5695)
1097 {
1098 if (!IS_ERR(ov5695->pwdn_gpio))
1099 gpiod_set_value_cansleep(ov5695->pwdn_gpio, 0);
1100 clk_disable_unprepare(ov5695->xvclk);
1101 if (!IS_ERR(ov5695->reset_gpio))
1102 gpiod_set_value_cansleep(ov5695->reset_gpio, 1);
1103 regulator_bulk_disable(OV5695_NUM_SUPPLIES, ov5695->supplies);
1104 }
1105
ov5695_runtime_resume(struct device * dev)1106 static int __maybe_unused ov5695_runtime_resume(struct device *dev)
1107 {
1108 struct i2c_client *client = to_i2c_client(dev);
1109 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1110 struct ov5695 *ov5695 = to_ov5695(sd);
1111
1112 return __ov5695_power_on(ov5695);
1113 }
1114
ov5695_runtime_suspend(struct device * dev)1115 static int __maybe_unused ov5695_runtime_suspend(struct device *dev)
1116 {
1117 struct i2c_client *client = to_i2c_client(dev);
1118 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1119 struct ov5695 *ov5695 = to_ov5695(sd);
1120
1121 __ov5695_power_off(ov5695);
1122
1123 return 0;
1124 }
1125
1126 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov5695_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1127 static int ov5695_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1128 {
1129 struct ov5695 *ov5695 = to_ov5695(sd);
1130 struct v4l2_mbus_framefmt *try_fmt =
1131 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1132 const struct ov5695_mode *def_mode = &supported_modes[0];
1133
1134 mutex_lock(&ov5695->mutex);
1135 /* Initialize try_fmt */
1136 try_fmt->width = def_mode->width;
1137 try_fmt->height = def_mode->height;
1138 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1139 try_fmt->field = V4L2_FIELD_NONE;
1140
1141 mutex_unlock(&ov5695->mutex);
1142 /* No crop or compose */
1143
1144 return 0;
1145 }
1146 #endif
1147
ov5695_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1148 static int ov5695_enum_frame_interval(struct v4l2_subdev *sd,
1149 struct v4l2_subdev_pad_config *cfg,
1150 struct v4l2_subdev_frame_interval_enum *fie)
1151 {
1152 if (fie->index >= ARRAY_SIZE(supported_modes))
1153 return -EINVAL;
1154
1155 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1156 fie->width = supported_modes[fie->index].width;
1157 fie->height = supported_modes[fie->index].height;
1158 fie->interval = supported_modes[fie->index].max_fps;
1159 return 0;
1160 }
1161
ov5695_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1162 static int ov5695_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
1163 struct v4l2_mbus_config *config)
1164 {
1165 u32 val = 0;
1166
1167 val = 1 << (OV5695_LANES - 1) |
1168 V4L2_MBUS_CSI2_CHANNEL_0 |
1169 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1170 config->type = V4L2_MBUS_CSI2_DPHY;
1171 config->flags = val;
1172
1173 return 0;
1174 }
1175
1176 static const struct dev_pm_ops ov5695_pm_ops = {
1177 SET_RUNTIME_PM_OPS(ov5695_runtime_suspend,
1178 ov5695_runtime_resume, NULL)
1179 };
1180
1181 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1182 static const struct v4l2_subdev_internal_ops ov5695_internal_ops = {
1183 .open = ov5695_open,
1184 };
1185 #endif
1186
1187 static const struct v4l2_subdev_core_ops ov5695_core_ops = {
1188 .s_power = ov5695_s_power,
1189 .ioctl = ov5695_ioctl,
1190 #ifdef CONFIG_COMPAT
1191 .compat_ioctl32 = ov5695_compat_ioctl32,
1192 #endif
1193 };
1194
1195 static const struct v4l2_subdev_video_ops ov5695_video_ops = {
1196 .s_stream = ov5695_s_stream,
1197 .g_frame_interval = ov5695_g_frame_interval,
1198 };
1199
1200 static const struct v4l2_subdev_pad_ops ov5695_pad_ops = {
1201 .enum_mbus_code = ov5695_enum_mbus_code,
1202 .enum_frame_size = ov5695_enum_frame_sizes,
1203 .enum_frame_interval = ov5695_enum_frame_interval,
1204 .get_fmt = ov5695_get_fmt,
1205 .set_fmt = ov5695_set_fmt,
1206 .get_mbus_config = ov5695_g_mbus_config,
1207 };
1208
1209 static const struct v4l2_subdev_ops ov5695_subdev_ops = {
1210 .core = &ov5695_core_ops,
1211 .video = &ov5695_video_ops,
1212 .pad = &ov5695_pad_ops,
1213 };
1214
ov5695_set_ctrl(struct v4l2_ctrl * ctrl)1215 static int ov5695_set_ctrl(struct v4l2_ctrl *ctrl)
1216 {
1217 struct ov5695 *ov5695 = container_of(ctrl->handler,
1218 struct ov5695, ctrl_handler);
1219 struct i2c_client *client = ov5695->client;
1220 s64 max;
1221 int ret = 0;
1222
1223 /* Propagate change of current control to all related controls */
1224 switch (ctrl->id) {
1225 case V4L2_CID_VBLANK:
1226 /* Update max exposure while meeting expected vblanking */
1227 max = ov5695->cur_mode->height + ctrl->val - 4;
1228 __v4l2_ctrl_modify_range(ov5695->exposure,
1229 ov5695->exposure->minimum, max,
1230 ov5695->exposure->step,
1231 ov5695->exposure->default_value);
1232 break;
1233 }
1234
1235 if (!pm_runtime_get_if_in_use(&client->dev))
1236 return 0;
1237
1238 switch (ctrl->id) {
1239 case V4L2_CID_EXPOSURE:
1240 /* 4 least significant bits of expsoure are fractional part */
1241 ret = ov5695_write_reg(ov5695->client, OV5695_REG_EXPOSURE,
1242 OV5695_REG_VALUE_24BIT, ctrl->val << 4);
1243 break;
1244 case V4L2_CID_ANALOGUE_GAIN:
1245 ret = ov5695_write_reg(ov5695->client, OV5695_REG_ANALOG_GAIN,
1246 OV5695_REG_VALUE_08BIT, ctrl->val);
1247 break;
1248 case V4L2_CID_DIGITAL_GAIN:
1249 ret = ov5695_write_reg(ov5695->client, OV5695_REG_DIGI_GAIN_L,
1250 OV5695_REG_VALUE_08BIT,
1251 ctrl->val & OV5695_DIGI_GAIN_L_MASK);
1252 ret |= ov5695_write_reg(ov5695->client, OV5695_REG_DIGI_GAIN_H,
1253 OV5695_REG_VALUE_08BIT,
1254 ctrl->val >> OV5695_DIGI_GAIN_H_SHIFT);
1255 break;
1256 case V4L2_CID_VBLANK:
1257 ret = ov5695_write_reg(ov5695->client, OV5695_REG_VTS,
1258 OV5695_REG_VALUE_16BIT,
1259 ctrl->val + ov5695->cur_mode->height);
1260 break;
1261 case V4L2_CID_TEST_PATTERN:
1262 ret = ov5695_enable_test_pattern(ov5695, ctrl->val);
1263 break;
1264 default:
1265 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1266 __func__, ctrl->id, ctrl->val);
1267 break;
1268 }
1269
1270 pm_runtime_put(&client->dev);
1271
1272 return ret;
1273 }
1274
1275 static const struct v4l2_ctrl_ops ov5695_ctrl_ops = {
1276 .s_ctrl = ov5695_set_ctrl,
1277 };
1278
ov5695_initialize_controls(struct ov5695 * ov5695)1279 static int ov5695_initialize_controls(struct ov5695 *ov5695)
1280 {
1281 const struct ov5695_mode *mode;
1282 struct v4l2_ctrl_handler *handler;
1283 struct v4l2_ctrl *ctrl;
1284 s64 exposure_max, vblank_def;
1285 u32 h_blank;
1286 int ret;
1287
1288 handler = &ov5695->ctrl_handler;
1289 mode = ov5695->cur_mode;
1290 ret = v4l2_ctrl_handler_init(handler, 8);
1291 if (ret)
1292 return ret;
1293 handler->lock = &ov5695->mutex;
1294
1295 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1296 0, 0, link_freq_menu_items);
1297 if (ctrl)
1298 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1299
1300 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1301 0, OV5695_PIXEL_RATE, 1, OV5695_PIXEL_RATE);
1302
1303 h_blank = mode->hts_def - mode->width;
1304 ov5695->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1305 h_blank, h_blank, 1, h_blank);
1306 if (ov5695->hblank)
1307 ov5695->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1308
1309 vblank_def = mode->vts_def - mode->height;
1310 ov5695->vblank = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1311 V4L2_CID_VBLANK, vblank_def,
1312 OV5695_VTS_MAX - mode->height,
1313 1, vblank_def);
1314
1315 exposure_max = mode->vts_def - 4;
1316 ov5695->exposure = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1317 V4L2_CID_EXPOSURE, OV5695_EXPOSURE_MIN,
1318 exposure_max, OV5695_EXPOSURE_STEP,
1319 mode->exp_def);
1320
1321 ov5695->anal_gain = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1322 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1323 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1324 ANALOG_GAIN_DEFAULT);
1325
1326 /* Digital gain */
1327 ov5695->digi_gain = v4l2_ctrl_new_std(handler, &ov5695_ctrl_ops,
1328 V4L2_CID_DIGITAL_GAIN, OV5695_DIGI_GAIN_MIN,
1329 OV5695_DIGI_GAIN_MAX, OV5695_DIGI_GAIN_STEP,
1330 OV5695_DIGI_GAIN_DEFAULT);
1331
1332 ov5695->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1333 &ov5695_ctrl_ops, V4L2_CID_TEST_PATTERN,
1334 ARRAY_SIZE(ov5695_test_pattern_menu) - 1,
1335 0, 0, ov5695_test_pattern_menu);
1336
1337 if (handler->error) {
1338 ret = handler->error;
1339 dev_err(&ov5695->client->dev,
1340 "Failed to init controls(%d)\n", ret);
1341 goto err_free_handler;
1342 }
1343
1344 ov5695->subdev.ctrl_handler = handler;
1345
1346 return 0;
1347
1348 err_free_handler:
1349 v4l2_ctrl_handler_free(handler);
1350
1351 return ret;
1352 }
1353
ov5695_check_sensor_id(struct ov5695 * ov5695,struct i2c_client * client)1354 static int ov5695_check_sensor_id(struct ov5695 *ov5695,
1355 struct i2c_client *client)
1356 {
1357 struct device *dev = &ov5695->client->dev;
1358 u32 id = 0;
1359 int ret;
1360
1361 ret = ov5695_read_reg(client, OV5695_REG_CHIP_ID,
1362 OV5695_REG_VALUE_24BIT, &id);
1363 if (id != CHIP_ID) {
1364 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1365 return -ENODEV;
1366 }
1367
1368 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1369
1370 return 0;
1371 }
1372
ov5695_configure_regulators(struct ov5695 * ov5695)1373 static int ov5695_configure_regulators(struct ov5695 *ov5695)
1374 {
1375 int i;
1376
1377 for (i = 0; i < OV5695_NUM_SUPPLIES; i++)
1378 ov5695->supplies[i].supply = ov5695_supply_names[i];
1379
1380 return devm_regulator_bulk_get(&ov5695->client->dev,
1381 OV5695_NUM_SUPPLIES,
1382 ov5695->supplies);
1383 }
1384
ov5695_probe(struct i2c_client * client,const struct i2c_device_id * id)1385 static int ov5695_probe(struct i2c_client *client,
1386 const struct i2c_device_id *id)
1387 {
1388 struct device *dev = &client->dev;
1389 struct device_node *node = dev->of_node;
1390 struct ov5695 *ov5695;
1391 struct v4l2_subdev *sd;
1392 char facing[2];
1393 int ret;
1394
1395 dev_info(dev, "driver version: %02x.%02x.%02x",
1396 DRIVER_VERSION >> 16,
1397 (DRIVER_VERSION & 0xff00) >> 8,
1398 DRIVER_VERSION & 0x00ff);
1399
1400 ov5695 = devm_kzalloc(dev, sizeof(*ov5695), GFP_KERNEL);
1401 if (!ov5695)
1402 return -ENOMEM;
1403
1404 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1405 &ov5695->module_index);
1406 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1407 &ov5695->module_facing);
1408 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1409 &ov5695->module_name);
1410 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1411 &ov5695->len_name);
1412 if (ret) {
1413 dev_err(dev, "could not get module information!\n");
1414 return -EINVAL;
1415 }
1416
1417 ov5695->client = client;
1418 ov5695->cur_mode = &supported_modes[0];
1419
1420 ov5695->xvclk = devm_clk_get(dev, "xvclk");
1421 if (IS_ERR(ov5695->xvclk)) {
1422 dev_err(dev, "Failed to get xvclk\n");
1423 return -EINVAL;
1424 }
1425
1426 ov5695->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1427 if (IS_ERR(ov5695->reset_gpio)) {
1428 dev_warn(dev, "Failed to get reset-gpios\n");
1429 }
1430
1431 ov5695->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1432 if (IS_ERR(ov5695->pwdn_gpio))
1433 dev_warn(dev, "Failed to get pwdn-gpios\n");
1434
1435 ret = ov5695_configure_regulators(ov5695);
1436 if (ret) {
1437 dev_err(dev, "Failed to get power regulators\n");
1438 return ret;
1439 }
1440
1441 mutex_init(&ov5695->mutex);
1442
1443 sd = &ov5695->subdev;
1444 v4l2_i2c_subdev_init(sd, client, &ov5695_subdev_ops);
1445 ret = ov5695_initialize_controls(ov5695);
1446 if (ret)
1447 goto err_destroy_mutex;
1448
1449 ret = __ov5695_power_on(ov5695);
1450 if (ret)
1451 goto err_free_handler;
1452
1453 ret = ov5695_check_sensor_id(ov5695, client);
1454 if (ret)
1455 goto err_power_off;
1456
1457 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1458 sd->internal_ops = &ov5695_internal_ops;
1459 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1460 V4L2_SUBDEV_FL_HAS_EVENTS;
1461 #endif
1462 #if defined(CONFIG_MEDIA_CONTROLLER)
1463 ov5695->pad.flags = MEDIA_PAD_FL_SOURCE;
1464 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1465 ret = media_entity_pads_init(&sd->entity, 1, &ov5695->pad);
1466 if (ret < 0)
1467 goto err_power_off;
1468 #endif
1469
1470 memset(facing, 0, sizeof(facing));
1471 if (strcmp(ov5695->module_facing, "back") == 0)
1472 facing[0] = 'b';
1473 else
1474 facing[0] = 'f';
1475
1476 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1477 ov5695->module_index, facing,
1478 OV5695_NAME, dev_name(sd->dev));
1479 ret = v4l2_async_register_subdev_sensor_common(sd);
1480 if (ret) {
1481 dev_err(dev, "v4l2 async register subdev failed\n");
1482 goto err_clean_entity;
1483 }
1484
1485 pm_runtime_set_active(dev);
1486 pm_runtime_enable(dev);
1487 pm_runtime_idle(dev);
1488
1489 return 0;
1490
1491 err_clean_entity:
1492 #if defined(CONFIG_MEDIA_CONTROLLER)
1493 media_entity_cleanup(&sd->entity);
1494 #endif
1495 err_power_off:
1496 __ov5695_power_off(ov5695);
1497 err_free_handler:
1498 v4l2_ctrl_handler_free(&ov5695->ctrl_handler);
1499 err_destroy_mutex:
1500 mutex_destroy(&ov5695->mutex);
1501
1502 return ret;
1503 }
1504
ov5695_remove(struct i2c_client * client)1505 static int ov5695_remove(struct i2c_client *client)
1506 {
1507 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1508 struct ov5695 *ov5695 = to_ov5695(sd);
1509
1510 v4l2_async_unregister_subdev(sd);
1511 #if defined(CONFIG_MEDIA_CONTROLLER)
1512 media_entity_cleanup(&sd->entity);
1513 #endif
1514 v4l2_ctrl_handler_free(&ov5695->ctrl_handler);
1515 mutex_destroy(&ov5695->mutex);
1516
1517 pm_runtime_disable(&client->dev);
1518 if (!pm_runtime_status_suspended(&client->dev))
1519 __ov5695_power_off(ov5695);
1520 pm_runtime_set_suspended(&client->dev);
1521
1522 return 0;
1523 }
1524
1525 #if IS_ENABLED(CONFIG_OF)
1526 static const struct of_device_id ov5695_of_match[] = {
1527 { .compatible = "ovti,ov5695" },
1528 {},
1529 };
1530 MODULE_DEVICE_TABLE(of, ov5695_of_match);
1531 #endif
1532
1533 static const struct i2c_device_id ov5695_match_id[] = {
1534 { "ovti,ov5695", 0 },
1535 { },
1536 };
1537
1538 static struct i2c_driver ov5695_i2c_driver = {
1539 .driver = {
1540 .name = OV5695_NAME,
1541 .pm = &ov5695_pm_ops,
1542 .of_match_table = of_match_ptr(ov5695_of_match),
1543 },
1544 .probe = &ov5695_probe,
1545 .remove = &ov5695_remove,
1546 .id_table = ov5695_match_id,
1547 };
1548
sensor_mod_init(void)1549 static int __init sensor_mod_init(void)
1550 {
1551 return i2c_add_driver(&ov5695_i2c_driver);
1552 }
1553
sensor_mod_exit(void)1554 static void __exit sensor_mod_exit(void)
1555 {
1556 i2c_del_driver(&ov5695_i2c_driver);
1557 }
1558
1559 device_initcall_sync(sensor_mod_init);
1560 module_exit(sensor_mod_exit);
1561
1562 MODULE_DESCRIPTION("OmniVision ov5695 sensor driver");
1563 MODULE_LICENSE("GPL v2");
1564