1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov5648 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 add poweron function.
8 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
9 * V0.0X01.0X03 add enum_frame_interval function.
10 * V0.0X01.0X04 add quick stream on/off
11 * V0.0X01.0X05 add function g_mbus_config
12 */
13
14 #include <linux/clk.h>
15 #include <linux/device.h>
16 #include <linux/delay.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/i2c.h>
19 #include <linux/module.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/of.h>
22 #include <linux/of_graph.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/sysfs.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/version.h>
27 #include <media/v4l2-async.h>
28 #include <media/media-entity.h>
29 #include <media/v4l2-common.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-event.h>
33 #include <media/v4l2-fwnode.h>
34 #include <media/v4l2-image-sizes.h>
35 #include <media/v4l2-mediabus.h>
36 #include <media/v4l2-subdev.h>
37
38 #include <linux/rk-camera-module.h>
39
40 /* verify default register values */
41 //#define CHECK_REG_VALUE
42
43 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x05)
44
45 #ifndef V4L2_CID_DIGITAL_GAIN
46 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
47 #endif
48
49 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
50 #define MIPI_FREQ 210000000U
51 #define OV5648_PIXEL_RATE (210000000LL * 2LL * 2LL / 10)
52 #define OV5648_XVCLK_FREQ 24000000
53
54 #define CHIP_ID 0x5648
55 #define OV5648_REG_CHIP_ID 0x300a
56
57 #define OV5648_REG_CTRL_MODE 0x0100
58 #define OV5648_MODE_SW_STANDBY 0x00
59 #define OV5648_MODE_STREAMING 0x01
60
61 #define OV5648_REG_EXPOSURE 0x3500
62 #define OV5648_EXPOSURE_MIN 4
63 #define OV5648_EXPOSURE_STEP 1
64 #define OV5648_VTS_MAX 0x7fff
65
66 #define OV5648_REG_ANALOG_GAIN 0x3509
67 #define ANALOG_GAIN_MIN 0x10
68 #define ANALOG_GAIN_MAX 0xf8
69 #define ANALOG_GAIN_STEP 1
70 #define ANALOG_GAIN_DEFAULT 0xf8
71
72 #define OV5648_REG_GAIN_H 0x350a
73 #define OV5648_REG_GAIN_L 0x350b
74 #define OV5648_GAIN_L_MASK 0xff
75 #define OV5648_GAIN_H_MASK 0x03
76 #define OV5648_DIGI_GAIN_H_SHIFT 8
77 #define OV5648_DIGI_GAIN_MIN 0
78 #define OV5648_DIGI_GAIN_MAX (0x4000 - 1)
79 #define OV5648_DIGI_GAIN_STEP 1
80 #define OV5648_DIGI_GAIN_DEFAULT 1024
81
82 #define OV5648_REG_TEST_PATTERN 0x503d
83 #define OV5648_TEST_PATTERN_ENABLE 0x80
84 #define OV5648_TEST_PATTERN_DISABLE 0x0
85
86 #define OV5648_REG_VTS 0x380e
87
88 #define REG_NULL 0xFFFF
89
90 #define OV5648_REG_VALUE_08BIT 1
91 #define OV5648_REG_VALUE_16BIT 2
92 #define OV5648_REG_VALUE_24BIT 3
93
94 #define OV5648_LANES 2
95 #define OV5648_BITS_PER_SAMPLE 10
96
97 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
98 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
99
100 #define OV5648_NAME "ov5648"
101
102 static const char * const ov5648_supply_names[] = {
103 "avdd", /* Analog power */
104 "dovdd", /* Digital I/O power */
105 "dvdd", /* Digital core power */
106 };
107
108 #define OV5648_NUM_SUPPLIES ARRAY_SIZE(ov5648_supply_names)
109
110 struct regval {
111 u16 addr;
112 u8 val;
113 };
114
115 struct ov5648_mode {
116 u32 width;
117 u32 height;
118 struct v4l2_fract max_fps;
119 u32 hts_def;
120 u32 vts_def;
121 u32 exp_def;
122 const struct regval *reg_list;
123 };
124
125 struct ov5648 {
126 struct i2c_client *client;
127 struct clk *xvclk;
128 struct gpio_desc *power_gpio;
129 struct gpio_desc *reset_gpio;
130 struct gpio_desc *pwdn_gpio;
131 struct regulator_bulk_data supplies[OV5648_NUM_SUPPLIES];
132
133 struct pinctrl *pinctrl;
134 struct pinctrl_state *pins_default;
135 struct pinctrl_state *pins_sleep;
136
137 struct v4l2_subdev subdev;
138 struct media_pad pad;
139 struct v4l2_ctrl_handler ctrl_handler;
140 struct v4l2_ctrl *exposure;
141 struct v4l2_ctrl *anal_gain;
142 struct v4l2_ctrl *digi_gain;
143 struct v4l2_ctrl *hblank;
144 struct v4l2_ctrl *vblank;
145 struct v4l2_ctrl *test_pattern;
146 struct mutex mutex;
147 bool streaming;
148 bool power_on;
149 const struct ov5648_mode *cur_mode;
150 unsigned int lane_num;
151 unsigned int cfg_num;
152 unsigned int pixel_rate;
153 u32 module_index;
154 const char *module_facing;
155 const char *module_name;
156 const char *len_name;
157 };
158
159 #define to_ov5648(sd) container_of(sd, struct ov5648, subdev)
160
161 /*
162 * Xclk 24Mhz
163 * Pclk 84Mhz
164 * linelength 2816(0xb00)
165 * framelength 1984(0x7c0)
166 * grabwindow_width 2592
167 * grabwindow_height 1944
168 * max_framerate 15fps
169 * mipi_datarate per lane 420Mbps
170 */
171 static const struct regval ov5648_global_regs[] = {
172 {0x0100, 0x00},
173 {0x3001, 0x00},
174 {0x3002, 0x00},
175 {0x3011, 0x02},
176 {0x3017, 0x05},
177 {0x3018, 0x4c}, //bit[7:5] 001: 1lane;010: 2lane
178 {0x301c, 0xd2},
179 {0x3022, 0x00},
180 {0x3034, 0x1a},
181 {0x3035, 0x21},
182 {0x3036, 0x69},
183 {0x3037, 0x03},
184 {0x3038, 0x00},
185 {0x3039, 0x00},
186 {0x303a, 0x00},
187 {0x303b, 0x19},
188 {0x303c, 0x11},
189 {0x303d, 0x30},
190 {0x3105, 0x11},
191 {0x3106, 0x05},
192 {0x3304, 0x28},
193 {0x3305, 0x41},
194 {0x3306, 0x30},
195 {0x3308, 0x00},
196 {0x3309, 0xc8},
197 {0x330a, 0x01},
198 {0x330b, 0x90},
199 {0x330c, 0x02},
200 {0x330d, 0x58},
201 {0x330e, 0x03},
202 {0x330f, 0x20},
203 {0x3300, 0x00},
204 {0x3500, 0x00},
205 {0x3501, 0x3d},
206 {0x3502, 0x00},
207 {0x3503, 0x07},
208 {0x350a, 0x00},
209 {0x350b, 0x40},
210 {0x3601, 0x33},
211 {0x3602, 0x00},
212 {0x3611, 0x0e},
213 {0x3612, 0x2b},
214 {0x3614, 0x50},
215
216 {0x3620, 0x33},
217 {0x3622, 0x00},
218 {0x3630, 0xad},
219 {0x3631, 0x00},
220 {0x3632, 0x94},
221 {0x3633, 0x17},
222 {0x3634, 0x14},
223 {0x3704, 0xc0},
224 {0x3705, 0x2a},
225 {0x3708, 0x66},
226 {0x3709, 0x52},
227 {0x370b, 0x23},
228 {0x370c, 0xcf},
229 {0x370d, 0x00},
230 {0x370e, 0x00},
231 {0x371c, 0x07},
232 {0x3739, 0xd2},
233 {0x373c, 0x00},
234 {0x3800, 0x00},
235 {0x3801, 0x00},
236 {0x3802, 0x00},
237 {0x3803, 0x00},
238 {0x3804, 0x0a},
239 {0x3805, 0x3f},
240 {0x3806, 0x07},
241 {0x3807, 0xa3},
242 {0x3808, 0x05},
243 {0x3809, 0x10},
244 {0x380a, 0x03},
245 {0x380b, 0xcc},
246 {0x380c, 0x0b},
247 {0x380d, 0x00},
248 {0x380e, 0x03},
249 {0x380f, 0xe0},
250 {0x3810, 0x00},
251 {0x3811, 0x08},
252 {0x3812, 0x00},
253 {0x3813, 0x04},
254 {0x3814, 0x31},
255 {0x3815, 0x31},
256 {0x3817, 0x00},
257 {0x3820, 0x08},
258 {0x3821, 0x07},
259 {0x3826, 0x03},
260 {0x3829, 0x00},
261 {0x382b, 0x0b},
262 {0x3830, 0x00},
263 {0x3836, 0x00},
264 {0x3837, 0x00},
265 {0x3838, 0x00},
266 {0x3839, 0x04},
267 {0x383a, 0x00},
268 {0x383b, 0x01},
269 {0x3b00, 0x00},
270 {0x3b02, 0x08},
271 {0x3b03, 0x00},
272 {0x3b04, 0x04},
273
274 {0x3b05, 0x00},
275 {0x3b06, 0x04},
276 {0x3b07, 0x08},
277 {0x3b08, 0x00},
278 {0x3b09, 0x02},
279 {0x3b0a, 0x04},
280 {0x3b0b, 0x00},
281 {0x3b0c, 0x3d},
282 {0x3f01, 0x0d},
283 {0x3f0f, 0xf5},
284 {0x4000, 0x89},
285 {0x4001, 0x02},
286 {0x4002, 0x45},
287 {0x4004, 0x02},
288 {0x4005, 0x18},
289 {0x4006, 0x08},
290 {0x4007, 0x10},
291 {0x4008, 0x00},
292 {0x4050, 0x6e},
293 {0x4051, 0x8f},
294 {0x4300, 0xf8},
295 {0x4303, 0xff},
296 {0x4304, 0x00},
297 {0x4307, 0xff},
298 {0x4520, 0x00},
299 {0x4521, 0x00},
300 {0x4511, 0x22},
301 {0x4801, 0x0f},
302 {0x4814, 0x2a},
303 {0x481f, 0x3c},
304 {0x4823, 0x3c},
305 {0x4826, 0x00},
306 {0x481b, 0x3c},
307 {0x4827, 0x32},
308 {0x4837, 0x18},
309 {0x4b00, 0x06},
310 {0x4b01, 0x0a},
311 {0x4b04, 0x10},
312 {0x5000, 0xff},
313 {0x5001, 0x00},
314 {0x5002, 0x41},
315 {0x5003, 0x0a},
316 {0x5004, 0x00},
317 {0x5043, 0x00},
318 {0x5013, 0x00},
319 {0x501f, 0x03},
320 {0x503d, 0x00},
321 {0x5780, 0xfc},
322 {0x5781, 0x1f},
323 {0x5782, 0x03},
324 {0x5786, 0x20},
325 {0x5787, 0x40},
326 {0x5788, 0x08},
327 {0x5789, 0x08},
328 {0x578a, 0x02},
329 {0x578b, 0x01},
330 {0x578c, 0x01},
331
332 {0x578d, 0x0c},
333 {0x578e, 0x02},
334 {0x578f, 0x01},
335 {0x5790, 0x01},
336 {0x5a00, 0x08},
337 {0x5b00, 0x01},
338 {0x5b01, 0x40},
339 {0x5b02, 0x00},
340 {0x5b03, 0xf0},
341 //{0x0100, 0x01},
342
343 {REG_NULL, 0x00},
344 };
345
346 /*
347 * Xclk 24Mhz
348 * Pclk 84Mhz
349 * linelength 2816(0xb00)
350 * framelength 1984(0x7c0)
351 * grabwindow_width 2592
352 * grabwindow_height 1944
353 * max_framerate 15fps
354 * mipi_datarate per lane 420Mbps
355 */
356 static const struct regval ov5648_2592x1944_regs[] = {
357 // 2592x1944 15fps 2 lane MIPI 420Mbps/lane
358 {0x0100, 0x00},
359 {0x3501, 0x7b}, // exposure
360 {0x2502, 0x00}, // exposure
361 {0x3708, 0x63},
362 {0x3709, 0x12},
363 {0x370c, 0xcc}, // changed by AM05d
364 {0x3800, 0x00}, // xstart = 0
365 {0x3801, 0x00}, // xstart
366 {0x3802, 0x00}, // ystart = 0
367 {0x3803, 0x00}, // ystart
368 {0x3804, 0x0a}, // xend = 2623
369 {0x3805, 0x3f}, // xend
370 {0x3806, 0x07}, // yend = 1955
371 {0x3807, 0xa3}, // yend
372 {0x3808, 0x0a}, // x output size = 2592
373 {0x3809, 0x20}, // x output size
374 {0x380a, 0x07}, // y output size = 1944
375 {0x380b, 0x98}, // y output size
376
377 {0x380c, 0x0b}, // hts = 2816
378 {0x380d, 0x00}, // hts
379 {0x380e, 0x07}, // vts = 1984
380 {0x380f, 0xc0}, // vts
381 {0x3810, 0x00}, // isp x win = 16
382 {0x3811, 0x10}, // isp x win
383 {0x3812, 0x00}, // isp y win = 6
384 {0x3813, 0x06}, // isp y win
385 {0x3814, 0x11}, // x inc
386 {0x3815, 0x11}, // y inc
387 {0x3817, 0x00}, // hsync start
388 {0x3820, 0x40}, // flip off, v bin off
389 {0x3821, 0x06}, // mirror on, v bin off
390 {0x4004, 0x04}, // black line number
391 {0x4005, 0x1a}, // blc always update
392 {0x350b, 0x40}, // gain = 4x
393 {0x4837, 0x17}, // MIPI global timing
394 //{0x0100, 0x01},
395
396 {REG_NULL, 0x00},
397 };
398
399 /*
400 * Xclk 24Mhz
401 * Pclk 84Mhz
402 * linelength 2816(0xb00)
403 * framelength 992(0x3e0)
404 * grabwindow_width 1296
405 * grabwindow_height 972
406 * max_framerate 30fps
407 * mipi_datarate per lane 420Mbps
408 */
409 static const struct regval ov5648_1296x972_regs[] = {
410 // 1296x972 30fps 2 lane MIPI 420Mbps/lane
411 {0x0100, 0x00},
412 {0x3501, 0x3d}, // exposure
413 {0x3502, 0x00}, // exposure
414 {0x3708, 0x66},
415 {0x3709, 0x52},
416 {0x370c, 0xcf},
417 {0x3800, 0x00}, // xstart = 0
418 {0x3801, 0x00}, // x start
419 {0x3802, 0x00}, // y start = 0
420 {0x3803, 0x00}, // y start
421 {0x3804, 0x0a}, // xend = 2623
422 {0x3805, 0x3f}, // xend
423 {0x3806, 0x07}, // yend = 1955
424 {0x3807, 0xa3}, // yend
425 {0x3808, 0x05}, // x output size = 1296
426 {0x3809, 0x10}, // x output size
427 {0x380a, 0x03}, // y output size = 972
428 {0x380b, 0xcc}, // y output size
429
430 {0x380c, 0x0b}, // hts = 2816
431 {0x380d, 0x00}, // hts
432 {0x380e, 0x03}, // vts = 992
433 {0x380f, 0xe0}, // vts
434 {0x3810, 0x00}, // isp x win = 8
435 {0x3811, 0x08}, // isp x win
436 {0x3812, 0x00}, // isp y win = 4
437 {0x3813, 0x04}, // isp y win
438 {0x3814, 0x31}, // x inc
439 {0x3815, 0x31}, // y inc
440 {0x3817, 0x00}, // hsync start
441 {0x3820, 0x08}, // flip off, v bin off
442 {0x3821, 0x07}, // mirror on, h bin on
443 {0x4004, 0x02}, // black line number
444 {0x4005, 0x18}, // blc level trigger
445 {0x350b, 0x80}, // gain = 8x
446 {0x4837, 0x17}, // MIPI global timing
447 //{0x0100, 0x01},
448
449 {REG_NULL, 0x00}
450 };
451
452 static const struct ov5648_mode supported_modes_2lane[] = {
453 {
454 .width = 2592,
455 .height = 1944,
456 .max_fps = {
457 .numerator = 10000,
458 .denominator = 150000,
459 },
460 .exp_def = 0x0450,
461 .hts_def = 0x0b00,
462 .vts_def = 0x07c0,
463 .reg_list = ov5648_2592x1944_regs,
464 },
465 {
466 .width = 1296,
467 .height = 972,
468 .max_fps = {
469 .numerator = 10000,
470 .denominator = 300000,
471 },
472 .exp_def = 0x03d0,
473 .hts_def = 0x0b00,
474 .vts_def = 0x03e0,
475 .reg_list = ov5648_1296x972_regs,
476 },
477 };
478
479 static const struct ov5648_mode *supported_modes;
480
481 static const s64 link_freq_menu_items[] = {
482 MIPI_FREQ
483 };
484
485 static const char * const ov5648_test_pattern_menu[] = {
486 "Disabled",
487 "Vertical Color Bar Type 1",
488 "Vertical Color Bar Type 2",
489 "Vertical Color Bar Type 3",
490 "Vertical Color Bar Type 4"
491 };
492
493 /* Write registers up to 4 at a time */
ov5648_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)494 static int ov5648_write_reg(struct i2c_client *client, u16 reg,
495 u32 len, u32 val)
496 {
497 u32 buf_i, val_i;
498 u8 buf[6];
499 u8 *val_p;
500 __be32 val_be;
501
502 //dev_info(&client->dev, "%s(%d) enter!\n", __func__, __LINE__);
503 //dev_info(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
504
505 if (len > 4)
506 return -EINVAL;
507
508 buf[0] = reg >> 8;
509 buf[1] = reg & 0xff;
510
511 val_be = cpu_to_be32(val);
512 val_p = (u8 *)&val_be;
513 buf_i = 2;
514 val_i = 4 - len;
515
516 while (val_i < 4)
517 buf[buf_i++] = val_p[val_i++];
518
519 if (i2c_master_send(client, buf, len + 2) != len + 2) {
520 dev_err(&client->dev,
521 "write reg(0x%x val:0x%x)failed !\n", reg, val);
522 return -EIO;
523 }
524 return 0;
525 }
526
ov5648_write_array(struct i2c_client * client,const struct regval * regs)527 static int ov5648_write_array(struct i2c_client *client,
528 const struct regval *regs)
529 {
530 u32 i;
531 int ret = 0;
532
533 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
534 ret = ov5648_write_reg(client, regs[i].addr,
535 OV5648_REG_VALUE_08BIT, regs[i].val);
536
537 return ret;
538 }
539
540 /* Read registers up to 4 at a time */
ov5648_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)541 static int ov5648_read_reg(struct i2c_client *client, u16 reg,
542 unsigned int len, u32 *val)
543 {
544 struct i2c_msg msgs[2];
545 u8 *data_be_p;
546 __be32 data_be = 0;
547 __be16 reg_addr_be = cpu_to_be16(reg);
548 int ret;
549
550 if (len > 4 || !len)
551 return -EINVAL;
552
553 data_be_p = (u8 *)&data_be;
554 /* Write register address */
555 msgs[0].addr = client->addr;
556 msgs[0].flags = 0;
557 msgs[0].len = 2;
558 msgs[0].buf = (u8 *)®_addr_be;
559
560 /* Read data from register */
561 msgs[1].addr = client->addr;
562 msgs[1].flags = I2C_M_RD;
563 msgs[1].len = len;
564 msgs[1].buf = &data_be_p[4 - len];
565
566 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
567 if (ret != ARRAY_SIZE(msgs))
568 return -EIO;
569
570 *val = be32_to_cpu(data_be);
571
572 return 0;
573 }
574
575 /* Check Register value */
576 #ifdef CHECK_REG_VALUE
ov5648_reg_verify(struct i2c_client * client,const struct regval * regs)577 static int ov5648_reg_verify(struct i2c_client *client,
578 const struct regval *regs)
579 {
580 u32 i;
581 int ret = 0;
582 u32 value;
583
584 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
585 ret = ov5648_read_reg(client, regs[i].addr,
586 OV5648_REG_VALUE_08BIT, &value);
587 if (value != regs[i].val) {
588 dev_info(&client->dev, "%s:0x%04x is 0x%08x \
589 instead of 0x%08x\n", __func__,
590 regs[i].addr, value, regs[i].val);
591 }
592 }
593 return ret;
594 }
595 #endif
596
ov5648_get_reso_dist(const struct ov5648_mode * mode,struct v4l2_mbus_framefmt * framefmt)597 static int ov5648_get_reso_dist(const struct ov5648_mode *mode,
598 struct v4l2_mbus_framefmt *framefmt)
599 {
600 return abs(mode->width - framefmt->width) +
601 abs(mode->height - framefmt->height);
602 }
603
604 static const struct ov5648_mode *
ov5648_find_best_fit(struct ov5648 * ov5648,struct v4l2_subdev_format * fmt)605 ov5648_find_best_fit(struct ov5648 *ov5648,
606 struct v4l2_subdev_format *fmt)
607 {
608 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
609 int dist;
610 int cur_best_fit = 0;
611 int cur_best_fit_dist = -1;
612 int i;
613
614 for (i = 0; i < ov5648->cfg_num; i++) {
615 dist = ov5648_get_reso_dist(&supported_modes[i], framefmt);
616 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
617 cur_best_fit_dist = dist;
618 cur_best_fit = i;
619 }
620 }
621
622 return &supported_modes[cur_best_fit];
623 }
624
ov5648_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)625 static int ov5648_set_fmt(struct v4l2_subdev *sd,
626 struct v4l2_subdev_pad_config *cfg,
627 struct v4l2_subdev_format *fmt)
628 {
629 struct ov5648 *ov5648 = to_ov5648(sd);
630 const struct ov5648_mode *mode;
631 s64 h_blank, vblank_def;
632
633 mutex_lock(&ov5648->mutex);
634
635 mode = ov5648_find_best_fit(ov5648, fmt);
636 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
637 fmt->format.width = mode->width;
638 fmt->format.height = mode->height;
639 fmt->format.field = V4L2_FIELD_NONE;
640 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
641 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
642 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
643 #else
644 mutex_unlock(&ov5648->mutex);
645 return -ENOTTY;
646 #endif
647 } else {
648 ov5648->cur_mode = mode;
649 h_blank = mode->hts_def - mode->width;
650 __v4l2_ctrl_modify_range(ov5648->hblank, h_blank,
651 h_blank, 1, h_blank);
652 vblank_def = mode->vts_def - mode->height;
653 __v4l2_ctrl_modify_range(ov5648->vblank, vblank_def,
654 OV5648_VTS_MAX - mode->height,
655 1, vblank_def);
656 }
657
658 mutex_unlock(&ov5648->mutex);
659
660 return 0;
661 }
662
ov5648_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)663 static int ov5648_get_fmt(struct v4l2_subdev *sd,
664 struct v4l2_subdev_pad_config *cfg,
665 struct v4l2_subdev_format *fmt)
666 {
667 struct ov5648 *ov5648 = to_ov5648(sd);
668 const struct ov5648_mode *mode = ov5648->cur_mode;
669
670 mutex_lock(&ov5648->mutex);
671 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
672 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
673 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
674 #else
675 mutex_unlock(&ov5648->mutex);
676 return -ENOTTY;
677 #endif
678 } else {
679 fmt->format.width = mode->width;
680 fmt->format.height = mode->height;
681 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
682 fmt->format.field = V4L2_FIELD_NONE;
683 }
684 mutex_unlock(&ov5648->mutex);
685
686 return 0;
687 }
688
ov5648_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)689 static int ov5648_enum_mbus_code(struct v4l2_subdev *sd,
690 struct v4l2_subdev_pad_config *cfg,
691 struct v4l2_subdev_mbus_code_enum *code)
692 {
693 if (code->index != 0)
694 return -EINVAL;
695 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
696
697 return 0;
698 }
699
ov5648_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)700 static int ov5648_enum_frame_sizes(struct v4l2_subdev *sd,
701 struct v4l2_subdev_pad_config *cfg,
702 struct v4l2_subdev_frame_size_enum *fse)
703 {
704 struct ov5648 *ov5648 = to_ov5648(sd);
705
706 if (fse->index >= ov5648->cfg_num)
707 return -EINVAL;
708
709 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
710 return -EINVAL;
711
712 fse->min_width = supported_modes[fse->index].width;
713 fse->max_width = supported_modes[fse->index].width;
714 fse->max_height = supported_modes[fse->index].height;
715 fse->min_height = supported_modes[fse->index].height;
716
717 return 0;
718 }
719
ov5648_enable_test_pattern(struct ov5648 * ov5648,u32 pattern)720 static int ov5648_enable_test_pattern(struct ov5648 *ov5648, u32 pattern)
721 {
722 u32 val;
723
724 if (pattern)
725 val = (pattern - 1) | OV5648_TEST_PATTERN_ENABLE;
726 else
727 val = OV5648_TEST_PATTERN_DISABLE;
728
729 return ov5648_write_reg(ov5648->client, OV5648_REG_TEST_PATTERN,
730 OV5648_REG_VALUE_08BIT, val);
731 }
732
ov5648_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)733 static int ov5648_g_frame_interval(struct v4l2_subdev *sd,
734 struct v4l2_subdev_frame_interval *fi)
735 {
736 struct ov5648 *ov5648 = to_ov5648(sd);
737 const struct ov5648_mode *mode = ov5648->cur_mode;
738
739 fi->interval = mode->max_fps;
740
741 return 0;
742 }
743
ov5648_get_module_inf(struct ov5648 * ov5648,struct rkmodule_inf * inf)744 static void ov5648_get_module_inf(struct ov5648 *ov5648,
745 struct rkmodule_inf *inf)
746 {
747 memset(inf, 0, sizeof(*inf));
748 strlcpy(inf->base.sensor, OV5648_NAME, sizeof(inf->base.sensor));
749 strlcpy(inf->base.module, ov5648->module_name,
750 sizeof(inf->base.module));
751 strlcpy(inf->base.lens, ov5648->len_name, sizeof(inf->base.lens));
752 }
753
ov5648_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)754 static long ov5648_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
755 {
756 struct ov5648 *ov5648 = to_ov5648(sd);
757 long ret = 0;
758 u32 stream = 0;
759
760 switch (cmd) {
761 case RKMODULE_GET_MODULE_INFO:
762 ov5648_get_module_inf(ov5648, (struct rkmodule_inf *)arg);
763 break;
764 case RKMODULE_SET_QUICK_STREAM:
765
766 stream = *((u32 *)arg);
767
768 if (stream)
769 ret = ov5648_write_reg(ov5648->client, OV5648_REG_CTRL_MODE,
770 OV5648_REG_VALUE_08BIT, OV5648_MODE_STREAMING);
771 else
772 ret = ov5648_write_reg(ov5648->client, OV5648_REG_CTRL_MODE,
773 OV5648_REG_VALUE_08BIT, OV5648_MODE_SW_STANDBY);
774 break;
775 default:
776 ret = -ENOIOCTLCMD;
777 break;
778 }
779
780 return ret;
781 }
782
783 #ifdef CONFIG_COMPAT
ov5648_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)784 static long ov5648_compat_ioctl32(struct v4l2_subdev *sd,
785 unsigned int cmd, unsigned long arg)
786 {
787 void __user *up = compat_ptr(arg);
788 struct rkmodule_inf *inf;
789 struct rkmodule_awb_cfg *cfg;
790 long ret;
791 u32 stream = 0;
792
793 switch (cmd) {
794 case RKMODULE_GET_MODULE_INFO:
795 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
796 if (!inf) {
797 ret = -ENOMEM;
798 return ret;
799 }
800
801 ret = ov5648_ioctl(sd, cmd, inf);
802 if (!ret)
803 ret = copy_to_user(up, inf, sizeof(*inf));
804 kfree(inf);
805 break;
806 case RKMODULE_AWB_CFG:
807 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
808 if (!cfg) {
809 ret = -ENOMEM;
810 return ret;
811 }
812
813 ret = copy_from_user(cfg, up, sizeof(*cfg));
814 if (!ret)
815 ret = ov5648_ioctl(sd, cmd, cfg);
816 kfree(cfg);
817 break;
818 case RKMODULE_SET_QUICK_STREAM:
819 ret = copy_from_user(&stream, up, sizeof(u32));
820 if (!ret)
821 ret = ov5648_ioctl(sd, cmd, &stream);
822 break;
823 default:
824 ret = -ENOIOCTLCMD;
825 break;
826 }
827
828 return ret;
829 }
830 #endif
831
__ov5648_start_stream(struct ov5648 * ov5648)832 static int __ov5648_start_stream(struct ov5648 *ov5648)
833 {
834 int ret;
835
836 ret = ov5648_write_array(ov5648->client, ov5648->cur_mode->reg_list);
837 if (ret)
838 return ret;
839
840 #ifdef CHECK_REG_VALUE
841 usleep_range(10000, 20000);
842 /* verify default values to make sure everything has */
843 /* been written correctly as expected */
844 dev_info(&ov5648->client->dev, "%s:Check register value!\n",
845 __func__);
846 ret = ov5648_reg_verify(ov5648->client, ov5648_global_regs);
847 if (ret)
848 return ret;
849
850 ret = ov5648_reg_verify(ov5648->client, ov5648->cur_mode->reg_list);
851 if (ret)
852 return ret;
853 #endif
854
855 /* In case these controls are set before streaming */
856 mutex_unlock(&ov5648->mutex);
857 ret = v4l2_ctrl_handler_setup(&ov5648->ctrl_handler);
858 mutex_lock(&ov5648->mutex);
859 if (ret)
860 return ret;
861 ret = ov5648_write_reg(ov5648->client, OV5648_REG_CTRL_MODE,
862 OV5648_REG_VALUE_08BIT, OV5648_MODE_STREAMING);
863 return ret;
864 }
865
__ov5648_stop_stream(struct ov5648 * ov5648)866 static int __ov5648_stop_stream(struct ov5648 *ov5648)
867 {
868 return ov5648_write_reg(ov5648->client, OV5648_REG_CTRL_MODE,
869 OV5648_REG_VALUE_08BIT, OV5648_MODE_SW_STANDBY);
870 }
871
ov5648_s_stream(struct v4l2_subdev * sd,int on)872 static int ov5648_s_stream(struct v4l2_subdev *sd, int on)
873 {
874 struct ov5648 *ov5648 = to_ov5648(sd);
875 struct i2c_client *client = ov5648->client;
876 int ret = 0;
877
878 dev_info(&client->dev, "%s(%d) enter!\n", __func__, __LINE__);
879 mutex_lock(&ov5648->mutex);
880 on = !!on;
881 if (on == ov5648->streaming)
882 goto unlock_and_return;
883
884 if (on) {
885 dev_info(&client->dev, "stream on!!!\n");
886 ret = pm_runtime_get_sync(&client->dev);
887 if (ret < 0) {
888 pm_runtime_put_noidle(&client->dev);
889 goto unlock_and_return;
890 }
891
892 ret = __ov5648_start_stream(ov5648);
893 if (ret) {
894 v4l2_err(sd, "start stream failed while write regs\n");
895 pm_runtime_put(&client->dev);
896 goto unlock_and_return;
897 }
898 } else {
899 dev_info(&client->dev, "stream off!!!\n");
900 __ov5648_stop_stream(ov5648);
901 pm_runtime_put(&client->dev);
902 }
903
904 ov5648->streaming = on;
905
906 unlock_and_return:
907 mutex_unlock(&ov5648->mutex);
908
909 return ret;
910 }
911
ov5648_s_power(struct v4l2_subdev * sd,int on)912 static int ov5648_s_power(struct v4l2_subdev *sd, int on)
913 {
914 struct ov5648 *ov5648 = to_ov5648(sd);
915 struct i2c_client *client = ov5648->client;
916 int ret = 0;
917
918 mutex_lock(&ov5648->mutex);
919
920 /* If the power state is not modified - no work to do. */
921 if (ov5648->power_on == !!on)
922 goto unlock_and_return;
923
924 if (on) {
925 ret = pm_runtime_get_sync(&client->dev);
926 if (ret < 0) {
927 pm_runtime_put_noidle(&client->dev);
928 goto unlock_and_return;
929 }
930
931 ret = ov5648_write_array(ov5648->client, ov5648_global_regs);
932 if (ret) {
933 v4l2_err(sd, "could not set init registers\n");
934 pm_runtime_put_noidle(&client->dev);
935 goto unlock_and_return;
936 }
937
938 ov5648->power_on = true;
939 } else {
940 pm_runtime_put(&client->dev);
941 ov5648->power_on = false;
942 }
943
944 unlock_and_return:
945 mutex_unlock(&ov5648->mutex);
946
947 return ret;
948 }
949
950 /* Calculate the delay in us by clock rate and clock cycles */
ov5648_cal_delay(u32 cycles)951 static inline u32 ov5648_cal_delay(u32 cycles)
952 {
953 return DIV_ROUND_UP(cycles, OV5648_XVCLK_FREQ / 1000 / 1000);
954 }
955
__ov5648_power_on(struct ov5648 * ov5648)956 static int __ov5648_power_on(struct ov5648 *ov5648)
957 {
958 int ret;
959 u32 delay_us;
960 struct device *dev = &ov5648->client->dev;
961
962 if (!IS_ERR(ov5648->power_gpio))
963 gpiod_set_value_cansleep(ov5648->power_gpio, 1);
964
965 usleep_range(1000, 2000);
966
967 if (!IS_ERR_OR_NULL(ov5648->pins_default)) {
968 ret = pinctrl_select_state(ov5648->pinctrl,
969 ov5648->pins_default);
970 if (ret < 0)
971 dev_err(dev, "could not set pins\n");
972 }
973 ret = clk_set_rate(ov5648->xvclk, OV5648_XVCLK_FREQ);
974 if (ret < 0)
975 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
976 if (clk_get_rate(ov5648->xvclk) != OV5648_XVCLK_FREQ)
977 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
978 ret = clk_prepare_enable(ov5648->xvclk);
979 if (ret < 0) {
980 dev_err(dev, "Failed to enable xvclk\n");
981 return ret;
982 }
983 if (!IS_ERR(ov5648->reset_gpio))
984 gpiod_set_value_cansleep(ov5648->reset_gpio, 1);
985
986 ret = regulator_bulk_enable(OV5648_NUM_SUPPLIES, ov5648->supplies);
987 if (ret < 0) {
988 dev_err(dev, "Failed to enable regulators\n");
989 goto disable_clk;
990 }
991
992 if (!IS_ERR(ov5648->reset_gpio))
993 gpiod_set_value_cansleep(ov5648->reset_gpio, 0);
994
995 if (!IS_ERR(ov5648->pwdn_gpio))
996 gpiod_set_value_cansleep(ov5648->pwdn_gpio, 1);
997
998 /* 8192 cycles prior to first SCCB transaction */
999 delay_us = ov5648_cal_delay(8192);
1000 usleep_range(delay_us, delay_us * 2);
1001
1002 return 0;
1003
1004 disable_clk:
1005 clk_disable_unprepare(ov5648->xvclk);
1006
1007 return ret;
1008 }
1009
__ov5648_power_off(struct ov5648 * ov5648)1010 static void __ov5648_power_off(struct ov5648 *ov5648)
1011 {
1012 int ret;
1013 struct device *dev = &ov5648->client->dev;
1014
1015 if (!IS_ERR(ov5648->pwdn_gpio))
1016 gpiod_set_value_cansleep(ov5648->pwdn_gpio, 0);
1017 clk_disable_unprepare(ov5648->xvclk);
1018 if (!IS_ERR(ov5648->reset_gpio))
1019 gpiod_set_value_cansleep(ov5648->reset_gpio, 1);
1020 if (!IS_ERR_OR_NULL(ov5648->pins_sleep)) {
1021 ret = pinctrl_select_state(ov5648->pinctrl,
1022 ov5648->pins_sleep);
1023 if (ret < 0)
1024 dev_dbg(dev, "could not set pins\n");
1025 }
1026 if (!IS_ERR(ov5648->power_gpio))
1027 gpiod_set_value_cansleep(ov5648->power_gpio, 0);
1028
1029 regulator_bulk_disable(OV5648_NUM_SUPPLIES, ov5648->supplies);
1030 }
1031
ov5648_runtime_resume(struct device * dev)1032 static int ov5648_runtime_resume(struct device *dev)
1033 {
1034 struct i2c_client *client = to_i2c_client(dev);
1035 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1036 struct ov5648 *ov5648 = to_ov5648(sd);
1037
1038 return __ov5648_power_on(ov5648);
1039 }
1040
ov5648_runtime_suspend(struct device * dev)1041 static int ov5648_runtime_suspend(struct device *dev)
1042 {
1043 struct i2c_client *client = to_i2c_client(dev);
1044 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1045 struct ov5648 *ov5648 = to_ov5648(sd);
1046
1047 __ov5648_power_off(ov5648);
1048
1049 return 0;
1050 }
1051
1052 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov5648_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1053 static int ov5648_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1054 {
1055 struct ov5648 *ov5648 = to_ov5648(sd);
1056 struct v4l2_mbus_framefmt *try_fmt =
1057 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1058 const struct ov5648_mode *def_mode = &supported_modes[0];
1059
1060 mutex_lock(&ov5648->mutex);
1061 /* Initialize try_fmt */
1062 try_fmt->width = def_mode->width;
1063 try_fmt->height = def_mode->height;
1064 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1065 try_fmt->field = V4L2_FIELD_NONE;
1066
1067 mutex_unlock(&ov5648->mutex);
1068 /* No crop or compose */
1069
1070 return 0;
1071 }
1072 #endif
1073
ov5648_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1074 static int ov5648_enum_frame_interval(struct v4l2_subdev *sd,
1075 struct v4l2_subdev_pad_config *cfg,
1076 struct v4l2_subdev_frame_interval_enum *fie)
1077 {
1078 struct ov5648 *ov5648 = to_ov5648(sd);
1079
1080 if (fie->index >= ov5648->cfg_num)
1081 return -EINVAL;
1082
1083 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1084 fie->width = supported_modes[fie->index].width;
1085 fie->height = supported_modes[fie->index].height;
1086 fie->interval = supported_modes[fie->index].max_fps;
1087 return 0;
1088 }
1089
ov5648_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)1090 static int ov5648_g_mbus_config(struct v4l2_subdev *sd,
1091 struct v4l2_mbus_config *config)
1092 {
1093 u32 val = 0;
1094
1095 val = 1 << (OV5648_LANES - 1) |
1096 V4L2_MBUS_CSI2_CHANNEL_0 |
1097 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1098 config->type = V4L2_MBUS_CSI2;
1099 config->flags = val;
1100
1101 return 0;
1102 }
1103
1104 static const struct dev_pm_ops ov5648_pm_ops = {
1105 SET_RUNTIME_PM_OPS(ov5648_runtime_suspend,
1106 ov5648_runtime_resume, NULL)
1107 };
1108
1109 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1110 static const struct v4l2_subdev_internal_ops ov5648_internal_ops = {
1111 .open = ov5648_open,
1112 };
1113 #endif
1114
1115 static const struct v4l2_subdev_core_ops ov5648_core_ops = {
1116 .s_power = ov5648_s_power,
1117 .ioctl = ov5648_ioctl,
1118 #ifdef CONFIG_COMPAT
1119 .compat_ioctl32 = ov5648_compat_ioctl32,
1120 #endif
1121 };
1122
1123 static const struct v4l2_subdev_video_ops ov5648_video_ops = {
1124 .s_stream = ov5648_s_stream,
1125 .g_frame_interval = ov5648_g_frame_interval,
1126 .g_mbus_config = ov5648_g_mbus_config,
1127 };
1128
1129 static const struct v4l2_subdev_pad_ops ov5648_pad_ops = {
1130 .enum_mbus_code = ov5648_enum_mbus_code,
1131 .enum_frame_size = ov5648_enum_frame_sizes,
1132 .enum_frame_interval = ov5648_enum_frame_interval,
1133 .get_fmt = ov5648_get_fmt,
1134 .set_fmt = ov5648_set_fmt,
1135 };
1136
1137 static const struct v4l2_subdev_ops ov5648_subdev_ops = {
1138 .core = &ov5648_core_ops,
1139 .video = &ov5648_video_ops,
1140 .pad = &ov5648_pad_ops,
1141 };
1142
ov5648_set_ctrl(struct v4l2_ctrl * ctrl)1143 static int ov5648_set_ctrl(struct v4l2_ctrl *ctrl)
1144 {
1145 struct ov5648 *ov5648 = container_of(ctrl->handler,
1146 struct ov5648, ctrl_handler);
1147 struct i2c_client *client = ov5648->client;
1148 s64 max;
1149 int ret = 0;
1150
1151 /* Propagate change of current control to all related controls */
1152 switch (ctrl->id) {
1153 case V4L2_CID_VBLANK:
1154 /* Update max exposure while meeting expected vblanking */
1155 max = ov5648->cur_mode->height + ctrl->val - 4;
1156 __v4l2_ctrl_modify_range(ov5648->exposure,
1157 ov5648->exposure->minimum, max,
1158 ov5648->exposure->step,
1159 ov5648->exposure->default_value);
1160 break;
1161 }
1162
1163 if (!pm_runtime_get_if_in_use(&client->dev))
1164 return 0;
1165
1166 switch (ctrl->id) {
1167 case V4L2_CID_EXPOSURE:
1168 /* 4 least significant bits of expsoure are fractional part */
1169
1170 ret = ov5648_write_reg(ov5648->client, OV5648_REG_EXPOSURE,
1171 OV5648_REG_VALUE_24BIT, ctrl->val << 4);
1172
1173 break;
1174 case V4L2_CID_ANALOGUE_GAIN:
1175 ret = ov5648_write_reg(ov5648->client, OV5648_REG_GAIN_L,
1176 OV5648_REG_VALUE_08BIT,
1177 ctrl->val & OV5648_GAIN_L_MASK);
1178 ret |= ov5648_write_reg(ov5648->client, OV5648_REG_GAIN_H,
1179 OV5648_REG_VALUE_08BIT,
1180 (ctrl->val >> OV5648_DIGI_GAIN_H_SHIFT) &
1181 OV5648_GAIN_H_MASK);
1182 break;
1183 case V4L2_CID_VBLANK:
1184
1185 ret = ov5648_write_reg(ov5648->client, OV5648_REG_VTS,
1186 OV5648_REG_VALUE_16BIT,
1187 ctrl->val + ov5648->cur_mode->height);
1188 break;
1189 case V4L2_CID_TEST_PATTERN:
1190 ret = ov5648_enable_test_pattern(ov5648, ctrl->val);
1191 break;
1192 default:
1193 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1194 __func__, ctrl->id, ctrl->val);
1195 break;
1196 }
1197
1198 pm_runtime_put(&client->dev);
1199
1200 return ret;
1201 }
1202
1203 static const struct v4l2_ctrl_ops ov5648_ctrl_ops = {
1204 .s_ctrl = ov5648_set_ctrl,
1205 };
1206
ov5648_initialize_controls(struct ov5648 * ov5648)1207 static int ov5648_initialize_controls(struct ov5648 *ov5648)
1208 {
1209 const struct ov5648_mode *mode;
1210 struct v4l2_ctrl_handler *handler;
1211 struct v4l2_ctrl *ctrl;
1212 s64 exposure_max, vblank_def;
1213 u32 h_blank;
1214 int ret;
1215
1216 handler = &ov5648->ctrl_handler;
1217 mode = ov5648->cur_mode;
1218 ret = v4l2_ctrl_handler_init(handler, 8);
1219 if (ret)
1220 return ret;
1221 handler->lock = &ov5648->mutex;
1222
1223 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1224 0, 0, link_freq_menu_items);
1225 if (ctrl)
1226 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1227
1228 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1229 0, ov5648->pixel_rate, 1, ov5648->pixel_rate);
1230
1231 h_blank = mode->hts_def - mode->width;
1232 ov5648->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1233 h_blank, h_blank, 1, h_blank);
1234 if (ov5648->hblank)
1235 ov5648->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1236
1237 vblank_def = mode->vts_def - mode->height;
1238 ov5648->vblank = v4l2_ctrl_new_std(handler, &ov5648_ctrl_ops,
1239 V4L2_CID_VBLANK, vblank_def,
1240 OV5648_VTS_MAX - mode->height,
1241 1, vblank_def);
1242
1243 exposure_max = mode->vts_def - 4;
1244 ov5648->exposure = v4l2_ctrl_new_std(handler, &ov5648_ctrl_ops,
1245 V4L2_CID_EXPOSURE, OV5648_EXPOSURE_MIN,
1246 exposure_max, OV5648_EXPOSURE_STEP,
1247 mode->exp_def);
1248
1249 ov5648->anal_gain = v4l2_ctrl_new_std(handler, &ov5648_ctrl_ops,
1250 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1251 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1252 ANALOG_GAIN_DEFAULT);
1253
1254 /* Digital gain */
1255 ov5648->digi_gain = v4l2_ctrl_new_std(handler, &ov5648_ctrl_ops,
1256 V4L2_CID_DIGITAL_GAIN, OV5648_DIGI_GAIN_MIN,
1257 OV5648_DIGI_GAIN_MAX, OV5648_DIGI_GAIN_STEP,
1258 OV5648_DIGI_GAIN_DEFAULT);
1259
1260 ov5648->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1261 &ov5648_ctrl_ops, V4L2_CID_TEST_PATTERN,
1262 ARRAY_SIZE(ov5648_test_pattern_menu) - 1,
1263 0, 0, ov5648_test_pattern_menu);
1264
1265 if (handler->error) {
1266 ret = handler->error;
1267 dev_err(&ov5648->client->dev,
1268 "Failed to init controls(%d)\n", ret);
1269 goto err_free_handler;
1270 }
1271
1272 ov5648->subdev.ctrl_handler = handler;
1273
1274 return 0;
1275
1276 err_free_handler:
1277 v4l2_ctrl_handler_free(handler);
1278
1279 return ret;
1280 }
1281
ov5648_check_sensor_id(struct ov5648 * ov5648,struct i2c_client * client)1282 static int ov5648_check_sensor_id(struct ov5648 *ov5648,
1283 struct i2c_client *client)
1284 {
1285 struct device *dev = &ov5648->client->dev;
1286 u32 id = 0;
1287 int ret;
1288
1289 ret = ov5648_read_reg(client, OV5648_REG_CHIP_ID,
1290 OV5648_REG_VALUE_16BIT, &id);
1291 if (id != CHIP_ID) {
1292 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1293 return -ENODEV;
1294 }
1295
1296 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1297
1298 return 0;
1299 }
1300
ov5648_configure_regulators(struct ov5648 * ov5648)1301 static int ov5648_configure_regulators(struct ov5648 *ov5648)
1302 {
1303 int i;
1304
1305 for (i = 0; i < OV5648_NUM_SUPPLIES; i++)
1306 ov5648->supplies[i].supply = ov5648_supply_names[i];
1307
1308 return devm_regulator_bulk_get(&ov5648->client->dev,
1309 OV5648_NUM_SUPPLIES,
1310 ov5648->supplies);
1311 }
1312
ov5648_parse_of(struct ov5648 * ov5648)1313 static int ov5648_parse_of(struct ov5648 *ov5648)
1314 {
1315 struct device *dev = &ov5648->client->dev;
1316 struct device_node *endpoint;
1317 struct fwnode_handle *fwnode;
1318 int rval;
1319
1320 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1321 if (!endpoint) {
1322 dev_err(dev, "Failed to get endpoint\n");
1323 return -EINVAL;
1324 }
1325 fwnode = of_fwnode_handle(endpoint);
1326 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1327 if (rval <= 0) {
1328 dev_warn(dev, " Get mipi lane num failed!\n");
1329 return -1;
1330 }
1331
1332 ov5648->lane_num = rval;
1333 if (2 == ov5648->lane_num) {
1334 ov5648->cur_mode = &supported_modes_2lane[0];
1335 supported_modes = supported_modes_2lane;
1336 ov5648->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1337
1338 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1339 ov5648->pixel_rate = MIPI_FREQ * 2U * ov5648->lane_num / 10U;
1340 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
1341 ov5648->lane_num, ov5648->pixel_rate);
1342 } else {
1343 dev_err(dev, "unsupported lane_num(%d)\n", ov5648->lane_num);
1344 return -1;
1345 }
1346 return 0;
1347 }
1348
ov5648_probe(struct i2c_client * client,const struct i2c_device_id * id)1349 static int ov5648_probe(struct i2c_client *client,
1350 const struct i2c_device_id *id)
1351 {
1352 struct device *dev = &client->dev;
1353 struct device_node *node = dev->of_node;
1354 struct ov5648 *ov5648;
1355 struct v4l2_subdev *sd;
1356 char facing[2] = "b";
1357 int ret;
1358
1359 dev_info(dev, "driver version: %02x.%02x.%02x",
1360 DRIVER_VERSION >> 16,
1361 (DRIVER_VERSION & 0xff00) >> 8,
1362 DRIVER_VERSION & 0x00ff);
1363
1364 ov5648 = devm_kzalloc(dev, sizeof(*ov5648), GFP_KERNEL);
1365 if (!ov5648)
1366 return -ENOMEM;
1367
1368 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1369 &ov5648->module_index);
1370 if (ret) {
1371 dev_warn(dev, "could not get module index!\n");
1372 ov5648->module_index = 0;
1373 }
1374 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1375 &ov5648->module_facing);
1376 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1377 &ov5648->module_name);
1378 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1379 &ov5648->len_name);
1380 if (ret) {
1381 dev_err(dev, "could not get module information!\n");
1382 return -EINVAL;
1383 }
1384
1385 ov5648->client = client;
1386
1387 ov5648->xvclk = devm_clk_get(dev, "xvclk");
1388 if (IS_ERR(ov5648->xvclk)) {
1389 dev_err(dev, "Failed to get xvclk\n");
1390 return -EINVAL;
1391 }
1392
1393 ov5648->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
1394 if (IS_ERR(ov5648->power_gpio))
1395 dev_warn(dev, "Failed to get power-gpios, maybe no use\n");
1396
1397 ov5648->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1398 if (IS_ERR(ov5648->reset_gpio))
1399 dev_warn(dev, "Failed to get reset-gpios, maybe no use\n");
1400
1401 ov5648->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1402 if (IS_ERR(ov5648->pwdn_gpio))
1403 dev_warn(dev, "Failed to get pwdn-gpios\n");
1404
1405 ret = ov5648_configure_regulators(ov5648);
1406 if (ret) {
1407 dev_err(dev, "Failed to get power regulators\n");
1408 return ret;
1409 }
1410 ret = ov5648_parse_of(ov5648);
1411 if (ret != 0)
1412 return -EINVAL;
1413
1414 ov5648->pinctrl = devm_pinctrl_get(dev);
1415 if (!IS_ERR(ov5648->pinctrl)) {
1416 ov5648->pins_default =
1417 pinctrl_lookup_state(ov5648->pinctrl,
1418 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1419 if (IS_ERR(ov5648->pins_default))
1420 dev_err(dev, "could not get default pinstate\n");
1421
1422 ov5648->pins_sleep =
1423 pinctrl_lookup_state(ov5648->pinctrl,
1424 OF_CAMERA_PINCTRL_STATE_SLEEP);
1425 if (IS_ERR(ov5648->pins_sleep))
1426 dev_err(dev, "could not get sleep pinstate\n");
1427 }
1428
1429 mutex_init(&ov5648->mutex);
1430
1431 sd = &ov5648->subdev;
1432 v4l2_i2c_subdev_init(sd, client, &ov5648_subdev_ops);
1433 ret = ov5648_initialize_controls(ov5648);
1434 if (ret)
1435 goto err_destroy_mutex;
1436
1437 ret = __ov5648_power_on(ov5648);
1438 if (ret)
1439 goto err_free_handler;
1440
1441 ret = ov5648_check_sensor_id(ov5648, client);
1442 if (ret < 0) {
1443 dev_info(&client->dev, "%s(%d) Check id failed\n"
1444 "check following information:\n"
1445 "Power/PowerDown/Reset/Mclk/I2cBus !!\n",
1446 __func__, __LINE__);
1447 goto err_power_off;
1448 }
1449
1450 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1451 sd->internal_ops = &ov5648_internal_ops;
1452 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1453 V4L2_SUBDEV_FL_HAS_EVENTS;
1454 #endif
1455 #if defined(CONFIG_MEDIA_CONTROLLER)
1456 ov5648->pad.flags = MEDIA_PAD_FL_SOURCE;
1457 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1458 ret = media_entity_pads_init(&sd->entity, 1, &ov5648->pad);
1459 if (ret < 0)
1460 goto err_power_off;
1461 #endif
1462
1463 memset(facing, 0, sizeof(facing));
1464 if (strcmp(ov5648->module_facing, "back") == 0)
1465 facing[0] = 'b';
1466 else
1467 facing[0] = 'f';
1468
1469 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1470 ov5648->module_index, facing,
1471 OV5648_NAME, dev_name(sd->dev));
1472
1473 ret = v4l2_async_register_subdev_sensor_common(sd);
1474 if (ret) {
1475 dev_err(dev, "v4l2 async register subdev failed\n");
1476 goto err_clean_entity;
1477 }
1478
1479 pm_runtime_set_active(dev);
1480 pm_runtime_enable(dev);
1481 pm_runtime_idle(dev);
1482
1483 return 0;
1484
1485 err_clean_entity:
1486 #if defined(CONFIG_MEDIA_CONTROLLER)
1487 media_entity_cleanup(&sd->entity);
1488 #endif
1489 err_power_off:
1490 __ov5648_power_off(ov5648);
1491 err_free_handler:
1492 v4l2_ctrl_handler_free(&ov5648->ctrl_handler);
1493 err_destroy_mutex:
1494 mutex_destroy(&ov5648->mutex);
1495
1496 return ret;
1497 }
1498
ov5648_remove(struct i2c_client * client)1499 static int ov5648_remove(struct i2c_client *client)
1500 {
1501 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1502 struct ov5648 *ov5648 = to_ov5648(sd);
1503
1504 v4l2_async_unregister_subdev(sd);
1505 #if defined(CONFIG_MEDIA_CONTROLLER)
1506 media_entity_cleanup(&sd->entity);
1507 #endif
1508 v4l2_ctrl_handler_free(&ov5648->ctrl_handler);
1509 mutex_destroy(&ov5648->mutex);
1510
1511 pm_runtime_disable(&client->dev);
1512 if (!pm_runtime_status_suspended(&client->dev))
1513 __ov5648_power_off(ov5648);
1514 pm_runtime_set_suspended(&client->dev);
1515
1516 return 0;
1517 }
1518
1519 #if IS_ENABLED(CONFIG_OF)
1520 static const struct of_device_id ov5648_of_match[] = {
1521 { .compatible = "ovti,ov5648" },
1522 {},
1523 };
1524 MODULE_DEVICE_TABLE(of, ov5648_of_match);
1525 #endif
1526
1527 static const struct i2c_device_id ov5648_match_id[] = {
1528 { "ovti,ov5648", 0 },
1529 { },
1530 };
1531
1532 static struct i2c_driver ov5648_i2c_driver = {
1533 .driver = {
1534 .name = OV5648_NAME,
1535 .pm = &ov5648_pm_ops,
1536 .of_match_table = of_match_ptr(ov5648_of_match),
1537 },
1538 .probe = &ov5648_probe,
1539 .remove = &ov5648_remove,
1540 .id_table = ov5648_match_id,
1541 };
1542
sensor_mod_init(void)1543 static int __init sensor_mod_init(void)
1544 {
1545 return i2c_add_driver(&ov5648_i2c_driver);
1546 }
1547
sensor_mod_exit(void)1548 static void __exit sensor_mod_exit(void)
1549 {
1550 i2c_del_driver(&ov5648_i2c_driver);
1551 }
1552
1553 device_initcall_sync(sensor_mod_init);
1554 module_exit(sensor_mod_exit);
1555
1556 MODULE_DESCRIPTION("OmniVision ov5648 sensor driver");
1557 MODULE_LICENSE("GPL v2");
1558