1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov2735 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 add poweron function.
8 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
9 * V0.0X01.0X03 add enum_frame_interval function.
10 * V0.0X01.0X04 add quick stream on/off
11 * V0.0X01.0X05 add function g_mbus_config
12 */
13
14 #include <linux/clk.h>
15 #include <linux/device.h>
16 #include <linux/delay.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/i2c.h>
19 #include <linux/module.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/sysfs.h>
23 #include <linux/slab.h>
24 #include <linux/version.h>
25 #include <linux/rk-camera-module.h>
26 #include <media/media-entity.h>
27 #include <media/v4l2-async.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-subdev.h>
30
31 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x05)
32
33 #ifndef V4L2_CID_DIGITAL_GAIN
34 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
35 #endif
36
37 /* 45Mhz * 4 Binning */
38
39 #define OV2735_XVCLK_FREQ 24000000
40 #define REG_NULL 0xFFFF
41 #define PAGE_SELECT_REG 0xfd
42 #define PAGE_ZERO 0x00
43 #define PAGE_ONE 0x01
44 #define PAGE_TWO 0x02
45 #define PAGE_OTP 0x04
46
47 //PAGE0
48 #define OV2735_PIDH_ADDR 0x02
49 #define OV2735_PIDL_ADDR 0x03
50 #define OV2735_PIDH_MAGIC 0x27
51 #define OV2735_PIDL_MAGIC 0x35
52
53 //PAGE1
54 #define STREAM_CTRL_REG 0xa0
55 #define STREAM_ON 0x01
56 #define STREAM_OFF 0x00
57
58 #define UPDOWN_MIRROR_REG 0x3f
59 #define H_V_NORMAL 0x00
60 #define H_MIRROR 0x01
61 #define V_FLIP 0x02
62 #define MIRROR_AND_FLIP 0x03
63
64 #define OV2735_VTS_HIGH_REG 0x0e
65 #define OV2735_VTS_LOW_REG 0x0f
66 #define OV2735_COARSE_INTG_TIME_MIN 1
67 #define OV2735_COARSE_INTG_TIME_MAX 4
68 #define OV2735_VTS_ENABLE_REG 0x0d
69 #define OV2735_VTS_ENABLE_VALUE 0x10
70 #define OV2735_FRAME_SYNC_REG 0x01
71 #define OV2735_FRAME_SYNC_VALUE 0x01
72 #define OV2735_REG_TEST_PATTERN 0xb2
73 #define OV2735_HTS_HIGH_REG 0x09
74 #define OV2735_HTS_LOW_REG 0x0a
75 #define OV2735_TEST_PATTERN_ENABLE BIT(0)
76 #define OV2735_TEST_PATTERN_DISABLE 0xfe
77 #define OV2735_FINE_INTG_TIME_MIN 0
78 #define OV2735_FINE_INTG_TIME_MAX_MARGIN 0
79 #define OV2735_COARSE_INTG_TIME_MIN 1
80 #define OV2735_COARSE_INTG_TIME_MAX_MARGIN 4
81
82 #define OV2735_AEC_PK_LONG_EXPO_2ND_REG 0x03 /* Exposure Bits 8-15 */
83 #define OV2735_AEC_PK_LONG_EXPO_1ST_REG 0x04 /* Exposure Bits 0-7 */
84 #define OV2735_FETCH_2ND_BYTE_EXP(VAL) ((VAL >> 8) & 0xFF)
85 #define OV2735_FETCH_1ST_BYTE_EXP(VAL) (VAL & 0xFF)
86
87 #define OV2735_AEC_PK_GAIN_REG 0x24 /* GAIN Bits 0 -7 */
88 #define OV2735_FETCH_LSB_GAIN(VAL) (VAL & 0x00FF)
89 #define OV2735_FETCH_MSB_GAIN(VAL) ((VAL >> 8) & 0x01)
90
91 #define OV2735_EXPOSURE_MIN 4
92 #define OV2735_EXPOSURE_STEP 1
93 #define OV2735_VTS_MAX 0xfff
94 #define ANALOG_GAIN_MIN 0x10
95 #define ANALOG_GAIN_MAX 0xff
96 #define ANALOG_GAIN_STEP 1
97 #define ANALOG_GAIN_DEFAULT 0x10
98
99 #define OV2735_NAME "ov2735"
100
101 #define OV2735_LANES 2
102
103 static const char * const ov2735_supply_names[] = {
104 "avdd", /* Analog power */
105 "dovdd", /* Digital I/O power */
106 "dvdd", /* Digital core power */
107 };
108
109 #define OV2735_NUM_SUPPLIES ARRAY_SIZE(ov2735_supply_names)
110
111 struct regval {
112 u16 addr;
113 u8 val;
114 };
115
116 struct ov2735_mode {
117 u32 width;
118 u32 height;
119 struct v4l2_fract max_fps;
120 u32 hts_def;
121 u32 vts_def;
122 u32 exp_def;
123 const struct regval *reg_list;
124 };
125
126 struct ov2735 {
127 struct i2c_client *client;
128 struct clk *xvclk;
129 struct gpio_desc *reset_gpio;
130 struct gpio_desc *pwdn_gpio;
131 struct regulator_bulk_data supplies[OV2735_NUM_SUPPLIES];
132
133 struct v4l2_subdev subdev;
134 struct media_pad pad;
135 struct v4l2_ctrl_handler ctrl_handler;
136 struct v4l2_ctrl *exposure;
137 struct v4l2_ctrl *anal_gain;
138 struct v4l2_ctrl *digi_gain;
139 struct v4l2_ctrl *hblank;
140 struct v4l2_ctrl *vblank;
141 struct v4l2_ctrl *test_pattern;
142 struct mutex mutex;
143 bool streaming;
144 bool power_on;
145 const struct ov2735_mode *cur_mode;
146 u32 module_index;
147 const char *module_facing;
148 const char *module_name;
149 const char *len_name;
150 };
151
152 #define to_ov2735(sd) container_of(sd, struct ov2735, subdev)
153
154 static const struct regval ov2735_global_regs[] = {
155 {0xfd, 0x00},
156 {0x20, 0x01}, // soft reset modify to 0x01
157 {0x0, 0x3}, // delay 3ms // delay 3ms
158 {REG_NULL, 0x00},
159 };
160
161 /*
162 * Base sensor configs
163 * ov2735_init_tab_1920_1080_30fps
164 * MCLK:24MHz 1920x1080 30fps mipi 2lane 420Mbps/lane
165 */
166 static struct regval ov2735_1920_1080_30fps[] = {
167 {0xfd, 0x00},
168 {0x2f, 0x10}, // clk and pll setting
169 {0x34, 0x00},
170 {0x30, 0x15},
171 {0x33, 0x01},
172 {0x35, 0x20},
173 {0xfd, 0x01},
174 {0x0d, 0x00}, // disable modify VTS
175 {0x30, 0x00},
176 {0x03, 0x01}, // exposure time, MSB default 0x01
177 {0x04, 0x8f}, // exposure time, LSB default 0x8f
178 {0x01, 0x01}, // enable of frame sync signal
179 {0x09, 0x00}, // HBLANK
180 {0x0a, 0x20},
181 {0x06, 0x0a}, // VBLANK 8LSB
182 {0x24, 0x10}, // gain default 0x10, by yjz
183 {0x01, 0x01},
184 {0xfb, 0x73}, // ABL
185 {0x01, 0x01},
186 {0xfd, 0x01},
187 {0x1a, 0x6b}, // Timing ctrl
188 {0x1c, 0xea},
189 {0x16, 0x0c},
190 {0x21, 0x00},
191 {0x11, 0x63},
192 {0x19, 0xc3},
193 {0x26, 0x5a}, // ANALOG CTRL
194 {0x29, 0x01},
195 {0x33, 0x6f},
196 {0x2a, 0xd2},
197 {0x2c, 0x40},
198 {0xd0, 0x02},
199 {0xd1, 0x01},
200 {0xd2, 0x20},
201 {0xd3, 0x04},
202 {0xd4, 0x2a},
203 {0x50, 0x00}, // Timing ctrl
204 {0x51, 0x2c},
205 {0x52, 0x29},
206 {0x53, 0x00},
207 {0x55, 0x44},
208 {0x58, 0x29},
209 {0x5a, 0x00},
210 {0x5b, 0x00},
211 {0x5d, 0x00},
212 {0x64, 0x2f},
213 {0x66, 0x62},
214 {0x68, 0x5b},
215 {0x75, 0x46},
216 {0x76, 0x36},
217 {0x77, 0x4f},
218 {0x78, 0xef},
219 {0x72, 0xcf},
220 {0x73, 0x36},
221 {0x7d, 0x0d},
222 {0x7e, 0x0d},
223 {0x8a, 0x77},
224 {0x8b, 0x77},
225 {0xfd, 0x01},
226 {0xb1, 0x83}, // MIPI register ---
227 {0xb3, 0x0b},
228 {0xb4, 0x14},
229 {0x9d, 0x40},
230 {0xa1, 0x05},
231 {0x94, 0x44},
232 {0x95, 0x33},
233 {0x96, 0x1f},
234 {0x98, 0x45},
235 {0x9c, 0x10},
236 {0xb5, 0x70},
237 {0x25, 0xe0},
238 {0x20, 0x7b},
239 {0x8f, 0x88}, // H_SIZE_MIPI_8LSB
240 {0x91, 0x40}, // V_SIZE_MIPI_8LSB
241 {0xfd, 0x01},
242 {0xfd, 0x02},
243 {0xa1, 0x04},
244 {0xa3, 0x40},
245 {0xa5, 0x02},
246 {0xa7, 0xc4},
247 {0xfd, 0x01},
248 {0x86, 0x77}, // BLC
249 {0x89, 0x77},
250 {0x87, 0x74},
251 {0x88, 0x74},
252 {0xfc, 0xe0},
253 {0xfe, 0xe0},
254 {0xf0, 0x40},
255 {0xf1, 0x40},
256 {0xf2, 0x40},
257 {0xf3, 0x40},
258 //1920x1080
259 {0xfd, 0x02},
260 {0xa0, 0x00}, // Image vertical start MSB3bits
261 {0xa1, 0x08}, // Image vertical start LSB8bits
262 {0xa2, 0x04}, // image vertical size MSB8bits
263 {0xa3, 0x38}, // image vertical size LSB8bits
264 {0xa4, 0x00},
265 {0xa5, 0x08}, // H start 8Lsb
266 {0xa6, 0x03},
267 {0xa7, 0xc0}, // Half H size Lsb8bits
268 {0xfd, 0x01},
269 {0x8e, 0x07},
270 {0x8f, 0x80}, // MIPI column number
271 {0x90, 0x04}, // MIPI row number
272 {0x91, 0x38},
273 //TV1080_30fps
274 {0xfd, 0x01},
275 {0x0d, 0x10}, // enable manual modify the VTS
276 {0x0e, 0x04},
277 {0x0f, 0xc1}, // Vblank, VTS:0x4c1, 30.037fps
278 {0x01, 0x01}, // enable of frame sync signal
279 {REG_NULL, 0x00},
280 };
281
282 #define HTS_DEF 0x020
283 #define VTS_DEF 0x4c1
284 #define MAX_FPS 30
285 static const struct ov2735_mode supported_modes[] = {
286 {
287 .width = 1920,
288 .height = 1080,
289 .max_fps = {
290 .numerator = 10000,
291 .denominator = 300000,
292 },
293 .exp_def = 0x18f,
294 .hts_def = HTS_DEF,
295 .vts_def = VTS_DEF,
296 .reg_list = ov2735_1920_1080_30fps,
297 },
298 };
299
300 #define OV2735_LINK_FREQ_420MHZ 420000000
301 #define OV2735_PIXEL_RATE (MAX_FPS * HTS_DEF * VTS_DEF)
302 static const s64 link_freq_menu_items[] = {
303 OV2735_LINK_FREQ_420MHZ
304 };
305
306 static const char * const ov2735_test_pattern_menu[] = {
307 "Disabled",
308 "Vertical Color",
309 };
310
311 /* Write registers up to 4 at a time */
ov2735_write_reg(struct i2c_client * client,u8 reg,u8 val)312 static int ov2735_write_reg(struct i2c_client *client, u8 reg, u8 val)
313 {
314 struct i2c_msg msg;
315 u8 buf[2];
316 int ret;
317
318 buf[0] = reg & 0xFF;
319 buf[1] = val;
320
321 msg.addr = client->addr;
322 msg.flags = client->flags;
323 msg.buf = buf;
324 msg.len = sizeof(buf);
325
326 ret = i2c_transfer(client->adapter, &msg, 1);
327 if (ret >= 0)
328 return 0;
329
330 dev_err(&client->dev,
331 "ov2735 write reg(0x%x val:0x%x) failed !\n", reg, val);
332
333 return ret;
334 }
335
ov2735_write_array(struct i2c_client * client,const struct regval * regs)336 static int ov2735_write_array(struct i2c_client *client,
337 const struct regval *regs)
338 {
339 int i, ret = 0;
340
341 i = 0;
342 while (regs[i].addr != REG_NULL) {
343 ret = ov2735_write_reg(client, regs[i].addr, regs[i].val);
344 if (ret) {
345 dev_err(&client->dev, "%s failed !\n", __func__);
346 break;
347 }
348
349 i++;
350 }
351
352 return ret;
353 }
354
355 /* Read registers up to 4 at a time */
356 /* sensor register read */
ov2735_read_reg(struct i2c_client * client,u8 reg,u8 * val)357 static int ov2735_read_reg(struct i2c_client *client, u8 reg, u8 *val)
358 {
359 struct i2c_msg msg[2];
360 u8 buf[1];
361 int ret;
362
363 buf[0] = reg & 0xFF;
364
365 msg[0].addr = client->addr;
366 msg[0].flags = client->flags;
367 msg[0].buf = buf;
368 msg[0].len = sizeof(buf);
369
370 msg[1].addr = client->addr;
371 msg[1].flags = client->flags | I2C_M_RD;
372 msg[1].buf = buf;
373 msg[1].len = 1;
374
375 ret = i2c_transfer(client->adapter, msg, 2);
376 if (ret >= 0) {
377 *val = buf[0];
378 return 0;
379 }
380
381 dev_err(&client->dev,
382 "ov2735 read reg:0x%x failed !\n", reg);
383
384 return ret;
385 }
386
ov2735_get_reso_dist(const struct ov2735_mode * mode,struct v4l2_mbus_framefmt * framefmt)387 static int ov2735_get_reso_dist(const struct ov2735_mode *mode,
388 struct v4l2_mbus_framefmt *framefmt)
389 {
390 return abs(mode->width - framefmt->width) +
391 abs(mode->height - framefmt->height);
392 }
393
394 static const struct ov2735_mode *
ov2735_find_best_fit(struct v4l2_subdev_format * fmt)395 ov2735_find_best_fit(struct v4l2_subdev_format *fmt)
396 {
397 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
398 int dist;
399 int cur_best_fit = 0;
400 int cur_best_fit_dist = -1;
401 size_t i;
402
403 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
404 dist = ov2735_get_reso_dist(&supported_modes[i], framefmt);
405 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
406 cur_best_fit_dist = dist;
407 cur_best_fit = i;
408 }
409 }
410
411 return &supported_modes[cur_best_fit];
412 }
413
ov2735_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)414 static int ov2735_set_fmt(struct v4l2_subdev *sd,
415 struct v4l2_subdev_pad_config *cfg,
416 struct v4l2_subdev_format *fmt)
417 {
418 struct ov2735 *ov2735 = to_ov2735(sd);
419 const struct ov2735_mode *mode;
420 s64 h_blank, vblank_def;
421
422 mutex_lock(&ov2735->mutex);
423
424 mode = ov2735_find_best_fit(fmt);
425 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
426 fmt->format.width = mode->width;
427 fmt->format.height = mode->height;
428 fmt->format.field = V4L2_FIELD_NONE;
429 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
430 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
431 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
432 #else
433 mutex_unlock(&ov2735->mutex);
434 return -ENOTTY;
435 #endif
436 } else {
437 ov2735->cur_mode = mode;
438 h_blank = mode->hts_def - mode->width;
439 __v4l2_ctrl_modify_range(ov2735->hblank, h_blank,
440 h_blank, 1, h_blank);
441 vblank_def = mode->vts_def - mode->height;
442 __v4l2_ctrl_modify_range(ov2735->vblank, vblank_def,
443 OV2735_VTS_MAX - mode->height,
444 1, vblank_def);
445 }
446
447 mutex_unlock(&ov2735->mutex);
448
449 return 0;
450 }
451
ov2735_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)452 static int ov2735_get_fmt(struct v4l2_subdev *sd,
453 struct v4l2_subdev_pad_config *cfg,
454 struct v4l2_subdev_format *fmt)
455 {
456 struct ov2735 *ov2735 = to_ov2735(sd);
457 const struct ov2735_mode *mode = ov2735->cur_mode;
458
459 mutex_lock(&ov2735->mutex);
460 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
461 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
462 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
463 #else
464 mutex_unlock(&ov2735->mutex);
465 return -ENOTTY;
466 #endif
467 } else {
468 fmt->format.width = mode->width;
469 fmt->format.height = mode->height;
470 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
471 fmt->format.field = V4L2_FIELD_NONE;
472 }
473 mutex_unlock(&ov2735->mutex);
474
475 return 0;
476 }
477
ov2735_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)478 static int ov2735_enum_mbus_code(struct v4l2_subdev *sd,
479 struct v4l2_subdev_pad_config *cfg,
480 struct v4l2_subdev_mbus_code_enum *code)
481 {
482 if (code->index != 0)
483 return -EINVAL;
484 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
485
486 return 0;
487 }
488
ov2735_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)489 static int ov2735_enum_frame_sizes(struct v4l2_subdev *sd,
490 struct v4l2_subdev_pad_config *cfg,
491 struct v4l2_subdev_frame_size_enum *fse)
492 {
493 if (fse->index >= ARRAY_SIZE(supported_modes))
494 return -EINVAL;
495
496 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
497 return -EINVAL;
498
499 fse->min_width = supported_modes[fse->index].width;
500 fse->max_width = supported_modes[fse->index].width;
501 fse->max_height = supported_modes[fse->index].height;
502 fse->min_height = supported_modes[fse->index].height;
503
504 return 0;
505 }
506
ov2735_enable_test_pattern(struct ov2735 * ov2735,u32 pattern)507 static int ov2735_enable_test_pattern(struct ov2735 *ov2735, u32 pattern)
508 {
509 int ret;
510 u8 val;
511
512 ret = ov2735_read_reg(ov2735->client, OV2735_REG_TEST_PATTERN, &val);
513 if (ret < 0)
514 return ret;
515
516 switch (pattern) {
517 case 0:
518 val &= ~OV2735_TEST_PATTERN_ENABLE;
519 break;
520 case 1:
521 val |= OV2735_TEST_PATTERN_ENABLE;
522 break;
523 }
524
525 return ov2735_write_reg(ov2735->client,
526 OV2735_REG_TEST_PATTERN,
527 val);
528 }
529
ov2735_get_module_inf(struct ov2735 * ov2735,struct rkmodule_inf * inf)530 static void ov2735_get_module_inf(struct ov2735 *ov2735,
531 struct rkmodule_inf *inf)
532 {
533 memset(inf, 0, sizeof(*inf));
534 strlcpy(inf->base.sensor, OV2735_NAME, sizeof(inf->base.sensor));
535 strlcpy(inf->base.module, ov2735->module_name,
536 sizeof(inf->base.module));
537 strlcpy(inf->base.lens, ov2735->len_name, sizeof(inf->base.lens));
538 }
539
ov2735_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)540 static long ov2735_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
541 {
542 struct ov2735 *ov2735 = to_ov2735(sd);
543 long ret = 0;
544 u32 stream = 0;
545
546 switch (cmd) {
547 case RKMODULE_GET_MODULE_INFO:
548 ov2735_get_module_inf(ov2735, (struct rkmodule_inf *)arg);
549 break;
550 case RKMODULE_SET_QUICK_STREAM:
551
552 stream = *((u32 *)arg);
553
554 if (stream) {
555 ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
556 ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_ON);
557 } else {
558 ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
559 ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_OFF);
560 }
561 break;
562 default:
563 ret = -ENOIOCTLCMD;
564 break;
565 }
566
567 return ret;
568 }
569
570 #ifdef CONFIG_COMPAT
ov2735_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)571 static long ov2735_compat_ioctl32(struct v4l2_subdev *sd,
572 unsigned int cmd, unsigned long arg)
573 {
574 void __user *up = compat_ptr(arg);
575 struct rkmodule_inf *inf;
576 struct rkmodule_awb_cfg *cfg;
577 long ret;
578 u32 stream = 0;
579
580 switch (cmd) {
581 case RKMODULE_GET_MODULE_INFO:
582 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
583 if (!inf) {
584 ret = -ENOMEM;
585 return ret;
586 }
587
588 ret = ov2735_ioctl(sd, cmd, inf);
589 if (!ret)
590 ret = copy_to_user(up, inf, sizeof(*inf));
591 kfree(inf);
592 break;
593 case RKMODULE_AWB_CFG:
594 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
595 if (!cfg) {
596 ret = -ENOMEM;
597 return ret;
598 }
599
600 ret = copy_from_user(cfg, up, sizeof(*cfg));
601 if (!ret)
602 ret = ov2735_ioctl(sd, cmd, cfg);
603 kfree(cfg);
604 break;
605 case RKMODULE_SET_QUICK_STREAM:
606 ret = copy_from_user(&stream, up, sizeof(u32));
607 if (!ret)
608 ret = ov2735_ioctl(sd, cmd, &stream);
609 break;
610 default:
611 ret = -ENOIOCTLCMD;
612 break;
613 }
614
615 return ret;
616 }
617 #endif
618
__ov2735_start_stream(struct ov2735 * ov2735)619 static int __ov2735_start_stream(struct ov2735 *ov2735)
620 {
621 int ret;
622
623 ret = ov2735_write_array(ov2735->client, ov2735->cur_mode->reg_list);
624 if (ret)
625 return ret;
626 ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
627 if (ret)
628 return ret;
629 /* In case these controls are set before streaming */
630 mutex_unlock(&ov2735->mutex);
631 ret = v4l2_ctrl_handler_setup(&ov2735->ctrl_handler);
632 mutex_lock(&ov2735->mutex);
633 if (ret)
634 return ret;
635
636 ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_ON);
637
638 return ret;
639 }
640
__ov2735_stop_stream(struct ov2735 * ov2735)641 static int __ov2735_stop_stream(struct ov2735 *ov2735)
642 {
643 int ret;
644
645 ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
646 ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_OFF);
647
648 return ret;
649 }
650
ov2735_s_stream(struct v4l2_subdev * sd,int on)651 static int ov2735_s_stream(struct v4l2_subdev *sd, int on)
652 {
653 struct ov2735 *ov2735 = to_ov2735(sd);
654 struct i2c_client *client = ov2735->client;
655 int ret = 0;
656
657 mutex_lock(&ov2735->mutex);
658 on = !!on;
659 if (on == ov2735->streaming)
660 goto unlock_and_return;
661
662 if (on) {
663 ret = pm_runtime_get_sync(&client->dev);
664 if (ret < 0) {
665 pm_runtime_put_noidle(&client->dev);
666 goto unlock_and_return;
667 }
668
669 ret = __ov2735_start_stream(ov2735);
670 if (ret) {
671 v4l2_err(sd, "start stream failed while write regs\n");
672 pm_runtime_put(&client->dev);
673 goto unlock_and_return;
674 }
675 } else {
676 __ov2735_stop_stream(ov2735);
677 pm_runtime_put(&client->dev);
678 }
679
680 ov2735->streaming = on;
681
682 unlock_and_return:
683 mutex_unlock(&ov2735->mutex);
684
685 return ret;
686 }
687
ov2735_s_power(struct v4l2_subdev * sd,int on)688 static int ov2735_s_power(struct v4l2_subdev *sd, int on)
689 {
690 struct ov2735 *ov2735 = to_ov2735(sd);
691 struct i2c_client *client = ov2735->client;
692 int ret = 0;
693
694 mutex_lock(&ov2735->mutex);
695
696 /* If the power state is not modified - no work to do. */
697 if (ov2735->power_on == !!on)
698 goto unlock_and_return;
699
700 if (on) {
701 ret = pm_runtime_get_sync(&client->dev);
702 if (ret < 0) {
703 pm_runtime_put_noidle(&client->dev);
704 goto unlock_and_return;
705 }
706
707 ret = ov2735_write_array(ov2735->client, ov2735_global_regs);
708 if (ret) {
709 v4l2_err(sd, "could not set init registers\n");
710 pm_runtime_put_noidle(&client->dev);
711 goto unlock_and_return;
712 }
713
714 ov2735->power_on = true;
715 } else {
716 pm_runtime_put(&client->dev);
717 ov2735->power_on = false;
718 }
719
720 unlock_and_return:
721 mutex_unlock(&ov2735->mutex);
722
723 return ret;
724 }
725
726 /* Calculate the delay in us by clock rate and clock cycles */
ov2735_cal_delay(u32 cycles)727 static inline u32 ov2735_cal_delay(u32 cycles)
728 {
729 return DIV_ROUND_UP(cycles, OV2735_XVCLK_FREQ / 1000 / 1000);
730 }
731
__ov2735_power_on(struct ov2735 * ov2735)732 static int __ov2735_power_on(struct ov2735 *ov2735)
733 {
734 int ret;
735 u32 delay_us;
736 struct device *dev = &ov2735->client->dev;
737
738 if (!IS_ERR(ov2735->pwdn_gpio)) {
739 gpiod_set_value_cansleep(ov2735->pwdn_gpio, 1);
740 usleep_range(2000, 5000);
741 }
742
743 ret = regulator_bulk_enable(OV2735_NUM_SUPPLIES, ov2735->supplies);
744 usleep_range(20000, 50000);
745 if (ret < 0) {
746 dev_err(dev, "Failed to enable regulators\n");
747 goto disable_clk;
748 }
749
750 if (!IS_ERR(ov2735->pwdn_gpio)) {
751 gpiod_set_value_cansleep(ov2735->pwdn_gpio, 0);
752 usleep_range(2000, 5000);
753 }
754
755 if (!IS_ERR(ov2735->reset_gpio)) {
756 gpiod_set_value_cansleep(ov2735->reset_gpio, 1);
757 usleep_range(2000, 5000);
758 }
759 ret = clk_set_rate(ov2735->xvclk, OV2735_XVCLK_FREQ);
760 if (ret < 0)
761 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
762 if (clk_get_rate(ov2735->xvclk) != OV2735_XVCLK_FREQ)
763 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
764 ret = clk_prepare_enable(ov2735->xvclk);
765 if (ret < 0)
766 dev_info(dev, "Failed to enable xvclk\n");
767
768 /* 8192 cycles prior to first SCCB transaction */
769 delay_us = ov2735_cal_delay(8192);
770 usleep_range(delay_us, delay_us * 2);
771
772 return 0;
773
774 disable_clk:
775 clk_disable_unprepare(ov2735->xvclk);
776
777 return ret;
778 }
779
__ov2735_power_off(struct ov2735 * ov2735)780 static void __ov2735_power_off(struct ov2735 *ov2735)
781 {
782 if (!IS_ERR(ov2735->pwdn_gpio))
783 gpiod_set_value_cansleep(ov2735->pwdn_gpio, 0);
784 clk_disable_unprepare(ov2735->xvclk);
785 if (!IS_ERR(ov2735->reset_gpio))
786 gpiod_set_value_cansleep(ov2735->reset_gpio, 1);
787 regulator_bulk_disable(OV2735_NUM_SUPPLIES, ov2735->supplies);
788 }
789
ov2735_runtime_resume(struct device * dev)790 static int ov2735_runtime_resume(struct device *dev)
791 {
792 struct i2c_client *client = to_i2c_client(dev);
793 struct v4l2_subdev *sd = i2c_get_clientdata(client);
794 struct ov2735 *ov2735 = to_ov2735(sd);
795
796 return __ov2735_power_on(ov2735);
797 }
798
ov2735_runtime_suspend(struct device * dev)799 static int ov2735_runtime_suspend(struct device *dev)
800 {
801 struct i2c_client *client = to_i2c_client(dev);
802 struct v4l2_subdev *sd = i2c_get_clientdata(client);
803 struct ov2735 *ov2735 = to_ov2735(sd);
804
805 __ov2735_power_off(ov2735);
806
807 return 0;
808 }
809
810 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov2735_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)811 static int ov2735_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
812 {
813 struct ov2735 *ov2735 = to_ov2735(sd);
814 struct v4l2_mbus_framefmt *try_fmt =
815 v4l2_subdev_get_try_format(sd, fh->pad, 0);
816 const struct ov2735_mode *def_mode = &supported_modes[0];
817
818 mutex_lock(&ov2735->mutex);
819 /* Initialize try_fmt */
820 try_fmt->width = def_mode->width;
821 try_fmt->height = def_mode->height;
822 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
823 try_fmt->field = V4L2_FIELD_NONE;
824
825 mutex_unlock(&ov2735->mutex);
826 /* No crop or compose */
827
828 return 0;
829 }
830 #endif
831
ov2735_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)832 static int ov2735_enum_frame_interval(struct v4l2_subdev *sd,
833 struct v4l2_subdev_pad_config *cfg,
834 struct v4l2_subdev_frame_interval_enum *fie)
835 {
836 if (fie->index >= ARRAY_SIZE(supported_modes))
837 return -EINVAL;
838
839 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
840 fie->width = supported_modes[fie->index].width;
841 fie->height = supported_modes[fie->index].height;
842 fie->interval = supported_modes[fie->index].max_fps;
843 return 0;
844 }
845
ov2735_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)846 static int ov2735_g_mbus_config(struct v4l2_subdev *sd,
847 struct v4l2_mbus_config *config)
848 {
849 u32 val = 0;
850
851 val = 1 << (OV2735_LANES - 1) |
852 V4L2_MBUS_CSI2_CHANNEL_0 |
853 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
854 config->type = V4L2_MBUS_CSI2;
855 config->flags = val;
856
857 return 0;
858 }
859
860 static const struct dev_pm_ops ov2735_pm_ops = {
861 SET_RUNTIME_PM_OPS(ov2735_runtime_suspend,
862 ov2735_runtime_resume, NULL)
863 };
864
865 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
866 static const struct v4l2_subdev_internal_ops ov2735_internal_ops = {
867 .open = ov2735_open,
868 };
869 #endif
870
871 static const struct v4l2_subdev_core_ops ov2735_core_ops = {
872 .s_power = ov2735_s_power,
873 .ioctl = ov2735_ioctl,
874 #ifdef CONFIG_COMPAT
875 .compat_ioctl32 = ov2735_compat_ioctl32,
876 #endif
877 };
878
879 static const struct v4l2_subdev_video_ops ov2735_video_ops = {
880 .s_stream = ov2735_s_stream,
881 .g_mbus_config = ov2735_g_mbus_config,
882 };
883
884 static const struct v4l2_subdev_pad_ops ov2735_pad_ops = {
885 .enum_mbus_code = ov2735_enum_mbus_code,
886 .enum_frame_size = ov2735_enum_frame_sizes,
887 .enum_frame_interval = ov2735_enum_frame_interval,
888 .get_fmt = ov2735_get_fmt,
889 .set_fmt = ov2735_set_fmt,
890 };
891
892 static const struct v4l2_subdev_ops ov2735_subdev_ops = {
893 .core = &ov2735_core_ops,
894 .video = &ov2735_video_ops,
895 .pad = &ov2735_pad_ops,
896 };
897
ov2735_set_ctrl(struct v4l2_ctrl * ctrl)898 static int ov2735_set_ctrl(struct v4l2_ctrl *ctrl)
899 {
900 struct ov2735 *ov2735 = container_of(ctrl->handler,
901 struct ov2735, ctrl_handler);
902 struct i2c_client *client = ov2735->client;
903 s64 max;
904 int ret = 0;
905
906 /* Propagate change of current control to all related controls */
907 switch (ctrl->id) {
908 case V4L2_CID_VBLANK:
909 /* Update max exposure while meeting expected vblanking */
910 max = ov2735->cur_mode->height + ctrl->val - 4;
911 __v4l2_ctrl_modify_range(ov2735->exposure,
912 ov2735->exposure->minimum, max,
913 ov2735->exposure->step,
914 ov2735->exposure->default_value);
915 break;
916 }
917 if (!pm_runtime_get_if_in_use(&client->dev))
918 return 0;
919
920 ret = ov2735_write_reg(client, PAGE_SELECT_REG, PAGE_ONE);
921 switch (ctrl->id) {
922 case V4L2_CID_EXPOSURE:
923 ret |= ov2735_write_reg(client,
924 OV2735_AEC_PK_LONG_EXPO_2ND_REG,
925 OV2735_FETCH_2ND_BYTE_EXP(ctrl->val));
926 ret |= ov2735_write_reg(client,
927 OV2735_AEC_PK_LONG_EXPO_1ST_REG,
928 OV2735_FETCH_1ST_BYTE_EXP(ctrl->val));
929 break;
930 case V4L2_CID_ANALOGUE_GAIN:
931 ret |= ov2735_write_reg(client, OV2735_AEC_PK_GAIN_REG,
932 ctrl->val);
933 break;
934 case V4L2_CID_VBLANK:
935 ret |= ov2735_write_reg(client, OV2735_VTS_ENABLE_REG,
936 OV2735_VTS_ENABLE_VALUE);
937 ret |= ov2735_write_reg(client, OV2735_VTS_LOW_REG,
938 (ctrl->val + ov2735->cur_mode->height) & 0xFF);
939 ret |= ov2735_write_reg(client, OV2735_VTS_HIGH_REG,
940 ((ctrl->val + ov2735->cur_mode->height) >> 8) & 0x0F);
941 break;
942 case V4L2_CID_TEST_PATTERN:
943 ret = ov2735_enable_test_pattern(ov2735, ctrl->val);
944
945 break;
946 default:
947 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
948 __func__, ctrl->id, ctrl->val);
949 break;
950 }
951 ret |= ov2735_write_reg(client, OV2735_FRAME_SYNC_REG,
952 OV2735_FRAME_SYNC_VALUE);
953
954 pm_runtime_put(&client->dev);
955
956 return ret;
957 }
958
959 static const struct v4l2_ctrl_ops ov2735_ctrl_ops = {
960 .s_ctrl = ov2735_set_ctrl,
961 };
962
ov2735_initialize_controls(struct ov2735 * ov2735)963 static int ov2735_initialize_controls(struct ov2735 *ov2735)
964 {
965 const struct ov2735_mode *mode;
966 struct v4l2_ctrl_handler *handler;
967 struct v4l2_ctrl *ctrl;
968 s64 exposure_max, vblank_def;
969 u32 h_blank;
970 int ret;
971
972 handler = &ov2735->ctrl_handler;
973 mode = ov2735->cur_mode;
974 ret = v4l2_ctrl_handler_init(handler, 7);
975 if (ret)
976 return ret;
977 handler->lock = &ov2735->mutex;
978
979 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
980 0, 0, link_freq_menu_items);
981 if (ctrl)
982 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
983
984 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
985 0, OV2735_PIXEL_RATE, 1, OV2735_PIXEL_RATE);
986
987 h_blank = mode->hts_def - mode->width;
988 ov2735->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
989 h_blank, h_blank, 1, h_blank);
990 if (ov2735->hblank)
991 ov2735->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
992
993 vblank_def = mode->vts_def - mode->height;
994 ov2735->vblank = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
995 V4L2_CID_VBLANK, vblank_def,
996 OV2735_VTS_MAX - mode->height,
997 1, vblank_def);
998
999 exposure_max = mode->vts_def - 4;
1000 ov2735->exposure = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
1001 V4L2_CID_EXPOSURE, OV2735_EXPOSURE_MIN,
1002 exposure_max, OV2735_EXPOSURE_STEP,
1003 mode->exp_def);
1004
1005 ov2735->anal_gain = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
1006 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1007 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1008 ANALOG_GAIN_DEFAULT);
1009
1010 ov2735->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1011 &ov2735_ctrl_ops, V4L2_CID_TEST_PATTERN,
1012 ARRAY_SIZE(ov2735_test_pattern_menu) - 1,
1013 0, 0, ov2735_test_pattern_menu);
1014
1015 if (handler->error) {
1016 ret = handler->error;
1017 dev_err(&ov2735->client->dev,
1018 "Failed to init controls(%d)\n", ret);
1019 goto err_free_handler;
1020 }
1021
1022 ov2735->subdev.ctrl_handler = handler;
1023
1024 return 0;
1025
1026 err_free_handler:
1027 v4l2_ctrl_handler_free(handler);
1028
1029 return ret;
1030 }
1031
ov2735_check_sensor_id(struct ov2735 * ov2735,struct i2c_client * client)1032 static int ov2735_check_sensor_id(struct ov2735 *ov2735,
1033 struct i2c_client *client)
1034 {
1035 struct device *dev = &ov2735->client->dev;
1036 int ret;
1037
1038 u8 pidh = 0x55, pidl = 0xaa;
1039
1040 ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ZERO);
1041 ret |= ov2735_read_reg(ov2735->client, OV2735_PIDH_ADDR, &pidh);
1042 ret |= ov2735_read_reg(ov2735->client, OV2735_PIDL_ADDR, &pidl);
1043 if (ret) {
1044 dev_err(dev,
1045 "register read failed, camera module powered off?\n");
1046 goto err;
1047 }
1048
1049 if ((pidh == OV2735_PIDH_MAGIC) && (pidl == OV2735_PIDL_MAGIC)) {
1050 dev_info(dev,
1051 "Found cameraID 0x%02x%02x\n", pidh, pidl);
1052 } else {
1053 dev_err(dev,
1054 "wrong camera ID, expected 0x%02x%02x, detected 0x%02x%02x\n",
1055 OV2735_PIDH_MAGIC, OV2735_PIDL_MAGIC, pidh, pidl);
1056 ret = -EINVAL;
1057 goto err;
1058 }
1059
1060 return 0;
1061 err:
1062 dev_err(dev, "failed with error (%d)\n", ret);
1063 return ret;
1064 }
1065
ov2735_configure_regulators(struct ov2735 * ov2735)1066 static int ov2735_configure_regulators(struct ov2735 *ov2735)
1067 {
1068 size_t i;
1069
1070 for (i = 0; i < OV2735_NUM_SUPPLIES; i++)
1071 ov2735->supplies[i].supply = ov2735_supply_names[i];
1072
1073 return devm_regulator_bulk_get(&ov2735->client->dev,
1074 OV2735_NUM_SUPPLIES,
1075 ov2735->supplies);
1076 }
1077
ov2735_probe(struct i2c_client * client,const struct i2c_device_id * id)1078 static int ov2735_probe(struct i2c_client *client,
1079 const struct i2c_device_id *id)
1080 {
1081 struct device *dev = &client->dev;
1082 struct device_node *node = dev->of_node;
1083 struct ov2735 *ov2735;
1084 struct v4l2_subdev *sd;
1085 char facing[2];
1086 int ret;
1087
1088 dev_info(dev, "driver version: %02x.%02x.%02x",
1089 DRIVER_VERSION >> 16,
1090 (DRIVER_VERSION & 0xff00) >> 8,
1091 DRIVER_VERSION & 0x00ff);
1092
1093 ov2735 = devm_kzalloc(dev, sizeof(*ov2735), GFP_KERNEL);
1094 if (!ov2735)
1095 return -ENOMEM;
1096
1097 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1098 &ov2735->module_index);
1099 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1100 &ov2735->module_facing);
1101 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1102 &ov2735->module_name);
1103 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1104 &ov2735->len_name);
1105 if (ret) {
1106 dev_err(dev, "could not get module information!\n");
1107 return -EINVAL;
1108 }
1109
1110 ov2735->client = client;
1111 ov2735->cur_mode = &supported_modes[0];
1112
1113 ov2735->xvclk = devm_clk_get(dev, "xvclk");
1114 if (IS_ERR(ov2735->xvclk)) {
1115 dev_err(dev, "Failed to get xvclk\n");
1116 return -EINVAL;
1117 }
1118
1119 ov2735->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1120 if (IS_ERR(ov2735->reset_gpio))
1121 dev_warn(dev, "Failed to get reset-gpios\n");
1122
1123 ov2735->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1124 if (IS_ERR(ov2735->pwdn_gpio))
1125 dev_warn(dev, "Failed to get pwdn-gpios\n");
1126
1127 ret = ov2735_configure_regulators(ov2735);
1128 if (ret) {
1129 dev_err(dev, "Failed to get power regulators\n");
1130 return ret;
1131 }
1132
1133 mutex_init(&ov2735->mutex);
1134
1135 sd = &ov2735->subdev;
1136 v4l2_i2c_subdev_init(sd, client, &ov2735_subdev_ops);
1137 ret = ov2735_initialize_controls(ov2735);
1138 if (ret)
1139 goto err_destroy_mutex;
1140
1141 ret = __ov2735_power_on(ov2735);
1142 if (ret)
1143 goto err_free_handler;
1144
1145 ret = ov2735_check_sensor_id(ov2735, client);
1146 if (ret)
1147 goto err_power_off;
1148
1149 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1150 sd->internal_ops = &ov2735_internal_ops;
1151 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1152 V4L2_SUBDEV_FL_HAS_EVENTS;
1153 #endif
1154 #if defined(CONFIG_MEDIA_CONTROLLER)
1155 ov2735->pad.flags = MEDIA_PAD_FL_SOURCE;
1156 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1157 ret = media_entity_pads_init(&sd->entity, 1, &ov2735->pad);
1158 if (ret < 0)
1159 goto err_power_off;
1160 #endif
1161
1162 memset(facing, 0, sizeof(facing));
1163 if (strcmp(ov2735->module_facing, "back") == 0)
1164 facing[0] = 'b';
1165 else
1166 facing[0] = 'f';
1167
1168 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1169 ov2735->module_index, facing,
1170 OV2735_NAME, dev_name(sd->dev));
1171 ret = v4l2_async_register_subdev_sensor_common(sd);
1172 if (ret) {
1173 dev_err(dev, "v4l2 async register subdev failed\n");
1174 goto err_clean_entity;
1175 }
1176
1177 pm_runtime_set_active(dev);
1178 pm_runtime_enable(dev);
1179 pm_runtime_idle(dev);
1180
1181 return 0;
1182
1183 err_clean_entity:
1184 #if defined(CONFIG_MEDIA_CONTROLLER)
1185 media_entity_cleanup(&sd->entity);
1186 #endif
1187 err_power_off:
1188 __ov2735_power_off(ov2735);
1189 err_free_handler:
1190 v4l2_ctrl_handler_free(&ov2735->ctrl_handler);
1191 err_destroy_mutex:
1192 mutex_destroy(&ov2735->mutex);
1193
1194 return ret;
1195 }
1196
ov2735_remove(struct i2c_client * client)1197 static int ov2735_remove(struct i2c_client *client)
1198 {
1199 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1200 struct ov2735 *ov2735 = to_ov2735(sd);
1201
1202 v4l2_async_unregister_subdev(sd);
1203 #if defined(CONFIG_MEDIA_CONTROLLER)
1204 media_entity_cleanup(&sd->entity);
1205 #endif
1206 v4l2_ctrl_handler_free(&ov2735->ctrl_handler);
1207 mutex_destroy(&ov2735->mutex);
1208
1209 pm_runtime_disable(&client->dev);
1210 if (!pm_runtime_status_suspended(&client->dev))
1211 __ov2735_power_off(ov2735);
1212 pm_runtime_set_suspended(&client->dev);
1213
1214 return 0;
1215 }
1216
1217 #if IS_ENABLED(CONFIG_OF)
1218 static const struct of_device_id ov2735_of_match[] = {
1219 { .compatible = "ovti,ov2735" },
1220 {},
1221 };
1222 MODULE_DEVICE_TABLE(of, ov2735_of_match);
1223 #endif
1224
1225 static const struct i2c_device_id ov2735_match_id[] = {
1226 { "ovti,ov2735", 0 },
1227 { },
1228 };
1229
1230 static struct i2c_driver ov2735_i2c_driver = {
1231 .driver = {
1232 .name = OV2735_NAME,
1233 .pm = &ov2735_pm_ops,
1234 .of_match_table = of_match_ptr(ov2735_of_match),
1235 },
1236 .probe = &ov2735_probe,
1237 .remove = &ov2735_remove,
1238 .id_table = ov2735_match_id,
1239 };
1240
sensor_mod_init(void)1241 static int __init sensor_mod_init(void)
1242 {
1243 return i2c_add_driver(&ov2735_i2c_driver);
1244 }
1245
sensor_mod_exit(void)1246 static void __exit sensor_mod_exit(void)
1247 {
1248 i2c_del_driver(&ov2735_i2c_driver);
1249 }
1250
1251 device_initcall_sync(sensor_mod_init);
1252 module_exit(sensor_mod_exit);
1253
1254 MODULE_DESCRIPTION("OmniVision ov2735 sensor driver");
1255 MODULE_LICENSE("GPL v2");
1256
1257