1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
4 *
5 * it66353 HDMI 3 in 1 out driver.
6 *
7 * Author: Kenneth.Hung@ite.com.tw
8 * Wangqiang Guo <kay.guo@rock-chips.com>
9 * Version: IT66353_SAMPLE_1.08
10 *
11 */
12 #include <linux/module.h>
13 #include "config.h"
14 #include "platform.h"
15 #include "debug.h"
16 #include "it66353_drv.h"
17 #include "it66353_EQ.h"
18 #include "it66353.h"
19
20 /*
21 * TX_PN_SWAP
22 * 1: Enable TX side TMDS P/N swap
23 * 0: Disable TX side TMDS P/N swap
24 */
25 #define TX_PN_SWAP 0
26 #ifndef TX_PN_SWAP
27
28 #pragma message("TX_PN_SWAP is defined to 0")
29 #pragma message("IT6635 EVB should be TX_PN_SWAP==1")
30 #error ("Please define TX_PN_SWAP by your PCB layout.")
31
32 #else
33
34 #if TX_PN_SWAP
35 #ifdef _SHOW_PRAGMA_MSG
36 #pragma message("TX_PN_SWAP is pre-defined to 1")
37 #endif
38 #else
39 #ifdef _SHOW_PRAGMA_MSG
40 #pragma message("TX_PN_SWAP is pre-defined to 0")
41 #endif
42 #endif
43
44 #endif
45
46 /*
47 * DEFAULT_RS_IDX
48 * :The default EQ when power on.
49 */
50 #define DEFAULT_RS_IDX 4
51
52 /*
53 * DEFAULT_PORT
54 * :The default active port when power on.
55 */
56 #define DEFAULT_PORT 0
57
58 // constant definition
59 #define HPD_TOGGLE_TIMEOUT_400MS (27)
60 #define HPD_TOGGLE_TIMEOUT_1SEC (100)
61 #define HPD_TOGGLE_TIMEOUT_2SEC (20|(0x80))
62 #define HPD_TOGGLE_TIMEOUT_3SEC (30|(0x80))
63
64
65
66 IT6635_RX_OPTIONS it66353_s_RxOpts = {
67 0xC3, // u8 tag1;
68 0, // u8 EnRxDDCBypass;
69 0, // u8 EnRxPWR5VBypass;
70 0, // u8 EnRxHPDBypass;
71 1, // u8 TryFixedEQFirst;
72 1, // u8 EnableAutoEQ;
73 1, // u8 NonActivePortReplyHPD;
74 0, // u8 DisableEdidRam;
75 {DEFAULT_RS_IDX, DEFAULT_RS_IDX, DEFAULT_RS_IDX}, // u8 DefaultEQ[3];
76 1, // u8 FixIncorrectHdmiEnc;
77 0, // u8 HPDOutputInverse;
78 HPD_TOGGLE_TIMEOUT_2SEC, // u8 HPDTogglePeriod;
79 1, // u8 TxOEAlignment;
80 (u8)sizeof(IT6635_RX_OPTIONS), // u8 str_size;
81 };
82
83 IT6635_TX_OPTIONS it66353_s_TxOpts = {
84 0x3C, // u8 tag1;
85 TX_PN_SWAP, // u8 EnTxPNSwap;
86 TX_PN_SWAP, // u8 EnTxChSwap;
87 0, // u8 EnTxVCLKInv;
88 0, // u8 EnTxOutD1t;
89 1, // u8 CopyEDIDFromSink;
90 1, // u8 ParsePhysicalAddr;
91 1, // u8 TurnOffTx5VWhenSwitchPort;
92 (u8)sizeof(IT6635_TX_OPTIONS), // u8 str_size;
93 };
94
95 IT6635_DEV_OPTION it66353_s_DevOpts = {
96 0x5A, // u8 tag1;
97 SWAddr, // u8 SwAddr;
98 RXAddr, // u8 RxAddr;
99 CECAddr, // u8 CecAddr;
100 RXEDIDAddr, // u8 EdidAddr;
101 // u8 EnCEC;
102 0, // u8 ForceRxOn;
103 1, // u8 RxAutoPowerDown;
104 1, // u8 DoTxPowerDown;
105 0, // u8 TxPowerDownWhileWaitingClock;
106 (u8)sizeof(IT6635_DEV_OPTION), // u8 str_size;
107
108 };
109
110 u8 it66353_s_default_edid_port0[] = {
111 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
112 0x26, 0x85, 0x35, 0x66, 0x01, 0x01, 0x01, 0x01,
113 0x00, 0x19, 0x01, 0x03, 0x80, 0x80, 0x48, 0x78,
114 0x0A, 0xDA, 0xFF, 0xA3, 0x58, 0x4A, 0xA2, 0x29,
115 0x17, 0x49, 0x4B, 0x20, 0x08, 0x00, 0x31, 0x40,
116 0x61, 0x40, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
117 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x08, 0xE8,
118 0x00, 0x30, 0xF2, 0x70, 0x5A, 0x80, 0xB0, 0x58,
119 0x8A, 0x00, 0xBA, 0x88, 0x21, 0x00, 0x00, 0x1E,
120 0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
121 0x58, 0x2C, 0x45, 0x00, 0xBA, 0x88, 0x21, 0x00,
122 0x00, 0x1E, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x50,
123 0x61, 0x6E, 0x61, 0x73, 0x6F, 0x6E, 0x69, 0x63,
124 0x2D, 0x54, 0x56, 0x0A, 0x00, 0x00, 0x00, 0xFD,
125 0x00, 0x17, 0x3D, 0x0F, 0x88, 0x3C, 0x00, 0x0A,
126 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0xF0,
127
128 0x02, 0x03, 0x43, 0xF0, 0x57, 0x10, 0x1F, 0x05,
129 0x14, 0x20, 0x21, 0x22, 0x04, 0x13, 0x03, 0x12,
130 0x07, 0x16, 0x5D, 0x5E, 0x5F, 0x62, 0x63, 0x64,
131 0x61, 0x60, 0x66, 0x65, 0x23, 0x09, 0x07, 0x01,
132 0x6E, 0x03, 0x0C, 0x00, 0x10, 0x00, 0x38, 0x3C,
133 0x2F, 0x00, 0x80, 0x01, 0x02, 0x03, 0x04, 0x67,
134 0xD8, 0x5D, 0xC4, 0x01, 0x78, 0x80, 0x03, 0xE2,
135 0x00, 0x4B, 0xE3, 0x05, 0x1F, 0x01, 0xE4, 0x0F,
136 0x00, 0x00, 0x78, 0x56, 0x5E, 0x00, 0xA0, 0xA0,
137 0xA0, 0x29, 0x50, 0x30, 0x20, 0x35, 0x00, 0xBA,
138 0x88, 0x21, 0x00, 0x00, 0x1A, 0x66, 0x21, 0x56,
139 0xAA, 0x51, 0x00, 0x1E, 0x30, 0x46, 0x8F, 0x33,
140 0x00, 0xBA, 0x88, 0x21, 0x00, 0x00, 0x1E, 0x00,
141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
142 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06,
144 };
145
it66353_options_init(void)146 void it66353_options_init(void)
147 {
148 it66353_gdev.opts.rx_opt[0] = &it66353_s_RxOpts;
149 it66353_gdev.opts.rx_opt[1] = &it66353_s_RxOpts;
150 it66353_gdev.opts.rx_opt[2] = &it66353_s_RxOpts;
151 it66353_gdev.opts.rx_opt[3] = &it66353_s_RxOpts;
152 it66353_gdev.opts.active_rx_opt = it66353_gdev.opts.rx_opt[DEFAULT_PORT];
153 it66353_gdev.opts.tx_opt = &it66353_s_TxOpts;
154 it66353_gdev.opts.dev_opt = &it66353_s_DevOpts;
155 it66353_gdev.vars.Rx_active_port = DEFAULT_PORT;
156
157 it66353_vars_init();
158 }
159
160 MODULE_LICENSE("GPL v2");
161