1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * imx258 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 add poweron function.
8 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
9 * V0.0X01.0X03 add enum_frame_interval function.
10 * V0.0X01.0X04 add quick stream on/off
11 * V0.0X01.0X05 add function g_mbus_config
12 * V0.0X01.0X06 support capture spd data and embedded data
13 */
14
15 #include <linux/clk.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/i2c.h>
20 #include <linux/module.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/sysfs.h>
24 #include <linux/version.h>
25 #include <linux/rk-camera-module.h>
26 #include <media/media-entity.h>
27 #include <media/v4l2-async.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-subdev.h>
30 #include <linux/pinctrl/consumer.h>
31 #include "imx258_eeprom_head.h"
32
33 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x06)
34
35 #ifndef V4L2_CID_DIGITAL_GAIN
36 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
37 #endif
38
39 #define IMX258_LANES 4
40 #define IMX258_BITS_PER_SAMPLE 10
41 #define IMX258_LINK_FREQ_498MHZ 498000000
42 #define IMX258_LINK_FREQ_399MHZ 399000000
43 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
44 #define IMX258_PIXEL_RATE_FULL_SIZE 398400000
45 #define IMX258_PIXEL_RATE_BINNING 319200000
46 #define IMX258_XVCLK_FREQ 24000000
47
48 #define CHIP_ID 0x0258
49 #define IMX258_REG_CHIP_ID 0x0016
50
51 #define IMX258_REG_CTRL_MODE 0x0100
52 #define IMX258_MODE_SW_STANDBY 0x0
53 #define IMX258_MODE_STREAMING BIT(0)
54
55 #define IMX258_REG_EXPOSURE 0x0202
56 #define IMX258_EXPOSURE_MIN 4
57 #define IMX258_EXPOSURE_STEP 1
58 #define IMX258_VTS_MAX 0xffff
59
60 #define IMX258_REG_GAIN_H 0x0204
61 #define IMX258_REG_GAIN_L 0x0205
62 #define IMX258_GAIN_MIN 0
63 #define IMX258_GAIN_MAX 0x1fff
64 #define IMX258_GAIN_STEP 1
65 #define IMX258_GAIN_DEFAULT 0x0
66
67 #define IMX258_REG_TEST_PATTERN 0x0600
68 #define IMX258_TEST_PATTERN_ENABLE 0x80
69 #define IMX258_TEST_PATTERN_DISABLE 0x0
70
71 #define IMX258_REG_VTS 0x0340
72
73 #define REG_NULL 0xFFFF
74
75 #define IMX258_REG_VALUE_08BIT 1
76 #define IMX258_REG_VALUE_16BIT 2
77 #define IMX258_REG_VALUE_24BIT 3
78
79 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
80 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
81
82 #define IMX258_NAME "imx258"
83
84 static const char * const imx258_supply_names[] = {
85 "avdd", /* Analog power */
86 "dovdd", /* Digital I/O power */
87 "dvdd", /* Digital core power */
88 };
89
90 #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_names)
91
92 struct regval {
93 u16 addr;
94 u8 val;
95 };
96
97 struct other_data {
98 u32 width;
99 u32 height;
100 u32 bus_fmt;
101 };
102
103 struct imx258_mode {
104 u32 bus_fmt;
105 u32 width;
106 u32 height;
107 struct v4l2_fract max_fps;
108 u32 hts_def;
109 u32 vts_def;
110 u32 exp_def;
111 const struct regval *reg_list;
112 /* Shield Pix Data */
113 const struct other_data *spd;
114 /* embedded Data */
115 const struct other_data *ebd;
116 u32 hdr_mode;
117 u32 vc[PAD_MAX];
118 };
119
120 struct imx258 {
121 struct i2c_client *client;
122 struct clk *xvclk;
123 struct gpio_desc *reset_gpio;
124 struct gpio_desc *pwdn_gpio;
125 struct regulator_bulk_data supplies[IMX258_NUM_SUPPLIES];
126
127 struct pinctrl *pinctrl;
128 struct pinctrl_state *pins_default;
129 struct pinctrl_state *pins_sleep;
130
131 struct v4l2_subdev subdev;
132 struct media_pad pad;
133 struct v4l2_ctrl_handler ctrl_handler;
134 struct v4l2_ctrl *exposure;
135 struct v4l2_ctrl *anal_gain;
136 struct v4l2_ctrl *digi_gain;
137 struct v4l2_ctrl *hblank;
138 struct v4l2_ctrl *vblank;
139 struct v4l2_ctrl *test_pattern;
140 struct mutex mutex;
141 bool streaming;
142 bool power_on;
143 const struct imx258_mode *cur_mode;
144 u32 cfg_num;
145 u32 module_index;
146 const char *module_facing;
147 const char *module_name;
148 const char *len_name;
149 struct v4l2_ctrl *link_freq;
150 struct v4l2_ctrl *pixel_rate;
151 struct imx258_otp_info *otp;
152 struct rkmodule_inf module_inf;
153 struct rkmodule_awb_cfg awb_cfg;
154 struct rkmodule_lsc_cfg lsc_cfg;
155 u32 spd_id;
156 u32 ebd_id;
157 };
158
159 #define to_imx258(sd) container_of(sd, struct imx258, subdev)
160
161 struct imx258_id_name {
162 u32 id;
163 char name[RKMODULE_NAME_LEN];
164 };
165
166 static const struct imx258_id_name imx258_module_info[] = {
167 {0x36, "GuangDongLiteArray"},
168 {0x0d, "CameraKing"},
169 {0x00, "Unknown"}
170 };
171
172 static const struct imx258_id_name imx258_lens_info[] = {
173 {0x47, "Sunny 3923C"},
174 {0x07, "Largen 9611A6"},
175 {0x00, "Unknown"}
176 };
177
178 /*
179 * Xclk 24Mhz
180 */
181 static const struct regval imx258_global_regs[] = {
182 {0x0136, 0x18},
183 {0x0137, 0x00},
184 {0x3051, 0x00},
185 {0x6b11, 0xcf},
186 {0x7ff0, 0x08},
187 {0x7ff1, 0x0f},
188 {0x7ff2, 0x08},
189 {0x7ff3, 0x1b},
190 {0x7ff4, 0x23},
191 {0x7ff5, 0x60},
192 {0x7ff6, 0x00},
193 {0x7ff7, 0x01},
194 {0x7ff8, 0x00},
195 {0x7ff9, 0x78},
196 {0x7ffa, 0x01},
197 {0x7ffb, 0x00},
198 {0x7ffc, 0x00},
199 {0x7ffd, 0x00},
200 {0x7ffe, 0x00},
201 {0x7fff, 0x03},
202 {0x7f76, 0x03},
203 {0x7f77, 0xfe},
204 {0x7fa8, 0x03},
205 {0x7fa9, 0xfe},
206 {0x7b24, 0x81},
207 {0x7b25, 0x01},
208 {0x6564, 0x07},
209 {0x6b0d, 0x41},
210 {0x653d, 0x04},
211 {0x6b05, 0x8c},
212 {0x6b06, 0xf9},
213 {0x6b08, 0x65},
214 {0x6b09, 0xfc},
215 {0x6b0a, 0xcf},
216 {0x6b0b, 0xd2},
217 {0x6700, 0x0e},
218 {0x6707, 0x0e},
219 {0x5f04, 0x00},
220 {0x5f05, 0xed},
221 {0x94c7, 0xff},
222 {0x94c8, 0xff},
223 {0x94c9, 0xff},
224 {0x95c7, 0xff},
225 {0x95c8, 0xff},
226 {0x95c9, 0xff},
227 {0x94c4, 0x3f},
228 {0x94c5, 0x3f},
229 {0x94c6, 0x3f},
230 {0x95c4, 0x3f},
231 {0x95c5, 0x3f},
232 {0x95c6, 0x3f},
233 {0x94c1, 0x02},
234 {0x94c2, 0x02},
235 {0x94c3, 0x02},
236 {0x95c1, 0x02},
237 {0x95c2, 0x02},
238 {0x95c3, 0x02},
239 {0x94be, 0x0c},
240 {0x94bf, 0x0c},
241 {0x94c0, 0x0c},
242 {0x95be, 0x0c},
243 {0x95bf, 0x0c},
244 {0x95c0, 0x0c},
245 {0x94d0, 0x74},
246 {0x94d1, 0x74},
247 {0x94d2, 0x74},
248 {0x95d0, 0x74},
249 {0x95d1, 0x74},
250 {0x95d2, 0x74},
251 {0x94cd, 0x2e},
252 {0x94ce, 0x2e},
253 {0x94cf, 0x2e},
254 {0x95cd, 0x2e},
255 {0x95ce, 0x2e},
256 {0x95cf, 0x2e},
257 {0x94ca, 0x4c},
258 {0x94cb, 0x4c},
259 {0x94cc, 0x4c},
260 {0x95ca, 0x4c},
261 {0x95cb, 0x4c},
262 {0x95cc, 0x4c},
263 {0x900e, 0x32},
264 {0x94e2, 0xff},
265 {0x94e3, 0xff},
266 {0x94e4, 0xff},
267 {0x95e2, 0xff},
268 {0x95e3, 0xff},
269 {0x95e4, 0xff},
270 {0x94df, 0x6e},
271 {0x94e0, 0x6e},
272 {0x94e1, 0x6e},
273 {0x95df, 0x6e},
274 {0x95e0, 0x6e},
275 {0x95e1, 0x6e},
276 {0x7fcc, 0x01},
277 {0x7b78, 0x00},
278 {0x9401, 0x35},
279 {0x9403, 0x23},
280 {0x9405, 0x23},
281 {0x9406, 0x00},
282 {0x9407, 0x31},
283 {0x9408, 0x00},
284 {0x9409, 0x1b},
285 {0x940a, 0x00},
286 {0x940b, 0x15},
287 {0x940d, 0x3f},
288 {0x940f, 0x3f},
289 {0x9411, 0x3f},
290 {0x9413, 0x64},
291 {0x9415, 0x64},
292 {0x9417, 0x64},
293 {0x941d, 0x34},
294 {0x941f, 0x01},
295 {0x9421, 0x01},
296 {0x9423, 0x01},
297 {0x9425, 0x23},
298 {0x9427, 0x23},
299 {0x9429, 0x23},
300 {0x942b, 0x2f},
301 {0x942d, 0x1a},
302 {0x942f, 0x14},
303 {0x9431, 0x3f},
304 {0x9433, 0x3f},
305 {0x9435, 0x3f},
306 {0x9437, 0x6b},
307 {0x9439, 0x7c},
308 {0x943b, 0x81},
309 {0x9443, 0x0f},
310 {0x9445, 0x0f},
311 {0x9447, 0x0f},
312 {0x9449, 0x0f},
313 {0x944b, 0x0f},
314 {0x944d, 0x0f},
315 {0x944f, 0x1e},
316 {0x9451, 0x0f},
317 {0x9453, 0x0b},
318 {0x9455, 0x28},
319 {0x9457, 0x13},
320 {0x9459, 0x0c},
321 {0x945d, 0x00},
322 {0x945e, 0x00},
323 {0x945f, 0x00},
324 {0x946d, 0x00},
325 {0x946f, 0x10},
326 {0x9471, 0x10},
327 {0x9473, 0x40},
328 {0x9475, 0x2e},
329 {0x9477, 0x10},
330 {0x9478, 0x0a},
331 {0x947b, 0xe0},
332 {0x947c, 0xe0},
333 {0x947d, 0xe0},
334 {0x947e, 0xe0},
335 {0x947f, 0xe0},
336 {0x9480, 0xe0},
337 {0x9483, 0x14},
338 {0x9485, 0x14},
339 {0x9487, 0x14},
340 {0x9501, 0x35},
341 {0x9503, 0x14},
342 {0x9505, 0x14},
343 {0x9507, 0x31},
344 {0x9509, 0x1b},
345 {0x950b, 0x15},
346 {0x950d, 0x1e},
347 {0x950f, 0x1e},
348 {0x9511, 0x1e},
349 {0x9513, 0x64},
350 {0x9515, 0x64},
351 {0x9517, 0x64},
352 {0x951d, 0x34},
353 {0x951f, 0x01},
354 {0x9521, 0x01},
355 {0x9523, 0x01},
356 {0x9525, 0x14},
357 {0x9527, 0x14},
358 {0x9529, 0x14},
359 {0x952b, 0x2f},
360 {0x952d, 0x1a},
361 {0x952f, 0x14},
362 {0x9531, 0x1e},
363 {0x9533, 0x1e},
364 {0x9535, 0x1e},
365 {0x9537, 0x6b},
366 {0x9539, 0x7c},
367 {0x953b, 0x81},
368 {0x9543, 0x0f},
369 {0x9545, 0x0f},
370 {0x9547, 0x0f},
371 {0x9549, 0x0f},
372 {0x954b, 0x0f},
373 {0x954d, 0x0f},
374 {0x954f, 0x15},
375 {0x9551, 0x0b},
376 {0x9553, 0x08},
377 {0x9555, 0x1c},
378 {0x9557, 0x0d},
379 {0x9559, 0x08},
380 {0x955d, 0x00},
381 {0x955e, 0x00},
382 {0x955f, 0x00},
383 {0x956d, 0x00},
384 {0x956f, 0x10},
385 {0x9571, 0x10},
386 {0x9573, 0x40},
387 {0x9575, 0x2e},
388 {0x9577, 0x10},
389 {0x9578, 0x0a},
390 {0x957b, 0xe0},
391 {0x957c, 0xe0},
392 {0x957d, 0xe0},
393 {0x957e, 0xe0},
394 {0x957f, 0xe0},
395 {0x9580, 0xe0},
396 {0x9583, 0x14},
397 {0x9585, 0x14},
398 {0x9587, 0x14},
399 {0x7f78, 0x00},
400 {0x7f89, 0x00},
401 {0x7f93, 0x00},
402 {0x924b, 0x1b},
403 {0x924c, 0x0a},
404 {0x9304, 0x04},
405 {0x9315, 0x04},
406 {0x9250, 0x50},
407 {0x9251, 0x3c},
408 {0x9252, 0x14},
409 {0x0112, 0x0a},
410 {0x0113, 0x0a},
411 {0x0114, 0x03},
412 {0x0301, 0x05},
413 {0x0303, 0x02},
414 {0x0305, 0x04},
415 {0x0306, 0x00},
416 {0x0307, 0xa6},
417 {0x0309, 0x0a},
418 {0x030b, 0x01},
419 {0x030d, 0x02},
420 {0x030e, 0x00},
421 {0x030f, 0xd8},
422 {0x0310, 0x00},
423 {0x0820, 0x0f},
424 {0x0821, 0x90},
425 {0x0822, 0x00},
426 {0x0823, 0x00},
427 {0x4648, 0x7f},
428 {0x7420, 0x00},
429 {0x7421, 0x1c},
430 {0x7422, 0x00},
431 {0x7423, 0xd7},
432 {0x9104, 0x00},
433 {0x0342, 0x14},
434 {0x0343, 0xe8},
435 {0x0340, 0x0e},
436 {0x0341, 0x88},
437 {0x0344, 0x00},
438 {0x0345, 0x00},
439 {0x0346, 0x00},
440 {0x0347, 0x00},
441 {0x0348, 0x10},
442 {0x0349, 0x6f},
443 {0x034a, 0x0c},
444 {0x034b, 0x2f},
445 {0x0381, 0x01},
446 {0x0383, 0x01},
447 {0x0385, 0x01},
448 {0x0387, 0x01},
449 {0x0900, 0x00},
450 {0x0901, 0x11},
451 {0x0401, 0x00},
452 {0x0404, 0x00},
453 {0x0405, 0x10},
454 {0x0408, 0x00},
455 {0x0409, 0x00},
456 {0x040a, 0x00},
457 {0x040b, 0x00},
458 {0x040c, 0x10},
459 {0x040d, 0x70},
460 {0x040e, 0x0c},
461 {0x040f, 0x30},
462 {0x3038, 0x00},
463 {0x303a, 0x00},
464 {0x303b, 0x10},
465 {0x300d, 0x00},
466 {0x034c, 0x10},
467 {0x034d, 0x70},
468 {0x034e, 0x0c},
469 {0x034f, 0x30},
470 {0x0202, 0x0e},
471 {0x0203, 0x7e},
472 {0x0204, 0x00},
473 {0x0205, 0x00},
474 {0x020e, 0x01},
475 {0x020f, 0x00},
476 {0x0210, 0x01},
477 {0x0211, 0x00},
478 {0x0212, 0x01},
479 {0x0213, 0x00},
480 {0x0214, 0x01},
481 {0x0215, 0x00},
482 {0x7bcd, 0x00},
483 {0x94dc, 0x20},
484 {0x94dd, 0x20},
485 {0x94de, 0x20},
486 {0x95dc, 0x20},
487 {0x95dd, 0x20},
488 {0x95de, 0x20},
489 {0x7fb0, 0x00},
490 {0x9010, 0x3e},
491 {0x9419, 0x50},
492 {0x941b, 0x50},
493 {0x9519, 0x50},
494 {0x951b, 0x50},
495 {0x3030, 0x00},
496 {0x3032, 0x00},
497 {0x0220, 0x00},
498 {0x0100, 0x00},
499 {REG_NULL, 0x00},
500 };
501
502 /*
503 * Xclk 24Mhz
504 * max_framerate 30fps
505 * mipi_datarate per lane 600Mbps
506 */
507 static const struct regval imx258_2096x1560_regs[] = {
508 {0x0112, 0x0a},
509 {0x0113, 0x0a},
510 {0x0114, 0x03},
511 {0x0301, 0x05},
512 {0x0303, 0x02},
513 {0x0305, 0x04},
514 {0x0306, 0x00},
515 {0x0307, 0x85},
516 {0x0309, 0x0a},
517 {0x030b, 0x01},
518 {0x030d, 0x02},
519 {0x030e, 0x00},
520 {0x030f, 0xd8},
521 {0x0310, 0x00},
522 {0x0820, 0x0c},
523 {0x0821, 0x78},
524 {0x0822, 0x00},
525 {0x0823, 0x00},
526 {0x4648, 0x7f},
527 {0x7420, 0x00},
528 {0x7421, 0x1c},
529 {0x7422, 0x00},
530 {0x7423, 0xd7},
531 {0x9104, 0x00},
532 {0x0342, 0x14},
533 {0x0343, 0xe8},
534 {0x0340, 0x07},
535 {0x0341, 0xc4},
536 {0x0344, 0x00},
537 {0x0345, 0x00},
538 {0x0346, 0x00},
539 {0x0347, 0x00},
540 {0x0348, 0x10},
541 {0x0349, 0x6f},
542 {0x034a, 0x0c},
543 {0x034b, 0x2f},
544 {0x0381, 0x01},
545 {0x0383, 0x01},
546 {0x0385, 0x01},
547 {0x0387, 0x01},
548 {0x0900, 0x01},
549 {0x0901, 0x12},
550 {0x0401, 0x01},
551 {0x0404, 0x00},
552 {0x0405, 0x20},
553 {0x0408, 0x00},
554 {0x0409, 0x06},
555 {0x040a, 0x00},
556 {0x040b, 0x00},
557 {0x040c, 0x10},
558 {0x040d, 0x62},
559 {0x040e, 0x06},
560 {0x040f, 0x18},
561 {0x3038, 0x00},
562 {0x303a, 0x00},
563 {0x303b, 0x10},
564 {0x300d, 0x00},
565 {0x034c, 0x08},
566 {0x034d, 0x30},
567 {0x034e, 0x06},
568 {0x034f, 0x18},
569 {0x0100, 0x00},
570 {REG_NULL, 0x00},
571 };
572
573 /*
574 * Xclk 24Mhz
575 * max_framerate 7fps
576 * mipi_datarate per lane 600Mbps
577 */
578 static const struct regval imx258_4208x3120_regs[] = {
579 {0x0112, 0x0a},
580 {0x0113, 0x0a},
581 {0x0114, 0x03},
582 {0x0301, 0x05},
583 {0x0303, 0x02},
584 {0x0305, 0x04},
585 {0x0306, 0x00},
586 {0x0307, 0xa6},
587 {0x0309, 0x0a},
588 {0x030b, 0x01},
589 {0x030d, 0x02},
590 {0x030e, 0x00},
591 {0x030f, 0xd8},
592 {0x0310, 0x00},
593 {0x0820, 0x0f},
594 {0x0821, 0x90},
595 {0x0822, 0x00},
596 {0x0823, 0x00},
597 {0x4648, 0x7f},
598 {0x7420, 0x00},
599 {0x7421, 0x1c},
600 {0x7422, 0x00},
601 {0x7423, 0xd7},
602 {0x9104, 0x00},
603 {0x0342, 0x14},
604 {0x0343, 0xe8},
605 {0x0340, 0x0e},
606 {0x0341, 0x88},
607 {0x0344, 0x00},
608 {0x0345, 0x00},
609 {0x0346, 0x00},
610 {0x0347, 0x00},
611 {0x0348, 0x10},
612 {0x0349, 0x6f},
613 {0x034a, 0x0c},
614 {0x034b, 0x2f},
615 {0x0381, 0x01},
616 {0x0383, 0x01},
617 {0x0385, 0x01},
618 {0x0387, 0x01},
619 {0x0900, 0x00},
620 {0x0901, 0x11},
621 {0x0401, 0x00},
622 {0x0404, 0x00},
623 {0x0405, 0x10},
624 {0x0408, 0x00},
625 {0x0409, 0x00},
626 {0x040a, 0x00},
627 {0x040b, 0x00},
628 {0x040c, 0x10},
629 {0x040d, 0x70},
630 {0x040e, 0x0c},
631 {0x040f, 0x30},
632 {0x3038, 0x00},
633 {0x303a, 0x00},
634 {0x303b, 0x10},
635 {0x300d, 0x00},
636 {0x034c, 0x10},
637 {0x034d, 0x70},
638 {0x034e, 0x0c},
639 {0x034f, 0x30},
640 {0x0100, 0x00},
641 {REG_NULL, 0x00},
642 };
643
644 static const struct regval imx258_4208_3120_spd_reg[] = {
645 {0x3030, 0x01},//shield output size:80x1920
646 {0x3032, 0x01},//shield BYTE2
647 #ifdef SPD_DEBUG
648 /*DEBUG mode,spd data output with active pixel*/
649 {0x7bcd, 0x00},
650 {0x0b00, 0x00},
651 {0x3051, 0x00},
652 {0x3052, 0x00},
653 {0x7bca, 0x00},
654 {0x7bcb, 0x00},
655 {0x7bc8, 0x00},
656 #endif
657 };
658
659 static const struct other_data imx258_full_spd = {
660 .width = 80,
661 .height = 1920,
662 .bus_fmt = MEDIA_BUS_FMT_SPD_2X8,
663 };
664
665 static const struct other_data imx258_full_ebd = {
666 .width = 320,
667 .height = 2,
668 .bus_fmt = MEDIA_BUS_FMT_EBD_1X8,
669 };
670
671 static const struct imx258_mode supported_modes[] = {
672 {
673 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
674 .width = 4208,
675 .height = 3120,
676 .max_fps = {
677 .numerator = 10000,
678 .denominator = 200000,
679 },
680 .exp_def = 0x0E7E,
681 .hts_def = 0x14E8,
682 .vts_def = 0x0E88,
683 .reg_list = imx258_4208x3120_regs,
684 .spd = &imx258_full_spd,
685 .ebd = &imx258_full_ebd,
686 .hdr_mode = NO_HDR,
687 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
688 },
689 {
690 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
691 .width = 2096,
692 .height = 1560,
693 .max_fps = {
694 .numerator = 10000,
695 .denominator = 300000,
696 },
697 .exp_def = 0x07BA,
698 .hts_def = 0x14E8,
699 .vts_def = 0x07C4,
700 .reg_list = imx258_2096x1560_regs,
701 .spd = NULL,
702 .ebd = NULL,
703 .hdr_mode = NO_HDR,
704 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
705 },
706 };
707
708 static const s64 link_freq_menu_items[] = {
709 IMX258_LINK_FREQ_498MHZ,
710 IMX258_LINK_FREQ_399MHZ
711 };
712
713 static const char * const imx258_test_pattern_menu[] = {
714 "Disabled",
715 "Vertical Color Bar Type 1",
716 "Vertical Color Bar Type 2",
717 "Vertical Color Bar Type 3",
718 "Vertical Color Bar Type 4"
719 };
720
721 /* Write registers up to 4 at a time */
imx258_write_reg(struct i2c_client * client,u16 reg,int len,u32 val)722 static int imx258_write_reg(struct i2c_client *client, u16 reg,
723 int len, u32 val)
724 {
725 u32 buf_i, val_i;
726 u8 buf[6];
727 u8 *val_p;
728 __be32 val_be;
729
730 if (len > 4)
731 return -EINVAL;
732
733 buf[0] = reg >> 8;
734 buf[1] = reg & 0xff;
735
736 val_be = cpu_to_be32(val);
737 val_p = (u8 *)&val_be;
738 buf_i = 2;
739 val_i = 4 - len;
740
741 while (val_i < 4)
742 buf[buf_i++] = val_p[val_i++];
743
744 if (i2c_master_send(client, buf, len + 2) != len + 2)
745 return -EIO;
746
747 return 0;
748 }
749
imx258_write_array(struct i2c_client * client,const struct regval * regs)750 static int imx258_write_array(struct i2c_client *client,
751 const struct regval *regs)
752 {
753 u32 i;
754 int ret = 0;
755
756 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
757 ret = imx258_write_reg(client, regs[i].addr,
758 IMX258_REG_VALUE_08BIT,
759 regs[i].val);
760 return ret;
761 }
762
763 /* Read registers up to 4 at a time */
imx258_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)764 static int imx258_read_reg(struct i2c_client *client, u16 reg,
765 unsigned int len, u32 *val)
766 {
767 struct i2c_msg msgs[2];
768 u8 *data_be_p;
769 __be32 data_be = 0;
770 __be16 reg_addr_be = cpu_to_be16(reg);
771 int ret;
772
773 if (len > 4 || !len)
774 return -EINVAL;
775
776 data_be_p = (u8 *)&data_be;
777 /* Write register address */
778 msgs[0].addr = client->addr;
779 msgs[0].flags = 0;
780 msgs[0].len = 2;
781 msgs[0].buf = (u8 *)®_addr_be;
782
783 /* Read data from register */
784 msgs[1].addr = client->addr;
785 msgs[1].flags = I2C_M_RD;
786 msgs[1].len = len;
787 msgs[1].buf = &data_be_p[4 - len];
788
789 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
790 if (ret != ARRAY_SIZE(msgs))
791 return -EIO;
792
793 *val = be32_to_cpu(data_be);
794
795 return 0;
796 }
797
imx258_get_reso_dist(const struct imx258_mode * mode,struct v4l2_mbus_framefmt * framefmt)798 static int imx258_get_reso_dist(const struct imx258_mode *mode,
799 struct v4l2_mbus_framefmt *framefmt)
800 {
801 return abs(mode->width - framefmt->width) +
802 abs(mode->height - framefmt->height);
803 }
804
805 static const struct imx258_mode *
imx258_find_best_fit(struct v4l2_subdev_format * fmt)806 imx258_find_best_fit(struct v4l2_subdev_format *fmt)
807 {
808 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
809 int dist;
810 int cur_best_fit = 0;
811 int cur_best_fit_dist = -1;
812 unsigned int i;
813
814 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
815 dist = imx258_get_reso_dist(&supported_modes[i], framefmt);
816 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
817 cur_best_fit_dist = dist;
818 cur_best_fit = i;
819 }
820 }
821
822 return &supported_modes[cur_best_fit];
823 }
824
imx258_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)825 static int imx258_set_fmt(struct v4l2_subdev *sd,
826 struct v4l2_subdev_pad_config *cfg,
827 struct v4l2_subdev_format *fmt)
828 {
829 struct imx258 *imx258 = to_imx258(sd);
830 const struct imx258_mode *mode;
831 s64 h_blank, vblank_def;
832
833 mutex_lock(&imx258->mutex);
834
835 mode = imx258_find_best_fit(fmt);
836 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
837 fmt->format.width = mode->width;
838 fmt->format.height = mode->height;
839 fmt->format.field = V4L2_FIELD_NONE;
840 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
841 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
842 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
843 #else
844 mutex_unlock(&imx258->mutex);
845 return -ENOTTY;
846 #endif
847 } else {
848 imx258->cur_mode = mode;
849 h_blank = mode->hts_def - mode->width;
850 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
851 h_blank, 1, h_blank);
852 vblank_def = mode->vts_def - mode->height;
853 __v4l2_ctrl_modify_range(imx258->vblank, vblank_def,
854 IMX258_VTS_MAX - mode->height,
855 1, vblank_def);
856 if (mode->width == 2096 && mode->height == 1560) {
857 __v4l2_ctrl_s_ctrl(imx258->link_freq,
858 link_freq_menu_items[1]);
859 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate,
860 IMX258_PIXEL_RATE_BINNING);
861 } else {
862 __v4l2_ctrl_s_ctrl(imx258->link_freq,
863 link_freq_menu_items[0]);
864 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate,
865 IMX258_PIXEL_RATE_FULL_SIZE);
866 }
867 }
868 mutex_unlock(&imx258->mutex);
869
870 return 0;
871 }
872
imx258_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)873 static int imx258_get_fmt(struct v4l2_subdev *sd,
874 struct v4l2_subdev_pad_config *cfg,
875 struct v4l2_subdev_format *fmt)
876 {
877 struct imx258 *imx258 = to_imx258(sd);
878 const struct imx258_mode *mode = imx258->cur_mode;
879
880 mutex_lock(&imx258->mutex);
881 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
882 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
883 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
884 #else
885 mutex_unlock(&imx258->mutex);
886 return -ENOTTY;
887 #endif
888 } else {
889 fmt->format.width = mode->width;
890 fmt->format.height = mode->height;
891 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
892 fmt->format.field = V4L2_FIELD_NONE;
893 /* to csi rawwr3, other rawwr also can use */
894 if (fmt->pad == imx258->spd_id && mode->spd) {
895 fmt->format.width = mode->spd->width;
896 fmt->format.height = mode->spd->height;
897 fmt->format.code = mode->spd->bus_fmt;
898 //Set the vc channel to be consistent with the valid data
899 fmt->reserved[0] = V4L2_MBUS_CSI2_CHANNEL_0;
900 } else if (fmt->pad == imx258->ebd_id && mode->ebd) {
901 fmt->format.width = mode->ebd->width;
902 fmt->format.height = mode->ebd->height;
903 fmt->format.code = mode->ebd->bus_fmt;
904 //Set the vc channel to be consistent with the valid data
905 fmt->reserved[0] = V4L2_MBUS_CSI2_CHANNEL_0;
906 }
907 }
908 mutex_unlock(&imx258->mutex);
909
910 return 0;
911 }
912
imx258_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)913 static int imx258_enum_mbus_code(struct v4l2_subdev *sd,
914 struct v4l2_subdev_pad_config *cfg,
915 struct v4l2_subdev_mbus_code_enum *code)
916 {
917 if (code->index != 0)
918 return -EINVAL;
919 code->code = MEDIA_BUS_FMT_SRGGB10_1X10;
920
921 return 0;
922 }
923
imx258_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)924 static int imx258_enum_frame_sizes(struct v4l2_subdev *sd,
925 struct v4l2_subdev_pad_config *cfg,
926 struct v4l2_subdev_frame_size_enum *fse)
927 {
928 if (fse->index >= ARRAY_SIZE(supported_modes))
929 return -EINVAL;
930
931 if (fse->code != MEDIA_BUS_FMT_SRGGB10_1X10)
932 return -EINVAL;
933
934 fse->min_width = supported_modes[fse->index].width;
935 fse->max_width = supported_modes[fse->index].width;
936 fse->max_height = supported_modes[fse->index].height;
937 fse->min_height = supported_modes[fse->index].height;
938
939 return 0;
940 }
941
imx258_enable_test_pattern(struct imx258 * imx258,u32 pattern)942 static int imx258_enable_test_pattern(struct imx258 *imx258, u32 pattern)
943 {
944 u32 val;
945
946 if (pattern)
947 val = (pattern - 1) | IMX258_TEST_PATTERN_ENABLE;
948 else
949 val = IMX258_TEST_PATTERN_DISABLE;
950
951 return imx258_write_reg(imx258->client,
952 IMX258_REG_TEST_PATTERN,
953 IMX258_REG_VALUE_08BIT,
954 val);
955 }
956
imx258_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)957 static int imx258_g_frame_interval(struct v4l2_subdev *sd,
958 struct v4l2_subdev_frame_interval *fi)
959 {
960 struct imx258 *imx258 = to_imx258(sd);
961 const struct imx258_mode *mode = imx258->cur_mode;
962
963 fi->interval = mode->max_fps;
964
965 return 0;
966 }
967
imx258_get_otp(struct imx258_otp_info * otp,struct rkmodule_inf * inf)968 static void imx258_get_otp(struct imx258_otp_info *otp,
969 struct rkmodule_inf *inf)
970 {
971 u32 i;
972
973 /* fac */
974 if (otp->flag & 0x80) {
975 inf->fac.flag = 1;
976 inf->fac.year = otp->year;
977 inf->fac.month = otp->month;
978 inf->fac.day = otp->day;
979 for (i = 0; i < ARRAY_SIZE(imx258_module_info) - 1; i++) {
980 if (imx258_module_info[i].id == otp->module_id)
981 break;
982 }
983 strscpy(inf->fac.module, imx258_module_info[i].name,
984 sizeof(inf->fac.module));
985
986 for (i = 0; i < ARRAY_SIZE(imx258_lens_info) - 1; i++) {
987 if (imx258_lens_info[i].id == otp->lens_id)
988 break;
989 }
990 strscpy(inf->fac.lens, imx258_lens_info[i].name,
991 sizeof(inf->fac.lens));
992 }
993 /* awb */
994 if (otp->flag & 0x40) {
995 inf->awb.flag = 1;
996 inf->awb.r_value = otp->rg_ratio;
997 inf->awb.b_value = otp->bg_ratio;
998 inf->awb.gr_value = 0x400;
999 inf->awb.gb_value = 0x400;
1000
1001 inf->awb.golden_r_value = 0;
1002 inf->awb.golden_b_value = 0;
1003 inf->awb.golden_gr_value = 0;
1004 inf->awb.golden_gb_value = 0;
1005 }
1006 /* af */
1007 if (otp->flag & 0x20) {
1008 inf->af.flag = 1;
1009 inf->af.dir_cnt = 1;
1010 inf->af.af_otp[0].vcm_start = otp->vcm_start;
1011 inf->af.af_otp[0].vcm_end = otp->vcm_end;
1012 inf->af.af_otp[0].vcm_dir = otp->vcm_dir;
1013 }
1014 /* lsc */
1015 if (otp->flag & 0x10) {
1016 inf->lsc.flag = 1;
1017 inf->lsc.decimal_bits = 0;
1018 inf->lsc.lsc_w = 9;
1019 inf->lsc.lsc_h = 14;
1020
1021 for (i = 0; i < 126; i++) {
1022 inf->lsc.lsc_r[i] = otp->lenc[i];
1023 inf->lsc.lsc_gr[i] = otp->lenc[i + 126];
1024 inf->lsc.lsc_gb[i] = otp->lenc[i + 252];
1025 inf->lsc.lsc_b[i] = otp->lenc[i + 378];
1026 }
1027 }
1028 }
1029
imx258_get_module_inf(struct imx258 * imx258,struct rkmodule_inf * inf)1030 static void imx258_get_module_inf(struct imx258 *imx258,
1031 struct rkmodule_inf *inf)
1032 {
1033 struct imx258_otp_info *otp = imx258->otp;
1034
1035 strscpy(inf->base.sensor, IMX258_NAME, sizeof(inf->base.sensor));
1036 strscpy(inf->base.module,
1037 imx258->module_name,
1038 sizeof(inf->base.module));
1039 strscpy(inf->base.lens, imx258->len_name, sizeof(inf->base.lens));
1040 if (otp)
1041 imx258_get_otp(otp, inf);
1042 }
1043
imx258_set_awb_cfg(struct imx258 * imx258,struct rkmodule_awb_cfg * cfg)1044 static void imx258_set_awb_cfg(struct imx258 *imx258,
1045 struct rkmodule_awb_cfg *cfg)
1046 {
1047 mutex_lock(&imx258->mutex);
1048 memcpy(&imx258->awb_cfg, cfg, sizeof(*cfg));
1049 mutex_unlock(&imx258->mutex);
1050 }
1051
imx258_set_lsc_cfg(struct imx258 * imx258,struct rkmodule_lsc_cfg * cfg)1052 static void imx258_set_lsc_cfg(struct imx258 *imx258,
1053 struct rkmodule_lsc_cfg *cfg)
1054 {
1055 mutex_lock(&imx258->mutex);
1056 memcpy(&imx258->lsc_cfg, cfg, sizeof(*cfg));
1057 mutex_unlock(&imx258->mutex);
1058 }
1059
imx258_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1060 static long imx258_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1061 {
1062 struct imx258 *imx258 = to_imx258(sd);
1063 struct rkmodule_hdr_cfg *hdr_cfg;
1064 long ret = 0;
1065 u32 stream = 0;
1066 u32 i, h, w;
1067
1068 switch (cmd) {
1069 case RKMODULE_GET_MODULE_INFO:
1070 imx258_get_module_inf(imx258, (struct rkmodule_inf *)arg);
1071 break;
1072 case RKMODULE_AWB_CFG:
1073 imx258_set_awb_cfg(imx258, (struct rkmodule_awb_cfg *)arg);
1074 break;
1075 case RKMODULE_LSC_CFG:
1076 imx258_set_lsc_cfg(imx258, (struct rkmodule_lsc_cfg *)arg);
1077 break;
1078 case RKMODULE_SET_QUICK_STREAM:
1079
1080 stream = *((u32 *)arg);
1081
1082 if (stream)
1083 ret = imx258_write_reg(imx258->client,
1084 IMX258_REG_CTRL_MODE,
1085 IMX258_REG_VALUE_08BIT,
1086 IMX258_MODE_STREAMING);
1087 else
1088 ret = imx258_write_reg(imx258->client,
1089 IMX258_REG_CTRL_MODE,
1090 IMX258_REG_VALUE_08BIT,
1091 IMX258_MODE_SW_STANDBY);
1092 break;
1093 case RKMODULE_SET_HDR_CFG:
1094 hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
1095 w = imx258->cur_mode->width;
1096 h = imx258->cur_mode->height;
1097 for (i = 0; i < imx258->cfg_num; i++) {
1098 if (w == supported_modes[i].width &&
1099 h == supported_modes[i].height &&
1100 supported_modes[i].hdr_mode == hdr_cfg->hdr_mode) {
1101 imx258->cur_mode = &supported_modes[i];
1102 break;
1103 }
1104 }
1105 if (i == imx258->cfg_num) {
1106 dev_err(&imx258->client->dev,
1107 "not find hdr mode:%d %dx%d config\n",
1108 hdr_cfg->hdr_mode, w, h);
1109 ret = -EINVAL;
1110 } else {
1111 w = imx258->cur_mode->hts_def - imx258->cur_mode->width;
1112 h = imx258->cur_mode->vts_def - imx258->cur_mode->height;
1113 __v4l2_ctrl_modify_range(imx258->hblank, w, w, 1, w);
1114 __v4l2_ctrl_modify_range(imx258->vblank, h,
1115 IMX258_VTS_MAX - imx258->cur_mode->height,
1116 1, h);
1117 dev_info(&imx258->client->dev,
1118 "sensor mode: %d\n",
1119 imx258->cur_mode->hdr_mode);
1120 }
1121 break;
1122 case RKMODULE_GET_HDR_CFG:
1123 hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
1124 hdr_cfg->esp.mode = HDR_NORMAL_VC;
1125 hdr_cfg->hdr_mode = imx258->cur_mode->hdr_mode;
1126 break;
1127 default:
1128 ret = -ENOTTY;
1129 break;
1130 }
1131
1132 return ret;
1133 }
1134
1135 #ifdef CONFIG_COMPAT
imx258_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1136 static long imx258_compat_ioctl32(struct v4l2_subdev *sd,
1137 unsigned int cmd, unsigned long arg)
1138 {
1139 void __user *up = compat_ptr(arg);
1140 struct rkmodule_inf *inf;
1141 struct rkmodule_awb_cfg *awb_cfg;
1142 struct rkmodule_lsc_cfg *lsc_cfg;
1143 struct rkmodule_hdr_cfg *hdr;
1144 long ret = 0;
1145 u32 stream = 0;
1146
1147 switch (cmd) {
1148 case RKMODULE_GET_MODULE_INFO:
1149 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1150 if (!inf) {
1151 ret = -ENOMEM;
1152 return ret;
1153 }
1154
1155 ret = imx258_ioctl(sd, cmd, inf);
1156 if (!ret) {
1157 ret = copy_to_user(up, inf, sizeof(*inf));
1158 if (ret)
1159 ret = -EFAULT;
1160 }
1161 kfree(inf);
1162 break;
1163 case RKMODULE_AWB_CFG:
1164 awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL);
1165 if (!awb_cfg) {
1166 ret = -ENOMEM;
1167 return ret;
1168 }
1169
1170 ret = copy_from_user(awb_cfg, up, sizeof(*awb_cfg));
1171 if (ret) {
1172 kfree(awb_cfg);
1173 return -EFAULT;
1174 }
1175 ret = imx258_ioctl(sd, cmd, awb_cfg);
1176 kfree(awb_cfg);
1177 break;
1178 case RKMODULE_LSC_CFG:
1179 lsc_cfg = kzalloc(sizeof(*lsc_cfg), GFP_KERNEL);
1180 if (!lsc_cfg) {
1181 ret = -ENOMEM;
1182 return ret;
1183 }
1184
1185 ret = copy_from_user(lsc_cfg, up, sizeof(*lsc_cfg));
1186 if (ret) {
1187 kfree(lsc_cfg);
1188 return -EFAULT;
1189 }
1190 ret = imx258_ioctl(sd, cmd, lsc_cfg);
1191 kfree(lsc_cfg);
1192 break;
1193 case RKMODULE_GET_HDR_CFG:
1194 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1195 if (!hdr) {
1196 ret = -ENOMEM;
1197 return ret;
1198 }
1199
1200 ret = imx258_ioctl(sd, cmd, hdr);
1201 if (!ret) {
1202 ret = copy_to_user(up, hdr, sizeof(*hdr));
1203 if (ret) {
1204 kfree(hdr);
1205 return -EFAULT;
1206 }
1207 }
1208 kfree(hdr);
1209 break;
1210 case RKMODULE_SET_HDR_CFG:
1211 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1212 if (!hdr) {
1213 ret = -ENOMEM;
1214 return ret;
1215 }
1216
1217 ret = copy_from_user(hdr, up, sizeof(*hdr));
1218 if (ret) {
1219 kfree(hdr);
1220 return -EFAULT;
1221 }
1222 ret = imx258_ioctl(sd, cmd, hdr);
1223 kfree(hdr);
1224 break;
1225 case RKMODULE_SET_QUICK_STREAM:
1226 ret = copy_from_user(&stream, up, sizeof(u32));
1227 if (ret)
1228 return -EFAULT;
1229 ret = imx258_ioctl(sd, cmd, &stream);
1230 break;
1231 default:
1232 ret = -ENOTTY;
1233 break;
1234 }
1235 return ret;
1236 }
1237 #endif
1238
1239 /*--------------------------------------------------------------------------*/
imx258_apply_otp(struct imx258 * imx258)1240 static int imx258_apply_otp(struct imx258 *imx258)
1241 {
1242 int R_gain, G_gain, B_gain, base_gain;
1243 struct i2c_client *client = imx258->client;
1244 struct imx258_otp_info *otp_ptr = imx258->otp;
1245 struct rkmodule_awb_cfg *awb_cfg = &imx258->awb_cfg;
1246 struct rkmodule_lsc_cfg *lsc_cfg = &imx258->lsc_cfg;
1247 u32 golden_bg_ratio = 0;
1248 u32 golden_rg_ratio = 0;
1249 u32 golden_g_value = 0;
1250 u32 bg_ratio;
1251 u32 rg_ratio;
1252 //u32 g_value;
1253 u32 i;
1254
1255 if (awb_cfg->enable) {
1256 golden_g_value = (awb_cfg->golden_gb_value +
1257 awb_cfg->golden_gr_value) / 2;
1258 golden_bg_ratio = awb_cfg->golden_b_value * 0x400 / golden_g_value;
1259 golden_rg_ratio = awb_cfg->golden_r_value * 0x400 / golden_g_value;
1260 }
1261 /* apply OTP WB Calibration */
1262 if ((otp_ptr->flag & 0x40) && golden_bg_ratio && golden_rg_ratio) {
1263 rg_ratio = otp_ptr->rg_ratio;
1264 bg_ratio = otp_ptr->bg_ratio;
1265 dev_dbg(&client->dev, "rg:0x%x,bg:0x%x,gol rg:0x%x,bg:0x%x\n",
1266 rg_ratio, bg_ratio, golden_rg_ratio, golden_bg_ratio);
1267 /* calculate G gain */
1268 R_gain = golden_rg_ratio * 1000 / rg_ratio;
1269 B_gain = golden_bg_ratio * 1000 / bg_ratio;
1270 G_gain = 1000;
1271 if (R_gain < 1000 || B_gain < 1000) {
1272 if (R_gain < B_gain)
1273 base_gain = R_gain;
1274 else
1275 base_gain = B_gain;
1276 } else {
1277 base_gain = G_gain;
1278 }
1279 R_gain = 0x100 * R_gain / (base_gain);
1280 B_gain = 0x100 * B_gain / (base_gain);
1281 G_gain = 0x100 * G_gain / (base_gain);
1282 /* update sensor WB gain */
1283 if (R_gain > 0x100) {
1284 imx258_write_reg(client, 0x0210,
1285 IMX258_REG_VALUE_08BIT, R_gain >> 8);
1286 imx258_write_reg(client, 0x0211,
1287 IMX258_REG_VALUE_08BIT, R_gain & 0x00ff);
1288 }
1289 if (G_gain > 0x100) {
1290 imx258_write_reg(client, 0x020e,
1291 IMX258_REG_VALUE_08BIT, G_gain >> 8);
1292 imx258_write_reg(client, 0x020f,
1293 IMX258_REG_VALUE_08BIT, G_gain & 0x00ff);
1294 imx258_write_reg(client, 0x0214,
1295 IMX258_REG_VALUE_08BIT, G_gain >> 8);
1296 imx258_write_reg(client, 0x0215,
1297 IMX258_REG_VALUE_08BIT, G_gain & 0x00ff);
1298 }
1299 if (B_gain > 0x100) {
1300 imx258_write_reg(client, 0x0212,
1301 IMX258_REG_VALUE_08BIT, B_gain >> 8);
1302 imx258_write_reg(client, 0x0213,
1303 IMX258_REG_VALUE_08BIT, B_gain & 0x00ff);
1304 }
1305 dev_dbg(&client->dev, "apply awb gain: 0x%x, 0x%x, 0x%x\n",
1306 R_gain, G_gain, B_gain);
1307 }
1308
1309 /* apply OTP Lenc Calibration */
1310 if ((otp_ptr->flag & 0x10) && lsc_cfg->enable) {
1311 for (i = 0; i < 504; i++) {
1312 imx258_write_reg(client, 0xA300 + i,
1313 IMX258_REG_VALUE_08BIT, otp_ptr->lenc[i]);
1314 dev_dbg(&client->dev, "apply lenc[%d]: 0x%x\n",
1315 i, otp_ptr->lenc[i]);
1316 }
1317 usleep_range(1000, 2000);
1318 //choose lsc table 1
1319 imx258_write_reg(client, 0x3021,
1320 IMX258_REG_VALUE_08BIT, 0x01);
1321 //enable lsc
1322 imx258_write_reg(client, 0x0B00,
1323 IMX258_REG_VALUE_08BIT, 0x01);
1324 }
1325
1326 /* apply OTP SPC Calibration */
1327 if (otp_ptr->flag & 0x08) {
1328 for (i = 0; i < 63; i++) {
1329 imx258_write_reg(client, 0xD04C + i,
1330 IMX258_REG_VALUE_08BIT, otp_ptr->spc[i]);
1331 dev_dbg(&client->dev, "apply spc[%d]: 0x%x\n",
1332 i, otp_ptr->spc[i]);
1333 imx258_write_reg(client, 0xD08C + i,
1334 IMX258_REG_VALUE_08BIT, otp_ptr->spc[i + 63]);
1335 dev_dbg(&client->dev, "apply spc[%d]: 0x%x\n",
1336 i + 63, otp_ptr->spc[i + 63]);
1337 }
1338 //enable spc
1339 imx258_write_reg(client, 0x7BC8,
1340 IMX258_REG_VALUE_08BIT, 0x01);
1341 }
1342 return 0;
1343 }
1344
__imx258_start_stream(struct imx258 * imx258)1345 static int __imx258_start_stream(struct imx258 *imx258)
1346 {
1347 int ret;
1348
1349 ret = imx258_write_array(imx258->client, imx258->cur_mode->reg_list);
1350 if (ret)
1351 return ret;
1352
1353 /* In case these controls are set before streaming */
1354 mutex_unlock(&imx258->mutex);
1355 ret = v4l2_ctrl_handler_setup(&imx258->ctrl_handler);
1356 mutex_lock(&imx258->mutex);
1357 if (ret)
1358 return ret;
1359 if (imx258->otp) {
1360 ret = imx258_apply_otp(imx258);
1361 if (ret)
1362 return ret;
1363 }
1364 if (imx258->cur_mode->width == 4208 &&
1365 imx258->cur_mode->height == 3120 &&
1366 imx258->cur_mode->spd != NULL &&
1367 imx258->spd_id < PAD_MAX) {
1368 ret = imx258_write_array(imx258->client, imx258_4208_3120_spd_reg);
1369 if (ret)
1370 return ret;
1371 }
1372 return imx258_write_reg(imx258->client,
1373 IMX258_REG_CTRL_MODE,
1374 IMX258_REG_VALUE_08BIT,
1375 IMX258_MODE_STREAMING);
1376 }
1377
__imx258_stop_stream(struct imx258 * imx258)1378 static int __imx258_stop_stream(struct imx258 *imx258)
1379 {
1380 return imx258_write_reg(imx258->client,
1381 IMX258_REG_CTRL_MODE,
1382 IMX258_REG_VALUE_08BIT,
1383 IMX258_MODE_SW_STANDBY);
1384 }
1385
imx258_s_stream(struct v4l2_subdev * sd,int on)1386 static int imx258_s_stream(struct v4l2_subdev *sd, int on)
1387 {
1388 struct imx258 *imx258 = to_imx258(sd);
1389 struct i2c_client *client = imx258->client;
1390 int ret = 0;
1391
1392 mutex_lock(&imx258->mutex);
1393 on = !!on;
1394 if (on == imx258->streaming)
1395 goto unlock_and_return;
1396
1397 if (on) {
1398 ret = pm_runtime_get_sync(&client->dev);
1399 if (ret < 0) {
1400 pm_runtime_put_noidle(&client->dev);
1401 goto unlock_and_return;
1402 }
1403
1404 ret = __imx258_start_stream(imx258);
1405 if (ret) {
1406 v4l2_err(sd, "start stream failed while write regs\n");
1407 pm_runtime_put(&client->dev);
1408 goto unlock_and_return;
1409 }
1410 } else {
1411 __imx258_stop_stream(imx258);
1412 pm_runtime_put(&client->dev);
1413 }
1414
1415 imx258->streaming = on;
1416
1417 unlock_and_return:
1418 mutex_unlock(&imx258->mutex);
1419
1420 return ret;
1421 }
1422
imx258_s_power(struct v4l2_subdev * sd,int on)1423 static int imx258_s_power(struct v4l2_subdev *sd, int on)
1424 {
1425 struct imx258 *imx258 = to_imx258(sd);
1426 struct i2c_client *client = imx258->client;
1427 int ret = 0;
1428
1429 mutex_lock(&imx258->mutex);
1430
1431 /* If the power state is not modified - no work to do. */
1432 if (imx258->power_on == !!on)
1433 goto unlock_and_return;
1434
1435 if (on) {
1436 ret = pm_runtime_get_sync(&client->dev);
1437 if (ret < 0) {
1438 pm_runtime_put_noidle(&client->dev);
1439 goto unlock_and_return;
1440 }
1441
1442 ret = imx258_write_array(imx258->client, imx258_global_regs);
1443 if (ret) {
1444 v4l2_err(sd, "could not set init registers\n");
1445 pm_runtime_put_noidle(&client->dev);
1446 goto unlock_and_return;
1447 }
1448
1449 imx258->power_on = true;
1450 } else {
1451 pm_runtime_put(&client->dev);
1452 imx258->power_on = false;
1453 }
1454
1455 unlock_and_return:
1456 mutex_unlock(&imx258->mutex);
1457
1458 return ret;
1459 }
1460
1461 /* Calculate the delay in us by clock rate and clock cycles */
imx258_cal_delay(u32 cycles)1462 static inline u32 imx258_cal_delay(u32 cycles)
1463 {
1464 return DIV_ROUND_UP(cycles, IMX258_XVCLK_FREQ / 1000 / 1000);
1465 }
1466
__imx258_power_on(struct imx258 * imx258)1467 static int __imx258_power_on(struct imx258 *imx258)
1468 {
1469 int ret;
1470 u32 delay_us;
1471 struct device *dev = &imx258->client->dev;
1472
1473 if (!IS_ERR_OR_NULL(imx258->pins_default)) {
1474 ret = pinctrl_select_state(imx258->pinctrl,
1475 imx258->pins_default);
1476 if (ret < 0)
1477 dev_err(dev, "could not set pins\n");
1478 }
1479 ret = clk_set_rate(imx258->xvclk, IMX258_XVCLK_FREQ);
1480 if (ret < 0)
1481 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1482 if (clk_get_rate(imx258->xvclk) != IMX258_XVCLK_FREQ)
1483 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1484 ret = clk_prepare_enable(imx258->xvclk);
1485 if (ret < 0) {
1486 dev_err(dev, "Failed to enable xvclk\n");
1487 return ret;
1488 }
1489 if (!IS_ERR(imx258->reset_gpio))
1490 gpiod_set_value_cansleep(imx258->reset_gpio, 1);
1491
1492 ret = regulator_bulk_enable(IMX258_NUM_SUPPLIES, imx258->supplies);
1493 if (ret < 0) {
1494 dev_err(dev, "Failed to enable regulators\n");
1495 goto disable_clk;
1496 }
1497
1498 if (!IS_ERR(imx258->reset_gpio))
1499 gpiod_set_value_cansleep(imx258->reset_gpio, 0);
1500
1501 usleep_range(500, 1000);
1502 if (!IS_ERR(imx258->pwdn_gpio))
1503 gpiod_set_value_cansleep(imx258->pwdn_gpio, 0);
1504
1505 /* 8192 cycles prior to first SCCB transaction */
1506 delay_us = imx258_cal_delay(8192);
1507 usleep_range(delay_us, delay_us * 2);
1508
1509 return 0;
1510
1511 disable_clk:
1512 clk_disable_unprepare(imx258->xvclk);
1513
1514 return ret;
1515 }
1516
__imx258_power_off(struct imx258 * imx258)1517 static void __imx258_power_off(struct imx258 *imx258)
1518 {
1519 int ret;
1520
1521 if (!IS_ERR(imx258->pwdn_gpio))
1522 gpiod_set_value_cansleep(imx258->pwdn_gpio, 1);
1523 clk_disable_unprepare(imx258->xvclk);
1524 if (!IS_ERR(imx258->reset_gpio))
1525 gpiod_set_value_cansleep(imx258->reset_gpio, 1);
1526 if (!IS_ERR_OR_NULL(imx258->pins_sleep)) {
1527 ret = pinctrl_select_state(imx258->pinctrl,
1528 imx258->pins_sleep);
1529 if (ret < 0)
1530 dev_dbg(&imx258->client->dev, "could not set pins\n");
1531 }
1532 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1533 }
1534
imx258_runtime_resume(struct device * dev)1535 static int imx258_runtime_resume(struct device *dev)
1536 {
1537 struct i2c_client *client = to_i2c_client(dev);
1538 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1539 struct imx258 *imx258 = to_imx258(sd);
1540
1541 return __imx258_power_on(imx258);
1542 }
1543
imx258_runtime_suspend(struct device * dev)1544 static int imx258_runtime_suspend(struct device *dev)
1545 {
1546 struct i2c_client *client = to_i2c_client(dev);
1547 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1548 struct imx258 *imx258 = to_imx258(sd);
1549
1550 __imx258_power_off(imx258);
1551
1552 return 0;
1553 }
1554
1555 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
imx258_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1556 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1557 {
1558 struct imx258 *imx258 = to_imx258(sd);
1559 struct v4l2_mbus_framefmt *try_fmt =
1560 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1561 const struct imx258_mode *def_mode = &supported_modes[0];
1562
1563 mutex_lock(&imx258->mutex);
1564 /* Initialize try_fmt */
1565 try_fmt->width = def_mode->width;
1566 try_fmt->height = def_mode->height;
1567 try_fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
1568 try_fmt->field = V4L2_FIELD_NONE;
1569
1570 mutex_unlock(&imx258->mutex);
1571 /* No crop or compose */
1572
1573 return 0;
1574 }
1575 #endif
1576
imx258_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1577 static int imx258_enum_frame_interval(struct v4l2_subdev *sd,
1578 struct v4l2_subdev_pad_config *cfg,
1579 struct v4l2_subdev_frame_interval_enum *fie)
1580 {
1581 if (fie->index >= ARRAY_SIZE(supported_modes))
1582 return -EINVAL;
1583
1584 fie->code = supported_modes[fie->index].bus_fmt;
1585 fie->width = supported_modes[fie->index].width;
1586 fie->height = supported_modes[fie->index].height;
1587 fie->interval = supported_modes[fie->index].max_fps;
1588 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1589 return 0;
1590 }
1591
imx258_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1592 static int imx258_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
1593 struct v4l2_mbus_config *config)
1594 {
1595 u32 val = 0;
1596
1597 val = 1 << (IMX258_LANES - 1) |
1598 V4L2_MBUS_CSI2_CHANNEL_0 |
1599 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1600 config->type = V4L2_MBUS_CSI2_DPHY;
1601 config->flags = val;
1602
1603 return 0;
1604 }
1605
1606 static const struct dev_pm_ops imx258_pm_ops = {
1607 SET_RUNTIME_PM_OPS(imx258_runtime_suspend,
1608 imx258_runtime_resume, NULL)
1609 };
1610
1611 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1612 static const struct v4l2_subdev_internal_ops imx258_internal_ops = {
1613 .open = imx258_open,
1614 };
1615 #endif
1616
1617 static const struct v4l2_subdev_core_ops imx258_core_ops = {
1618 .s_power = imx258_s_power,
1619 .ioctl = imx258_ioctl,
1620 #ifdef CONFIG_COMPAT
1621 .compat_ioctl32 = imx258_compat_ioctl32,
1622 #endif
1623 };
1624
1625 static const struct v4l2_subdev_video_ops imx258_video_ops = {
1626 .s_stream = imx258_s_stream,
1627 .g_frame_interval = imx258_g_frame_interval,
1628 };
1629
1630 static const struct v4l2_subdev_pad_ops imx258_pad_ops = {
1631 .enum_mbus_code = imx258_enum_mbus_code,
1632 .enum_frame_size = imx258_enum_frame_sizes,
1633 .enum_frame_interval = imx258_enum_frame_interval,
1634 .get_fmt = imx258_get_fmt,
1635 .set_fmt = imx258_set_fmt,
1636 .get_mbus_config = imx258_g_mbus_config,
1637 };
1638
1639 static const struct v4l2_subdev_ops imx258_subdev_ops = {
1640 .core = &imx258_core_ops,
1641 .video = &imx258_video_ops,
1642 .pad = &imx258_pad_ops,
1643 };
1644
imx258_set_gain_reg(struct imx258 * imx258,u32 a_gain)1645 static int imx258_set_gain_reg(struct imx258 *imx258, u32 a_gain)
1646 {
1647 int ret = 0;
1648 u32 gain_reg = 0;
1649
1650 gain_reg = (512 - (512 * 512 / a_gain));
1651 if (gain_reg > 480)
1652 gain_reg = 480;
1653
1654 ret = imx258_write_reg(imx258->client,
1655 IMX258_REG_GAIN_H,
1656 IMX258_REG_VALUE_08BIT,
1657 ((gain_reg & 0x100) >> 8));
1658 ret |= imx258_write_reg(imx258->client,
1659 IMX258_REG_GAIN_L,
1660 IMX258_REG_VALUE_08BIT,
1661 (gain_reg & 0xff));
1662 return ret;
1663 }
1664
imx258_set_ctrl(struct v4l2_ctrl * ctrl)1665 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)
1666 {
1667 struct imx258 *imx258 = container_of(ctrl->handler,
1668 struct imx258, ctrl_handler);
1669 struct i2c_client *client = imx258->client;
1670 s64 max;
1671 int ret = 0;
1672
1673 /* Propagate change of current control to all related controls */
1674 switch (ctrl->id) {
1675 case V4L2_CID_VBLANK:
1676 /* Update max exposure while meeting expected vblanking */
1677 max = imx258->cur_mode->height + ctrl->val - 4;
1678 __v4l2_ctrl_modify_range(imx258->exposure,
1679 imx258->exposure->minimum, max,
1680 imx258->exposure->step,
1681 imx258->exposure->default_value);
1682 break;
1683 }
1684
1685 if (!pm_runtime_get_if_in_use(&client->dev))
1686 return 0;
1687
1688 switch (ctrl->id) {
1689 case V4L2_CID_EXPOSURE:
1690 /* 4 least significant bits of expsoure are fractional part */
1691 ret = imx258_write_reg(imx258->client,
1692 IMX258_REG_EXPOSURE,
1693 IMX258_REG_VALUE_16BIT,
1694 ctrl->val);
1695 break;
1696 case V4L2_CID_ANALOGUE_GAIN:
1697 ret = imx258_set_gain_reg(imx258, ctrl->val);
1698 break;
1699 case V4L2_CID_VBLANK:
1700 ret = imx258_write_reg(imx258->client,
1701 IMX258_REG_VTS,
1702 IMX258_REG_VALUE_16BIT,
1703 ctrl->val + imx258->cur_mode->height);
1704 break;
1705 case V4L2_CID_TEST_PATTERN:
1706 ret = imx258_enable_test_pattern(imx258, ctrl->val);
1707 break;
1708 default:
1709 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1710 __func__, ctrl->id, ctrl->val);
1711 break;
1712 }
1713
1714 pm_runtime_put(&client->dev);
1715
1716 return ret;
1717 }
1718
1719 static const struct v4l2_ctrl_ops imx258_ctrl_ops = {
1720 .s_ctrl = imx258_set_ctrl,
1721 };
1722
imx258_initialize_controls(struct imx258 * imx258)1723 static int imx258_initialize_controls(struct imx258 *imx258)
1724 {
1725 const struct imx258_mode *mode;
1726 struct v4l2_ctrl_handler *handler;
1727 s64 exposure_max, vblank_def;
1728 u32 h_blank;
1729 int ret;
1730
1731 handler = &imx258->ctrl_handler;
1732 mode = imx258->cur_mode;
1733 ret = v4l2_ctrl_handler_init(handler, 8);
1734 if (ret)
1735 return ret;
1736 handler->lock = &imx258->mutex;
1737
1738 imx258->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
1739 V4L2_CID_LINK_FREQ, 1, 0,
1740 link_freq_menu_items);
1741
1742 imx258->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
1743 V4L2_CID_PIXEL_RATE, 0, IMX258_PIXEL_RATE_FULL_SIZE,
1744 1, IMX258_PIXEL_RATE_FULL_SIZE);
1745
1746 h_blank = mode->hts_def - mode->width;
1747 imx258->hblank = v4l2_ctrl_new_std(handler, NULL,
1748 V4L2_CID_HBLANK, h_blank, h_blank, 1, h_blank);
1749 if (imx258->hblank)
1750 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1751
1752 vblank_def = mode->vts_def - mode->height;
1753 imx258->vblank = v4l2_ctrl_new_std(handler, &imx258_ctrl_ops,
1754 V4L2_CID_VBLANK, vblank_def,
1755 IMX258_VTS_MAX - mode->height,
1756 1, vblank_def);
1757
1758 exposure_max = mode->vts_def - 4;
1759 imx258->exposure = v4l2_ctrl_new_std(handler, &imx258_ctrl_ops,
1760 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN,
1761 exposure_max, IMX258_EXPOSURE_STEP,
1762 mode->exp_def);
1763
1764 imx258->anal_gain = v4l2_ctrl_new_std(handler, &imx258_ctrl_ops,
1765 V4L2_CID_ANALOGUE_GAIN, IMX258_GAIN_MIN,
1766 IMX258_GAIN_MAX, IMX258_GAIN_STEP,
1767 IMX258_GAIN_DEFAULT);
1768
1769 imx258->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1770 &imx258_ctrl_ops, V4L2_CID_TEST_PATTERN,
1771 ARRAY_SIZE(imx258_test_pattern_menu) - 1,
1772 0, 0, imx258_test_pattern_menu);
1773
1774 if (handler->error) {
1775 ret = handler->error;
1776 dev_err(&imx258->client->dev,
1777 "Failed to init controls(%d)\n", ret);
1778 goto err_free_handler;
1779 }
1780
1781 imx258->subdev.ctrl_handler = handler;
1782
1783 return 0;
1784
1785 err_free_handler:
1786 v4l2_ctrl_handler_free(handler);
1787
1788 return ret;
1789 }
1790
imx258_check_sensor_id(struct imx258 * imx258,struct i2c_client * client)1791 static int imx258_check_sensor_id(struct imx258 *imx258,
1792 struct i2c_client *client)
1793 {
1794 struct device *dev = &imx258->client->dev;
1795 int ret = 0;
1796 u32 id = 0;
1797
1798 ret = imx258_read_reg(client, IMX258_REG_CHIP_ID,
1799 IMX258_REG_VALUE_16BIT, &id);
1800 if (id != CHIP_ID) {
1801 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1802 return -ENODEV;
1803 }
1804
1805 return 0;
1806 }
1807
imx258_configure_regulators(struct imx258 * imx258)1808 static int imx258_configure_regulators(struct imx258 *imx258)
1809 {
1810 unsigned int i;
1811
1812 for (i = 0; i < IMX258_NUM_SUPPLIES; i++)
1813 imx258->supplies[i].supply = imx258_supply_names[i];
1814
1815 return devm_regulator_bulk_get(&imx258->client->dev,
1816 IMX258_NUM_SUPPLIES,
1817 imx258->supplies);
1818 }
1819
imx258_probe(struct i2c_client * client,const struct i2c_device_id * id)1820 static int imx258_probe(struct i2c_client *client,
1821 const struct i2c_device_id *id)
1822 {
1823 struct device *dev = &client->dev;
1824 struct device_node *node = dev->of_node;
1825 struct imx258 *imx258;
1826 struct v4l2_subdev *sd;
1827 char facing[2];
1828 struct device_node *eeprom_ctrl_node;
1829 struct i2c_client *eeprom_ctrl_client;
1830 struct v4l2_subdev *eeprom_ctrl;
1831 struct imx258_otp_info *otp_ptr;
1832 int ret;
1833
1834 dev_info(dev, "driver version: %02x.%02x.%02x",
1835 DRIVER_VERSION >> 16,
1836 (DRIVER_VERSION & 0xff00) >> 8,
1837 DRIVER_VERSION & 0x00ff);
1838
1839 imx258 = devm_kzalloc(dev, sizeof(*imx258), GFP_KERNEL);
1840 if (!imx258)
1841 return -ENOMEM;
1842
1843 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1844 &imx258->module_index);
1845 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1846 &imx258->module_facing);
1847 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1848 &imx258->module_name);
1849 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1850 &imx258->len_name);
1851 if (ret) {
1852 dev_err(dev, "could not get module information!\n");
1853 return -EINVAL;
1854 }
1855
1856 imx258->client = client;
1857 imx258->cfg_num = ARRAY_SIZE(supported_modes);
1858 imx258->cur_mode = &supported_modes[0];
1859
1860 imx258->xvclk = devm_clk_get(dev, "xvclk");
1861 if (IS_ERR(imx258->xvclk)) {
1862 dev_err(dev, "Failed to get xvclk\n");
1863 return -EINVAL;
1864 }
1865
1866 imx258->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1867 if (IS_ERR(imx258->reset_gpio))
1868 dev_warn(dev, "Failed to get reset-gpios\n");
1869
1870 imx258->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1871 if (IS_ERR(imx258->pwdn_gpio))
1872 dev_warn(dev, "Failed to get pwdn-gpios\n");
1873
1874 ret = of_property_read_u32(node,
1875 "rockchip,spd-id",
1876 &imx258->spd_id);
1877 if (ret != 0) {
1878 imx258->spd_id = PAD_MAX;
1879 dev_err(dev,
1880 "failed get spd_id, will not to use spd\n");
1881 }
1882 ret = of_property_read_u32(node,
1883 "rockchip,ebd-id",
1884 &imx258->ebd_id);
1885 if (ret != 0) {
1886 imx258->ebd_id = PAD_MAX;
1887 dev_err(dev,
1888 "failed get ebd_id, will not to use ebd\n");
1889 }
1890
1891 ret = imx258_configure_regulators(imx258);
1892 if (ret) {
1893 dev_err(dev, "Failed to get power regulators\n");
1894 return ret;
1895 }
1896
1897 imx258->pinctrl = devm_pinctrl_get(dev);
1898 if (!IS_ERR(imx258->pinctrl)) {
1899 imx258->pins_default =
1900 pinctrl_lookup_state(imx258->pinctrl,
1901 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1902 if (IS_ERR(imx258->pins_default))
1903 dev_err(dev, "could not get default pinstate\n");
1904
1905 imx258->pins_sleep =
1906 pinctrl_lookup_state(imx258->pinctrl,
1907 OF_CAMERA_PINCTRL_STATE_SLEEP);
1908 if (IS_ERR(imx258->pins_sleep))
1909 dev_err(dev, "could not get sleep pinstate\n");
1910 }
1911
1912 mutex_init(&imx258->mutex);
1913
1914 sd = &imx258->subdev;
1915 v4l2_i2c_subdev_init(sd, client, &imx258_subdev_ops);
1916 ret = imx258_initialize_controls(imx258);
1917 if (ret)
1918 goto err_destroy_mutex;
1919
1920 ret = __imx258_power_on(imx258);
1921 if (ret)
1922 goto err_free_handler;
1923
1924 ret = imx258_check_sensor_id(imx258, client);
1925 if (ret)
1926 goto err_power_off;
1927
1928 eeprom_ctrl_node = of_parse_phandle(node, "eeprom-ctrl", 0);
1929 if (eeprom_ctrl_node) {
1930 eeprom_ctrl_client =
1931 of_find_i2c_device_by_node(eeprom_ctrl_node);
1932 of_node_put(eeprom_ctrl_node);
1933 if (IS_ERR_OR_NULL(eeprom_ctrl_client)) {
1934 dev_err(dev, "can not get node\n");
1935 goto continue_probe;
1936 }
1937 eeprom_ctrl = i2c_get_clientdata(eeprom_ctrl_client);
1938 if (IS_ERR_OR_NULL(eeprom_ctrl)) {
1939 dev_err(dev, "can not get eeprom i2c client\n");
1940 } else {
1941 otp_ptr = devm_kzalloc(dev, sizeof(*otp_ptr), GFP_KERNEL);
1942 if (!otp_ptr)
1943 return -ENOMEM;
1944 ret = v4l2_subdev_call(eeprom_ctrl,
1945 core, ioctl, 0, otp_ptr);
1946 if (!ret) {
1947 imx258->otp = otp_ptr;
1948 } else {
1949 imx258->otp = NULL;
1950 devm_kfree(dev, otp_ptr);
1951 }
1952 }
1953 }
1954
1955 continue_probe:
1956
1957 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1958 sd->internal_ops = &imx258_internal_ops;
1959 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1960 V4L2_SUBDEV_FL_HAS_EVENTS;
1961 #endif
1962 #if defined(CONFIG_MEDIA_CONTROLLER)
1963 imx258->pad.flags = MEDIA_PAD_FL_SOURCE;
1964 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1965 ret = media_entity_pads_init(&sd->entity, 1, &imx258->pad);
1966 if (ret < 0)
1967 goto err_power_off;
1968 #endif
1969
1970 memset(facing, 0, sizeof(facing));
1971 if (strcmp(imx258->module_facing, "back") == 0)
1972 facing[0] = 'b';
1973 else
1974 facing[0] = 'f';
1975
1976 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1977 imx258->module_index, facing,
1978 IMX258_NAME, dev_name(sd->dev));
1979 ret = v4l2_async_register_subdev_sensor_common(sd);
1980 if (ret) {
1981 dev_err(dev, "v4l2 async register subdev failed\n");
1982 goto err_clean_entity;
1983 }
1984
1985 pm_runtime_set_active(dev);
1986 pm_runtime_enable(dev);
1987 pm_runtime_idle(dev);
1988
1989 return 0;
1990
1991 err_clean_entity:
1992 #if defined(CONFIG_MEDIA_CONTROLLER)
1993 media_entity_cleanup(&sd->entity);
1994 #endif
1995 err_power_off:
1996 __imx258_power_off(imx258);
1997 err_free_handler:
1998 v4l2_ctrl_handler_free(&imx258->ctrl_handler);
1999 err_destroy_mutex:
2000 mutex_destroy(&imx258->mutex);
2001
2002 return ret;
2003 }
2004
imx258_remove(struct i2c_client * client)2005 static int imx258_remove(struct i2c_client *client)
2006 {
2007 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2008 struct imx258 *imx258 = to_imx258(sd);
2009
2010 v4l2_async_unregister_subdev(sd);
2011 #if defined(CONFIG_MEDIA_CONTROLLER)
2012 media_entity_cleanup(&sd->entity);
2013 #endif
2014 v4l2_ctrl_handler_free(&imx258->ctrl_handler);
2015 mutex_destroy(&imx258->mutex);
2016
2017 pm_runtime_disable(&client->dev);
2018 if (!pm_runtime_status_suspended(&client->dev))
2019 __imx258_power_off(imx258);
2020 pm_runtime_set_suspended(&client->dev);
2021
2022 return 0;
2023 }
2024
2025 #if IS_ENABLED(CONFIG_OF)
2026 static const struct of_device_id imx258_of_match[] = {
2027 { .compatible = "sony,imx258" },
2028 {},
2029 };
2030 MODULE_DEVICE_TABLE(of, imx258_of_match);
2031 #endif
2032
2033 static const struct i2c_device_id imx258_match_id[] = {
2034 { "sony,imx258", 0 },
2035 { },
2036 };
2037
2038 static struct i2c_driver imx258_i2c_driver = {
2039 .driver = {
2040 .name = IMX258_NAME,
2041 .pm = &imx258_pm_ops,
2042 .of_match_table = of_match_ptr(imx258_of_match),
2043 },
2044 .probe = &imx258_probe,
2045 .remove = &imx258_remove,
2046 .id_table = imx258_match_id,
2047 };
2048
sensor_mod_init(void)2049 static int __init sensor_mod_init(void)
2050 {
2051 return i2c_add_driver(&imx258_i2c_driver);
2052 }
2053
sensor_mod_exit(void)2054 static void __exit sensor_mod_exit(void)
2055 {
2056 i2c_del_driver(&imx258_i2c_driver);
2057 }
2058
2059 device_initcall_sync(sensor_mod_init);
2060 module_exit(sensor_mod_exit);
2061
2062 MODULE_DESCRIPTION("Sony imx258 sensor driver");
2063 MODULE_LICENSE("GPL v2");
2064