1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * imx214 camera driver
4 *
5 * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X00 first version.
8 * V0.0X01.0X01 fix compile errors.
9 * V0.0X01.0X02 add 4lane mode support.
10 *
11 */
12
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/sysfs.h>
22 #include <linux/slab.h>
23 #include <linux/version.h>
24 #include <linux/rk-camera-module.h>
25 #include <media/media-entity.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-subdev.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-mediabus.h>
31 #include <linux/pinctrl/consumer.h>
32 #include <linux/rk-preisp.h>
33 #include <linux/of_graph.h>
34 #include "imx214_eeprom_head.h"
35
36 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x02)
37
38 #ifndef V4L2_CID_DIGITAL_GAIN
39 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
40 #endif
41
42 #define IMX214_LINK_FREQ_600MHZ 600000000U
43 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
44 #define IMX214_PIXEL_RATE (IMX214_LINK_FREQ_600MHZ * 2LL * 4LL / 10LL)
45 #define IMX214_XVCLK_FREQ 24000000
46
47 #define CHIP_ID 0x0214
48 #define IMX214_REG_CHIP_ID 0x0016
49
50 #define IMX214_REG_CTRL_MODE 0x0100
51 #define IMX214_MODE_SW_STANDBY 0x0
52 #define IMX214_MODE_STREAMING BIT(0)
53
54 #define IMX214_REG_EXPOSURE 0x0202
55 #define IMX214_EXPOSURE_MIN 4
56 #define IMX214_EXPOSURE_STEP 1
57 #define IMX214_VTS_MAX 0xffff
58
59 #define IMX214_REG_GAIN_H 0x0204
60 #define IMX214_REG_GAIN_L 0x0205
61 #define IMX214_GAIN_MIN 0x200
62 #define IMX214_GAIN_MAX 0x1fff
63 #define IMX214_GAIN_STEP 0x200
64 #define IMX214_GAIN_DEFAULT 0x800
65
66 #define IMX214_REG_TEST_PATTERN 0x5e00
67 #define IMX214_TEST_PATTERN_ENABLE 0x80
68 #define IMX214_TEST_PATTERN_DISABLE 0x0
69
70 #define IMX214_REG_VTS 0x0340
71
72 #define REG_NULL 0xFFFF
73
74 #define IMX214_REG_VALUE_08BIT 1
75 #define IMX214_REG_VALUE_16BIT 2
76 #define IMX214_REG_VALUE_24BIT 3
77
78 #define IMX214_BITS_PER_SAMPLE 10
79
80 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
81 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
82
83 #define IMX214_NAME "imx214"
84 #define IMX214_MEDIA_BUS_FMT MEDIA_BUS_FMT_SBGGR10_1X10
85
86 /* OTP MACRO */
87 #define MODULE_BKX 0X01
88 #define MODULE_TYPE MODULE_BKX
89 #if MODULE_TYPE == MODULE_BKX
90 #define RG_Ratio_Typical_Default (0x026e)
91 #define BG_Ratio_Typical_Default (0x0280)
92 #else
93 #define RG_Ratio_Typical_Default (0x16f)
94 #define BG_Ratio_Typical_Default (0x16f)
95 #endif
96
97 static const char * const imx214_supply_names[] = {
98 "avdd", /* Analog power */
99 "dovdd", /* Digital I/O power */
100 "dvdd", /* Digital core power */
101 };
102
103 #define IMX214_NUM_SUPPLIES ARRAY_SIZE(imx214_supply_names)
104
105 struct regval {
106 u16 addr;
107 u8 val;
108 };
109
110 struct imx214_mode {
111 u32 width;
112 u32 height;
113 struct v4l2_fract max_fps;
114 u32 hts_def;
115 u32 vts_def;
116 u32 exp_def;
117 u32 link_freq_idx;
118 u32 bpp;
119 const struct regval *reg_list;
120 };
121
122 struct imx214 {
123 struct i2c_client *client;
124 struct clk *xvclk;
125 struct gpio_desc *power_gpio;
126 struct gpio_desc *reset_gpio;
127 struct gpio_desc *pwdn_gpio;
128 struct regulator_bulk_data supplies[IMX214_NUM_SUPPLIES];
129
130 struct pinctrl *pinctrl;
131 struct pinctrl_state *pins_default;
132 struct pinctrl_state *pins_sleep;
133
134 struct v4l2_subdev subdev;
135 struct media_pad pad;
136 struct v4l2_ctrl_handler ctrl_handler;
137 struct v4l2_ctrl *exposure;
138 struct v4l2_ctrl *anal_gain;
139 struct v4l2_ctrl *digi_gain;
140 struct v4l2_ctrl *hblank;
141 struct v4l2_ctrl *vblank;
142 struct v4l2_ctrl *pixel_rate;
143 struct v4l2_ctrl *link_freq;
144 struct v4l2_ctrl *test_pattern;
145 struct mutex mutex;
146 struct v4l2_fwnode_endpoint bus_cfg;
147 bool streaming;
148 bool power_on;
149 const struct imx214_mode *support_modes;
150 const struct imx214_mode *cur_mode;
151 u32 module_index;
152 u32 cfg_num;
153 const char *module_facing;
154 const char *module_name;
155 const char *len_name;
156 struct imx214_otp_info *otp;
157 struct rkmodule_inf module_inf;
158 struct rkmodule_awb_cfg awb_cfg;
159 struct rkmodule_lsc_cfg lsc_cfg;
160 };
161
162 #define to_imx214(sd) container_of(sd, struct imx214, subdev)
163
164 struct imx214_id_name {
165 u32 id;
166 char name[RKMODULE_NAME_LEN];
167 };
168
169 static const struct imx214_id_name imx214_module_info[] = {
170 {0x36, "GuangDongLiteArray"},
171 {0x0d, "CameraKing"},
172 {0x00, "Unknown"}
173 };
174
175 static const struct imx214_id_name imx214_lens_info[] = {
176 {0x47, "Sunny 3923C"},
177 {0x07, "Largen 9611A6"},
178 {0x00, "Unknown"}
179 };
180 /*
181 * Xclk 24Mhz
182 */
183 static const struct regval imx214_global_regs[] = {
184 {0x0136, 0x18},
185 {0x0137, 0x00},
186 {0x0101, 0x00},
187 {0x0105, 0x01},
188 {0x0106, 0x01},
189 {0x4550, 0x02},
190 {0x4601, 0x04},
191 {0x4642, 0x01},
192 {0x6227, 0x11},
193 {0x6276, 0x00},
194 {0x900E, 0x06},
195 {0xA802, 0x90},
196 {0xA803, 0x11},
197 {0xA804, 0x62},
198 {0xA805, 0x77},
199 {0xA806, 0xAE},
200 {0xA807, 0x34},
201 {0xA808, 0xAE},
202 {0xA809, 0x35},
203 {0xA80A, 0x62},
204 {0xA80B, 0x83},
205 {0xAE33, 0x00},
206 {0x4174, 0x00},
207 {0x4175, 0x11},
208 {0x4612, 0x29},
209 {0x461B, 0x2C},
210 {0x461F, 0x06},
211 {0x4635, 0x07},
212 {0x4637, 0x30},
213 {0x463F, 0x18},
214 {0x4641, 0x0D},
215 {0x465B, 0x2C},
216 {0x465F, 0x2B},
217 {0x4663, 0x2B},
218 {0x4667, 0x24},
219 {0x466F, 0x24},
220 {0x470E, 0x09},
221 {0x4909, 0xAB},
222 {0x490B, 0x95},
223 {0x4915, 0x5D},
224 {0x4A5F, 0xFF},
225 {0x4A61, 0xFF},
226 {0x4A73, 0x62},
227 {0x4A85, 0x00},
228 {0x4A87, 0xFF},
229 {0x583C, 0x04},
230 {0x620E, 0x04},
231 {0x6EB2, 0x01},
232 {0x6EB3, 0x00},
233 {0x9300, 0x02},
234 {REG_NULL, 0x00},
235 };
236
237 static const struct regval imx214_2104x1560_30fps_regs_2lane[] = {
238 {0x0114, 0x01},
239 {0x0220, 0x00},
240 {0x0221, 0x11},
241 {0x0222, 0x01},
242 {0x0340, 0x06},
243 {0x0341, 0x40},
244 {0x0342, 0x13},
245 {0x0343, 0x90},
246 {0x0344, 0x00},
247 {0x0345, 0x00},
248 {0x0346, 0x00},
249 {0x0347, 0x00},
250 {0x0348, 0x10},
251 {0x0349, 0x6F},
252 {0x034A, 0x0C},
253 {0x034B, 0x2F},
254 {0x0381, 0x01},
255 {0x0383, 0x01},
256 {0x0385, 0x01},
257 {0x0387, 0x01},
258 {0x0900, 0x01},
259 {0x0901, 0x22},
260 {0x0902, 0x02},
261 {0x3000, 0x35},
262 {0x3054, 0x01},
263 {0x305C, 0x11},
264 {0x0112, 0x0A},
265 {0x0113, 0x0A},
266 {0x034C, 0x08},
267 {0x034D, 0x38},
268 {0x034E, 0x06},
269 {0x034F, 0x18},
270 {0x0401, 0x00},
271 {0x0404, 0x00},
272 {0x0405, 0x10},
273 {0x0408, 0x00},
274 {0x0409, 0x00},
275 {0x040A, 0x00},
276 {0x040B, 0x00},
277 {0x040C, 0x08},
278 {0x040D, 0x38},
279 {0x040E, 0x06},
280 {0x040F, 0x18},
281 {0x0301, 0x05},
282 {0x0303, 0x04},
283 {0x0305, 0x03},
284 {0x0306, 0x00},
285 {0x0307, 0x96},
286 {0x0309, 0x0A},
287 {0x030B, 0x01},
288 {0x0310, 0x00},
289 {0x0820, 0x09},
290 {0x0821, 0x60},
291 {0x0822, 0x00},
292 {0x0823, 0x00},
293 {0x3A03, 0x06},
294 {0x3A04, 0x68},
295 {0x3A05, 0x01},
296 {0x0B06, 0x01},
297 {0x30A2, 0x00},
298 {0x30B4, 0x00},
299 {0x3A02, 0xFF},
300 {0x3011, 0x00},
301 {0x3013, 0x01},
302 {0x4170, 0x00},
303 {0x4171, 0x10},
304 {0x4176, 0x00},
305 {0x4177, 0x3C},
306 {0xAE20, 0x04},
307 {0xAE21, 0x5C},
308 {0x0100, 0x00},
309 {REG_NULL, 0x00},
310 };
311
312 static const struct regval imx214_4208x3120_15fps_regs_2lane[] = {
313 {0x0114, 0x01},
314 {0x0220, 0x00},
315 {0x0221, 0x11},
316 {0x0222, 0x01},
317 {0x0340, 0x0C},
318 {0x0341, 0x58},
319 {0x0342, 0x13},
320 {0x0343, 0x90},
321 {0x0344, 0x00},
322 {0x0345, 0x00},
323 {0x0346, 0x00},
324 {0x0347, 0x00},
325 {0x0348, 0x10},
326 {0x0349, 0x6F},
327 {0x034A, 0x0C},
328 {0x034B, 0x2F},
329 {0x0381, 0x01},
330 {0x0383, 0x01},
331 {0x0385, 0x01},
332 {0x0387, 0x01},
333 {0x0900, 0x00},
334 {0x0901, 0x00},
335 {0x0902, 0x00},
336 {0x3000, 0x35},
337 {0x3054, 0x01},
338 {0x305C, 0x11},
339 {0x0112, 0x0A},
340 {0x0113, 0x0A},
341 {0x034C, 0x10},
342 {0x034D, 0x70},
343 {0x034E, 0x0C},
344 {0x034F, 0x30},
345 {0x0401, 0x00},
346 {0x0404, 0x00},
347 {0x0405, 0x10},
348 {0x0408, 0x00},
349 {0x0409, 0x00},
350 {0x040A, 0x00},
351 {0x040B, 0x00},
352 {0x040C, 0x10},
353 {0x040D, 0x70},
354 {0x040E, 0x0C},
355 {0x040F, 0x30},
356 {0x0301, 0x05},
357 {0x0303, 0x04},
358 {0x0305, 0x03},
359 {0x0306, 0x00},
360 {0x0307, 0x96},
361 {0x0309, 0x0A},
362 {0x030B, 0x01},
363 {0x0310, 0x00},
364 {0x0820, 0x09},
365 {0x0821, 0x60},
366 {0x0822, 0x00},
367 {0x0823, 0x00},
368 {0x3A03, 0x08},
369 {0x3A04, 0x70},
370 {0x3A05, 0x02},
371 {0x0B06, 0x01},
372 {0x30A2, 0x00},
373 {0x30B4, 0x00},
374 {0x3A02, 0xFF},
375 {0x3011, 0x00},
376 {0x3013, 0x01},
377 {0x4170, 0x00},
378 {0x4171, 0x10},
379 {0x4176, 0x00},
380 {0x4177, 0x3C},
381 {0xAE20, 0x04},
382 {0xAE21, 0x5C},
383 {0x0100, 0x00},
384 {REG_NULL, 0x00},
385 };
386
387 static const struct regval imx214_2104x1560_30fps_regs_4lane[] = {
388 {0x0114, 0x03},
389 {0x0220, 0x00},
390 {0x0221, 0x11},
391 {0x0222, 0x01},
392 {0x0340, 0x08},
393 {0x0341, 0x3E},
394 {0x0342, 0x13},
395 {0x0343, 0x90},
396 {0x0344, 0x00},
397 {0x0345, 0x00},
398 {0x0346, 0x00},
399 {0x0347, 0x00},
400 {0x0348, 0x10},
401 {0x0349, 0x6F},
402 {0x034A, 0x0C},
403 {0x034B, 0x2F},
404 {0x0381, 0x01},
405 {0x0383, 0x01},
406 {0x0385, 0x01},
407 {0x0387, 0x01},
408 {0x0900, 0x01},
409 {0x0901, 0x22},
410 {0x0902, 0x02},
411 {0x3000, 0x35},
412 {0x3054, 0x01},
413 {0x305C, 0x11},
414 {0x0112, 0x0A},
415 {0x0113, 0x0A},
416 {0x034C, 0x08},
417 {0x034D, 0x38},
418 {0x034E, 0x06},
419 {0x034F, 0x18},
420 {0x0401, 0x00},
421 {0x0404, 0x00},
422 {0x0405, 0x10},
423 {0x0408, 0x00},
424 {0x0409, 0x00},
425 {0x040A, 0x00},
426 {0x040B, 0x00},
427 {0x040C, 0x08},
428 {0x040D, 0x38},
429 {0x040E, 0x06},
430 {0x040F, 0x18},
431 {0x0301, 0x05},
432 {0x0303, 0x02},
433 {0x0305, 0x03},
434 {0x0306, 0x00},
435 {0x0307, 0x64},
436 {0x0309, 0x0A},
437 {0x030B, 0x01},
438 {0x0310, 0x00},
439 {0x0820, 0x0C},
440 {0x0821, 0x80},
441 {0x0822, 0x00},
442 {0x0823, 0x00},
443 {0x3A03, 0x06},
444 {0x3A04, 0x68},
445 {0x3A05, 0x01},
446 {0x0B06, 0x01},
447 {0x30A2, 0x00},
448 {0x30B4, 0x00},
449 {0x3A02, 0xFF},
450 {0x3011, 0x00},
451 {0x3013, 0x00},
452 {0x0202, 0x08},
453 {0x0203, 0x34},
454 {0x0224, 0x01},
455 {0x0225, 0xF4},
456 {0x0204, 0x00},
457 {0x0205, 0x00},
458 {0x020E, 0x01},
459 {0x020F, 0x00},
460 {0x0210, 0x01},
461 {0x0211, 0x00},
462 {0x0212, 0x01},
463 {0x0213, 0x00},
464 {0x0214, 0x01},
465 {0x0215, 0x00},
466 {0x0216, 0x00},
467 {0x0217, 0x00},
468 {0x4170, 0x00},
469 {0x4171, 0x10},
470 {0x4176, 0x00},
471 {0x4177, 0x3C},
472 {0xAE20, 0x04},
473 {0xAE21, 0x5C},
474 {0x0138, 0x01},
475 {0x0100, 0x00},
476 {REG_NULL, 0x00},
477 };
478
479 static const struct regval imx214_4208x3120_30fps_regs_4lane[] = {
480 {0x0114, 0x03},
481 {0x0220, 0x00},
482 {0x0221, 0x11},
483 {0x0222, 0x01},
484 {0x0340, 0x0C},
485 {0x0341, 0x58},
486 {0x0342, 0x13},
487 {0x0343, 0x90},
488 {0x0344, 0x00},
489 {0x0345, 0x00},
490 {0x0346, 0x00},
491 {0x0347, 0x00},
492 {0x0348, 0x10},
493 {0x0349, 0x6F},
494 {0x034A, 0x0C},
495 {0x034B, 0x2F},
496 {0x0381, 0x01},
497 {0x0383, 0x01},
498 {0x0385, 0x01},
499 {0x0387, 0x01},
500 {0x0900, 0x00},
501 {0x0901, 0x00},
502 {0x0902, 0x00},
503 {0x3000, 0x35},
504 {0x3054, 0x01},
505 {0x305C, 0x11},
506 {0x0112, 0x0A},
507 {0x0113, 0x0A},
508 {0x034C, 0x10},
509 {0x034D, 0x70},
510 {0x034E, 0x0C},
511 {0x034F, 0x30},
512 {0x0401, 0x00},
513 {0x0404, 0x00},
514 {0x0405, 0x10},
515 {0x0408, 0x00},
516 {0x0409, 0x00},
517 {0x040A, 0x00},
518 {0x040B, 0x00},
519 {0x040C, 0x10},
520 {0x040D, 0x70},
521 {0x040E, 0x0C},
522 {0x040F, 0x30},
523 {0x0301, 0x05},
524 {0x0303, 0x02},
525 {0x0305, 0x03},
526 {0x0306, 0x00},
527 {0x0307, 0x96},
528 {0x0309, 0x0A},
529 {0x030B, 0x01},
530 {0x0310, 0x00},
531 {0x0820, 0x12},
532 {0x0821, 0xC0},
533 {0x0822, 0x00},
534 {0x0823, 0x00},
535 {0x3A03, 0x09},
536 {0x3A04, 0x20},
537 {0x3A05, 0x01},
538 {0x0B06, 0x01},
539 {0x30A2, 0x00},
540 {0x30B4, 0x00},
541 {0x3A02, 0xFF},
542 {0x3011, 0x00},
543 {0x3013, 0x01},
544 {0x0202, 0x0C},
545 {0x0203, 0x4E},
546 {0x0224, 0x01},
547 {0x0225, 0xF4},
548 {0x0204, 0x00},
549 {0x0205, 0x00},
550 {0x020E, 0x01},
551 {0x020F, 0x00},
552 {0x0210, 0x01},
553 {0x0211, 0x00},
554 {0x0212, 0x01},
555 {0x0213, 0x00},
556 {0x0214, 0x01},
557 {0x0215, 0x00},
558 {0x0216, 0x00},
559 {0x0217, 0x00},
560 {0x4170, 0x00},
561 {0x4171, 0x10},
562 {0x4176, 0x00},
563 {0x4177, 0x3C},
564 {0xAE20, 0x04},
565 {0xAE21, 0x5C},
566 {0x0100, 0x00},
567 {REG_NULL, 0x00},
568 };
569
570 static const struct imx214_mode supported_modes_2lane[] = {
571 {
572 .width = 4208,
573 .height = 3120,
574 .max_fps = {
575 .numerator = 10000,
576 .denominator = 150000,
577 },
578 .exp_def = 0x0c70,
579 .hts_def = 0x1390,
580 .vts_def = 0x0c7a,
581 .bpp = 10,
582 .reg_list = imx214_4208x3120_15fps_regs_2lane,
583 .link_freq_idx = 0,
584 },
585 {
586 .width = 2104,
587 .height = 1560,
588 .max_fps = {
589 .numerator = 10000,
590 .denominator = 300000,
591 },
592 .exp_def = 0x0630,
593 .hts_def = 0x1390,
594 .vts_def = 0x0640,
595 .bpp = 10,
596 .reg_list = imx214_2104x1560_30fps_regs_2lane,
597 .link_freq_idx = 0,
598 },
599 };
600
601 static const struct imx214_mode supported_modes_4lane[] = {
602 {
603 .width = 4208,
604 .height = 3120,
605 .max_fps = {
606 .numerator = 10000,
607 .denominator = 300000,
608 },
609 .exp_def = 0x0c50,
610 .hts_def = 0x1390,
611 .vts_def = 0x0c58,
612 .bpp = 10,
613 .reg_list = imx214_4208x3120_30fps_regs_4lane,
614 .link_freq_idx = 0,
615 },
616 {
617 .width = 2104,
618 .height = 1560,
619 .max_fps = {
620 .numerator = 10000,
621 .denominator = 300000,
622 },
623 .exp_def = 0x083a,
624 .hts_def = 0x1390,
625 .vts_def = 0x083E,
626 .bpp = 10,
627 .reg_list = imx214_2104x1560_30fps_regs_4lane,
628 .link_freq_idx = 0,
629 },
630 };
631
632 static const s64 link_freq_items[] = {
633 IMX214_LINK_FREQ_600MHZ,
634 };
635
636 static const char * const imx214_test_pattern_menu[] = {
637 "Disabled",
638 "Vertical Color Bar Type 1",
639 "Vertical Color Bar Type 2",
640 "Vertical Color Bar Type 3",
641 "Vertical Color Bar Type 4"
642 };
643
644 /* Write registers up to 4 at a time */
imx214_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)645 static int imx214_write_reg(struct i2c_client *client, u16 reg,
646 u32 len, u32 val)
647 {
648 u32 buf_i, val_i;
649 u8 buf[6];
650 u8 *val_p;
651 __be32 val_be;
652
653 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
654
655 if (len > 4)
656 return -EINVAL;
657
658 buf[0] = reg >> 8;
659 buf[1] = reg & 0xff;
660
661 val_be = cpu_to_be32(val);
662 val_p = (u8 *)&val_be;
663 buf_i = 2;
664 val_i = 4 - len;
665
666 while (val_i < 4)
667 buf[buf_i++] = val_p[val_i++];
668
669 if (i2c_master_send(client, buf, len + 2) != len + 2)
670 return -EIO;
671
672 return 0;
673 }
674
imx214_write_array(struct i2c_client * client,const struct regval * regs)675 static int imx214_write_array(struct i2c_client *client,
676 const struct regval *regs)
677 {
678 u32 i;
679 int ret = 0;
680
681 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
682 ret = imx214_write_reg(client, regs[i].addr,
683 IMX214_REG_VALUE_08BIT,
684 regs[i].val);
685
686 return ret;
687 }
688
689 /* Read registers up to 4 at a time */
imx214_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)690 static int imx214_read_reg(struct i2c_client *client, u16 reg,
691 unsigned int len, u32 *val)
692 {
693 struct i2c_msg msgs[2];
694 u8 *data_be_p;
695 __be32 data_be = 0;
696 __be16 reg_addr_be = cpu_to_be16(reg);
697 int ret;
698
699 if (len > 4 || !len)
700 return -EINVAL;
701
702 data_be_p = (u8 *)&data_be;
703 /* Write register address */
704 msgs[0].addr = client->addr;
705 msgs[0].flags = 0;
706 msgs[0].len = 2;
707 msgs[0].buf = (u8 *)®_addr_be;
708
709 /* Read data from register */
710 msgs[1].addr = client->addr;
711 msgs[1].flags = I2C_M_RD;
712 msgs[1].len = len;
713 msgs[1].buf = &data_be_p[4 - len];
714
715 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
716 if (ret != ARRAY_SIZE(msgs))
717 return -EIO;
718
719 *val = be32_to_cpu(data_be);
720
721 return 0;
722 }
723
imx214_get_reso_dist(const struct imx214_mode * mode,struct v4l2_mbus_framefmt * framefmt)724 static int imx214_get_reso_dist(const struct imx214_mode *mode,
725 struct v4l2_mbus_framefmt *framefmt)
726 {
727 return abs(mode->width - framefmt->width) +
728 abs(mode->height - framefmt->height);
729 }
730
731 static const struct imx214_mode *
imx214_find_best_fit(struct imx214 * imx214,struct v4l2_subdev_format * fmt)732 imx214_find_best_fit(struct imx214 *imx214, struct v4l2_subdev_format *fmt)
733 {
734 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
735 int dist;
736 int cur_best_fit = 0;
737 int cur_best_fit_dist = -1;
738 unsigned int i;
739
740 for (i = 0; i < imx214->cfg_num; i++) {
741 dist = imx214_get_reso_dist(&imx214->support_modes[i], framefmt);
742 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
743 cur_best_fit_dist = dist;
744 cur_best_fit = i;
745 }
746 }
747
748 return &imx214->support_modes[cur_best_fit];
749 }
750
imx214_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)751 static int imx214_set_fmt(struct v4l2_subdev *sd,
752 struct v4l2_subdev_pad_config *cfg,
753 struct v4l2_subdev_format *fmt)
754 {
755 struct imx214 *imx214 = to_imx214(sd);
756 const struct imx214_mode *mode;
757 s64 h_blank, vblank_def;
758 u64 pixel_rate = 0;
759 u32 lane_num = imx214->bus_cfg.bus.mipi_csi2.num_data_lanes;
760
761 mutex_lock(&imx214->mutex);
762
763 mode = imx214_find_best_fit(imx214, fmt);
764 fmt->format.code = IMX214_MEDIA_BUS_FMT;
765 fmt->format.width = mode->width;
766 fmt->format.height = mode->height;
767 fmt->format.field = V4L2_FIELD_NONE;
768 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
769 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
770 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
771 #else
772 mutex_unlock(&imx214->mutex);
773 return -ENOTTY;
774 #endif
775 } else {
776 imx214->cur_mode = mode;
777 h_blank = mode->hts_def - mode->width;
778 __v4l2_ctrl_modify_range(imx214->hblank, h_blank,
779 h_blank, 1, h_blank);
780 vblank_def = mode->vts_def - mode->height;
781 __v4l2_ctrl_modify_range(imx214->vblank, vblank_def,
782 IMX214_VTS_MAX - mode->height,
783 1, vblank_def);
784 pixel_rate = (u32)link_freq_items[mode->link_freq_idx] / mode->bpp * 2 * lane_num;
785
786 __v4l2_ctrl_s_ctrl_int64(imx214->pixel_rate,
787 pixel_rate);
788 __v4l2_ctrl_s_ctrl(imx214->link_freq,
789 mode->link_freq_idx);
790 }
791
792 mutex_unlock(&imx214->mutex);
793
794 return 0;
795 }
796
imx214_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)797 static int imx214_get_fmt(struct v4l2_subdev *sd,
798 struct v4l2_subdev_pad_config *cfg,
799 struct v4l2_subdev_format *fmt)
800 {
801 struct imx214 *imx214 = to_imx214(sd);
802 const struct imx214_mode *mode = imx214->cur_mode;
803
804 mutex_lock(&imx214->mutex);
805 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
806 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
807 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
808 #else
809 mutex_unlock(&imx214->mutex);
810 return -ENOTTY;
811 #endif
812 } else {
813 fmt->format.width = mode->width;
814 fmt->format.height = mode->height;
815 fmt->format.code = IMX214_MEDIA_BUS_FMT;
816 fmt->format.field = V4L2_FIELD_NONE;
817 }
818 mutex_unlock(&imx214->mutex);
819
820 return 0;
821 }
822
imx214_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)823 static int imx214_enum_mbus_code(struct v4l2_subdev *sd,
824 struct v4l2_subdev_pad_config *cfg,
825 struct v4l2_subdev_mbus_code_enum *code)
826 {
827 if (code->index != 0)
828 return -EINVAL;
829 code->code = IMX214_MEDIA_BUS_FMT;
830
831 return 0;
832 }
833
imx214_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)834 static int imx214_enum_frame_sizes(struct v4l2_subdev *sd,
835 struct v4l2_subdev_pad_config *cfg,
836 struct v4l2_subdev_frame_size_enum *fse)
837 {
838 struct imx214 *imx214 = to_imx214(sd);
839
840 if (fse->index >= imx214->cfg_num)
841 return -EINVAL;
842
843 if (fse->code != IMX214_MEDIA_BUS_FMT)
844 return -EINVAL;
845
846 fse->min_width = imx214->support_modes[fse->index].width;
847 fse->max_width = imx214->support_modes[fse->index].width;
848 fse->max_height = imx214->support_modes[fse->index].height;
849 fse->min_height = imx214->support_modes[fse->index].height;
850
851 return 0;
852 }
853
imx214_enable_test_pattern(struct imx214 * imx214,u32 pattern)854 static int imx214_enable_test_pattern(struct imx214 *imx214, u32 pattern)
855 {
856 u32 val;
857
858 if (pattern)
859 val = (pattern - 1) | IMX214_TEST_PATTERN_ENABLE;
860 else
861 val = IMX214_TEST_PATTERN_DISABLE;
862
863 return imx214_write_reg(imx214->client,
864 IMX214_REG_TEST_PATTERN,
865 IMX214_REG_VALUE_08BIT,
866 val);
867 }
868
imx214_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)869 static int imx214_g_frame_interval(struct v4l2_subdev *sd,
870 struct v4l2_subdev_frame_interval *fi)
871 {
872 struct imx214 *imx214 = to_imx214(sd);
873 const struct imx214_mode *mode = imx214->cur_mode;
874
875 fi->interval = mode->max_fps;
876
877 return 0;
878 }
879
imx214_get_otp(struct imx214_otp_info * otp,struct rkmodule_inf * inf)880 static void imx214_get_otp(struct imx214_otp_info *otp,
881 struct rkmodule_inf *inf)
882 {
883 u32 i;
884
885 /* fac */
886 if (otp->flag & 0x80) {
887 inf->fac.flag = 1;
888 inf->fac.year = otp->year;
889 inf->fac.month = otp->month;
890 inf->fac.day = otp->day;
891 for (i = 0; i < ARRAY_SIZE(imx214_module_info) - 1; i++) {
892 if (imx214_module_info[i].id == otp->module_id)
893 break;
894 }
895 strscpy(inf->fac.module, imx214_module_info[i].name,
896 sizeof(inf->fac.module));
897
898 for (i = 0; i < ARRAY_SIZE(imx214_lens_info) - 1; i++) {
899 if (imx214_lens_info[i].id == otp->lens_id)
900 break;
901 }
902 strscpy(inf->fac.lens, imx214_lens_info[i].name,
903 sizeof(inf->fac.lens));
904 }
905 /* awb */
906 if (otp->flag & 0x40) {
907 inf->awb.flag = 1;
908 inf->awb.r_value = otp->rg_ratio;
909 inf->awb.b_value = otp->bg_ratio;
910 inf->awb.gr_value = 0x400;
911 inf->awb.gb_value = 0x400;
912
913 inf->awb.golden_r_value = 0;
914 inf->awb.golden_b_value = 0;
915 inf->awb.golden_gr_value = 0;
916 inf->awb.golden_gb_value = 0;
917 }
918 /* af */
919 if (otp->flag & 0x20) {
920 inf->af.flag = 1;
921 inf->af.af_otp[0].vcm_start = otp->vcm_start;
922 inf->af.af_otp[0].vcm_end = otp->vcm_end;
923 inf->af.af_otp[0].vcm_dir = otp->vcm_dir;
924 }
925 /* lsc */
926 if (otp->flag & 0x10) {
927 inf->lsc.flag = 1;
928 inf->lsc.decimal_bits = 0;
929 inf->lsc.lsc_w = 9;
930 inf->lsc.lsc_h = 14;
931
932 for (i = 0; i < 126; i++) {
933 inf->lsc.lsc_r[i] = otp->lenc[i];
934 inf->lsc.lsc_gr[i] = otp->lenc[i + 126];
935 inf->lsc.lsc_gb[i] = otp->lenc[i + 252];
936 inf->lsc.lsc_b[i] = otp->lenc[i + 378];
937 }
938 }
939 }
940
imx214_get_module_inf(struct imx214 * imx214,struct rkmodule_inf * inf)941 static void imx214_get_module_inf(struct imx214 *imx214,
942 struct rkmodule_inf *inf)
943 {
944 struct imx214_otp_info *otp = imx214->otp;
945
946 memset(inf, 0, sizeof(*inf));
947 strscpy(inf->base.sensor, IMX214_NAME, sizeof(inf->base.sensor));
948 strscpy(inf->base.module, imx214->module_name,
949 sizeof(inf->base.module));
950 strscpy(inf->base.lens, imx214->len_name, sizeof(inf->base.lens));
951 if (otp)
952 imx214_get_otp(otp, inf);
953 }
954
imx214_set_awb_cfg(struct imx214 * imx214,struct rkmodule_awb_cfg * cfg)955 static void imx214_set_awb_cfg(struct imx214 *imx214,
956 struct rkmodule_awb_cfg *cfg)
957 {
958 mutex_lock(&imx214->mutex);
959 memcpy(&imx214->awb_cfg, cfg, sizeof(*cfg));
960 mutex_unlock(&imx214->mutex);
961 }
962
imx214_set_lsc_cfg(struct imx214 * imx214,struct rkmodule_lsc_cfg * cfg)963 static void imx214_set_lsc_cfg(struct imx214 *imx214,
964 struct rkmodule_lsc_cfg *cfg)
965 {
966 mutex_lock(&imx214->mutex);
967 memcpy(&imx214->lsc_cfg, cfg, sizeof(*cfg));
968 mutex_unlock(&imx214->mutex);
969 }
970
imx214_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)971 static long imx214_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
972 {
973 struct imx214 *imx214 = to_imx214(sd);
974 long ret = 0;
975 u32 stream = 0;
976
977 switch (cmd) {
978 case RKMODULE_GET_MODULE_INFO:
979 imx214_get_module_inf(imx214, (struct rkmodule_inf *)arg);
980 break;
981 case RKMODULE_AWB_CFG:
982 imx214_set_awb_cfg(imx214, (struct rkmodule_awb_cfg *)arg);
983 break;
984 case RKMODULE_LSC_CFG:
985 imx214_set_lsc_cfg(imx214, (struct rkmodule_lsc_cfg *)arg);
986 break;
987 case RKMODULE_SET_QUICK_STREAM:
988
989 stream = *((u32 *)arg);
990
991 if (stream)
992 ret = imx214_write_reg(imx214->client,
993 IMX214_REG_CTRL_MODE,
994 IMX214_REG_VALUE_08BIT,
995 IMX214_MODE_STREAMING);
996 else
997 ret = imx214_write_reg(imx214->client,
998 IMX214_REG_CTRL_MODE,
999 IMX214_REG_VALUE_08BIT,
1000 IMX214_MODE_SW_STANDBY);
1001 break;
1002 default:
1003 ret = -ENOIOCTLCMD;
1004 break;
1005 }
1006
1007 return ret;
1008 }
1009
1010 #ifdef CONFIG_COMPAT
imx214_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1011 static long imx214_compat_ioctl32(struct v4l2_subdev *sd,
1012 unsigned int cmd, unsigned long arg)
1013 {
1014 void __user *up = compat_ptr(arg);
1015 struct rkmodule_inf *inf;
1016 struct rkmodule_awb_cfg *cfg;
1017 struct rkmodule_lsc_cfg *lsc_cfg;
1018 long ret = 0;
1019 u32 stream = 0;
1020
1021 switch (cmd) {
1022 case RKMODULE_GET_MODULE_INFO:
1023 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1024 if (!inf) {
1025 ret = -ENOMEM;
1026 return ret;
1027 }
1028
1029 ret = imx214_ioctl(sd, cmd, inf);
1030 if (!ret) {
1031 ret = copy_to_user(up, inf, sizeof(*inf));
1032 if (ret)
1033 ret = -EFAULT;
1034 }
1035 kfree(inf);
1036 break;
1037 case RKMODULE_AWB_CFG:
1038 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
1039 if (!cfg) {
1040 ret = -ENOMEM;
1041 return ret;
1042 }
1043
1044 ret = copy_from_user(cfg, up, sizeof(*cfg));
1045 if (!ret)
1046 ret = imx214_ioctl(sd, cmd, cfg);
1047 else
1048 ret = -EFAULT;
1049 kfree(cfg);
1050 break;
1051 case RKMODULE_LSC_CFG:
1052 lsc_cfg = kzalloc(sizeof(*lsc_cfg), GFP_KERNEL);
1053 if (!lsc_cfg) {
1054 ret = -ENOMEM;
1055 return ret;
1056 }
1057
1058 ret = copy_from_user(lsc_cfg, up, sizeof(*lsc_cfg));
1059 if (!ret)
1060 ret = imx214_ioctl(sd, cmd, lsc_cfg);
1061 else
1062 ret = -EFAULT;
1063 kfree(lsc_cfg);
1064 break;
1065 case RKMODULE_SET_QUICK_STREAM:
1066 ret = copy_from_user(&stream, up, sizeof(u32));
1067 if (!ret)
1068 ret = imx214_ioctl(sd, cmd, &stream);
1069 else
1070 ret = -EFAULT;
1071 break;
1072 default:
1073 ret = -ENOIOCTLCMD;
1074 break;
1075 }
1076
1077 return ret;
1078 }
1079 #endif
1080
imx214_apply_otp(struct imx214 * imx214)1081 static int imx214_apply_otp(struct imx214 *imx214)
1082 {
1083 int R_gain, G_gain, B_gain, base_gain;
1084 struct i2c_client *client = imx214->client;
1085 struct imx214_otp_info *otp_ptr = imx214->otp;
1086 struct rkmodule_awb_cfg *awb_cfg = &imx214->awb_cfg;
1087 struct rkmodule_lsc_cfg *lsc_cfg = &imx214->lsc_cfg;
1088 u32 golden_bg_ratio = 0;
1089 u32 golden_rg_ratio = 0;
1090 u32 golden_g_value = 0;
1091 u32 bg_ratio;
1092 u32 rg_ratio;
1093 //u32 g_value;
1094 u32 i;
1095
1096 if (!otp_ptr)
1097 return 0;
1098 if (awb_cfg->enable) {
1099 golden_g_value = (awb_cfg->golden_gb_value +
1100 awb_cfg->golden_gr_value) / 2;
1101 if (golden_g_value != 0) {
1102 golden_rg_ratio = awb_cfg->golden_r_value * 0x400
1103 / golden_g_value;
1104 golden_bg_ratio = awb_cfg->golden_b_value * 0x400
1105 / golden_g_value;
1106 } else {
1107 golden_rg_ratio = RG_Ratio_Typical_Default;
1108 golden_bg_ratio = BG_Ratio_Typical_Default;
1109 }
1110 }
1111 /* apply OTP WB Calibration */
1112 if ((otp_ptr->flag & 0x40) && golden_bg_ratio && golden_rg_ratio) {
1113 rg_ratio = otp_ptr->rg_ratio;
1114 bg_ratio = otp_ptr->bg_ratio;
1115 dev_dbg(&client->dev, "rg:0x%x,bg:0x%x,gol rg:0x%x,bg:0x%x\n",
1116 rg_ratio, bg_ratio, golden_rg_ratio, golden_bg_ratio);
1117 /* calculate G gain */
1118 R_gain = golden_rg_ratio * 1000 / rg_ratio;
1119 B_gain = golden_bg_ratio * 1000 / bg_ratio;
1120 G_gain = 1000;
1121 if (R_gain < 1000 || B_gain < 1000) {
1122 if (R_gain < B_gain)
1123 base_gain = R_gain;
1124 else
1125 base_gain = B_gain;
1126 } else {
1127 base_gain = G_gain;
1128 }
1129 R_gain = 0x100 * R_gain / (base_gain);
1130 B_gain = 0x100 * B_gain / (base_gain);
1131 G_gain = 0x100 * G_gain / (base_gain);
1132 /* update sensor WB gain */
1133 if (R_gain > 0x100) {
1134 imx214_write_reg(client, 0x0210,
1135 IMX214_REG_VALUE_08BIT, R_gain >> 8);
1136 imx214_write_reg(client, 0x0211,
1137 IMX214_REG_VALUE_08BIT, R_gain & 0x00ff);
1138 }
1139 if (G_gain > 0x100) {
1140 imx214_write_reg(client, 0x020e,
1141 IMX214_REG_VALUE_08BIT, G_gain >> 8);
1142 imx214_write_reg(client, 0x020f,
1143 IMX214_REG_VALUE_08BIT, G_gain & 0x00ff);
1144 imx214_write_reg(client, 0x0214,
1145 IMX214_REG_VALUE_08BIT, G_gain >> 8);
1146 imx214_write_reg(client, 0x0215,
1147 IMX214_REG_VALUE_08BIT, G_gain & 0x00ff);
1148 }
1149 if (B_gain > 0x100) {
1150 imx214_write_reg(client, 0x0212,
1151 IMX214_REG_VALUE_08BIT, B_gain >> 8);
1152 imx214_write_reg(client, 0x0213,
1153 IMX214_REG_VALUE_08BIT, B_gain & 0x00ff);
1154 }
1155 dev_dbg(&client->dev, "apply awb gain: 0x%x, 0x%x, 0x%x\n",
1156 R_gain, G_gain, B_gain);
1157 }
1158
1159 /* apply OTP Lenc Calibration */
1160 if ((otp_ptr->flag & 0x10) && lsc_cfg->enable) {
1161 for (i = 0; i < 504; i++) {
1162 imx214_write_reg(client, 0xA300 + i,
1163 IMX214_REG_VALUE_08BIT, otp_ptr->lenc[i]);
1164 dev_dbg(&client->dev, "apply lenc[%d]: 0x%x\n",
1165 i, otp_ptr->lenc[i]);
1166 }
1167 usleep_range(1000, 2000);
1168 //choose lsc table 1
1169 imx214_write_reg(client, 0x3021,
1170 IMX214_REG_VALUE_08BIT, 0x01);
1171 //enable lsc
1172 imx214_write_reg(client, 0x0B00,
1173 IMX214_REG_VALUE_08BIT, 0x01);
1174 }
1175
1176 /* apply OTP SPC Calibration */
1177 if (otp_ptr->flag & 0x08) {
1178 for (i = 0; i < 63; i++) {
1179 imx214_write_reg(client, 0xD04C + i,
1180 IMX214_REG_VALUE_08BIT, otp_ptr->spc[i]);
1181 dev_dbg(&client->dev, "apply spc[%d]: 0x%x\n",
1182 i, otp_ptr->spc[i]);
1183 imx214_write_reg(client, 0xD08C + i,
1184 IMX214_REG_VALUE_08BIT, otp_ptr->spc[i + 63]);
1185 dev_dbg(&client->dev, "apply spc[%d]: 0x%x\n",
1186 i + 63, otp_ptr->spc[i + 63]);
1187 }
1188 //enable spc
1189 imx214_write_reg(client, 0x7BC8,
1190 IMX214_REG_VALUE_08BIT, 0x01);
1191 }
1192
1193 return 0;
1194 }
1195
__imx214_start_stream(struct imx214 * imx214)1196 static int __imx214_start_stream(struct imx214 *imx214)
1197 {
1198 int ret;
1199
1200 ret = imx214_write_array(imx214->client, imx214->cur_mode->reg_list);
1201 if (ret)
1202 return ret;
1203
1204 /* In case these controls are set before streaming */
1205 mutex_unlock(&imx214->mutex);
1206 ret = v4l2_ctrl_handler_setup(&imx214->ctrl_handler);
1207 mutex_lock(&imx214->mutex);
1208 if (ret)
1209 return ret;
1210
1211 ret = imx214_apply_otp(imx214);
1212 if (ret)
1213 return ret;
1214
1215 return imx214_write_reg(imx214->client,
1216 IMX214_REG_CTRL_MODE,
1217 IMX214_REG_VALUE_08BIT,
1218 IMX214_MODE_STREAMING);
1219 }
1220
__imx214_stop_stream(struct imx214 * imx214)1221 static int __imx214_stop_stream(struct imx214 *imx214)
1222 {
1223 return imx214_write_reg(imx214->client,
1224 IMX214_REG_CTRL_MODE,
1225 IMX214_REG_VALUE_08BIT,
1226 IMX214_MODE_SW_STANDBY);
1227 }
1228
imx214_s_stream(struct v4l2_subdev * sd,int on)1229 static int imx214_s_stream(struct v4l2_subdev *sd, int on)
1230 {
1231 struct imx214 *imx214 = to_imx214(sd);
1232 struct i2c_client *client = imx214->client;
1233 int ret = 0;
1234
1235 dev_info(&client->dev, "%s: on: %d, %dx%d@%d\n", __func__, on,
1236 imx214->cur_mode->width,
1237 imx214->cur_mode->height,
1238 DIV_ROUND_CLOSEST(imx214->cur_mode->max_fps.denominator,
1239 imx214->cur_mode->max_fps.numerator));
1240
1241
1242 mutex_lock(&imx214->mutex);
1243 on = !!on;
1244 if (on == imx214->streaming)
1245 goto unlock_and_return;
1246
1247 if (on) {
1248 ret = pm_runtime_get_sync(&client->dev);
1249 if (ret < 0) {
1250 pm_runtime_put_noidle(&client->dev);
1251 goto unlock_and_return;
1252 }
1253
1254 ret = __imx214_start_stream(imx214);
1255 if (ret) {
1256 v4l2_err(sd, "start stream failed while write regs\n");
1257 pm_runtime_put(&client->dev);
1258 goto unlock_and_return;
1259 }
1260 } else {
1261 __imx214_stop_stream(imx214);
1262 pm_runtime_put(&client->dev);
1263 }
1264
1265 imx214->streaming = on;
1266
1267 unlock_and_return:
1268 mutex_unlock(&imx214->mutex);
1269
1270 return ret;
1271 }
1272
imx214_s_power(struct v4l2_subdev * sd,int on)1273 static int imx214_s_power(struct v4l2_subdev *sd, int on)
1274 {
1275 struct imx214 *imx214 = to_imx214(sd);
1276 struct i2c_client *client = imx214->client;
1277 int ret = 0;
1278
1279 mutex_lock(&imx214->mutex);
1280
1281 /* If the power state is not modified - no work to do. */
1282 if (imx214->power_on == !!on)
1283 goto unlock_and_return;
1284
1285 if (on) {
1286 ret = pm_runtime_get_sync(&client->dev);
1287 if (ret < 0) {
1288 pm_runtime_put_noidle(&client->dev);
1289 goto unlock_and_return;
1290 }
1291
1292 ret = imx214_write_array(imx214->client, imx214_global_regs);
1293 if (ret) {
1294 v4l2_err(sd, "could not set init registers\n");
1295 pm_runtime_put_noidle(&client->dev);
1296 goto unlock_and_return;
1297 }
1298
1299 imx214->power_on = true;
1300 } else {
1301 pm_runtime_put(&client->dev);
1302 imx214->power_on = false;
1303 }
1304
1305 unlock_and_return:
1306 mutex_unlock(&imx214->mutex);
1307
1308 return ret;
1309 }
1310
1311 /* Calculate the delay in us by clock rate and clock cycles */
imx214_cal_delay(u32 cycles)1312 static inline u32 imx214_cal_delay(u32 cycles)
1313 {
1314 return DIV_ROUND_UP(cycles, IMX214_XVCLK_FREQ / 1000 / 1000);
1315 }
1316
__imx214_power_on(struct imx214 * imx214)1317 static int __imx214_power_on(struct imx214 *imx214)
1318 {
1319 int ret;
1320 u32 delay_us;
1321 struct device *dev = &imx214->client->dev;
1322
1323 if (!IS_ERR(imx214->power_gpio))
1324 gpiod_set_value_cansleep(imx214->power_gpio, 1);
1325
1326 usleep_range(1000, 2000);
1327
1328 if (!IS_ERR_OR_NULL(imx214->pins_default)) {
1329 ret = pinctrl_select_state(imx214->pinctrl,
1330 imx214->pins_default);
1331 if (ret < 0)
1332 dev_err(dev, "could not set pins\n");
1333 }
1334 ret = clk_set_rate(imx214->xvclk, IMX214_XVCLK_FREQ);
1335 if (ret < 0)
1336 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1337 if (clk_get_rate(imx214->xvclk) != IMX214_XVCLK_FREQ)
1338 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1339 ret = clk_prepare_enable(imx214->xvclk);
1340 if (ret < 0) {
1341 dev_err(dev, "Failed to enable xvclk\n");
1342 return ret;
1343 }
1344 if (!IS_ERR(imx214->reset_gpio))
1345 gpiod_set_value_cansleep(imx214->reset_gpio, 0);
1346
1347 ret = regulator_bulk_enable(IMX214_NUM_SUPPLIES, imx214->supplies);
1348 if (ret < 0) {
1349 dev_err(dev, "Failed to enable regulators\n");
1350 goto disable_clk;
1351 }
1352
1353 if (!IS_ERR(imx214->reset_gpio))
1354 gpiod_set_value_cansleep(imx214->reset_gpio, 1);
1355
1356 usleep_range(500, 1000);
1357 if (!IS_ERR(imx214->pwdn_gpio))
1358 gpiod_set_value_cansleep(imx214->pwdn_gpio, 1);
1359
1360 /* 8192 cycles prior to first SCCB transaction */
1361 delay_us = imx214_cal_delay(8192);
1362 usleep_range(delay_us, delay_us * 2);
1363
1364 return 0;
1365
1366 disable_clk:
1367 clk_disable_unprepare(imx214->xvclk);
1368
1369 return ret;
1370 }
1371
__imx214_power_off(struct imx214 * imx214)1372 static void __imx214_power_off(struct imx214 *imx214)
1373 {
1374 int ret;
1375 struct device *dev = &imx214->client->dev;
1376
1377 if (!IS_ERR(imx214->pwdn_gpio))
1378 gpiod_set_value_cansleep(imx214->pwdn_gpio, 0);
1379 clk_disable_unprepare(imx214->xvclk);
1380 if (!IS_ERR(imx214->reset_gpio))
1381 gpiod_set_value_cansleep(imx214->reset_gpio, 0);
1382
1383 if (!IS_ERR_OR_NULL(imx214->pins_sleep)) {
1384 ret = pinctrl_select_state(imx214->pinctrl,
1385 imx214->pins_sleep);
1386 if (ret < 0)
1387 dev_dbg(dev, "could not set pins\n");
1388 }
1389 if (!IS_ERR(imx214->power_gpio))
1390 gpiod_set_value_cansleep(imx214->power_gpio, 0);
1391
1392 regulator_bulk_disable(IMX214_NUM_SUPPLIES, imx214->supplies);
1393 }
1394
imx214_runtime_resume(struct device * dev)1395 static int imx214_runtime_resume(struct device *dev)
1396 {
1397 struct i2c_client *client = to_i2c_client(dev);
1398 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1399 struct imx214 *imx214 = to_imx214(sd);
1400
1401 return __imx214_power_on(imx214);
1402 }
1403
imx214_runtime_suspend(struct device * dev)1404 static int imx214_runtime_suspend(struct device *dev)
1405 {
1406 struct i2c_client *client = to_i2c_client(dev);
1407 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1408 struct imx214 *imx214 = to_imx214(sd);
1409
1410 __imx214_power_off(imx214);
1411
1412 return 0;
1413 }
1414
1415 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
imx214_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1416 static int imx214_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1417 {
1418 struct imx214 *imx214 = to_imx214(sd);
1419 struct v4l2_mbus_framefmt *try_fmt =
1420 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1421 const struct imx214_mode *def_mode = &imx214->support_modes[0];
1422
1423 mutex_lock(&imx214->mutex);
1424 /* Initialize try_fmt */
1425 try_fmt->width = def_mode->width;
1426 try_fmt->height = def_mode->height;
1427 try_fmt->code = IMX214_MEDIA_BUS_FMT;
1428 try_fmt->field = V4L2_FIELD_NONE;
1429
1430 mutex_unlock(&imx214->mutex);
1431 /* No crop or compose */
1432
1433 return 0;
1434 }
1435 #endif
1436
imx214_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1437 static int imx214_enum_frame_interval(struct v4l2_subdev *sd,
1438 struct v4l2_subdev_pad_config *cfg,
1439 struct v4l2_subdev_frame_interval_enum *fie)
1440 {
1441 struct imx214 *imx214 = to_imx214(sd);
1442
1443 if (fie->index >= imx214->cfg_num)
1444 return -EINVAL;
1445
1446 fie->code = IMX214_MEDIA_BUS_FMT;
1447 fie->width = imx214->support_modes[fie->index].width;
1448 fie->height = imx214->support_modes[fie->index].height;
1449 fie->interval = imx214->support_modes[fie->index].max_fps;
1450
1451 return 0;
1452 }
1453
imx214_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad,struct v4l2_mbus_config * config)1454 static int imx214_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
1455 struct v4l2_mbus_config *config)
1456 {
1457 struct imx214 *imx214 = to_imx214(sd);
1458 u32 lane_num = imx214->bus_cfg.bus.mipi_csi2.num_data_lanes;
1459 u32 val = 0;
1460
1461 val = 1 << (lane_num - 1) |
1462 V4L2_MBUS_CSI2_CHANNEL_0 |
1463 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1464
1465 config->type = V4L2_MBUS_CSI2_DPHY;
1466 config->flags = val;
1467
1468 return 0;
1469 }
1470
1471 #define CROP_START(SRC, DST) (((SRC) - (DST)) / 2 / 4 * 4)
1472 #define DST_WIDTH_2096 2096
1473 #define DST_HEIGHT_1560 1560
1474
imx214_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1475 static int imx214_get_selection(struct v4l2_subdev *sd,
1476 struct v4l2_subdev_pad_config *cfg,
1477 struct v4l2_subdev_selection *sel)
1478 {
1479 struct imx214 *imx214 = to_imx214(sd);
1480
1481 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) {
1482 if (imx214->cur_mode->width == 2104) {
1483 sel->r.left = CROP_START(imx214->cur_mode->width, DST_WIDTH_2096);
1484 sel->r.width = DST_WIDTH_2096;
1485 sel->r.top = CROP_START(imx214->cur_mode->height, DST_HEIGHT_1560);
1486 sel->r.height = DST_HEIGHT_1560;
1487 } else {
1488 sel->r.left = CROP_START(imx214->cur_mode->width,
1489 imx214->cur_mode->width);
1490 sel->r.width = imx214->cur_mode->width;
1491 sel->r.top = CROP_START(imx214->cur_mode->height,
1492 imx214->cur_mode->height);
1493 sel->r.height = imx214->cur_mode->height;
1494 }
1495 return 0;
1496 }
1497
1498 return -EINVAL;
1499 }
1500
1501 static const struct dev_pm_ops imx214_pm_ops = {
1502 SET_RUNTIME_PM_OPS(imx214_runtime_suspend,
1503 imx214_runtime_resume, NULL)
1504 };
1505
1506 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1507 static const struct v4l2_subdev_internal_ops imx214_internal_ops = {
1508 .open = imx214_open,
1509 };
1510 #endif
1511
1512 static const struct v4l2_subdev_core_ops imx214_core_ops = {
1513 .s_power = imx214_s_power,
1514 .ioctl = imx214_ioctl,
1515 #ifdef CONFIG_COMPAT
1516 .compat_ioctl32 = imx214_compat_ioctl32,
1517 #endif
1518 };
1519
1520 static const struct v4l2_subdev_video_ops imx214_video_ops = {
1521 .s_stream = imx214_s_stream,
1522 .g_frame_interval = imx214_g_frame_interval,
1523 };
1524
1525 static const struct v4l2_subdev_pad_ops imx214_pad_ops = {
1526 .enum_mbus_code = imx214_enum_mbus_code,
1527 .enum_frame_size = imx214_enum_frame_sizes,
1528 .enum_frame_interval = imx214_enum_frame_interval,
1529 .get_fmt = imx214_get_fmt,
1530 .set_fmt = imx214_set_fmt,
1531 .get_selection = imx214_get_selection,
1532 .get_mbus_config = imx214_g_mbus_config,
1533 };
1534
1535 static const struct v4l2_subdev_ops imx214_subdev_ops = {
1536 .core = &imx214_core_ops,
1537 .video = &imx214_video_ops,
1538 .pad = &imx214_pad_ops,
1539 };
1540
imx214_set_gain_reg(struct imx214 * imx214,u32 a_gain)1541 static int imx214_set_gain_reg(struct imx214 *imx214, u32 a_gain)
1542 {
1543 int ret = 0;
1544 u32 gain_reg = 0;
1545
1546 gain_reg = (512 - (512 * 512 / a_gain));
1547 if (gain_reg > 480)
1548 gain_reg = 480;
1549
1550 ret = imx214_write_reg(imx214->client,
1551 IMX214_REG_GAIN_H,
1552 IMX214_REG_VALUE_08BIT,
1553 ((gain_reg & 0x100) >> 8));
1554 ret |= imx214_write_reg(imx214->client,
1555 IMX214_REG_GAIN_L,
1556 IMX214_REG_VALUE_08BIT,
1557 (gain_reg & 0xff));
1558 return ret;
1559 }
1560
imx214_set_ctrl(struct v4l2_ctrl * ctrl)1561 static int imx214_set_ctrl(struct v4l2_ctrl *ctrl)
1562 {
1563 struct imx214 *imx214 = container_of(ctrl->handler,
1564 struct imx214, ctrl_handler);
1565 struct i2c_client *client = imx214->client;
1566 s64 max;
1567 int ret = 0;
1568
1569 /* Propagate change of current control to all related controls */
1570 switch (ctrl->id) {
1571 case V4L2_CID_VBLANK:
1572 /* Update max exposure while meeting expected vblanking */
1573 max = imx214->cur_mode->height + ctrl->val - 4;
1574 __v4l2_ctrl_modify_range(imx214->exposure,
1575 imx214->exposure->minimum, max,
1576 imx214->exposure->step,
1577 imx214->exposure->default_value);
1578 break;
1579 }
1580
1581 if (!pm_runtime_get_if_in_use(&client->dev))
1582 return 0;
1583
1584 switch (ctrl->id) {
1585 case V4L2_CID_EXPOSURE:
1586 /* 4 least significant bits of expsoure are fractional part */
1587 ret = imx214_write_reg(imx214->client,
1588 IMX214_REG_EXPOSURE,
1589 IMX214_REG_VALUE_16BIT,
1590 ctrl->val);
1591 break;
1592 case V4L2_CID_ANALOGUE_GAIN:
1593 ret = imx214_set_gain_reg(imx214, ctrl->val);
1594 break;
1595 case V4L2_CID_VBLANK:
1596 ret = imx214_write_reg(imx214->client,
1597 IMX214_REG_VTS,
1598 IMX214_REG_VALUE_16BIT,
1599 ctrl->val + imx214->cur_mode->height);
1600 break;
1601 case V4L2_CID_TEST_PATTERN:
1602 ret = imx214_enable_test_pattern(imx214, ctrl->val);
1603 break;
1604 default:
1605 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1606 __func__, ctrl->id, ctrl->val);
1607 break;
1608 }
1609
1610 pm_runtime_put(&client->dev);
1611
1612 return ret;
1613 }
1614
1615 static const struct v4l2_ctrl_ops imx214_ctrl_ops = {
1616 .s_ctrl = imx214_set_ctrl,
1617 };
1618
imx214_initialize_controls(struct imx214 * imx214)1619 static int imx214_initialize_controls(struct imx214 *imx214)
1620 {
1621 const struct imx214_mode *mode;
1622 struct v4l2_ctrl_handler *handler;
1623 s64 exposure_max, vblank_def;
1624 u32 h_blank;
1625 int ret;
1626 u64 dst_pixel_rate = 0;
1627 u32 lane_num = imx214->bus_cfg.bus.mipi_csi2.num_data_lanes;
1628
1629 handler = &imx214->ctrl_handler;
1630 mode = imx214->cur_mode;
1631 ret = v4l2_ctrl_handler_init(handler, 8);
1632 if (ret)
1633 return ret;
1634 handler->lock = &imx214->mutex;
1635
1636 imx214->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
1637 V4L2_CID_LINK_FREQ,
1638 1, 0, link_freq_items);
1639
1640 dst_pixel_rate = (u32)link_freq_items[mode->link_freq_idx] / mode->bpp * 2 * lane_num;
1641
1642 imx214->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
1643 V4L2_CID_PIXEL_RATE,
1644 0, IMX214_PIXEL_RATE,
1645 1, dst_pixel_rate);
1646
1647 __v4l2_ctrl_s_ctrl(imx214->link_freq,
1648 mode->link_freq_idx);
1649
1650 h_blank = mode->hts_def - mode->width;
1651 imx214->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1652 h_blank, h_blank, 1, h_blank);
1653 if (imx214->hblank)
1654 imx214->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1655
1656 vblank_def = mode->vts_def - mode->height;
1657 imx214->vblank = v4l2_ctrl_new_std(handler, &imx214_ctrl_ops,
1658 V4L2_CID_VBLANK, vblank_def,
1659 IMX214_VTS_MAX - mode->height,
1660 1, vblank_def);
1661
1662 exposure_max = mode->vts_def - 4;
1663 imx214->exposure = v4l2_ctrl_new_std(handler, &imx214_ctrl_ops,
1664 V4L2_CID_EXPOSURE, IMX214_EXPOSURE_MIN,
1665 exposure_max, IMX214_EXPOSURE_STEP,
1666 mode->exp_def);
1667
1668 imx214->anal_gain = v4l2_ctrl_new_std(handler, &imx214_ctrl_ops,
1669 V4L2_CID_ANALOGUE_GAIN, IMX214_GAIN_MIN,
1670 IMX214_GAIN_MAX, IMX214_GAIN_STEP,
1671 IMX214_GAIN_DEFAULT);
1672
1673 imx214->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1674 &imx214_ctrl_ops, V4L2_CID_TEST_PATTERN,
1675 ARRAY_SIZE(imx214_test_pattern_menu) - 1,
1676 0, 0, imx214_test_pattern_menu);
1677
1678 if (handler->error) {
1679 ret = handler->error;
1680 dev_err(&imx214->client->dev,
1681 "Failed to init controls(%d)\n", ret);
1682 goto err_free_handler;
1683 }
1684
1685 imx214->subdev.ctrl_handler = handler;
1686
1687 return 0;
1688
1689 err_free_handler:
1690 v4l2_ctrl_handler_free(handler);
1691
1692 return ret;
1693 }
1694
imx214_check_sensor_id(struct imx214 * imx214,struct i2c_client * client)1695 static int imx214_check_sensor_id(struct imx214 *imx214,
1696 struct i2c_client *client)
1697 {
1698 struct device *dev = &imx214->client->dev;
1699 u32 id = 0;
1700 int ret;
1701
1702 ret = imx214_read_reg(client, IMX214_REG_CHIP_ID,
1703 IMX214_REG_VALUE_16BIT, &id);
1704 if (id != CHIP_ID) {
1705 dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
1706 return -ENODEV;
1707 }
1708
1709 dev_info(dev, "Detected OV%04x sensor\n", id);
1710
1711 return 0;
1712 }
1713
imx214_configure_regulators(struct imx214 * imx214)1714 static int imx214_configure_regulators(struct imx214 *imx214)
1715 {
1716 unsigned int i;
1717
1718 for (i = 0; i < IMX214_NUM_SUPPLIES; i++)
1719 imx214->supplies[i].supply = imx214_supply_names[i];
1720
1721 return devm_regulator_bulk_get(&imx214->client->dev,
1722 IMX214_NUM_SUPPLIES,
1723 imx214->supplies);
1724 }
1725
imx214_probe(struct i2c_client * client,const struct i2c_device_id * id)1726 static int imx214_probe(struct i2c_client *client,
1727 const struct i2c_device_id *id)
1728 {
1729 struct device *dev = &client->dev;
1730 struct device_node *node = dev->of_node;
1731 struct imx214 *imx214;
1732 struct v4l2_subdev *sd;
1733 struct device_node *endpoint;
1734 char facing[2];
1735 struct device_node *eeprom_ctrl_node;
1736 struct i2c_client *eeprom_ctrl_client;
1737 struct v4l2_subdev *eeprom_ctrl;
1738 struct imx214_otp_info *otp_ptr;
1739 int ret;
1740
1741 dev_info(dev, "driver version: %02x.%02x.%02x",
1742 DRIVER_VERSION >> 16,
1743 (DRIVER_VERSION & 0xff00) >> 8,
1744 DRIVER_VERSION & 0x00ff);
1745
1746 imx214 = devm_kzalloc(dev, sizeof(*imx214), GFP_KERNEL);
1747 if (!imx214)
1748 return -ENOMEM;
1749
1750 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1751 &imx214->module_index);
1752 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1753 &imx214->module_facing);
1754 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1755 &imx214->module_name);
1756 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1757 &imx214->len_name);
1758 if (ret) {
1759 dev_err(dev, "could not get module information!\n");
1760 return -EINVAL;
1761 }
1762
1763 imx214->client = client;
1764 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1765 if (!endpoint) {
1766 dev_err(dev, "Failed to get endpoint\n");
1767 return -EINVAL;
1768 }
1769 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1770 &imx214->bus_cfg);
1771 if (ret) {
1772 dev_err(dev, "Failed to get bus cfg\n");
1773 return ret;
1774 }
1775 if (imx214->bus_cfg.bus.mipi_csi2.num_data_lanes == 4) {
1776 imx214->support_modes = supported_modes_4lane;
1777 imx214->cfg_num = ARRAY_SIZE(supported_modes_4lane);
1778 } else {
1779 imx214->support_modes = supported_modes_2lane;
1780 imx214->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1781 }
1782 imx214->cur_mode = &imx214->support_modes[0];
1783
1784 imx214->xvclk = devm_clk_get(dev, "xvclk");
1785 if (IS_ERR(imx214->xvclk)) {
1786 dev_err(dev, "Failed to get xvclk\n");
1787 return -EINVAL;
1788 }
1789
1790 imx214->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
1791 if (IS_ERR(imx214->power_gpio))
1792 dev_warn(dev, "Failed to get power-gpios, maybe no use\n");
1793
1794 imx214->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1795 if (IS_ERR(imx214->reset_gpio))
1796 dev_warn(dev, "Failed to get reset-gpios\n");
1797
1798 imx214->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1799 if (IS_ERR(imx214->pwdn_gpio))
1800 dev_warn(dev, "Failed to get pwdn-gpios\n");
1801
1802 ret = imx214_configure_regulators(imx214);
1803 if (ret) {
1804 dev_err(dev, "Failed to get power regulators\n");
1805 return ret;
1806 }
1807
1808 imx214->pinctrl = devm_pinctrl_get(dev);
1809 if (!IS_ERR(imx214->pinctrl)) {
1810 imx214->pins_default =
1811 pinctrl_lookup_state(imx214->pinctrl,
1812 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1813 if (IS_ERR(imx214->pins_default))
1814 dev_err(dev, "could not get default pinstate\n");
1815
1816 imx214->pins_sleep =
1817 pinctrl_lookup_state(imx214->pinctrl,
1818 OF_CAMERA_PINCTRL_STATE_SLEEP);
1819 if (IS_ERR(imx214->pins_sleep))
1820 dev_err(dev, "could not get sleep pinstate\n");
1821 }
1822
1823 mutex_init(&imx214->mutex);
1824
1825 sd = &imx214->subdev;
1826 v4l2_i2c_subdev_init(sd, client, &imx214_subdev_ops);
1827 ret = imx214_initialize_controls(imx214);
1828 if (ret)
1829 goto err_destroy_mutex;
1830
1831 ret = __imx214_power_on(imx214);
1832 if (ret)
1833 goto err_free_handler;
1834
1835 ret = imx214_check_sensor_id(imx214, client);
1836 if (ret)
1837 goto err_power_off;
1838
1839 eeprom_ctrl_node = of_parse_phandle(node, "eeprom-ctrl", 0);
1840 if (eeprom_ctrl_node) {
1841 eeprom_ctrl_client =
1842 of_find_i2c_device_by_node(eeprom_ctrl_node);
1843 of_node_put(eeprom_ctrl_node);
1844 if (IS_ERR_OR_NULL(eeprom_ctrl_client)) {
1845 dev_err(dev, "can not get node\n");
1846 goto continue_probe;
1847 }
1848 eeprom_ctrl = i2c_get_clientdata(eeprom_ctrl_client);
1849 if (IS_ERR_OR_NULL(eeprom_ctrl)) {
1850 dev_err(dev, "can not get eeprom i2c client\n");
1851 } else {
1852 otp_ptr = devm_kzalloc(dev, sizeof(*otp_ptr),
1853 GFP_KERNEL);
1854 if (!otp_ptr)
1855 return -ENOMEM;
1856 ret = v4l2_subdev_call(eeprom_ctrl,
1857 core, ioctl, 0, otp_ptr);
1858 if (!ret) {
1859 imx214->otp = otp_ptr;
1860 } else {
1861 imx214->otp = NULL;
1862 devm_kfree(dev, otp_ptr);
1863 }
1864 }
1865 }
1866
1867 continue_probe:
1868
1869 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1870 sd->internal_ops = &imx214_internal_ops;
1871 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1872 #endif
1873 #if defined(CONFIG_MEDIA_CONTROLLER)
1874 imx214->pad.flags = MEDIA_PAD_FL_SOURCE;
1875 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1876 ret = media_entity_pads_init(&sd->entity, 1, &imx214->pad);
1877 if (ret < 0)
1878 goto err_power_off;
1879 #endif
1880
1881 memset(facing, 0, sizeof(facing));
1882 if (strcmp(imx214->module_facing, "back") == 0)
1883 facing[0] = 'b';
1884 else
1885 facing[0] = 'f';
1886
1887 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1888 imx214->module_index, facing,
1889 IMX214_NAME, dev_name(sd->dev));
1890 ret = v4l2_async_register_subdev_sensor_common(sd);
1891 if (ret) {
1892 dev_err(dev, "v4l2 async register subdev failed\n");
1893 goto err_clean_entity;
1894 }
1895
1896 pm_runtime_set_active(dev);
1897 pm_runtime_enable(dev);
1898 pm_runtime_idle(dev);
1899
1900 return 0;
1901
1902 err_clean_entity:
1903 #if defined(CONFIG_MEDIA_CONTROLLER)
1904 media_entity_cleanup(&sd->entity);
1905 #endif
1906 err_power_off:
1907 __imx214_power_off(imx214);
1908 err_free_handler:
1909 v4l2_ctrl_handler_free(&imx214->ctrl_handler);
1910 err_destroy_mutex:
1911 mutex_destroy(&imx214->mutex);
1912
1913 return ret;
1914 }
1915
imx214_remove(struct i2c_client * client)1916 static int imx214_remove(struct i2c_client *client)
1917 {
1918 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1919 struct imx214 *imx214 = to_imx214(sd);
1920
1921 v4l2_async_unregister_subdev(sd);
1922 #if defined(CONFIG_MEDIA_CONTROLLER)
1923 media_entity_cleanup(&sd->entity);
1924 #endif
1925 v4l2_ctrl_handler_free(&imx214->ctrl_handler);
1926 mutex_destroy(&imx214->mutex);
1927
1928 pm_runtime_disable(&client->dev);
1929 if (!pm_runtime_status_suspended(&client->dev))
1930 __imx214_power_off(imx214);
1931 pm_runtime_set_suspended(&client->dev);
1932
1933 return 0;
1934 }
1935
1936 #if IS_ENABLED(CONFIG_OF)
1937 static const struct of_device_id imx214_of_match[] = {
1938 { .compatible = "sony,imx214" },
1939 {},
1940 };
1941 MODULE_DEVICE_TABLE(of, imx214_of_match);
1942 #endif
1943
1944 static const struct i2c_device_id imx214_match_id[] = {
1945 { "sony,imx214", 0 },
1946 {},
1947 };
1948
1949 static struct i2c_driver imx214_i2c_driver = {
1950 .driver = {
1951 .name = IMX214_NAME,
1952 .pm = &imx214_pm_ops,
1953 .of_match_table = of_match_ptr(imx214_of_match),
1954 },
1955 .probe = &imx214_probe,
1956 .remove = &imx214_remove,
1957 .id_table = imx214_match_id,
1958 };
1959
sensor_mod_init(void)1960 static int __init sensor_mod_init(void)
1961 {
1962 return i2c_add_driver(&imx214_i2c_driver);
1963 }
1964
sensor_mod_exit(void)1965 static void __exit sensor_mod_exit(void)
1966 {
1967 i2c_del_driver(&imx214_i2c_driver);
1968 }
1969
1970 device_initcall_sync(sensor_mod_init);
1971 module_exit(sensor_mod_exit);
1972
1973 MODULE_DESCRIPTION("Sony imx214 sensor driver");
1974 MODULE_LICENSE("GPL v2");
1975