1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * hi556 driver
4 *
5 * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X00 init version
8 */
9
10 #include <linux/clk.h>
11 #include <linux/device.h>
12 #include <linux/delay.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/of.h>
18 #include <linux/of_graph.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/sysfs.h>
21 #include <linux/pinctrl/consumer.h>
22 #include <linux/version.h>
23 #include <media/v4l2-async.h>
24 #include <media/media-entity.h>
25 #include <media/v4l2-common.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-image-sizes.h>
31 #include <media/v4l2-mediabus.h>
32 #include <media/v4l2-subdev.h>
33 #include <linux/rk-camera-module.h>
34
35 /* verify default register values */
36 //#define CHECK_REG_VALUE
37
38 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x00)
39
40 #ifndef V4L2_CID_DIGITAL_GAIN
41 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
42 #endif
43
44 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
45 #define MIPI_FREQ 440000000U
46 #define HI556_PIXEL_RATE (440000000LL * 2LL * 2LL / 10)
47 #define HI556_XVCLK_FREQ 24000000
48
49 #define CHIP_ID 0x0556
50 #define HI556_REG_CHIP_ID 0x0f16
51
52 #define HI556_REG_CTRL_MODE 0x0A00
53 #define HI556_MODE_SW_STANDBY 0x00
54 #define HI556_MODE_STREAMING 0x01
55
56 #define HI556_REG_EXPOSURE_H 0x0073
57 #define HI556_REG_EXPOSURE_M 0x0074
58 #define HI556_REG_EXPOSURE_L 0x0075
59
60 #define HI556_FETCH_HIGH_BYTE_EXP(VAL) (((VAL) >> 16) & 0xF) /* 4 Bits */
61 #define HI556_FETCH_MIDDLE_BYTE_EXP(VAL) (((VAL) >> 8) & 0xFF) /* 8 Bits */
62 #define HI556_FETCH_LOW_BYTE_EXP(VAL) ((VAL) & 0xFF) /* 8 Bits */
63
64 #define HI556_EXPOSURE_MIN 4
65 #define HI556_EXPOSURE_STEP 1
66 #define HI556_VTS_MAX 0x7fff
67
68 #define HI556_REG_GAIN 0x0077
69 #define HI556_GAIN_MASK 0xff
70
71 #define ANALOG_GAIN_MIN 0x00
72 #define ANALOG_GAIN_MAX 0xF0
73 #define ANALOG_GAIN_STEP 1
74 #define ANALOG_GAIN_DEFAULT 0x10
75
76 #define HI556_REG_GROUP 0x0046
77
78 #define HI556_REG_TEST_PATTERN 0x0A05
79 #define HI556_TEST_PATTERN_ENABLE 0x01
80 #define HI556_TEST_PATTERN_DISABLE 0x0
81 #define HI556_REG_TEST_PATTERN_SELECT 0x0201
82
83 #define HI556_REG_VTS 0x0006
84 #define HI556_FLIP_MIRROR_REG 0x000e
85 #define HI556_FETCH_MIRROR(VAL, ENABLE) (ENABLE ? VAL | 0x01 : VAL & 0xfe)
86 #define HI556_FETCH_FLIP(VAL, ENABLE) (ENABLE ? VAL | 0x02 : VAL & 0xfd)
87 #define REG_NULL 0xFFFF
88 #define DELAY_MS 0xEEEE /* Array delay token */
89
90 #define HI556_REG_VALUE_08BIT 1
91 #define HI556_REG_VALUE_16BIT 2
92 #define HI556_REG_VALUE_24BIT 3
93
94 #define HI556_LANES 2
95 #define HI556_BITS_PER_SAMPLE 10
96
97 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
98 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
99
100 #define HI556_NAME "hi556"
101 #define HI556_MEDIA_BUS_FMT MEDIA_BUS_FMT_SGBRG10_1X10
102
103 struct hi556_otp_info {
104 int flag; // bit[7]: info, bit[6]:wb
105 int module_id;
106 int lens_id;
107 int year;
108 int month;
109 int day;
110 int rg_ratio;
111 int bg_ratio;
112 };
113
114 static const char * const hi556_supply_names[] = {
115 "avdd", /* Analog power */
116 "dovdd", /* Digital I/O power */
117 "dvdd", /* Digital core power */
118 };
119
120 #define HI556_NUM_SUPPLIES ARRAY_SIZE(hi556_supply_names)
121
122 struct regval {
123 u16 addr;
124 u16 val;
125 };
126
127 struct hi556_mode {
128 u32 width;
129 u32 height;
130 struct v4l2_fract max_fps;
131 u32 hts_def;
132 u32 vts_def;
133 u32 exp_def;
134 const struct regval *reg_list;
135 u32 hdr_mode;
136 };
137
138 struct hi556 {
139 struct i2c_client *client;
140 struct clk *xvclk;
141 struct gpio_desc *power_gpio;
142 struct gpio_desc *reset_gpio;
143 struct gpio_desc *pwdn_gpio;
144 struct regulator_bulk_data supplies[HI556_NUM_SUPPLIES];
145
146 struct pinctrl *pinctrl;
147 struct pinctrl_state *pins_default;
148 struct pinctrl_state *pins_sleep;
149
150 struct v4l2_subdev subdev;
151 struct media_pad pad;
152 struct v4l2_ctrl_handler ctrl_handler;
153 struct v4l2_ctrl *exposure;
154 struct v4l2_ctrl *anal_gain;
155 struct v4l2_ctrl *digi_gain;
156 struct v4l2_ctrl *hblank;
157 struct v4l2_ctrl *vblank;
158 struct v4l2_ctrl *test_pattern;
159 struct mutex mutex;
160 bool streaming;
161 bool power_on;
162 const struct hi556_mode *cur_mode;
163 unsigned int lane_num;
164 unsigned int cfg_num;
165 unsigned int pixel_rate;
166 u32 module_index;
167 struct hi556_otp_info *otp;
168 const char *module_facing;
169 const char *module_name;
170 const char *len_name;
171 struct rkmodule_awb_cfg awb_cfg;
172 };
173
174 #define to_hi556(sd) container_of(sd, struct hi556, subdev)
175
176 /*
177 * Xclk 24Mhz
178 * Pclk 176Mhz
179 * linelength 2816(0xb00)
180 * framelength 1988(0x7c0)
181 * grabwindow_width 2592
182 * grabwindow_height 1944
183 * max_framerate 30fps
184 * MIPI speed(Mbps) : 840Mbps x 2Lane
185 */
186 static const struct regval hi556_global_regs[] = {
187 {0x0a00, 0x0000},
188 {0x0e00, 0x0102},
189 {0x0e02, 0x0102},
190 {0x0e0c, 0x0100},
191 {0x2000, 0x7400},
192 {0x2002, 0x001c},
193 {0x2004, 0x0242},
194 {0x2006, 0x0942},
195 {0x2008, 0x7007},
196 {0x200a, 0x0fd9},
197 {0x200c, 0x0259},
198 {0x200e, 0x7008},
199 {0x2010, 0x160e},
200 {0x2012, 0x0047},
201 {0x2014, 0x2118},
202 {0x2016, 0x0041},
203 {0x2018, 0x00d8},
204 {0x201a, 0x0145},
205 {0x201c, 0x0006},
206 {0x201e, 0x0181},
207 {0x2020, 0x13cc},
208 {0x2022, 0x2057},
209 {0x2024, 0x7001},
210 {0x2026, 0x0fca},
211 {0x2028, 0x00cb},
212 {0x202a, 0x009f},
213 {0x202c, 0x7002},
214 {0x202e, 0x13cc},
215 {0x2030, 0x019b},
216 {0x2032, 0x014d},
217 {0x2034, 0x2987},
218 {0x2036, 0x2766},
219 {0x2038, 0x0020},
220 {0x203a, 0x2060},
221 {0x203c, 0x0e5d},
222 {0x203e, 0x181d},
223 {0x2040, 0x2066},
224 {0x2042, 0x20c4},
225 {0x2044, 0x5000},
226 {0x2046, 0x0005},
227 {0x2048, 0x0000},
228 {0x204a, 0x01db},
229 {0x204c, 0x025a},
230 {0x204e, 0x00c0},
231 {0x2050, 0x0005},
232 {0x2052, 0x0006},
233 {0x2054, 0x0ad9},
234 {0x2056, 0x0259},
235 {0x2058, 0x0618},
236 {0x205a, 0x0258},
237 {0x205c, 0x2266},
238 {0x205e, 0x20c8},
239 {0x2060, 0x2060},
240 {0x2062, 0x707b},
241 {0x2064, 0x0fdd},
242 {0x2066, 0x81b8},
243 {0x2068, 0x5040},
244 {0x206a, 0x0020},
245 {0x206c, 0x5060},
246 {0x206e, 0x3143},
247 {0x2070, 0x5081},
248 {0x2072, 0x025c},
249 {0x2074, 0x7800},
250 {0x2076, 0x7400},
251 {0x2078, 0x001c},
252 {0x207a, 0x0242},
253 {0x207c, 0x0942},
254 {0x207e, 0x0bd9},
255 {0x2080, 0x0259},
256 {0x2082, 0x7008},
257 {0x2084, 0x160e},
258 {0x2086, 0x0047},
259 {0x2088, 0x2118},
260 {0x208a, 0x0041},
261 {0x208c, 0x00d8},
262 {0x208e, 0x0145},
263 {0x2090, 0x0006},
264 {0x2092, 0x0181},
265 {0x2094, 0x13cc},
266 {0x2096, 0x2057},
267 {0x2098, 0x7001},
268 {0x209a, 0x0fca},
269 {0x209c, 0x00cb},
270 {0x209e, 0x009f},
271 {0x20a0, 0x7002},
272 {0x20a2, 0x13cc},
273 {0x20a4, 0x019b},
274 {0x20a6, 0x014d},
275 {0x20a8, 0x2987},
276 {0x20aa, 0x2766},
277 {0x20ac, 0x0020},
278 {0x20ae, 0x2060},
279 {0x20b0, 0x0e5d},
280 {0x20b2, 0x181d},
281 {0x20b4, 0x2066},
282 {0x20b6, 0x20c4},
283 {0x20b8, 0x50a0},
284 {0x20ba, 0x0005},
285 {0x20bc, 0x0000},
286 {0x20be, 0x01db},
287 {0x20c0, 0x025a},
288 {0x20c2, 0x00c0},
289 {0x20c4, 0x0005},
290 {0x20c6, 0x0006},
291 {0x20c8, 0x0ad9},
292 {0x20ca, 0x0259},
293 {0x20cc, 0x0618},
294 {0x20ce, 0x0258},
295 {0x20d0, 0x2266},
296 {0x20d2, 0x20c8},
297 {0x20d4, 0x2060},
298 {0x20d6, 0x707b},
299 {0x20d8, 0x0fdd},
300 {0x20da, 0x86b8},
301 {0x20dc, 0x50e0},
302 {0x20de, 0x0020},
303 {0x20e0, 0x5100},
304 {0x20e2, 0x3143},
305 {0x20e4, 0x5121},
306 {0x20e6, 0x7800},
307 {0x20e8, 0x3140},
308 {0x20ea, 0x01c4},
309 {0x20ec, 0x01c1},
310 {0x20ee, 0x01c0},
311 {0x20f0, 0x01c4},
312 {0x20f2, 0x2700},
313 {0x20f4, 0x3d40},
314 {0x20f6, 0x7800},
315 {0x20f8, 0xffff},
316 {0x27fe, 0xe000},
317 {0x3000, 0x60f8},
318 {0x3002, 0x187f},
319 {0x3004, 0x7060},
320 {0x3006, 0x0114},
321 {0x3008, 0x60b0},
322 {0x300a, 0x1473},
323 {0x300c, 0x0013},
324 {0x300e, 0x140f},
325 {0x3010, 0x0040},
326 {0x3012, 0x100f},
327 {0x3014, 0x60f8},
328 {0x3016, 0x187f},
329 {0x3018, 0x7060},
330 {0x301a, 0x0114},
331 {0x301c, 0x60b0},
332 {0x301e, 0x1473},
333 {0x3020, 0x0013},
334 {0x3022, 0x140f},
335 {0x3024, 0x0040},
336 {0x3026, 0x000f},
337 {0x0b00, 0x0000},
338 {0x0b02, 0x0045},
339 {0x0b04, 0xb405},
340 {0x0b06, 0xc403},
341 {0x0b08, 0x0081},
342 {0x0b0a, 0x8252},
343 {0x0b0c, 0xf814},
344 {0x0b0e, 0xc618},
345 {0x0b10, 0xa828},
346 {0x0b12, 0x004c},
347 {0x0b14, 0x4068},
348 {0x0b16, 0x0000},
349 {0x0f30, 0x6e25},
350 {0x0f32, 0x7067},
351 {0x0954, 0x0009},
352 {0x0956, 0x1100},
353 {0x0958, 0xcc80},
354 {0x095a, 0x0000},
355 {0x0c00, 0x1110},
356 {0x0c02, 0x0011},
357 {0x0c04, 0x0000},
358 {0x0c06, 0x0200},
359 {0x0c10, 0x0040},
360 {0x0c12, 0x0040},
361 {0x0c14, 0x0040},
362 {0x0c16, 0x0040},
363 {0x0a10, 0x4000},
364 {0x3068, 0xf800},
365 {0x306a, 0xf876},
366 {0x006c, 0x0000},
367 {0x005e, 0x0200},
368 {0x000e, 0x0100},
369 {0x0e0a, 0x0001},
370 {0x004a, 0x0100},
371 {0x004c, 0x0000},
372 {0x004e, 0x0100},
373 {0x000c, 0x0022},
374 {0x0008, 0x0b00},
375 {0x005a, 0x0202},
376 {0x0012, 0x000e},
377 {0x0018, 0x0a31},
378 {0x0022, 0x0008},
379 {0x0028, 0x0017},
380 {0x0024, 0x0028},
381 {0x002a, 0x002d},
382 {0x0026, 0x0030},
383 {0x002c, 0x07c7},
384 {0x002e, 0x1111},
385 {0x0030, 0x1111},
386 {0x0032, 0x1111},
387 {0x0006, 0x0823},
388 {0x0a22, 0x0000},
389 {0x0a12, 0x0a20},
390 {0x0a14, 0x0798},
391 {0x003e, 0x0000},
392 {0x0074, 0x0821},
393 {0x0070, 0x0411},
394 {0x0002, 0x0000},
395 {0x0a02, 0x0100},
396 {0x0a24, 0x0100},
397 {0x0076, 0x0000},
398 {0x0060, 0x0000},
399 {0x0062, 0x0530},
400 {0x0064, 0x0500},
401 {0x0066, 0x0530},
402 {0x0068, 0x0500},
403 {0x0122, 0x0300},
404 {0x015a, 0xff08},
405 {0x0804, 0x0200},
406 {0x005c, 0x0102},
407 {0x0a1a, 0x0800},
408 {0x003c, 0x0101}, //fix framerate
409 {REG_NULL, 0x00},
410 };
411
412 /*
413 * Xclk 24Mhz
414 * Pclk 210Mhz
415 * linelength 2816
416 * framelength 2083
417 * grabwindow_width 2592
418 * grabwindow_height 1944
419 * max_framerate 30fps
420 * MIPI speed(Mbps): 880Mbps x 2lane
421 */
422 static const struct regval hi556_2592x1944_regs_2lane[] = {
423 {0x0a00, 0x0000},
424 {0x0b0a, 0x8252},
425 {0x0f30, 0x6e25},
426 {0x0f32, 0x7067},
427 {0x004a, 0x0100},
428 {0x004c, 0x0000},
429 {0x004e, 0x0000},
430 {0x000c, 0x0022},
431 {0x0008, 0x0b00},
432 {0x005a, 0x0202},
433 {0x0012, 0x000e},
434 {0x0018, 0x0a31},
435 {0x0022, 0x0008},
436 {0x0028, 0x0017},
437 {0x0024, 0x0028},
438 {0x002a, 0x002d},
439 {0x0026, 0x0030},
440 {0x002c, 0x07c7},
441 {0x002e, 0x1111},
442 {0x0030, 0x1111},
443 {0x0032, 0x1111},
444 {0x0006, 0x0823},
445 {0x0a22, 0x0000},
446 {0x0a12, 0x0a20},
447 {0x0a14, 0x0798},
448 {0x003e, 0x0000},
449 {0x0804, 0x0200},
450 {0x0a04, 0x014a},
451 {0x090c, 0x0fdc},
452 {0x090e, 0x002d},
453 {0x0902, 0x4319},
454 {0x0914, 0xc10a},
455 {0x0916, 0x071f},
456 {0x0918, 0x0408},
457 {0x091a, 0x0c0d},
458 {0x091c, 0x0f09},
459 {0x091e, 0x0a00},
460 //{0x0a00, 0x0100},
461 {REG_NULL, 0x00},
462 };
463
464 static const struct hi556_mode supported_modes_2lane[] = {
465 {
466 .width = 2592,
467 .height = 1944,
468 .max_fps = {
469 .numerator = 10000,
470 .denominator = 300000,
471 },
472 .exp_def = 0x0810,
473 .hts_def = 0x0B00,
474 .vts_def = 0x0823,
475 .reg_list = hi556_2592x1944_regs_2lane,
476 .hdr_mode = NO_HDR,
477 }
478 };
479
480 static const struct hi556_mode *supported_modes;
481
482 static const s64 link_freq_menu_items[] = {
483 MIPI_FREQ
484 };
485
486 static const char * const hi556_test_pattern_menu[] = {
487 "Disabled",
488 "Solid color bar",
489 "100% color bars",
490 "Fade to gray color bars",
491 "PN9",
492 "Horizental/Vertical gradient",
493 "Check board",
494 "Slant",
495 "Resolution",
496 };
497
498 /* Write registers up to 4 at a time */
hi556_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)499 static int hi556_write_reg(struct i2c_client *client, u16 reg,
500 u32 len, u32 val)
501 {
502 u32 buf_i, val_i;
503 u8 buf[6];
504 u8 *val_p;
505 __be32 val_be;
506
507 dev_dbg(&client->dev, "%s(%d) enter!\n", __func__, __LINE__);
508 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
509
510 if (len > 4)
511 return -EINVAL;
512
513 buf[0] = reg >> 8;
514 buf[1] = reg & 0xff;
515
516 val_be = cpu_to_be32(val);
517 val_p = (u8 *)&val_be;
518 buf_i = 2;
519 val_i = 4 - len;
520
521 while (val_i < 4)
522 buf[buf_i++] = val_p[val_i++];
523
524 if (i2c_master_send(client, buf, len + 2) != len + 2) {
525 dev_err(&client->dev,
526 "write reg(0x%x val:0x%x)failed !\n", reg, val);
527 return -EIO;
528 }
529 return 0;
530 }
531
hi556_write_array(struct i2c_client * client,const struct regval * regs)532 static int hi556_write_array(struct i2c_client *client,
533 const struct regval *regs)
534 {
535 int i, delay_ms, ret = 0;
536
537 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
538 if (regs[i].addr == DELAY_MS) {
539 delay_ms = regs[i].val;
540 dev_info(&client->dev, "delay(%d) ms !\n", delay_ms);
541 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
542 continue;
543 }
544 ret = hi556_write_reg(client, regs[i].addr,
545 HI556_REG_VALUE_16BIT, regs[i].val);
546 if (ret)
547 dev_err(&client->dev, "%s failed !\n", __func__);
548 }
549
550 return ret;
551 }
552
553 /* Read registers up to 4 at a time */
hi556_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)554 static int hi556_read_reg(struct i2c_client *client, u16 reg,
555 unsigned int len, u32 *val)
556 {
557 struct i2c_msg msgs[2];
558 u8 *data_be_p;
559 __be32 data_be = 0;
560 __be16 reg_addr_be = cpu_to_be16(reg);
561 int ret;
562
563 if (len > 4 || !len)
564 return -EINVAL;
565
566 data_be_p = (u8 *)&data_be;
567 /* Write register address */
568 msgs[0].addr = client->addr;
569 msgs[0].flags = 0;
570 msgs[0].len = 2;
571 msgs[0].buf = (u8 *)®_addr_be;
572
573 /* Read data from register */
574 msgs[1].addr = client->addr;
575 msgs[1].flags = I2C_M_RD;
576 msgs[1].len = len;
577 msgs[1].buf = &data_be_p[4 - len];
578
579 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
580 if (ret != ARRAY_SIZE(msgs))
581 return -EIO;
582
583 *val = be32_to_cpu(data_be);
584
585 return 0;
586 }
587
588 /* Check Register value */
589 #ifdef CHECK_REG_VALUE
hi556_reg_verify(struct i2c_client * client,const struct regval * regs)590 static int hi556_reg_verify(struct i2c_client *client,
591 const struct regval *regs)
592 {
593 u32 i;
594 int ret = 0;
595 u32 value;
596
597 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
598 ret = hi556_read_reg(client, regs[i].addr,
599 HI556_REG_VALUE_16BIT, &value);
600 if (value != regs[i].val) {
601 dev_info(&client->dev, "%s: 0x%04x is 0x%x instead of 0x%x\n",
602 __func__, regs[i].addr, value, regs[i].val);
603 }
604 }
605 return ret;
606 }
607 #endif
608
hi556_get_reso_dist(const struct hi556_mode * mode,struct v4l2_mbus_framefmt * framefmt)609 static int hi556_get_reso_dist(const struct hi556_mode *mode,
610 struct v4l2_mbus_framefmt *framefmt)
611 {
612 return abs(mode->width - framefmt->width) +
613 abs(mode->height - framefmt->height);
614 }
615
616 static const struct hi556_mode *
hi556_find_best_fit(struct hi556 * hi556,struct v4l2_subdev_format * fmt)617 hi556_find_best_fit(struct hi556 *hi556,
618 struct v4l2_subdev_format *fmt)
619 {
620 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
621 int dist;
622 int cur_best_fit = 0;
623 int cur_best_fit_dist = -1;
624 unsigned int i;
625
626 for (i = 0; i < hi556->cfg_num; i++) {
627 dist = hi556_get_reso_dist(&supported_modes[i], framefmt);
628 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
629 cur_best_fit_dist = dist;
630 cur_best_fit = i;
631 }
632 }
633
634 return &supported_modes[cur_best_fit];
635 }
636
hi556_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)637 static int hi556_set_fmt(struct v4l2_subdev *sd,
638 struct v4l2_subdev_pad_config *cfg,
639 struct v4l2_subdev_format *fmt)
640 {
641 struct hi556 *hi556 = to_hi556(sd);
642 const struct hi556_mode *mode;
643 s64 h_blank, vblank_def;
644
645 mutex_lock(&hi556->mutex);
646
647 mode = hi556_find_best_fit(hi556, fmt);
648 fmt->format.code = HI556_MEDIA_BUS_FMT;
649 fmt->format.width = mode->width;
650 fmt->format.height = mode->height;
651 fmt->format.field = V4L2_FIELD_NONE;
652 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
653 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
654 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
655 #else
656 mutex_unlock(&hi556->mutex);
657 return -ENOTTY;
658 #endif
659 } else {
660 hi556->cur_mode = mode;
661 h_blank = mode->hts_def - mode->width;
662 __v4l2_ctrl_modify_range(hi556->hblank, h_blank,
663 h_blank, 1, h_blank);
664 vblank_def = mode->vts_def - mode->height;
665 __v4l2_ctrl_modify_range(hi556->vblank, vblank_def,
666 HI556_VTS_MAX - mode->height,
667 1, vblank_def);
668 }
669
670 mutex_unlock(&hi556->mutex);
671
672 return 0;
673 }
674
hi556_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)675 static int hi556_get_fmt(struct v4l2_subdev *sd,
676 struct v4l2_subdev_pad_config *cfg,
677 struct v4l2_subdev_format *fmt)
678 {
679 struct hi556 *hi556 = to_hi556(sd);
680 const struct hi556_mode *mode = hi556->cur_mode;
681
682 mutex_lock(&hi556->mutex);
683 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
684 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
685 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
686 #else
687 mutex_unlock(&hi556->mutex);
688 return -ENOTTY;
689 #endif
690 } else {
691 fmt->format.width = mode->width;
692 fmt->format.height = mode->height;
693 fmt->format.code = HI556_MEDIA_BUS_FMT;
694 fmt->format.field = V4L2_FIELD_NONE;
695 }
696 mutex_unlock(&hi556->mutex);
697
698 return 0;
699 }
700
hi556_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)701 static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
702 struct v4l2_subdev_pad_config *cfg,
703 struct v4l2_subdev_mbus_code_enum *code)
704 {
705 if (code->index != 0)
706 return -EINVAL;
707 code->code = HI556_MEDIA_BUS_FMT;
708
709 return 0;
710 }
711
hi556_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)712 static int hi556_enum_frame_sizes(struct v4l2_subdev *sd,
713 struct v4l2_subdev_pad_config *cfg,
714 struct v4l2_subdev_frame_size_enum *fse)
715 {
716 struct hi556 *hi556 = to_hi556(sd);
717
718 if (fse->index >= hi556->cfg_num)
719 return -EINVAL;
720
721 if (fse->code != HI556_MEDIA_BUS_FMT)
722 return -EINVAL;
723
724 fse->min_width = supported_modes[fse->index].width;
725 fse->max_width = supported_modes[fse->index].width;
726 fse->max_height = supported_modes[fse->index].height;
727 fse->min_height = supported_modes[fse->index].height;
728
729 return 0;
730 }
731
hi556_enable_test_pattern(struct hi556 * hi556,u32 pattern)732 static int hi556_enable_test_pattern(struct hi556 *hi556, u32 pattern)
733 {
734
735 if (pattern) {
736 hi556_write_reg(hi556->client, HI556_REG_TEST_PATTERN,
737 HI556_REG_VALUE_08BIT, HI556_TEST_PATTERN_ENABLE);
738 hi556_write_reg(hi556->client, HI556_REG_TEST_PATTERN_SELECT,
739 HI556_REG_VALUE_08BIT, 0x01 << (pattern - 1));
740 } else {
741 hi556_write_reg(hi556->client, HI556_REG_TEST_PATTERN,
742 HI556_REG_VALUE_08BIT, HI556_TEST_PATTERN_DISABLE);
743 }
744 return 0;
745 }
746
hi556_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)747 static int hi556_g_frame_interval(struct v4l2_subdev *sd,
748 struct v4l2_subdev_frame_interval *fi)
749 {
750 struct hi556 *hi556 = to_hi556(sd);
751 const struct hi556_mode *mode = hi556->cur_mode;
752
753 fi->interval = mode->max_fps;
754
755 return 0;
756 }
757
hi556_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)758 static int hi556_g_mbus_config(struct v4l2_subdev *sd,
759 unsigned int pad_id,
760 struct v4l2_mbus_config *config)
761 {
762 u32 val = 1 << (HI556_LANES - 1) |
763 V4L2_MBUS_CSI2_CHANNEL_0 |
764 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
765
766 config->type = V4L2_MBUS_CSI2_DPHY;
767 config->flags = val;
768
769 return 0;
770 }
771
hi556_get_module_inf(struct hi556 * hi556,struct rkmodule_inf * inf)772 static void hi556_get_module_inf(struct hi556 *hi556,
773 struct rkmodule_inf *inf)
774 {
775 memset(inf, 0, sizeof(*inf));
776 strscpy(inf->base.sensor, HI556_NAME, sizeof(inf->base.sensor));
777 strscpy(inf->base.module, hi556->module_name,
778 sizeof(inf->base.module));
779 strscpy(inf->base.lens, hi556->len_name, sizeof(inf->base.lens));
780
781 }
782
hi556_set_awb_cfg(struct hi556 * hi556,struct rkmodule_awb_cfg * cfg)783 static void hi556_set_awb_cfg(struct hi556 *hi556,
784 struct rkmodule_awb_cfg *cfg)
785 {
786 mutex_lock(&hi556->mutex);
787 memcpy(&hi556->awb_cfg, cfg, sizeof(*cfg));
788 mutex_unlock(&hi556->mutex);
789 }
790
hi556_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)791 static long hi556_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
792 {
793 struct hi556 *hi556 = to_hi556(sd);
794 long ret = 0;
795 u32 stream = 0;
796
797 switch (cmd) {
798 case RKMODULE_GET_MODULE_INFO:
799 hi556_get_module_inf(hi556, (struct rkmodule_inf *)arg);
800 break;
801 case RKMODULE_AWB_CFG:
802 hi556_set_awb_cfg(hi556, (struct rkmodule_awb_cfg *)arg);
803 break;
804 case RKMODULE_SET_QUICK_STREAM:
805
806 stream = *((u32 *)arg);
807
808 if (stream)
809 ret = hi556_write_reg(hi556->client, HI556_REG_CTRL_MODE,
810 HI556_REG_VALUE_08BIT, HI556_MODE_STREAMING);
811 else
812 ret = hi556_write_reg(hi556->client, HI556_REG_CTRL_MODE,
813 HI556_REG_VALUE_08BIT, HI556_MODE_SW_STANDBY);
814 break;
815 default:
816 ret = -ENOIOCTLCMD;
817 break;
818 }
819
820 return ret;
821 }
822
823 #ifdef CONFIG_COMPAT
hi556_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)824 static long hi556_compat_ioctl32(struct v4l2_subdev *sd,
825 unsigned int cmd, unsigned long arg)
826 {
827 void __user *up = compat_ptr(arg);
828 struct rkmodule_inf *inf;
829 struct rkmodule_awb_cfg *awb_cfg;
830 long ret;
831 u32 stream = 0;
832
833 switch (cmd) {
834 case RKMODULE_GET_MODULE_INFO:
835 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
836 if (!inf) {
837 ret = -ENOMEM;
838 return ret;
839 }
840
841 ret = hi556_ioctl(sd, cmd, inf);
842 if (!ret) {
843 ret = copy_to_user(up, inf, sizeof(*inf));
844 if (ret)
845 ret = -EFAULT;
846 }
847 kfree(inf);
848 break;
849 case RKMODULE_AWB_CFG:
850 awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL);
851 if (!awb_cfg) {
852 ret = -ENOMEM;
853 return ret;
854 }
855
856 if (copy_from_user(awb_cfg, up, sizeof(*awb_cfg))) {
857 kfree(awb_cfg);
858 return -EFAULT;
859 }
860 ret = hi556_ioctl(sd, cmd, awb_cfg);
861 kfree(awb_cfg);
862 break;
863 case RKMODULE_SET_QUICK_STREAM:
864 if (copy_from_user(&stream, up, sizeof(u32)))
865 return -EFAULT;
866 ret = hi556_ioctl(sd, cmd, &stream);
867 break;
868 default:
869 ret = -ENOIOCTLCMD;
870 break;
871 }
872
873 return ret;
874 }
875 #endif
876
__hi556_start_stream(struct hi556 * hi556)877 static int __hi556_start_stream(struct hi556 *hi556)
878 {
879 int ret;
880
881 ret = hi556_write_array(hi556->client, hi556->cur_mode->reg_list);
882 if (ret)
883 return ret;
884
885 #ifdef CHECK_REG_VALUE
886 usleep_range(10000, 20000);
887 /* verify default values to make sure everything has */
888 /* been written correctly as expected */
889 dev_info(&hi556->client->dev, "%s:Check register value!\n",
890 __func__);
891 ret = hi556_reg_verify(hi556->client, hi556_global_regs);
892 if (ret)
893 return ret;
894
895 ret = hi556_reg_verify(hi556->client, hi556->cur_mode->reg_list);
896 if (ret)
897 return ret;
898 #endif
899
900 /* In case these controls are set before streaming */
901 mutex_unlock(&hi556->mutex);
902 ret = v4l2_ctrl_handler_setup(&hi556->ctrl_handler);
903 mutex_lock(&hi556->mutex);
904 if (ret)
905 return ret;
906
907 if (ret)
908 dev_info(&hi556->client->dev, "APPly otp failed!\n");
909
910 ret = hi556_write_reg(hi556->client, HI556_REG_CTRL_MODE,
911 HI556_REG_VALUE_08BIT, HI556_MODE_STREAMING);
912 return ret;
913 }
914
__hi556_stop_stream(struct hi556 * hi556)915 static int __hi556_stop_stream(struct hi556 *hi556)
916 {
917 return hi556_write_reg(hi556->client, HI556_REG_CTRL_MODE,
918 HI556_REG_VALUE_08BIT, HI556_MODE_SW_STANDBY);
919 }
920
hi556_s_stream(struct v4l2_subdev * sd,int on)921 static int hi556_s_stream(struct v4l2_subdev *sd, int on)
922 {
923 struct hi556 *hi556 = to_hi556(sd);
924 struct i2c_client *client = hi556->client;
925 int ret = 0;
926
927 dev_info(&client->dev, "%s: on: %d, %dx%d@%d\n", __func__, on,
928 hi556->cur_mode->width,
929 hi556->cur_mode->height,
930 DIV_ROUND_CLOSEST(hi556->cur_mode->max_fps.denominator,
931 hi556->cur_mode->max_fps.numerator));
932
933 mutex_lock(&hi556->mutex);
934 on = !!on;
935 if (on == hi556->streaming)
936 goto unlock_and_return;
937
938 if (on) {
939 dev_info(&client->dev, "stream on!!!\n");
940 ret = pm_runtime_get_sync(&client->dev);
941 if (ret < 0) {
942 pm_runtime_put_noidle(&client->dev);
943 goto unlock_and_return;
944 }
945
946 ret = __hi556_start_stream(hi556);
947 if (ret) {
948 v4l2_err(sd, "start stream failed while write regs\n");
949 pm_runtime_put(&client->dev);
950 goto unlock_and_return;
951 }
952 } else {
953 dev_info(&client->dev, "stream off!!!\n");
954 __hi556_stop_stream(hi556);
955 pm_runtime_put(&client->dev);
956 }
957
958 hi556->streaming = on;
959
960 unlock_and_return:
961 mutex_unlock(&hi556->mutex);
962
963 return ret;
964 }
965
hi556_s_power(struct v4l2_subdev * sd,int on)966 static int hi556_s_power(struct v4l2_subdev *sd, int on)
967 {
968 struct hi556 *hi556 = to_hi556(sd);
969 struct i2c_client *client = hi556->client;
970 int ret = 0;
971
972 dev_info(&client->dev, "%s(%d) on(%d)\n", __func__, __LINE__, on);
973 mutex_lock(&hi556->mutex);
974
975 /* If the power state is not modified - no work to do. */
976 if (hi556->power_on == !!on)
977 goto unlock_and_return;
978
979 if (on) {
980 ret = pm_runtime_get_sync(&client->dev);
981 if (ret < 0) {
982 pm_runtime_put_noidle(&client->dev);
983 goto unlock_and_return;
984 }
985
986 ret = hi556_write_array(hi556->client, hi556_global_regs);
987 if (ret) {
988 v4l2_err(sd, "could not set init registers\n");
989 pm_runtime_put_noidle(&client->dev);
990 goto unlock_and_return;
991 }
992
993 hi556->power_on = true;
994 } else {
995 pm_runtime_put(&client->dev);
996 hi556->power_on = false;
997 }
998
999 unlock_and_return:
1000 mutex_unlock(&hi556->mutex);
1001
1002 return ret;
1003 }
1004
1005 /* Calculate the delay in us by clock rate and clock cycles */
hi556_cal_delay(u32 cycles)1006 static inline u32 hi556_cal_delay(u32 cycles)
1007 {
1008 return DIV_ROUND_UP(cycles, HI556_XVCLK_FREQ / 1000 / 1000);
1009 }
1010
__hi556_power_on(struct hi556 * hi556)1011 static int __hi556_power_on(struct hi556 *hi556)
1012 {
1013 int ret;
1014 u32 delay_us;
1015 struct device *dev = &hi556->client->dev;
1016
1017 if (!IS_ERR(hi556->power_gpio))
1018 gpiod_set_value_cansleep(hi556->power_gpio, 1);
1019
1020 usleep_range(1000, 2000);
1021
1022 if (!IS_ERR_OR_NULL(hi556->pins_default)) {
1023 ret = pinctrl_select_state(hi556->pinctrl,
1024 hi556->pins_default);
1025 if (ret < 0)
1026 dev_err(dev, "could not set pins\n");
1027 }
1028 ret = clk_set_rate(hi556->xvclk, HI556_XVCLK_FREQ);
1029 if (ret < 0)
1030 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1031 if (clk_get_rate(hi556->xvclk) != HI556_XVCLK_FREQ)
1032 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1033
1034 ret = clk_prepare_enable(hi556->xvclk);
1035 if (ret < 0) {
1036 dev_err(dev, "Failed to enable xvclk\n");
1037 return ret;
1038 }
1039
1040 ret = regulator_bulk_enable(HI556_NUM_SUPPLIES, hi556->supplies);
1041 if (ret < 0) {
1042 dev_err(dev, "Failed to enable regulators\n");
1043 goto disable_clk;
1044 }
1045
1046 if (!IS_ERR(hi556->reset_gpio))
1047 gpiod_set_value_cansleep(hi556->reset_gpio, 1);
1048
1049 if (!IS_ERR(hi556->pwdn_gpio))
1050 gpiod_set_value_cansleep(hi556->pwdn_gpio, 1);
1051
1052 /* 8192 cycles prior to first SCCB transaction */
1053 delay_us = hi556_cal_delay(8192);
1054 usleep_range(delay_us, delay_us * 2);
1055 usleep_range(10000, 20000);
1056 return 0;
1057
1058 disable_clk:
1059 clk_disable_unprepare(hi556->xvclk);
1060
1061 return ret;
1062 }
1063
__hi556_power_off(struct hi556 * hi556)1064 static void __hi556_power_off(struct hi556 *hi556)
1065 {
1066 int ret;
1067 struct device *dev = &hi556->client->dev;
1068
1069 if (!IS_ERR(hi556->pwdn_gpio))
1070 gpiod_set_value_cansleep(hi556->pwdn_gpio, 0);
1071 clk_disable_unprepare(hi556->xvclk);
1072 if (!IS_ERR(hi556->reset_gpio))
1073 gpiod_set_value_cansleep(hi556->reset_gpio, 0);
1074 if (!IS_ERR_OR_NULL(hi556->pins_sleep)) {
1075 ret = pinctrl_select_state(hi556->pinctrl,
1076 hi556->pins_sleep);
1077 if (ret < 0)
1078 dev_dbg(dev, "could not set pins\n");
1079 }
1080 if (!IS_ERR(hi556->power_gpio))
1081 gpiod_set_value_cansleep(hi556->power_gpio, 0);
1082
1083 regulator_bulk_disable(HI556_NUM_SUPPLIES, hi556->supplies);
1084 }
1085
hi556_runtime_resume(struct device * dev)1086 static int hi556_runtime_resume(struct device *dev)
1087 {
1088 struct i2c_client *client = to_i2c_client(dev);
1089 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1090 struct hi556 *hi556 = to_hi556(sd);
1091
1092 return __hi556_power_on(hi556);
1093 }
1094
hi556_runtime_suspend(struct device * dev)1095 static int hi556_runtime_suspend(struct device *dev)
1096 {
1097 struct i2c_client *client = to_i2c_client(dev);
1098 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1099 struct hi556 *hi556 = to_hi556(sd);
1100
1101 __hi556_power_off(hi556);
1102
1103 return 0;
1104 }
1105
1106 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
hi556_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1107 static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1108 {
1109 struct hi556 *hi556 = to_hi556(sd);
1110 struct v4l2_mbus_framefmt *try_fmt =
1111 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1112 const struct hi556_mode *def_mode = &supported_modes[0];
1113
1114 mutex_lock(&hi556->mutex);
1115 /* Initialize try_fmt */
1116 try_fmt->width = def_mode->width;
1117 try_fmt->height = def_mode->height;
1118 try_fmt->code = HI556_MEDIA_BUS_FMT;
1119 try_fmt->field = V4L2_FIELD_NONE;
1120
1121 mutex_unlock(&hi556->mutex);
1122 /* No crop or compose */
1123
1124 return 0;
1125 }
1126 #endif
1127
hi556_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1128 static int hi556_enum_frame_interval(struct v4l2_subdev *sd,
1129 struct v4l2_subdev_pad_config *cfg,
1130 struct v4l2_subdev_frame_interval_enum *fie)
1131 {
1132 struct hi556 *hi556 = to_hi556(sd);
1133
1134 if (fie->index >= hi556->cfg_num)
1135 return -EINVAL;
1136
1137 if (fie->code != HI556_MEDIA_BUS_FMT)
1138 return -EINVAL;
1139
1140 fie->width = supported_modes[fie->index].width;
1141 fie->height = supported_modes[fie->index].height;
1142 fie->interval = supported_modes[fie->index].max_fps;
1143 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1144
1145 return 0;
1146 }
1147
1148 static const struct dev_pm_ops hi556_pm_ops = {
1149 SET_RUNTIME_PM_OPS(hi556_runtime_suspend,
1150 hi556_runtime_resume, NULL)
1151 };
1152
1153 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1154 static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
1155 .open = hi556_open,
1156 };
1157 #endif
1158
1159 static const struct v4l2_subdev_core_ops hi556_core_ops = {
1160 .s_power = hi556_s_power,
1161 .ioctl = hi556_ioctl,
1162 #ifdef CONFIG_COMPAT
1163 .compat_ioctl32 = hi556_compat_ioctl32,
1164 #endif
1165 };
1166
1167 static const struct v4l2_subdev_video_ops hi556_video_ops = {
1168 .s_stream = hi556_s_stream,
1169 .g_frame_interval = hi556_g_frame_interval,
1170 };
1171
1172 static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
1173 .enum_mbus_code = hi556_enum_mbus_code,
1174 .enum_frame_size = hi556_enum_frame_sizes,
1175 .enum_frame_interval = hi556_enum_frame_interval,
1176 .get_fmt = hi556_get_fmt,
1177 .set_fmt = hi556_set_fmt,
1178 .get_mbus_config = hi556_g_mbus_config,
1179 };
1180
1181 static const struct v4l2_subdev_ops hi556_subdev_ops = {
1182 .core = &hi556_core_ops,
1183 .video = &hi556_video_ops,
1184 .pad = &hi556_pad_ops,
1185 };
1186
hi556_set_exposure_reg(struct hi556 * hi556,u32 exposure)1187 static int hi556_set_exposure_reg(struct hi556 *hi556, u32 exposure)
1188 {
1189 int ret = 0;
1190 u32 cal_shutter = 0;
1191
1192 cal_shutter = exposure >> 1;
1193 cal_shutter = cal_shutter << 1;
1194
1195 ret = hi556_write_reg(hi556->client, HI556_REG_GROUP,
1196 HI556_REG_VALUE_08BIT, 0x01);
1197 ret |= hi556_write_reg(hi556->client,
1198 HI556_REG_EXPOSURE_H,
1199 HI556_REG_VALUE_08BIT,
1200 HI556_FETCH_HIGH_BYTE_EXP(cal_shutter));
1201 ret |= hi556_write_reg(hi556->client,
1202 HI556_REG_EXPOSURE_M,
1203 HI556_REG_VALUE_08BIT,
1204 HI556_FETCH_MIDDLE_BYTE_EXP(cal_shutter));
1205 ret |= hi556_write_reg(hi556->client,
1206 HI556_REG_EXPOSURE_L,
1207 HI556_REG_VALUE_08BIT,
1208 HI556_FETCH_LOW_BYTE_EXP(cal_shutter));
1209 ret |= hi556_write_reg(hi556->client, HI556_REG_GROUP,
1210 HI556_REG_VALUE_08BIT, 0x00);
1211
1212 return ret;
1213 }
1214
hi556_set_gain_reg(struct hi556 * hi556,u32 a_gain)1215 static int hi556_set_gain_reg(struct hi556 *hi556, u32 a_gain)
1216 {
1217 int ret = 0;
1218
1219 ret = hi556_write_reg(hi556->client, HI556_REG_GROUP,
1220 HI556_REG_VALUE_08BIT, 0x01);
1221 ret |= hi556_write_reg(hi556->client, HI556_REG_GAIN,
1222 HI556_REG_VALUE_08BIT, a_gain);
1223 ret |= hi556_write_reg(hi556->client, HI556_REG_GROUP,
1224 HI556_REG_VALUE_08BIT, 0x00);
1225
1226 return ret;
1227 }
1228
hi556_set_ctrl(struct v4l2_ctrl * ctrl)1229 static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
1230 {
1231 struct hi556 *hi556 = container_of(ctrl->handler,
1232 struct hi556, ctrl_handler);
1233 struct i2c_client *client = hi556->client;
1234 s64 max;
1235 u32 val = 0;
1236 int ret = 0;
1237
1238 /* Propagate change of current control to all related controls */
1239 switch (ctrl->id) {
1240 case V4L2_CID_VBLANK:
1241 /* Update max exposure while meeting expected vblanking */
1242 max = hi556->cur_mode->height + ctrl->val - 4;
1243 __v4l2_ctrl_modify_range(hi556->exposure,
1244 hi556->exposure->minimum, max,
1245 hi556->exposure->step,
1246 hi556->exposure->default_value);
1247 break;
1248 }
1249
1250 if (!pm_runtime_get_if_in_use(&client->dev))
1251 return 0;
1252
1253 switch (ctrl->id) {
1254 case V4L2_CID_EXPOSURE:
1255 dev_dbg(&client->dev, "set exposure value 0x%x\n", ctrl->val);
1256 /* 4 least significant bits of expsoure are fractional part */
1257 ret = hi556_set_exposure_reg(hi556, ctrl->val);
1258 break;
1259 case V4L2_CID_ANALOGUE_GAIN:
1260 dev_dbg(&client->dev, "set analog gain value 0x%x\n", ctrl->val);
1261 ret = hi556_set_gain_reg(hi556, ctrl->val);
1262 break;
1263 case V4L2_CID_VBLANK:
1264 dev_dbg(&client->dev, "set vb value 0x%x\n", ctrl->val);
1265 ret = hi556_write_reg(hi556->client, HI556_REG_VTS,
1266 HI556_REG_VALUE_16BIT,
1267 ctrl->val + hi556->cur_mode->height);
1268 break;
1269 case V4L2_CID_TEST_PATTERN:
1270 ret = hi556_enable_test_pattern(hi556, ctrl->val);
1271 break;
1272 case V4L2_CID_HFLIP:
1273 ret = hi556_read_reg(hi556->client, HI556_FLIP_MIRROR_REG,
1274 HI556_REG_VALUE_08BIT, &val);
1275 ret |= hi556_write_reg(hi556->client, HI556_FLIP_MIRROR_REG,
1276 HI556_REG_VALUE_08BIT,
1277 HI556_FETCH_MIRROR(val, ctrl->val));
1278 break;
1279 case V4L2_CID_VFLIP:
1280 ret = hi556_read_reg(hi556->client, HI556_FLIP_MIRROR_REG,
1281 HI556_REG_VALUE_08BIT, &val);
1282 ret |= hi556_write_reg(hi556->client, HI556_FLIP_MIRROR_REG,
1283 HI556_REG_VALUE_08BIT,
1284 HI556_FETCH_FLIP(val, ctrl->val));
1285 break;
1286 default:
1287 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1288 __func__, ctrl->id, ctrl->val);
1289 break;
1290 }
1291
1292 pm_runtime_put(&client->dev);
1293
1294 return ret;
1295 }
1296
1297 static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
1298 .s_ctrl = hi556_set_ctrl,
1299 };
1300
hi556_initialize_controls(struct hi556 * hi556)1301 static int hi556_initialize_controls(struct hi556 *hi556)
1302 {
1303 const struct hi556_mode *mode;
1304 struct v4l2_ctrl_handler *handler;
1305 struct v4l2_ctrl *ctrl;
1306 s64 exposure_max, vblank_def;
1307 u32 h_blank;
1308 int ret;
1309
1310 handler = &hi556->ctrl_handler;
1311 mode = hi556->cur_mode;
1312 ret = v4l2_ctrl_handler_init(handler, 9);
1313 if (ret)
1314 return ret;
1315 handler->lock = &hi556->mutex;
1316
1317 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1318 0, 0, link_freq_menu_items);
1319 if (ctrl)
1320 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1321
1322 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1323 0, hi556->pixel_rate, 1, hi556->pixel_rate);
1324
1325 h_blank = mode->hts_def - mode->width;
1326 hi556->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1327 h_blank, h_blank, 1, h_blank);
1328 if (hi556->hblank)
1329 hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1330
1331 vblank_def = mode->vts_def - mode->height;
1332 hi556->vblank = v4l2_ctrl_new_std(handler, &hi556_ctrl_ops,
1333 V4L2_CID_VBLANK, vblank_def,
1334 HI556_VTS_MAX - mode->height,
1335 1, vblank_def);
1336
1337 exposure_max = mode->vts_def - 4;
1338 hi556->exposure = v4l2_ctrl_new_std(handler, &hi556_ctrl_ops,
1339 V4L2_CID_EXPOSURE, HI556_EXPOSURE_MIN,
1340 exposure_max, HI556_EXPOSURE_STEP,
1341 mode->exp_def);
1342
1343 hi556->anal_gain = v4l2_ctrl_new_std(handler, &hi556_ctrl_ops,
1344 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1345 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1346 ANALOG_GAIN_DEFAULT);
1347
1348 hi556->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1349 &hi556_ctrl_ops, V4L2_CID_TEST_PATTERN,
1350 ARRAY_SIZE(hi556_test_pattern_menu) - 1,
1351 0, 0, hi556_test_pattern_menu);
1352
1353 v4l2_ctrl_new_std(handler, &hi556_ctrl_ops,
1354 V4L2_CID_HFLIP, 0, 1, 1, 0);
1355 v4l2_ctrl_new_std(handler, &hi556_ctrl_ops,
1356 V4L2_CID_VFLIP, 0, 1, 1, 0);
1357
1358 if (handler->error) {
1359 ret = handler->error;
1360 dev_err(&hi556->client->dev,
1361 "Failed to init controls(%d)\n", ret);
1362 goto err_free_handler;
1363 }
1364
1365 hi556->subdev.ctrl_handler = handler;
1366
1367 return 0;
1368
1369 err_free_handler:
1370 v4l2_ctrl_handler_free(handler);
1371
1372 return ret;
1373 }
1374
hi556_check_sensor_id(struct hi556 * hi556,struct i2c_client * client)1375 static int hi556_check_sensor_id(struct hi556 *hi556,
1376 struct i2c_client *client)
1377 {
1378 struct device *dev = &hi556->client->dev;
1379 u32 id = 0;
1380 int ret;
1381
1382 ret = hi556_read_reg(client, HI556_REG_CHIP_ID,
1383 HI556_REG_VALUE_16BIT, &id);
1384 if (id != CHIP_ID) {
1385 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1386 return -ENODEV;
1387 }
1388
1389 dev_info(dev, "Detected Hi%04x sensor\n", CHIP_ID);
1390
1391 return 0;
1392 }
1393
hi556_configure_regulators(struct hi556 * hi556)1394 static int hi556_configure_regulators(struct hi556 *hi556)
1395 {
1396 unsigned int i;
1397
1398 for (i = 0; i < HI556_NUM_SUPPLIES; i++)
1399 hi556->supplies[i].supply = hi556_supply_names[i];
1400
1401 return devm_regulator_bulk_get(&hi556->client->dev,
1402 HI556_NUM_SUPPLIES,
1403 hi556->supplies);
1404 }
1405
hi556_parse_of(struct hi556 * hi556)1406 static int hi556_parse_of(struct hi556 *hi556)
1407 {
1408 struct device *dev = &hi556->client->dev;
1409 struct device_node *endpoint;
1410 struct fwnode_handle *fwnode;
1411 int rval;
1412
1413 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1414 if (!endpoint) {
1415 dev_err(dev, "Failed to get endpoint\n");
1416 return -EINVAL;
1417 }
1418 fwnode = of_fwnode_handle(endpoint);
1419 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1420 if (rval <= 0) {
1421 dev_warn(dev, " Get mipi lane num failed!\n");
1422 return -1;
1423 }
1424
1425 hi556->lane_num = rval;
1426 if (hi556->lane_num == 2) {
1427 hi556->cur_mode = &supported_modes_2lane[0];
1428 supported_modes = supported_modes_2lane;
1429 hi556->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1430
1431 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1432 hi556->pixel_rate = MIPI_FREQ * 2U * hi556->lane_num / 8U;
1433 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
1434 hi556->lane_num, hi556->pixel_rate);
1435 } else {
1436 dev_err(dev, "unsupported lane_num(%d)\n", hi556->lane_num);
1437 return -1;
1438 }
1439
1440 return 0;
1441 }
1442
hi556_probe(struct i2c_client * client,const struct i2c_device_id * id)1443 static int hi556_probe(struct i2c_client *client,
1444 const struct i2c_device_id *id)
1445 {
1446 struct device *dev = &client->dev;
1447 struct device_node *node = dev->of_node;
1448 struct hi556 *hi556;
1449 struct v4l2_subdev *sd;
1450 char facing[2] = "b";
1451 int ret;
1452
1453 dev_info(dev, "driver version: %02x.%02x.%02x",
1454 DRIVER_VERSION >> 16,
1455 (DRIVER_VERSION & 0xff00) >> 8,
1456 DRIVER_VERSION & 0x00ff);
1457
1458 hi556 = devm_kzalloc(dev, sizeof(*hi556), GFP_KERNEL);
1459 if (!hi556)
1460 return -ENOMEM;
1461
1462 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1463 &hi556->module_index);
1464 if (ret) {
1465 dev_warn(dev, "could not get module index!\n");
1466 hi556->module_index = 0;
1467 }
1468 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1469 &hi556->module_facing);
1470 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1471 &hi556->module_name);
1472 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1473 &hi556->len_name);
1474 if (ret) {
1475 dev_err(dev, "could not get module information!\n");
1476 return -EINVAL;
1477 }
1478
1479 hi556->client = client;
1480
1481 hi556->xvclk = devm_clk_get(dev, "xvclk");
1482 if (IS_ERR(hi556->xvclk)) {
1483 dev_err(dev, "Failed to get xvclk\n");
1484 return -EINVAL;
1485 }
1486
1487 hi556->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
1488 if (IS_ERR(hi556->power_gpio))
1489 dev_warn(dev, "Failed to get power-gpios, maybe no use\n");
1490
1491 hi556->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1492 if (IS_ERR(hi556->reset_gpio))
1493 dev_warn(dev, "Failed to get reset-gpios, maybe no use\n");
1494
1495 hi556->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1496 if (IS_ERR(hi556->pwdn_gpio))
1497 dev_warn(dev, "Failed to get pwdn-gpios\n");
1498
1499 ret = hi556_configure_regulators(hi556);
1500 if (ret) {
1501 dev_err(dev, "Failed to get power regulators\n");
1502 return ret;
1503 }
1504 ret = hi556_parse_of(hi556);
1505 if (ret != 0)
1506 return -EINVAL;
1507
1508 hi556->pinctrl = devm_pinctrl_get(dev);
1509 if (!IS_ERR(hi556->pinctrl)) {
1510 hi556->pins_default =
1511 pinctrl_lookup_state(hi556->pinctrl,
1512 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1513 if (IS_ERR(hi556->pins_default))
1514 dev_err(dev, "could not get default pinstate\n");
1515
1516 hi556->pins_sleep =
1517 pinctrl_lookup_state(hi556->pinctrl,
1518 OF_CAMERA_PINCTRL_STATE_SLEEP);
1519 if (IS_ERR(hi556->pins_sleep))
1520 dev_err(dev, "could not get sleep pinstate\n");
1521 }
1522
1523 mutex_init(&hi556->mutex);
1524
1525 sd = &hi556->subdev;
1526 v4l2_i2c_subdev_init(sd, client, &hi556_subdev_ops);
1527 ret = hi556_initialize_controls(hi556);
1528 if (ret)
1529 goto err_destroy_mutex;
1530
1531 ret = __hi556_power_on(hi556);
1532 if (ret)
1533 goto err_free_handler;
1534
1535 ret = hi556_check_sensor_id(hi556, client);
1536 if (ret < 0) {
1537 dev_info(&client->dev, "%s(%d) Check id failed\n"
1538 "check following information:\n"
1539 "Power/PowerDown/Reset/Mclk/I2cBus !!\n",
1540 __func__, __LINE__);
1541 goto err_power_off;
1542 }
1543
1544 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1545 sd->internal_ops = &hi556_internal_ops;
1546 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1547 V4L2_SUBDEV_FL_HAS_EVENTS;
1548 #endif
1549 #if defined(CONFIG_MEDIA_CONTROLLER)
1550 hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
1551 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1552 ret = media_entity_pads_init(&sd->entity, 1, &hi556->pad);
1553 if (ret < 0)
1554 goto err_power_off;
1555 #endif
1556
1557 memset(facing, 0, sizeof(facing));
1558 if (strcmp(hi556->module_facing, "back") == 0)
1559 facing[0] = 'b';
1560 else
1561 facing[0] = 'f';
1562
1563 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1564 hi556->module_index, facing,
1565 HI556_NAME, dev_name(sd->dev));
1566
1567 ret = v4l2_async_register_subdev_sensor_common(sd);
1568 if (ret) {
1569 dev_err(dev, "v4l2 async register subdev failed\n");
1570 goto err_clean_entity;
1571 }
1572
1573 pm_runtime_set_active(dev);
1574 pm_runtime_enable(dev);
1575 pm_runtime_idle(dev);
1576
1577 return 0;
1578
1579 err_clean_entity:
1580 #if defined(CONFIG_MEDIA_CONTROLLER)
1581 media_entity_cleanup(&sd->entity);
1582 #endif
1583 err_power_off:
1584 __hi556_power_off(hi556);
1585 err_free_handler:
1586 v4l2_ctrl_handler_free(&hi556->ctrl_handler);
1587 err_destroy_mutex:
1588 mutex_destroy(&hi556->mutex);
1589
1590 return ret;
1591 }
1592
hi556_remove(struct i2c_client * client)1593 static int hi556_remove(struct i2c_client *client)
1594 {
1595 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1596 struct hi556 *hi556 = to_hi556(sd);
1597
1598 v4l2_async_unregister_subdev(sd);
1599 #if defined(CONFIG_MEDIA_CONTROLLER)
1600 media_entity_cleanup(&sd->entity);
1601 #endif
1602 v4l2_ctrl_handler_free(&hi556->ctrl_handler);
1603 mutex_destroy(&hi556->mutex);
1604
1605 pm_runtime_disable(&client->dev);
1606 if (!pm_runtime_status_suspended(&client->dev))
1607 __hi556_power_off(hi556);
1608 pm_runtime_set_suspended(&client->dev);
1609
1610 return 0;
1611 }
1612
1613 #if IS_ENABLED(CONFIG_OF)
1614 static const struct of_device_id hi556_of_match[] = {
1615 { .compatible = "hynix,hi556" },
1616 {},
1617 };
1618 MODULE_DEVICE_TABLE(of, hi556_of_match);
1619 #endif
1620
1621 static const struct i2c_device_id hi556_match_id[] = {
1622 { "hynix,hi556", 0 },
1623 { },
1624 };
1625
1626 static struct i2c_driver hi556_i2c_driver = {
1627 .driver = {
1628 .name = HI556_NAME,
1629 .pm = &hi556_pm_ops,
1630 .of_match_table = of_match_ptr(hi556_of_match),
1631 },
1632 .probe = &hi556_probe,
1633 .remove = &hi556_remove,
1634 .id_table = hi556_match_id,
1635 };
1636
sensor_mod_init(void)1637 static int __init sensor_mod_init(void)
1638 {
1639 return i2c_add_driver(&hi556_i2c_driver);
1640 }
1641
sensor_mod_exit(void)1642 static void __exit sensor_mod_exit(void)
1643 {
1644 i2c_del_driver(&hi556_i2c_driver);
1645 }
1646
1647 device_initcall_sync(sensor_mod_init);
1648 module_exit(sensor_mod_exit);
1649
1650 MODULE_DESCRIPTION("Hynix hi556 sensor driver");
1651 MODULE_LICENSE("GPL v2");
1652
1653