1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * gc5035 driver
4 *
5 * Copyright (C) 2019 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 init driver.
8 * TODO: add OTP function.
9 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
10 * V0.0X01.0X03 add enum_frame_interval function.
11 * V0.0X01.0X04 fix vb and gain set issues.
12 * V0.0X01.0X05 add quick stream on/off
13 */
14
15 #include <linux/clk.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/i2c.h>
20 #include <linux/module.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/of.h>
23 #include <linux/of_graph.h>
24 #include <linux/of_gpio.h>
25
26 #include <linux/regulator/consumer.h>
27 #include <linux/sysfs.h>
28 #include <linux/version.h>
29 #include <linux/rk-camera-module.h>
30 #include <media/media-entity.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-subdev.h>
34 #include <linux/pinctrl/consumer.h>
35 #include <linux/slab.h>
36
37 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x05)
38
39 #ifndef V4L2_CID_DIGITAL_GAIN
40 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
41 #endif
42
43 #define GC5035_LANES 2
44 #define GC5035_BITS_PER_SAMPLE 10
45 #define GC5035_LINK_FREQ_MHZ 438000000LL
46 #define MIPI_FREQ 438000000LL
47
48 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
49 #define GC5035_PIXEL_RATE (MIPI_FREQ * 2LL * 2LL / 10)
50 #define GC5035_XVCLK_FREQ 24000000
51
52 #define CHIP_ID 0x5035
53 #define GC5035_REG_CHIP_ID_H 0xf0
54 #define GC5035_REG_CHIP_ID_L 0xf1
55
56 #define GC5035_REG_SET_PAGE 0xfe
57 #define GC5035_SET_PAGE_ONE 0x00
58
59 #define GC5035_REG_CTRL_MODE 0x3e
60 #define GC5035_MODE_SW_STANDBY 0x01
61 #define GC5035_MODE_STREAMING 0x91
62
63 #define GC5035_REG_EXPOSURE_H 0x03
64 #define GC5035_REG_EXPOSURE_L 0x04
65 #define GC5035_FETCH_HIGH_BYTE_EXP(VAL) (((VAL) >> 8) & 0x0F) /* 4 Bits */
66 #define GC5035_FETCH_LOW_BYTE_EXP(VAL) ((VAL) & 0xFF) /* 8 Bits */
67 #define GC5035_EXPOSURE_MIN 4
68 #define GC5035_EXPOSURE_STEP 1
69 #define GC5035_VTS_MAX 0x1fff
70
71 #define GC5035_REG_AGAIN 0xb6
72 #define GC5035_REG_DGAIN_INT 0xb1
73 #define GC5035_REG_DGAIN_FRAC 0xb2
74 #define GC5035_GAIN_MIN 64
75 #define GC5035_GAIN_MAX 1024
76 #define GC5035_GAIN_STEP 1
77 #define GC5035_GAIN_DEFAULT 64
78
79 #define GC5035_REG_VTS_H 0x41
80 #define GC5035_REG_VTS_L 0x42
81
82 #define REG_NULL 0xFF
83
84 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
85 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
86
87 #define GC5035_NAME "gc5035"
88
89 static const char * const gc5035_supply_names[] = {
90 "avdd", /* Analog power */
91 "dovdd", /* Digital I/O power */
92 "dvdd", /* Digital core power */
93 };
94
95 #define GC5035_NUM_SUPPLIES ARRAY_SIZE(gc5035_supply_names)
96
97 #define IMAGE_NORMAL_MIRROR
98 #define DD_PARAM_QTY_5035 200
99 #define INFO_ROM_START_5035 0x08
100 #define INFO_WIDTH_5035 0x08
101 #define WB_ROM_START_5035 0x88
102 #define WB_WIDTH_5035 0x05
103 #define GOLDEN_ROM_START_5035 0xe0
104 #define GOLDEN_WIDTH_5035 0x05
105 #define WINDOW_WIDTH 0x0a30
106 #define WINDOW_HEIGHT 0x079c
107
108 /* SENSOR MIRROR FLIP INFO */
109 #define GC5035_MIRROR_FLIP_ENABLE 0
110 #if GC5035_MIRROR_FLIP_ENABLE
111 #define GC5035_MIRROR 0x83
112 #define GC5035_RSTDUMMY1 0x03
113 #define GC5035_RSTDUMMY2 0xfc
114 #else
115 #define GC5035_MIRROR 0x80
116 #define GC5035_RSTDUMMY1 0x02
117 #define GC5035_RSTDUMMY2 0x7c
118 #endif
119
120 struct gc5035_otp_info {
121 u32 flag; //bit[7]: info bit[6]:wb bit[3]:dd
122 u32 module_id;
123 u32 lens_id;
124 u16 vcm_id;
125 u16 vcm_driver_id;
126 u32 year;
127 u32 month;
128 u32 day;
129 u32 rg_ratio;
130 u32 bg_ratio;
131 u32 golden_rg;
132 u32 golden_bg;
133 u16 dd_param_x[DD_PARAM_QTY_5035];
134 u16 dd_param_y[DD_PARAM_QTY_5035];
135 u16 dd_param_type[DD_PARAM_QTY_5035];
136 u16 dd_cnt;
137 };
138
139 struct gc5035_id_name {
140 u32 id;
141 char name[RKMODULE_NAME_LEN];
142 };
143
144 struct regval {
145 u8 addr;
146 u8 val;
147 };
148
149 struct gc5035_mode {
150 u32 width;
151 u32 height;
152 struct v4l2_fract max_fps;
153 u32 hts_def;
154 u32 vts_def;
155 u32 exp_def;
156 const struct regval *reg_list;
157 };
158
159 struct gc5035 {
160 struct i2c_client *client;
161 struct clk *xvclk;
162 struct gpio_desc *reset_gpio;
163 struct gpio_desc *pwdn_gpio;
164 struct regulator_bulk_data supplies[GC5035_NUM_SUPPLIES];
165
166 struct pinctrl *pinctrl;
167 struct pinctrl_state *pins_default;
168 struct pinctrl_state *pins_sleep;
169
170 struct v4l2_subdev subdev;
171 struct media_pad pad;
172 struct v4l2_ctrl_handler ctrl_handler;
173 struct v4l2_ctrl *exposure;
174 struct v4l2_ctrl *anal_gain;
175 struct v4l2_ctrl *digi_gain;
176 struct v4l2_ctrl *hblank;
177 struct v4l2_ctrl *vblank;
178 struct v4l2_ctrl *test_pattern;
179 struct mutex mutex;
180 bool streaming;
181 bool power_on;
182 const struct gc5035_mode *cur_mode;
183 unsigned int lane_num;
184 unsigned int cfg_num;
185 unsigned int pixel_rate;
186 u32 module_index;
187 const char *module_facing;
188 const char *module_name;
189 const char *len_name;
190 u32 Dgain_ratio;
191 struct gc5035_otp_info *otp;
192 struct rkmodule_inf module_inf;
193 struct rkmodule_awb_cfg awb_cfg;
194 };
195
196 #define to_gc5035(sd) container_of(sd, struct gc5035, subdev)
197
198 /*
199 * Xclk 24Mhz
200 */
201 static const struct regval gc5035_global_regs[] = {
202 /* SYSTEM */
203 {0xfc, 0x01},
204 {0xf4, 0x40},
205 {0xf5, 0xe9},
206 {0xf6, 0x14},
207 {0xf8, 0x49},
208 {0xf9, 0x82},
209 {0xfa, 0x00},
210 {0xfc, 0x81},
211 {0xfe, 0x00},
212 {0x36, 0x01},
213 {0xd3, 0x87},
214 {0x36, 0x00},
215 {0x33, 0x00},
216 {0xfe, 0x03},
217 {0x01, 0xe7},
218 {0xf7, 0x01},
219 {0xfc, 0x8f},
220 {0xfc, 0x8f},
221 {0xfc, 0x8e},
222 {0xfe, 0x00},
223 {0xee, 0x30},
224 {0x87, 0x18},
225 {0xfe, 0x01},
226 {0x8c, 0x90},
227 {0xfe, 0x00},
228
229 /* Analog & CISCTL */
230 {0xfe, 0x00},
231 {0x05, 0x02},
232 {0x06, 0xda},
233 {0x9d, 0x0c},
234 {0x09, 0x00},
235 {0x0a, 0x04},
236 {0x0b, 0x00},
237 {0x0c, 0x03},
238 {0x0d, 0x07},
239 {0x0e, 0xa8},
240 {0x0f, 0x0a},
241 {0x10, 0x30},
242 {0x11, 0x02},
243 {0x17, GC5035_MIRROR},
244 {0x19, 0x05},
245 {0xfe, 0x02},
246 {0x30, 0x03},
247 {0x31, 0x03},
248 {0xfe, 0x00},
249 {0xd9, 0xc0},
250 {0x1b, 0x20},
251 {0x21, 0x48},
252 {0x28, 0x22},
253 {0x29, 0x58},
254 {0x44, 0x20},
255 {0x4b, 0x10},
256 {0x4e, 0x1a},
257 {0x50, 0x11},
258 {0x52, 0x33},
259 {0x53, 0x44},
260 {0x55, 0x10},
261 {0x5b, 0x11},
262 {0xc5, 0x02},
263 {0x8c, 0x1a},
264 {0xfe, 0x02},
265 {0x33, 0x05},
266 {0x32, 0x38},
267 {0xfe, 0x00},
268 {0x91, 0x80},
269 {0x92, 0x28},
270 {0x93, 0x20},
271 {0x95, 0xa0},
272 {0x96, 0xe0},
273 {0xd5, 0xfc},
274 {0x97, 0x28},
275 {0x16, 0x0c},
276 {0x1a, 0x1a},
277 {0x1f, 0x11},
278 {0x20, 0x10},
279 {0x46, 0xe3},
280 {0x4a, 0x04},
281 {0x54, GC5035_RSTDUMMY1},
282 {0x62, 0x00},
283 {0x72, 0xcf},
284 {0x73, 0xc9},
285 {0x7a, 0x05},
286 {0x7d, 0xcc},
287 {0x90, 0x00},
288 {0xce, 0x98},
289 {0xd0, 0xb2},
290 {0xd2, 0x40},
291 {0xe6, 0xe0},
292 {0xfe, 0x02},
293 {0x12, 0x01},
294 {0x13, 0x01},
295 {0x14, 0x01},
296 {0x15, 0x02},
297 {0x22, GC5035_RSTDUMMY2},
298 {0x91, 0x00},
299 {0x92, 0x00},
300 {0x93, 0x00},
301 {0x94, 0x00},
302 {0xfe, 0x00},
303 {0xfc, 0x88},
304 {0xfe, 0x10},
305 {0xfe, 0x00},
306 {0xfc, 0x8e},
307 {0xfe, 0x00},
308 {0xfe, 0x00},
309 {0xfe, 0x00},
310 {0xfc, 0x88},
311 {0xfe, 0x10},
312 {0xfe, 0x00},
313 {0xfc, 0x8e},
314
315 /* Gain */
316 {0xfe, 0x00},
317 {0xb0, 0x6e},
318 {0xb1, 0x01},
319 {0xb2, 0x00},
320 {0xb3, 0x00},
321 {0xb4, 0x00},
322 {0xb6, 0x00},
323
324 /* ISP */
325 {0xfe, 0x01},
326 {0x53, 0x00},
327 {0x89, 0x03},
328 {0x60, 0x40},
329 {0x87, 0x50},
330
331 /* BLK */
332 {0xfe, 0x01},
333 {0x42, 0x21},
334 {0x49, 0x03},
335 {0x4a, 0xff},
336 {0x4b, 0xc0},
337 {0x55, 0x00},
338
339 /* Anti_blooming */
340 {0xfe, 0x01},
341 {0x41, 0x28},
342 {0x4c, 0x00},
343 {0x4d, 0x00},
344 {0x4e, 0x3c},
345 {0x44, 0x08},
346 {0x48, 0x01},
347
348 /* Crop */
349 {0xfe, 0x01},
350 {0x91, 0x00},
351 {0x92, 0x08},
352 {0x93, 0x00},
353 {0x94, 0x07},
354 {0x95, 0x07},
355 {0x96, 0x98},
356 {0x97, 0x0a},
357 {0x98, 0x20},
358 {0x99, 0x00},
359
360 /* MIPI */
361 {0xfe, 0x03},
362 {0x02, 0x57},
363 {0x03, 0xb7},
364 {0x15, 0x14},
365 {0x18, 0x0f},
366 {0x21, 0x22},
367 {0x22, 0x06},
368 {0x23, 0x48},
369 {0x24, 0x12},
370 {0x25, 0x28},
371 {0x26, 0x08},
372 {0x29, 0x06},
373 {0x2a, 0x58},
374 {0x2b, 0x08},
375 {0xfe, 0x01},
376 {0x8c, 0x10},
377
378 {0xfe, 0x00},
379 {0x3e, 0x01},
380 {REG_NULL, 0x00},
381 };
382
383 /*
384 * Xclk 24Mhz
385 * max_framerate 30fps
386 * mipi_datarate per lane 876Mbps
387 */
388 static const struct regval gc5035_2592x1944_regs[] = {
389 /* lane snap */
390 {REG_NULL, 0x00},
391 };
392
393 static const struct gc5035_mode supported_modes_2lane[] = {
394 {
395 .width = 2592,
396 .height = 1944,
397 .max_fps = {
398 .numerator = 10000,
399 .denominator = 300000,
400 },
401 .exp_def = 0x07C0,
402 .hts_def = 0x0B68,
403 .vts_def = 0x07D0,
404 .reg_list = gc5035_2592x1944_regs,
405 },
406 };
407
408 static const struct gc5035_mode *supported_modes;
409
410 static const s64 link_freq_menu_items[] = {
411 GC5035_LINK_FREQ_MHZ
412 };
413
414 /* Write registers up to 4 at a time */
gc5035_write_reg(struct i2c_client * client,u8 reg,u8 val)415 static int gc5035_write_reg(struct i2c_client *client, u8 reg, u8 val)
416 {
417 struct i2c_msg msg;
418 u8 buf[2];
419 int ret;
420
421 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
422 buf[0] = reg & 0xFF;
423 buf[1] = val;
424
425 msg.addr = client->addr;
426 msg.flags = client->flags;
427 msg.buf = buf;
428 msg.len = sizeof(buf);
429
430 ret = i2c_transfer(client->adapter, &msg, 1);
431 if (ret >= 0)
432 return 0;
433
434 dev_err(&client->dev,
435 "gc5035 write reg(0x%x val:0x%x) failed !\n", reg, val);
436
437 return ret;
438 }
439
gc5035_write_array(struct i2c_client * client,const struct regval * regs)440 static int gc5035_write_array(struct i2c_client *client,
441 const struct regval *regs)
442 {
443 u32 i = 0;
444 int ret = 0;
445
446 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
447 ret = gc5035_write_reg(client, regs[i].addr, regs[i].val);
448
449 return ret;
450 }
451
452 /* Read registers up to 4 at a time */
gc5035_read_reg(struct i2c_client * client,u8 reg,u8 * val)453 static int gc5035_read_reg(struct i2c_client *client, u8 reg, u8 *val)
454 {
455 struct i2c_msg msg[2];
456 u8 buf[1];
457 int ret;
458
459 buf[0] = reg & 0xFF;
460
461 msg[0].addr = client->addr;
462 msg[0].flags = client->flags;
463 msg[0].buf = buf;
464 msg[0].len = sizeof(buf);
465
466 msg[1].addr = client->addr;
467 msg[1].flags = client->flags | I2C_M_RD;
468 msg[1].buf = buf;
469 msg[1].len = 1;
470
471 ret = i2c_transfer(client->adapter, msg, 2);
472 if (ret >= 0) {
473 *val = buf[0];
474 return 0;
475 }
476
477 dev_err(&client->dev,
478 "gc5035 read reg:0x%x failed !\n", reg);
479
480 return ret;
481 }
482
gc5035_get_reso_dist(const struct gc5035_mode * mode,struct v4l2_mbus_framefmt * framefmt)483 static int gc5035_get_reso_dist(const struct gc5035_mode *mode,
484 struct v4l2_mbus_framefmt *framefmt)
485 {
486 return abs(mode->width - framefmt->width) +
487 abs(mode->height - framefmt->height);
488 }
489
490 static const struct gc5035_mode *
gc5035_find_best_fit(struct gc5035 * gc5035,struct v4l2_subdev_format * fmt)491 gc5035_find_best_fit(struct gc5035 *gc5035,
492 struct v4l2_subdev_format *fmt)
493 {
494 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
495 int dist;
496 int cur_best_fit = 0;
497 int cur_best_fit_dist = -1;
498 unsigned int i;
499
500 for (i = 0; i < gc5035->cfg_num; i++) {
501 dist = gc5035_get_reso_dist(&supported_modes[i], framefmt);
502 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
503 cur_best_fit_dist = dist;
504 cur_best_fit = i;
505 }
506 }
507
508 return &supported_modes[cur_best_fit];
509 }
510
gc5035_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)511 static int gc5035_set_fmt(struct v4l2_subdev *sd,
512 struct v4l2_subdev_pad_config *cfg,
513 struct v4l2_subdev_format *fmt)
514 {
515 struct gc5035 *gc5035 = to_gc5035(sd);
516 const struct gc5035_mode *mode;
517 s64 h_blank, vblank_def;
518
519 mutex_lock(&gc5035->mutex);
520
521 mode = gc5035_find_best_fit(gc5035, fmt);
522 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
523 fmt->format.width = mode->width;
524 fmt->format.height = mode->height;
525 fmt->format.field = V4L2_FIELD_NONE;
526 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
527 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
528 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
529 #else
530 mutex_unlock(&gc5035->mutex);
531 return -ENOTTY;
532 #endif
533 } else {
534 gc5035->cur_mode = mode;
535 h_blank = mode->hts_def - mode->width;
536 __v4l2_ctrl_modify_range(gc5035->hblank, h_blank,
537 h_blank, 1, h_blank);
538 vblank_def = mode->vts_def - mode->height;
539 __v4l2_ctrl_modify_range(gc5035->vblank, vblank_def,
540 GC5035_VTS_MAX - mode->height,
541 1, vblank_def);
542 }
543
544 mutex_unlock(&gc5035->mutex);
545
546 return 0;
547 }
548
gc5035_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)549 static int gc5035_get_fmt(struct v4l2_subdev *sd,
550 struct v4l2_subdev_pad_config *cfg,
551 struct v4l2_subdev_format *fmt)
552 {
553 struct gc5035 *gc5035 = to_gc5035(sd);
554 const struct gc5035_mode *mode = gc5035->cur_mode;
555
556 mutex_lock(&gc5035->mutex);
557 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
558 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
559 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
560 #else
561 mutex_unlock(&gc5035->mutex);
562 return -ENOTTY;
563 #endif
564 } else {
565 fmt->format.width = mode->width;
566 fmt->format.height = mode->height;
567 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
568 fmt->format.field = V4L2_FIELD_NONE;
569 }
570 mutex_unlock(&gc5035->mutex);
571
572 return 0;
573 }
574
gc5035_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)575 static int gc5035_enum_mbus_code(struct v4l2_subdev *sd,
576 struct v4l2_subdev_pad_config *cfg,
577 struct v4l2_subdev_mbus_code_enum *code)
578 {
579 if (code->index != 0)
580 return -EINVAL;
581 code->code = MEDIA_BUS_FMT_SRGGB10_1X10;
582
583 return 0;
584 }
585
gc5035_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)586 static int gc5035_enum_frame_sizes(struct v4l2_subdev *sd,
587 struct v4l2_subdev_pad_config *cfg,
588 struct v4l2_subdev_frame_size_enum *fse)
589 {
590 struct gc5035 *gc5035 = to_gc5035(sd);
591
592 if (fse->index >= gc5035->cfg_num)
593 return -EINVAL;
594
595 if (fse->code != MEDIA_BUS_FMT_SRGGB10_1X10)
596 return -EINVAL;
597
598 fse->min_width = supported_modes[fse->index].width;
599 fse->max_width = supported_modes[fse->index].width;
600 fse->max_height = supported_modes[fse->index].height;
601 fse->min_height = supported_modes[fse->index].height;
602
603 return 0;
604 }
605
gc5035_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)606 static int gc5035_g_frame_interval(struct v4l2_subdev *sd,
607 struct v4l2_subdev_frame_interval *fi)
608 {
609 struct gc5035 *gc5035 = to_gc5035(sd);
610 const struct gc5035_mode *mode = gc5035->cur_mode;
611
612 fi->interval = mode->max_fps;
613
614 return 0;
615 }
616
gc5035_get_module_inf(struct gc5035 * gc5035,struct rkmodule_inf * inf)617 static void gc5035_get_module_inf(struct gc5035 *gc5035,
618 struct rkmodule_inf *inf)
619 {
620 strlcpy(inf->base.sensor,
621 GC5035_NAME,
622 sizeof(inf->base.sensor));
623 strlcpy(inf->base.module,
624 gc5035->module_name,
625 sizeof(inf->base.module));
626 strlcpy(inf->base.lens,
627 gc5035->len_name,
628 sizeof(inf->base.lens));
629 }
630
gc5035_set_module_inf(struct gc5035 * gc5035,struct rkmodule_awb_cfg * cfg)631 static void gc5035_set_module_inf(struct gc5035 *gc5035,
632 struct rkmodule_awb_cfg *cfg)
633 {
634 mutex_lock(&gc5035->mutex);
635 memcpy(&gc5035->awb_cfg, cfg, sizeof(*cfg));
636 mutex_unlock(&gc5035->mutex);
637 }
638
gc5035_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)639 static long gc5035_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
640 {
641 struct gc5035 *gc5035 = to_gc5035(sd);
642 long ret = 0;
643 u32 stream = 0;
644
645 switch (cmd) {
646 case RKMODULE_GET_MODULE_INFO:
647 gc5035_get_module_inf(gc5035, (struct rkmodule_inf *)arg);
648 break;
649 case RKMODULE_AWB_CFG:
650 gc5035_set_module_inf(gc5035, (struct rkmodule_awb_cfg *)arg);
651 break;
652 case RKMODULE_SET_QUICK_STREAM:
653
654 stream = *((u32 *)arg);
655
656 if (stream) {
657 ret = gc5035_write_reg(gc5035->client,
658 GC5035_REG_SET_PAGE,
659 GC5035_SET_PAGE_ONE);
660 ret |= gc5035_write_reg(gc5035->client,
661 GC5035_REG_CTRL_MODE,
662 GC5035_MODE_STREAMING);
663 } else {
664 ret = gc5035_write_reg(gc5035->client,
665 GC5035_REG_SET_PAGE,
666 GC5035_SET_PAGE_ONE);
667 ret |= gc5035_write_reg(gc5035->client,
668 GC5035_REG_CTRL_MODE,
669 GC5035_MODE_SW_STANDBY);
670 }
671 break;
672 default:
673 ret = -ENOTTY;
674 break;
675 }
676
677 return ret;
678 }
679
680 #ifdef CONFIG_COMPAT
gc5035_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)681 static long gc5035_compat_ioctl32(struct v4l2_subdev *sd,
682 unsigned int cmd, unsigned long arg)
683 {
684 void __user *up = compat_ptr(arg);
685 struct rkmodule_inf *inf;
686 struct rkmodule_awb_cfg *cfg;
687 long ret = 0;
688 u32 stream = 0;
689
690 switch (cmd) {
691 case RKMODULE_GET_MODULE_INFO:
692 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
693 if (!inf) {
694 ret = -ENOMEM;
695 return ret;
696 }
697
698 ret = gc5035_ioctl(sd, cmd, inf);
699 if (!ret) {
700 ret = copy_to_user(up, inf, sizeof(*inf));
701 if (ret)
702 ret = -EFAULT;
703 }
704 kfree(inf);
705 break;
706 case RKMODULE_AWB_CFG:
707 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
708 if (!cfg) {
709 ret = -ENOMEM;
710 return ret;
711 }
712
713 ret = copy_from_user(cfg, up, sizeof(*cfg));
714 if (!ret)
715 ret = gc5035_ioctl(sd, cmd, cfg);
716 else
717 ret = -EFAULT;
718 kfree(cfg);
719 break;
720 case RKMODULE_SET_QUICK_STREAM:
721 ret = copy_from_user(&stream, up, sizeof(u32));
722 if (!ret)
723 ret = gc5035_ioctl(sd, cmd, &stream);
724 else
725 ret = -EFAULT;
726
727 break;
728 default:
729 ret = -ENOTTY;
730 break;
731 }
732
733 return ret;
734 }
735 #endif
736
__gc5035_start_stream(struct gc5035 * gc5035)737 static int __gc5035_start_stream(struct gc5035 *gc5035)
738 {
739 int ret;
740
741 ret = gc5035_write_array(gc5035->client, gc5035->cur_mode->reg_list);
742 if (ret)
743 return ret;
744
745 /* In case these controls are set before streaming */
746 mutex_unlock(&gc5035->mutex);
747 ret = v4l2_ctrl_handler_setup(&gc5035->ctrl_handler);
748 mutex_lock(&gc5035->mutex);
749 if (ret)
750 return ret;
751 ret = gc5035_write_reg(gc5035->client,
752 GC5035_REG_SET_PAGE,
753 GC5035_SET_PAGE_ONE);
754 ret |= gc5035_write_reg(gc5035->client,
755 GC5035_REG_CTRL_MODE,
756 GC5035_MODE_STREAMING);
757 return ret;
758 }
759
__gc5035_stop_stream(struct gc5035 * gc5035)760 static int __gc5035_stop_stream(struct gc5035 *gc5035)
761 {
762 int ret;
763
764 ret = gc5035_write_reg(gc5035->client,
765 GC5035_REG_SET_PAGE,
766 GC5035_SET_PAGE_ONE);
767 ret |= gc5035_write_reg(gc5035->client,
768 GC5035_REG_CTRL_MODE,
769 GC5035_MODE_SW_STANDBY);
770 return ret;
771 }
772
gc5035_s_stream(struct v4l2_subdev * sd,int on)773 static int gc5035_s_stream(struct v4l2_subdev *sd, int on)
774 {
775 struct gc5035 *gc5035 = to_gc5035(sd);
776 struct i2c_client *client = gc5035->client;
777 int ret = 0;
778
779 mutex_lock(&gc5035->mutex);
780 on = !!on;
781 if (on == gc5035->streaming)
782 goto unlock_and_return;
783
784 if (on) {
785 ret = pm_runtime_get_sync(&client->dev);
786 if (ret < 0) {
787 pm_runtime_put_noidle(&client->dev);
788 goto unlock_and_return;
789 }
790
791 ret = __gc5035_start_stream(gc5035);
792 if (ret) {
793 v4l2_err(sd, "start stream failed while write regs\n");
794 pm_runtime_put(&client->dev);
795 goto unlock_and_return;
796 }
797 } else {
798 __gc5035_stop_stream(gc5035);
799 pm_runtime_put(&client->dev);
800 }
801
802 gc5035->streaming = on;
803
804 unlock_and_return:
805 mutex_unlock(&gc5035->mutex);
806
807 return ret;
808 }
809
gc5035_s_power(struct v4l2_subdev * sd,int on)810 static int gc5035_s_power(struct v4l2_subdev *sd, int on)
811 {
812 struct gc5035 *gc5035 = to_gc5035(sd);
813 struct i2c_client *client = gc5035->client;
814 int ret = 0;
815
816 mutex_lock(&gc5035->mutex);
817
818 /* If the power state is not modified - no work to do. */
819 if (gc5035->power_on == !!on)
820 goto unlock_and_return;
821
822 if (on) {
823 ret = pm_runtime_get_sync(&client->dev);
824 if (ret < 0) {
825 pm_runtime_put_noidle(&client->dev);
826 goto unlock_and_return;
827 }
828
829 ret = gc5035_write_array(gc5035->client, gc5035_global_regs);
830 if (ret) {
831 v4l2_err(sd, "could not set init registers\n");
832 pm_runtime_put_noidle(&client->dev);
833 goto unlock_and_return;
834 }
835
836 gc5035->power_on = true;
837 } else {
838 pm_runtime_put(&client->dev);
839 gc5035->power_on = false;
840 }
841
842 unlock_and_return:
843 mutex_unlock(&gc5035->mutex);
844
845 return ret;
846 }
847
848 /* Calculate the delay in us by clock rate and clock cycles */
gc5035_cal_delay(u32 cycles)849 static inline u32 gc5035_cal_delay(u32 cycles)
850 {
851 return DIV_ROUND_UP(cycles, GC5035_XVCLK_FREQ / 1000 / 1000);
852 }
853
__gc5035_power_on(struct gc5035 * gc5035)854 static int __gc5035_power_on(struct gc5035 *gc5035)
855 {
856 int ret;
857 u32 delay_us;
858 struct device *dev = &gc5035->client->dev;
859
860 if (!IS_ERR_OR_NULL(gc5035->pins_default)) {
861 ret = pinctrl_select_state(gc5035->pinctrl,
862 gc5035->pins_default);
863 if (ret < 0)
864 dev_err(dev, "could not set pins\n");
865 }
866 ret = clk_set_rate(gc5035->xvclk, GC5035_XVCLK_FREQ);
867 if (ret < 0)
868 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
869 if (clk_get_rate(gc5035->xvclk) != GC5035_XVCLK_FREQ)
870 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
871 ret = clk_prepare_enable(gc5035->xvclk);
872 if (ret < 0) {
873 dev_err(dev, "Failed to enable xvclk\n");
874 return ret;
875 }
876 if (!IS_ERR(gc5035->reset_gpio))
877 gpiod_set_value_cansleep(gc5035->reset_gpio, 0);
878
879 ret = regulator_bulk_enable(GC5035_NUM_SUPPLIES, gc5035->supplies);
880 if (ret < 0) {
881 dev_err(dev, "Failed to enable regulators\n");
882 goto disable_clk;
883 }
884
885 usleep_range(1000, 1100);
886 if (!IS_ERR(gc5035->reset_gpio))
887 gpiod_set_value_cansleep(gc5035->reset_gpio, 1);
888
889 usleep_range(500, 1000);
890 if (!IS_ERR(gc5035->pwdn_gpio))
891 gpiod_set_value_cansleep(gc5035->pwdn_gpio, 1);
892
893 /* 8192 cycles prior to first SCCB transaction */
894 delay_us = gc5035_cal_delay(8192);
895 usleep_range(delay_us, delay_us * 2);
896
897 return 0;
898
899 disable_clk:
900 clk_disable_unprepare(gc5035->xvclk);
901
902 return ret;
903 }
904
__gc5035_power_off(struct gc5035 * gc5035)905 static void __gc5035_power_off(struct gc5035 *gc5035)
906 {
907 int ret;
908
909 if (!IS_ERR(gc5035->pwdn_gpio))
910 gpiod_set_value_cansleep(gc5035->pwdn_gpio, 0);
911 clk_disable_unprepare(gc5035->xvclk);
912 if (!IS_ERR(gc5035->reset_gpio))
913 gpiod_set_value_cansleep(gc5035->reset_gpio, 0);
914 if (!IS_ERR_OR_NULL(gc5035->pins_sleep)) {
915 ret = pinctrl_select_state(gc5035->pinctrl,
916 gc5035->pins_sleep);
917 if (ret < 0)
918 dev_dbg(&gc5035->client->dev, "could not set pins\n");
919 }
920 regulator_bulk_disable(GC5035_NUM_SUPPLIES, gc5035->supplies);
921 }
922
gc5035_runtime_resume(struct device * dev)923 static int gc5035_runtime_resume(struct device *dev)
924 {
925 struct i2c_client *client = to_i2c_client(dev);
926 struct v4l2_subdev *sd = i2c_get_clientdata(client);
927 struct gc5035 *gc5035 = to_gc5035(sd);
928
929 return __gc5035_power_on(gc5035);
930 }
931
gc5035_runtime_suspend(struct device * dev)932 static int gc5035_runtime_suspend(struct device *dev)
933 {
934 struct i2c_client *client = to_i2c_client(dev);
935 struct v4l2_subdev *sd = i2c_get_clientdata(client);
936 struct gc5035 *gc5035 = to_gc5035(sd);
937
938 __gc5035_power_off(gc5035);
939
940 return 0;
941 }
942
943 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc5035_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)944 static int gc5035_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
945 {
946 struct gc5035 *gc5035 = to_gc5035(sd);
947 struct v4l2_mbus_framefmt *try_fmt =
948 v4l2_subdev_get_try_format(sd, fh->pad, 0);
949 const struct gc5035_mode *def_mode = &supported_modes[0];
950
951 mutex_lock(&gc5035->mutex);
952 /* Initialize try_fmt */
953 try_fmt->width = def_mode->width;
954 try_fmt->height = def_mode->height;
955 try_fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
956 try_fmt->field = V4L2_FIELD_NONE;
957
958 mutex_unlock(&gc5035->mutex);
959 /* No crop or compose */
960
961 return 0;
962 }
963 #endif
964
sensor_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)965 static int sensor_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
966 struct v4l2_mbus_config *config)
967 {
968 struct gc5035 *sensor = to_gc5035(sd);
969 struct device *dev = &sensor->client->dev;
970
971 dev_info(dev, "%s(%d) enter!\n", __func__, __LINE__);
972
973 if (2 == sensor->lane_num) {
974 config->type = V4L2_MBUS_CSI2_DPHY;
975 config->flags = V4L2_MBUS_CSI2_2_LANE |
976 V4L2_MBUS_CSI2_CHANNEL_0 |
977 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
978 } else {
979 dev_err(&sensor->client->dev,
980 "unsupported lane_num(%d)\n", sensor->lane_num);
981 }
982 return 0;
983 }
984
gc5035_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)985 static int gc5035_enum_frame_interval(struct v4l2_subdev *sd,
986 struct v4l2_subdev_pad_config *cfg,
987 struct v4l2_subdev_frame_interval_enum *fie)
988 {
989 struct gc5035 *gc5035 = to_gc5035(sd);
990
991 if (fie->index >= gc5035->cfg_num)
992 return -EINVAL;
993
994 fie->code = MEDIA_BUS_FMT_SRGGB10_1X10;
995
996 fie->width = supported_modes[fie->index].width;
997 fie->height = supported_modes[fie->index].height;
998 fie->interval = supported_modes[fie->index].max_fps;
999 return 0;
1000 }
1001
1002 static const struct dev_pm_ops gc5035_pm_ops = {
1003 SET_RUNTIME_PM_OPS(gc5035_runtime_suspend,
1004 gc5035_runtime_resume, NULL)
1005 };
1006
1007 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1008 static const struct v4l2_subdev_internal_ops gc5035_internal_ops = {
1009 .open = gc5035_open,
1010 };
1011 #endif
1012
1013 static const struct v4l2_subdev_core_ops gc5035_core_ops = {
1014 .s_power = gc5035_s_power,
1015 .ioctl = gc5035_ioctl,
1016 #ifdef CONFIG_COMPAT
1017 .compat_ioctl32 = gc5035_compat_ioctl32,
1018 #endif
1019 };
1020
1021 static const struct v4l2_subdev_video_ops gc5035_video_ops = {
1022 .s_stream = gc5035_s_stream,
1023 .g_frame_interval = gc5035_g_frame_interval,
1024 };
1025
1026 static const struct v4l2_subdev_pad_ops gc5035_pad_ops = {
1027 .enum_mbus_code = gc5035_enum_mbus_code,
1028 .enum_frame_size = gc5035_enum_frame_sizes,
1029 .enum_frame_interval = gc5035_enum_frame_interval,
1030 .get_fmt = gc5035_get_fmt,
1031 .set_fmt = gc5035_set_fmt,
1032 .get_mbus_config = sensor_g_mbus_config,
1033 };
1034
1035 static const struct v4l2_subdev_ops gc5035_subdev_ops = {
1036 .core = &gc5035_core_ops,
1037 .video = &gc5035_video_ops,
1038 .pad = &gc5035_pad_ops,
1039 };
1040
gc5035_set_test_pattern(struct gc5035 * gc5035,int value)1041 static int gc5035_set_test_pattern(struct gc5035 *gc5035, int value)
1042 {
1043 int ret = 0;
1044
1045 dev_info(&gc5035->client->dev, "Test Pattern!!\n");
1046 ret = gc5035_write_reg(gc5035->client, 0xfe, 0x01);
1047 ret |= gc5035_write_reg(gc5035->client, 0x8c, value);
1048 ret |= gc5035_write_reg(gc5035->client, 0xfe, 0x00);
1049 return ret;
1050 }
1051
1052 static const char * const gc5035_test_pattern_menu[] = {
1053 "Disabled",
1054 "Vertical Color Bar Type 1",
1055 "Vertical Color Bar Type 2",
1056 "Vertical Color Bar Type 3",
1057 "Vertical Color Bar Type 4"
1058 };
1059
gc5035_set_exposure_reg(struct gc5035 * gc5035,u32 exposure)1060 static int gc5035_set_exposure_reg(struct gc5035 *gc5035, u32 exposure)
1061 {
1062 u32 caltime = 0;
1063 int ret = 0;
1064
1065 caltime = exposure / 2;
1066 caltime = caltime * 2;
1067 gc5035->Dgain_ratio = 64 * exposure / caltime;
1068 ret = gc5035_write_reg(gc5035->client,
1069 GC5035_REG_SET_PAGE,
1070 GC5035_SET_PAGE_ONE);
1071
1072 ret |= gc5035_write_reg(gc5035->client,
1073 GC5035_REG_EXPOSURE_H,
1074 (caltime >> 8) & 0x3F);
1075 ret |= gc5035_write_reg(gc5035->client,
1076 GC5035_REG_EXPOSURE_L,
1077 caltime & 0xFF);
1078
1079 return ret;
1080 }
1081
1082 static u32 GC5035_AGC_Param[17][2] = {
1083 {64, 0},
1084 {76, 1},
1085 {90, 2},
1086 {106, 3},
1087 {126, 8},
1088 {150, 9},
1089 {179, 10},
1090 {211, 11},
1091 {250, 12},
1092 {301, 13},
1093 {358, 14},
1094 {427, 15},
1095 {499, 16},
1096 {589, 17},
1097 {704, 18},
1098 {830, 19},
1099 {998, 20},
1100 };
1101
gc5035_set_gain_reg(struct gc5035 * gc5035,u32 a_gain)1102 static int gc5035_set_gain_reg(struct gc5035 *gc5035, u32 a_gain)
1103 {
1104 struct device *dev = &gc5035->client->dev;
1105 int ret = 0, i = 0;
1106 u32 temp_gain = 0;
1107
1108 dev_info(dev, "%s(%d) a_gain(0x%08x)!\n", __func__, __LINE__, a_gain);
1109 if (a_gain < 0x40)
1110 a_gain = 0x40;
1111 else if (a_gain > 0x400)
1112 a_gain = 0x400;
1113 for (i = 16; i >= 0; i--) {
1114 if (a_gain >= GC5035_AGC_Param[i][0])
1115 break;
1116 }
1117
1118 ret = gc5035_write_reg(gc5035->client,
1119 GC5035_REG_SET_PAGE,
1120 GC5035_SET_PAGE_ONE);
1121 ret |= gc5035_write_reg(gc5035->client,
1122 GC5035_REG_AGAIN, GC5035_AGC_Param[i][1]);
1123 temp_gain = a_gain;
1124 temp_gain = temp_gain * gc5035->Dgain_ratio / GC5035_AGC_Param[i][0];
1125
1126 dev_info(dev, "AGC_Param[%d][0](%d) temp_gain is(0x%08x)!\n",
1127 i, GC5035_AGC_Param[i][0], temp_gain);
1128 ret |= gc5035_write_reg(gc5035->client,
1129 GC5035_REG_DGAIN_INT,
1130 temp_gain >> 6);
1131 ret |= gc5035_write_reg(gc5035->client,
1132 GC5035_REG_DGAIN_FRAC,
1133 (temp_gain << 2) & 0xfc);
1134 return ret;
1135 }
1136
gc5035_set_ctrl(struct v4l2_ctrl * ctrl)1137 static int gc5035_set_ctrl(struct v4l2_ctrl *ctrl)
1138 {
1139 struct gc5035 *gc5035 = container_of(ctrl->handler,
1140 struct gc5035, ctrl_handler);
1141 struct i2c_client *client = gc5035->client;
1142 s64 max;
1143 int ret = 0;
1144
1145 /* Propagate change of current control to all related controls */
1146 switch (ctrl->id) {
1147 case V4L2_CID_VBLANK:
1148 /* Update max exposure while meeting expected vblanking */
1149 max = gc5035->cur_mode->height + ctrl->val - 4;
1150 __v4l2_ctrl_modify_range(gc5035->exposure,
1151 gc5035->exposure->minimum, max,
1152 gc5035->exposure->step,
1153 gc5035->exposure->default_value);
1154 break;
1155 }
1156
1157 if (!pm_runtime_get_if_in_use(&client->dev))
1158 return 0;
1159
1160 switch (ctrl->id) {
1161 case V4L2_CID_EXPOSURE:
1162 /* 4 least significant bits of expsoure are fractional part */
1163 ret = gc5035_set_exposure_reg(gc5035, ctrl->val);
1164 break;
1165 case V4L2_CID_ANALOGUE_GAIN:
1166 ret = gc5035_set_gain_reg(gc5035, ctrl->val);
1167 break;
1168 case V4L2_CID_VBLANK:
1169 ret = gc5035_write_reg(gc5035->client,
1170 GC5035_REG_SET_PAGE,
1171 GC5035_SET_PAGE_ONE);
1172 ret |= gc5035_write_reg(gc5035->client,
1173 GC5035_REG_VTS_H,
1174 ((ctrl->val + gc5035->cur_mode->height) >> 8) & 0xff);
1175 ret |= gc5035_write_reg(gc5035->client,
1176 GC5035_REG_VTS_L,
1177 (ctrl->val + gc5035->cur_mode->height) & 0xff);
1178 break;
1179 case V4L2_CID_TEST_PATTERN:
1180 ret = gc5035_set_test_pattern(gc5035, ctrl->val);
1181 break;
1182 default:
1183 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1184 __func__, ctrl->id, ctrl->val);
1185 break;
1186 }
1187
1188 pm_runtime_put(&client->dev);
1189
1190 return ret;
1191 }
1192
1193 static const struct v4l2_ctrl_ops gc5035_ctrl_ops = {
1194 .s_ctrl = gc5035_set_ctrl,
1195 };
1196
gc5035_initialize_controls(struct gc5035 * gc5035)1197 static int gc5035_initialize_controls(struct gc5035 *gc5035)
1198 {
1199 const struct gc5035_mode *mode;
1200 struct v4l2_ctrl_handler *handler;
1201 struct v4l2_ctrl *ctrl;
1202 s64 exposure_max, vblank_def;
1203 u32 h_blank;
1204 int ret;
1205
1206 handler = &gc5035->ctrl_handler;
1207 mode = gc5035->cur_mode;
1208 ret = v4l2_ctrl_handler_init(handler, 8);
1209 if (ret)
1210 return ret;
1211 handler->lock = &gc5035->mutex;
1212
1213 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1214 0, 0, link_freq_menu_items);
1215 if (ctrl)
1216 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1217
1218 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1219 0, GC5035_PIXEL_RATE, 1, GC5035_PIXEL_RATE);
1220
1221 h_blank = mode->hts_def - mode->width;
1222 gc5035->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1223 h_blank, h_blank, 1, h_blank);
1224 if (gc5035->hblank)
1225 gc5035->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1226
1227 vblank_def = mode->vts_def - mode->height;
1228 gc5035->vblank = v4l2_ctrl_new_std(handler, &gc5035_ctrl_ops,
1229 V4L2_CID_VBLANK, vblank_def,
1230 GC5035_VTS_MAX - mode->height,
1231 1, vblank_def);
1232
1233 exposure_max = mode->vts_def - 4;
1234 gc5035->exposure = v4l2_ctrl_new_std(handler, &gc5035_ctrl_ops,
1235 V4L2_CID_EXPOSURE, GC5035_EXPOSURE_MIN,
1236 exposure_max, GC5035_EXPOSURE_STEP,
1237 mode->exp_def);
1238
1239 gc5035->anal_gain = v4l2_ctrl_new_std(handler, &gc5035_ctrl_ops,
1240 V4L2_CID_ANALOGUE_GAIN, GC5035_GAIN_MIN,
1241 GC5035_GAIN_MAX, GC5035_GAIN_STEP,
1242 GC5035_GAIN_DEFAULT);
1243
1244 gc5035->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1245 &gc5035_ctrl_ops, V4L2_CID_TEST_PATTERN,
1246 ARRAY_SIZE(gc5035_test_pattern_menu) - 1,
1247 0, 0, gc5035_test_pattern_menu);
1248
1249 if (handler->error) {
1250 ret = handler->error;
1251 dev_err(&gc5035->client->dev,
1252 "Failed to init controls(%d)\n", ret);
1253 goto err_free_handler;
1254 }
1255
1256 gc5035->subdev.ctrl_handler = handler;
1257
1258 return 0;
1259
1260 err_free_handler:
1261 v4l2_ctrl_handler_free(handler);
1262
1263 return ret;
1264 }
1265
gc5035_check_sensor_id(struct gc5035 * gc5035,struct i2c_client * client)1266 static int gc5035_check_sensor_id(struct gc5035 *gc5035,
1267 struct i2c_client *client)
1268 {
1269 struct device *dev = &gc5035->client->dev;
1270 u16 id = 0;
1271 u8 reg_H = 0;
1272 u8 reg_L = 0;
1273 int ret;
1274
1275 ret = gc5035_read_reg(client, GC5035_REG_CHIP_ID_H, ®_H);
1276 ret |= gc5035_read_reg(client, GC5035_REG_CHIP_ID_L, ®_L);
1277 id = ((reg_H << 8) & 0xff00) | (reg_L & 0xff);
1278 if (id != CHIP_ID) {
1279 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1280 return -ENODEV;
1281 }
1282 dev_info(dev, "detected gc%04x sensor\n", id);
1283 return ret;
1284 }
1285
gc5035_configure_regulators(struct gc5035 * gc5035)1286 static int gc5035_configure_regulators(struct gc5035 *gc5035)
1287 {
1288 unsigned int i;
1289
1290 for (i = 0; i < GC5035_NUM_SUPPLIES; i++)
1291 gc5035->supplies[i].supply = gc5035_supply_names[i];
1292
1293 return devm_regulator_bulk_get(&gc5035->client->dev,
1294 GC5035_NUM_SUPPLIES,
1295 gc5035->supplies);
1296 }
1297
free_gpio(struct gc5035 * sensor)1298 static void free_gpio(struct gc5035 *sensor)
1299 {
1300 struct device *dev = &sensor->client->dev;
1301 unsigned int temp_gpio = -1;
1302
1303 dev_info(dev, "%s(%d) enter!\n", __func__, __LINE__);
1304 if (!IS_ERR(sensor->reset_gpio)) {
1305 temp_gpio = desc_to_gpio(sensor->reset_gpio);
1306 dev_info(dev, "free gpio(%d)!\n", temp_gpio);
1307 gpio_free(temp_gpio);
1308 }
1309
1310 if (!IS_ERR(sensor->pwdn_gpio)) {
1311 temp_gpio = desc_to_gpio(sensor->pwdn_gpio);
1312 dev_info(dev, "free gpio(%d)!\n", temp_gpio);
1313 gpio_free(temp_gpio);
1314 }
1315 }
1316
gc5035_parse_of(struct gc5035 * gc5035)1317 static int gc5035_parse_of(struct gc5035 *gc5035)
1318 {
1319 struct device *dev = &gc5035->client->dev;
1320 struct device_node *endpoint;
1321 struct fwnode_handle *fwnode;
1322 int rval;
1323
1324 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1325 if (!endpoint) {
1326 dev_err(dev, "Failed to get endpoint\n");
1327 return -EINVAL;
1328 }
1329 fwnode = of_fwnode_handle(endpoint);
1330 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1331 if (rval <= 0) {
1332 dev_warn(dev, " Get mipi lane num failed!\n");
1333 return -1;
1334 }
1335
1336 gc5035->lane_num = rval;
1337 if (2 == gc5035->lane_num) {
1338 gc5035->cur_mode = &supported_modes_2lane[0];
1339 supported_modes = supported_modes_2lane;
1340 gc5035->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1341
1342 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1343 gc5035->pixel_rate = MIPI_FREQ * 2U * gc5035->lane_num / 10U;
1344 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
1345 gc5035->lane_num, gc5035->pixel_rate);
1346 } else {
1347 dev_err(dev, "unsupported lane_num(%d)\n", gc5035->lane_num);
1348 return -1;
1349 }
1350 return 0;
1351 }
1352
gc5035_probe(struct i2c_client * client,const struct i2c_device_id * id)1353 static int gc5035_probe(struct i2c_client *client,
1354 const struct i2c_device_id *id)
1355 {
1356 struct device *dev = &client->dev;
1357 struct device_node *node = dev->of_node;
1358 struct gc5035 *gc5035;
1359 struct v4l2_subdev *sd;
1360 char facing[2];
1361 int ret;
1362
1363 dev_info(dev, "driver version: %02x.%02x.%02x",
1364 DRIVER_VERSION >> 16,
1365 (DRIVER_VERSION & 0xff00) >> 8,
1366 DRIVER_VERSION & 0x00ff);
1367
1368 gc5035 = devm_kzalloc(dev, sizeof(*gc5035), GFP_KERNEL);
1369 if (!gc5035)
1370 return -ENOMEM;
1371
1372 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1373 &gc5035->module_index);
1374 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1375 &gc5035->module_facing);
1376 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1377 &gc5035->module_name);
1378 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1379 &gc5035->len_name);
1380 if (ret) {
1381 dev_err(dev, "could not get module information!\n");
1382 return -EINVAL;
1383 }
1384 gc5035->client = client;
1385
1386 gc5035->xvclk = devm_clk_get(dev, "xvclk");
1387 if (IS_ERR(gc5035->xvclk)) {
1388 dev_err(dev, "Failed to get xvclk\n");
1389 return -EINVAL;
1390 }
1391
1392 gc5035->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1393 if (IS_ERR(gc5035->reset_gpio))
1394 dev_warn(dev, "Failed to get reset-gpios\n");
1395
1396 gc5035->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1397 if (IS_ERR(gc5035->pwdn_gpio))
1398 dev_warn(dev, "Failed to get pwdn-gpios\n");
1399
1400 ret = gc5035_configure_regulators(gc5035);
1401 if (ret) {
1402 dev_err(dev, "Failed to get power regulators\n");
1403 return ret;
1404 }
1405
1406 ret = gc5035_parse_of(gc5035);
1407 if (ret != 0)
1408 return -EINVAL;
1409
1410 gc5035->pinctrl = devm_pinctrl_get(dev);
1411 if (!IS_ERR(gc5035->pinctrl)) {
1412 gc5035->pins_default =
1413 pinctrl_lookup_state(gc5035->pinctrl,
1414 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1415 if (IS_ERR(gc5035->pins_default))
1416 dev_err(dev, "could not get default pinstate\n");
1417
1418 gc5035->pins_sleep =
1419 pinctrl_lookup_state(gc5035->pinctrl,
1420 OF_CAMERA_PINCTRL_STATE_SLEEP);
1421 if (IS_ERR(gc5035->pins_sleep))
1422 dev_err(dev, "could not get sleep pinstate\n");
1423 }
1424
1425 mutex_init(&gc5035->mutex);
1426
1427 sd = &gc5035->subdev;
1428 v4l2_i2c_subdev_init(sd, client, &gc5035_subdev_ops);
1429 ret = gc5035_initialize_controls(gc5035);
1430 if (ret)
1431 goto err_destroy_mutex;
1432
1433 ret = __gc5035_power_on(gc5035);
1434 if (ret)
1435 goto err_free_handler;
1436
1437 ret = gc5035_check_sensor_id(gc5035, client);
1438 if (ret)
1439 goto err_power_off;
1440
1441 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1442 sd->internal_ops = &gc5035_internal_ops;
1443 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1444 V4L2_SUBDEV_FL_HAS_EVENTS;
1445 #endif
1446 #if defined(CONFIG_MEDIA_CONTROLLER)
1447 gc5035->pad.flags = MEDIA_PAD_FL_SOURCE;
1448 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1449 ret = media_entity_pads_init(&sd->entity, 1, &gc5035->pad);
1450 if (ret < 0)
1451 goto err_power_off;
1452 #endif
1453
1454 memset(facing, 0, sizeof(facing));
1455 if (strcmp(gc5035->module_facing, "back") == 0)
1456 facing[0] = 'b';
1457 else
1458 facing[0] = 'f';
1459
1460 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1461 gc5035->module_index, facing,
1462 GC5035_NAME, dev_name(sd->dev));
1463 ret = v4l2_async_register_subdev_sensor_common(sd);
1464 if (ret) {
1465 dev_err(dev, "v4l2 async register subdev failed\n");
1466 goto err_clean_entity;
1467 }
1468
1469 pm_runtime_set_active(dev);
1470 pm_runtime_enable(dev);
1471 pm_runtime_idle(dev);
1472
1473 return 0;
1474
1475 err_clean_entity:
1476 #if defined(CONFIG_MEDIA_CONTROLLER)
1477 media_entity_cleanup(&sd->entity);
1478 #endif
1479 err_power_off:
1480 __gc5035_power_off(gc5035);
1481 free_gpio(gc5035);
1482 err_free_handler:
1483 v4l2_ctrl_handler_free(&gc5035->ctrl_handler);
1484 err_destroy_mutex:
1485 mutex_destroy(&gc5035->mutex);
1486
1487 return ret;
1488 }
1489
gc5035_remove(struct i2c_client * client)1490 static int gc5035_remove(struct i2c_client *client)
1491 {
1492 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1493 struct gc5035 *gc5035 = to_gc5035(sd);
1494
1495 v4l2_async_unregister_subdev(sd);
1496 #if defined(CONFIG_MEDIA_CONTROLLER)
1497 media_entity_cleanup(&sd->entity);
1498 #endif
1499 v4l2_ctrl_handler_free(&gc5035->ctrl_handler);
1500 mutex_destroy(&gc5035->mutex);
1501
1502 pm_runtime_disable(&client->dev);
1503 if (!pm_runtime_status_suspended(&client->dev))
1504 __gc5035_power_off(gc5035);
1505 pm_runtime_set_suspended(&client->dev);
1506
1507 return 0;
1508 }
1509
1510 #if IS_ENABLED(CONFIG_OF)
1511 static const struct of_device_id gc5035_of_match[] = {
1512 { .compatible = "galaxycore,gc5035" },
1513 {},
1514 };
1515 MODULE_DEVICE_TABLE(of, gc5035_of_match);
1516 #endif
1517
1518 static const struct i2c_device_id gc5035_match_id[] = {
1519 { "galaxycore,gc5035", 0 },
1520 { },
1521 };
1522
1523 static struct i2c_driver gc5035_i2c_driver = {
1524 .driver = {
1525 .name = GC5035_NAME,
1526 .pm = &gc5035_pm_ops,
1527 .of_match_table = of_match_ptr(gc5035_of_match),
1528 },
1529 .probe = &gc5035_probe,
1530 .remove = &gc5035_remove,
1531 .id_table = gc5035_match_id,
1532 };
1533
sensor_mod_init(void)1534 static int __init sensor_mod_init(void)
1535 {
1536 return i2c_add_driver(&gc5035_i2c_driver);
1537 }
1538
sensor_mod_exit(void)1539 static void __exit sensor_mod_exit(void)
1540 {
1541 i2c_del_driver(&gc5035_i2c_driver);
1542 }
1543
1544 device_initcall_sync(sensor_mod_init);
1545 module_exit(sensor_mod_exit);
1546
1547 MODULE_DESCRIPTION("GalaxyCore gc5035 sensor driver");
1548 MODULE_LICENSE("GPL v2");
1549