1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * gc5024 driver
4 *
5 * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 init driver.
8 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
9 * V0.0X01.0X03 add enum_frame_interval function.
10 * TODO: add OTP function.
11 * V0.0X01.0X04 add quick stream on/off
12 */
13
14 #include <linux/clk.h>
15 #include <linux/device.h>
16 #include <linux/delay.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/i2c.h>
19 #include <linux/module.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/of.h>
22 #include <linux/of_graph.h>
23 #include <linux/of_gpio.h>
24
25 #include <linux/regulator/consumer.h>
26 #include <linux/sysfs.h>
27 #include <linux/version.h>
28 #include <linux/rk-camera-module.h>
29 #include <media/media-entity.h>
30 #include <media/v4l2-async.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-subdev.h>
33 #include <linux/pinctrl/consumer.h>
34 #include <linux/slab.h>
35
36 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x04)
37
38 //#define IMAGE_NORMAL
39 #define IMAGE_H_MIRROR
40 //#define IMAGE_V_MIRROR
41 //#define IMAGE_HV_MIRROR
42
43 #ifdef IMAGE_NORMAL
44 #define MIRROR 0xd4
45 #define PH_SWITCH 0x1b
46 #define STARTX 0x0d
47 #define STARTY 0x03
48 #endif
49 #ifdef IMAGE_H_MIRROR
50 #define MIRROR 0xd5
51 #define PH_SWITCH 0x1a
52 #define STARTX 0x02
53 #define STARTY 0x03
54 #endif
55 #ifdef IMAGE_V_MIRROR
56 #define MIRROR 0xd6
57 #define PH_SWITCH 0x1b
58 #define STARTX 0x0d
59 #define STARTY 0x02
60 #endif
61 #ifdef IMAGE_HV_MIRROR
62 #define MIRROR 0xd7
63 #define PH_SWITCH 0x1a
64 #define STARTX 0x02
65 #define STARTY 0x02
66 #endif
67
68 #ifndef V4L2_CID_DIGITAL_GAIN
69 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
70 #endif
71
72 #define GC5024_LANES 2
73 #define GC5024_BITS_PER_SAMPLE 10
74 #define MIPI_FREQ 420000000LL
75 /* pixel rate = link frequency * 1 * lanes / BITS_PER_SAMPLE */
76 #define GC5024_PIXEL_RATE (MIPI_FREQ * 2LL * 2LL / 10)
77 #define GC5024_XVCLK_FREQ 24000000
78
79 #define CHIP_ID 0x5024
80 #define GC5024_REG_CHIP_ID_H 0xf0
81 #define GC5024_REG_CHIP_ID_L 0xf1
82 #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
83
84 #define GC5024_PAGE_SELECT 0xfe
85 #define GC5024_MODE_SELECT 0x10
86 #define GC5024_MODE_SW_STANDBY 0x00
87 #define GC5024_MODE_STREAMING 0x91
88
89 #define GC5024_REG_EXPOSURE_H 0x03
90 #define GC5024_REG_EXPOSURE_L 0x04
91 #define GC5024_EXPOSURE_MIN 4
92 #define GC5024_EXPOSURE_STEP 1
93 #define GC5024_VTS_MAX 0x7fff
94
95 #define GC5024_ANALOG_GAIN_1 64 /*1.00x*/
96 #define GC5024_ANALOG_GAIN_2 88 /*1.375x*/
97 #define GC5024_ANALOG_GAIN_3 122 /*1.90x*/
98 #define GC5024_ANALOG_GAIN_4 168 /*2.625x*/
99 #define GC5024_ANALOG_GAIN_5 239 /*3.738x*/
100 #define GC5024_ANALOG_GAIN_6 330 /*5.163x*/
101 #define GC5024_ANALOG_GAIN_7 470 /*7.350x*/
102
103 #define GC5024_ANALOG_GAIN_REG 0xb6
104 #define GC5024_PREGAIN_H_REG 0xb1
105 #define GC5024_PREGAIN_L_REG 0xb2
106
107 #define GC5024_GAIN_MIN 0x40
108 #define GC5024_GAIN_MAX 0x200
109 #define GC5024_GAIN_STEP 1
110 #define GC5024_GAIN_DEFAULT 0x80
111
112 #define GC5024_REG_VTS_H 0x07
113 #define GC5024_REG_VTS_L 0x08
114
115 #define REG_NULL 0xFFFF
116
117 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
118 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
119
120 #define GC5024_NAME "gc5024"
121 #define GC5024_MEDIA_BUS_FMT MEDIA_BUS_FMT_SBGGR10_1X10
122
123 static const char * const gc5024_supply_names[] = {
124 "avdd", /* Analog power */
125 "dovdd", /* Digital I/O power */
126 "dvdd", /* Digital core power */
127 };
128
129 #define GC5024_NUM_SUPPLIES ARRAY_SIZE(gc5024_supply_names)
130
131 struct regval {
132 u16 addr;
133 u8 val;
134 };
135
136 struct gc5024_mode {
137 u32 width;
138 u32 height;
139 struct v4l2_fract max_fps;
140 u32 hts_def;
141 u32 vts_def;
142 u32 exp_def;
143 const struct regval *reg_list;
144 };
145
146 struct gc5024 {
147 struct i2c_client *client;
148 struct clk *xvclk;
149 struct gpio_desc *reset_gpio;
150 struct gpio_desc *pwdn_gpio;
151 struct regulator_bulk_data supplies[GC5024_NUM_SUPPLIES];
152
153 struct pinctrl *pinctrl;
154 struct pinctrl_state *pins_default;
155 struct pinctrl_state *pins_sleep;
156
157 struct v4l2_subdev subdev;
158 struct media_pad pad;
159 struct v4l2_ctrl_handler ctrl_handler;
160 struct v4l2_ctrl *exposure;
161 struct v4l2_ctrl *anal_gain;
162 struct v4l2_ctrl *digi_gain;
163 struct v4l2_ctrl *hblank;
164 struct v4l2_ctrl *vblank;
165 struct v4l2_ctrl *test_pattern;
166 struct mutex mutex;
167 bool streaming;
168 bool power_on;
169 const struct gc5024_mode *cur_mode;
170 unsigned int lane_num;
171 unsigned int cfg_num;
172 unsigned int pixel_rate;
173 u32 module_index;
174 const char *module_facing;
175 const char *module_name;
176 const char *len_name;
177 };
178
179 #define to_gc5024(sd) container_of(sd, struct gc5024, subdev)
180
181 /*
182 * Xclk 24Mhz
183 */
184 static const struct regval gc5024_global_regs[] = {
185 /*SYS*/
186 {0xfe, 0x00},
187 {0xfe, 0x00},
188 {0xfe, 0x00},
189 {0xf7, 0x01},
190 {0xf8, 0x0e},
191 {0xf9, 0xae},
192 {0xfa, 0x84},
193 {0xfc, 0xae},
194 {0xfe, 0x00},
195 {0xfe, 0x00},
196 {0xfe, 0x00},
197 {0x88, 0x03},
198 {0xe7, 0xc0},
199 /*Analog*/
200 {0xfe, 0x00},
201 {0x03, 0x08},
202 {0x04, 0xca},
203 {0x05, 0x01},
204 {0x06, 0xf4},
205 {0x07, 0x00},
206 {0x08, 0x08},
207 {0x0a, 0x00},
208 {0x0c, 0x00},
209 {0x0d, 0x07},
210 {0x0e, 0xa8},
211 {0x0f, 0x0a},
212 {0x10, 0x40},
213 {0x11, 0x31},
214 {0x12, 0x28},
215 {0x13, 0x10},
216 {0x17, MIRROR},
217 {0x18, 0x02},
218 {0x19, 0x0d},
219 {0x1a, PH_SWITCH},
220 {0x1b, 0x41},
221 {0x1c, 0x2b},
222 {0x21, 0x0f},
223 {0x24, 0xb0},
224 {0x29, 0x38},
225 {0x2d, 0x16},
226 {0x2f, 0x16},
227 {0x32, 0x49},
228 {0xcd, 0xaa},
229 {0xd0, 0xc2},
230 {0xd1, 0xc4},
231 {0xd2, 0xcb},
232 {0xd3, 0x73},
233 {0xd8, 0x18},
234 {0xdc, 0xba},
235 {0xe2, 0x20},
236 {0xe4, 0x78},
237 {0xe6, 0x08},
238 /*ISP*/
239 {0x80, 0x50},//50
240 {0x8d, 0x07},
241 {0x90, 0x01},
242 {0x92, STARTY},
243 {0x94, STARTX},
244 {0x95, 0x07},
245 {0x96, 0x98},
246 {0x97, 0x0a},
247 {0x98, 0x20},
248 /*Gain */
249 {0x99, 0x01},
250 {0x9a, 0x02},
251 {0x9b, 0x03},
252 {0x9c, 0x04},
253 {0x9d, 0x0d},
254 {0x9e, 0x15},
255 {0x9f, 0x1d},
256 {0xb0, 0x4b},
257 {0xb1, 0x01},
258 {0xb2, 0x00},
259 {0xb6, 0x00},
260 /*Blk*/
261 {0x40, 0x22},
262 {0x4e, 0x3c},
263 {0x4f, 0x00},
264 {0x60, 0x00},
265 {0x61, 0x80},
266 {0xfe, 0x02},
267 {0xa4, 0x30},
268 {0xa5, 0x00},
269 /*Dark Sun*/
270 {0x40, 0x00},//96 20160527
271 {0x42, 0x0f},
272 {0x45, 0xca},
273 {0x47, 0xff},
274 {0x48, 0xc8},
275 /*DD*/
276 {0x80, 0x98},
277 {0x81, 0x50},
278 {0x82, 0x60},
279 {0x84, 0x20},
280 {0x85, 0x10},
281 {0x86, 0x04},
282 {0x87, 0x20},
283 {0x88, 0x10},
284 {0x89, 0x04},
285 /*Degrid*/
286 {0x8a, 0x0a},
287 /*MIPI*/
288 {0xfe, 0x03},
289 {0x01, 0x07},
290 {0x02, 0x34}, //0x34
291 {0x03, 0x13}, //0x13
292 {0x04, 0x04},
293 {0x05, 0x00},
294 {0x06, 0x80},
295 {0x11, 0x2b},
296 {0x12, 0xa8},
297 {0x13, 0x0c},
298 {0x15, 0x00},
299 {0x16, 0x09},
300 {0x18, 0x01},
301 {0x21, 0x10},
302 {0x22, 0x05},
303 {0x23, 0x30},
304 {0x24, 0x10},
305 {0x25, 0x14},
306 {0x26, 0x08},
307 {0x29, 0x05},
308 {0x2a, 0x0a},
309 {0x2b, 0x08},
310 {0x42, 0x20},
311 {0x43, 0x0a},
312 {0xfe, 0x00},
313 {REG_NULL, 0x00},
314 };
315
316 /*
317 * Xclk 24Mhz
318 * max_framerate 30fps
319 * mipi_datarate per lane 1008Mbps
320 */
321 static const struct regval gc5024_2592x1944_regs[] = {
322 {REG_NULL, 0x00},
323 };
324
325 static const struct gc5024_mode supported_modes_2lane[] = {
326 {
327 .width = 2592,
328 .height = 1944,
329 .max_fps = {
330 .numerator = 10000,
331 .denominator = 200000,
332 },
333 .exp_def = 0x07C0,
334 .hts_def = 0x12C0,
335 .vts_def = 0x07D0,
336 .reg_list = gc5024_2592x1944_regs,
337 },
338 };
339
340 static const struct gc5024_mode *supported_modes;
341
342 static const s64 link_freq_menu_items[] = {
343 MIPI_FREQ
344 };
345
346 /* sensor register write */
gc5024_write_reg(struct i2c_client * client,u8 reg,u8 val)347 static int gc5024_write_reg(struct i2c_client *client, u8 reg, u8 val)
348 {
349 struct i2c_msg msg;
350 u8 buf[2];
351 int ret;
352
353 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
354 buf[0] = reg & 0xFF;
355 buf[1] = val;
356
357 msg.addr = client->addr;
358 msg.flags = client->flags;
359 msg.buf = buf;
360 msg.len = sizeof(buf);
361
362 ret = i2c_transfer(client->adapter, &msg, 1);
363 if (ret >= 0)
364 return 0;
365
366 dev_err(&client->dev,
367 "gc5024 write reg(0x%x val:0x%x) failed !\n", reg, val);
368
369 return ret;
370 }
371
372 /* sensor register read */
gc5024_read_reg(struct i2c_client * client,u8 reg,u8 * val)373 static int gc5024_read_reg(struct i2c_client *client, u8 reg, u8 *val)
374 {
375 struct i2c_msg msg[2];
376 u8 buf[1];
377 int ret;
378
379 buf[0] = reg & 0xFF;
380
381 msg[0].addr = client->addr;
382 msg[0].flags = client->flags;
383 msg[0].buf = buf;
384 msg[0].len = sizeof(buf);
385
386 msg[1].addr = client->addr;
387 msg[1].flags = client->flags | I2C_M_RD;
388 msg[1].buf = buf;
389 msg[1].len = 1;
390
391 ret = i2c_transfer(client->adapter, msg, 2);
392 if (ret >= 0) {
393 *val = buf[0];
394 return 0;
395 }
396
397 dev_err(&client->dev,
398 "gc5024 read reg:0x%x failed !\n", reg);
399
400 return ret;
401 }
402
gc5024_write_array(struct i2c_client * client,const struct regval * regs)403 static int gc5024_write_array(struct i2c_client *client,
404 const struct regval *regs)
405 {
406 u32 i;
407 int ret = 0;
408
409 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
410 ret = gc5024_write_reg(client, regs[i].addr, regs[i].val);
411
412 return ret;
413 }
414
gc5024_get_reso_dist(const struct gc5024_mode * mode,struct v4l2_mbus_framefmt * framefmt)415 static int gc5024_get_reso_dist(const struct gc5024_mode *mode,
416 struct v4l2_mbus_framefmt *framefmt)
417 {
418 return abs(mode->width - framefmt->width) +
419 abs(mode->height - framefmt->height);
420 }
421
422 static const struct gc5024_mode *
gc5024_find_best_fit(struct gc5024 * gc5024,struct v4l2_subdev_format * fmt)423 gc5024_find_best_fit(struct gc5024 *gc5024,
424 struct v4l2_subdev_format *fmt)
425 {
426 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
427 int dist;
428 int cur_best_fit = 0;
429 int cur_best_fit_dist = -1;
430 unsigned int i;
431
432 for (i = 0; i < gc5024->cfg_num; i++) {
433 dist = gc5024_get_reso_dist(&supported_modes[i], framefmt);
434 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
435 cur_best_fit_dist = dist;
436 cur_best_fit = i;
437 }
438 }
439
440 return &supported_modes[cur_best_fit];
441 }
442
gc5024_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)443 static int gc5024_set_fmt(struct v4l2_subdev *sd,
444 struct v4l2_subdev_pad_config *cfg,
445 struct v4l2_subdev_format *fmt)
446 {
447 struct gc5024 *gc5024 = to_gc5024(sd);
448 const struct gc5024_mode *mode;
449 s64 h_blank, vblank_def;
450
451 mutex_lock(&gc5024->mutex);
452
453 mode = gc5024_find_best_fit(gc5024, fmt);
454 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
455 fmt->format.width = mode->width;
456 fmt->format.height = mode->height;
457 fmt->format.field = V4L2_FIELD_NONE;
458 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
459 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
460 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
461 #else
462 mutex_unlock(&gc5024->mutex);
463 return -ENOTTY;
464 #endif
465 } else {
466 gc5024->cur_mode = mode;
467 h_blank = mode->hts_def - mode->width;
468 __v4l2_ctrl_modify_range(gc5024->hblank, h_blank,
469 h_blank, 1, h_blank);
470 vblank_def = mode->vts_def - mode->height;
471 __v4l2_ctrl_modify_range(gc5024->vblank, vblank_def,
472 GC5024_VTS_MAX - mode->height,
473 1, vblank_def);
474 }
475
476 mutex_unlock(&gc5024->mutex);
477
478 return 0;
479 }
480
gc5024_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)481 static int gc5024_get_fmt(struct v4l2_subdev *sd,
482 struct v4l2_subdev_pad_config *cfg,
483 struct v4l2_subdev_format *fmt)
484 {
485 struct gc5024 *gc5024 = to_gc5024(sd);
486 const struct gc5024_mode *mode = gc5024->cur_mode;
487
488 mutex_lock(&gc5024->mutex);
489 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
490 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
491 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
492 #else
493 mutex_unlock(&gc5024->mutex);
494 return -ENOTTY;
495 #endif
496 } else {
497 fmt->format.width = mode->width;
498 fmt->format.height = mode->height;
499 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
500 fmt->format.field = V4L2_FIELD_NONE;
501 }
502 mutex_unlock(&gc5024->mutex);
503
504 return 0;
505 }
506
gc5024_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)507 static int gc5024_enum_mbus_code(struct v4l2_subdev *sd,
508 struct v4l2_subdev_pad_config *cfg,
509 struct v4l2_subdev_mbus_code_enum *code)
510 {
511 if (code->index != 0)
512 return -EINVAL;
513 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
514
515 return 0;
516 }
517
gc5024_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)518 static int gc5024_enum_frame_sizes(struct v4l2_subdev *sd,
519 struct v4l2_subdev_pad_config *cfg,
520 struct v4l2_subdev_frame_size_enum *fse)
521 {
522 struct gc5024 *gc5024 = to_gc5024(sd);
523
524 if (fse->index >= gc5024->cfg_num)
525 return -EINVAL;
526
527 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
528 return -EINVAL;
529
530 fse->min_width = supported_modes[fse->index].width;
531 fse->max_width = supported_modes[fse->index].width;
532 fse->max_height = supported_modes[fse->index].height;
533 fse->min_height = supported_modes[fse->index].height;
534
535 return 0;
536 }
537
gc5024_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)538 static int gc5024_g_frame_interval(struct v4l2_subdev *sd,
539 struct v4l2_subdev_frame_interval *fi)
540 {
541 struct gc5024 *gc5024 = to_gc5024(sd);
542 const struct gc5024_mode *mode = gc5024->cur_mode;
543
544 fi->interval = mode->max_fps;
545
546 return 0;
547 }
548
gc5024_get_module_inf(struct gc5024 * gc5024,struct rkmodule_inf * inf)549 static void gc5024_get_module_inf(struct gc5024 *gc5024,
550 struct rkmodule_inf *inf)
551 {
552 strlcpy(inf->base.sensor,
553 GC5024_NAME,
554 sizeof(inf->base.sensor));
555 strlcpy(inf->base.module,
556 gc5024->module_name,
557 sizeof(inf->base.module));
558 strlcpy(inf->base.lens,
559 gc5024->len_name,
560 sizeof(inf->base.lens));
561 }
562
gc5024_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)563 static long gc5024_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
564 {
565 struct gc5024 *gc5024 = to_gc5024(sd);
566 long ret = 0;
567 u32 stream = 0;
568
569 switch (cmd) {
570 case RKMODULE_GET_MODULE_INFO:
571 gc5024_get_module_inf(gc5024, (struct rkmodule_inf *)arg);
572 break;
573 case RKMODULE_SET_QUICK_STREAM:
574
575 stream = *((u32 *)arg);
576
577 if (stream) {
578 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x03);
579 ret |= gc5024_write_reg(gc5024->client, GC5024_MODE_SELECT,
580 GC5024_MODE_STREAMING);
581 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x00);
582 } else {
583 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x03);
584 ret |= gc5024_write_reg(gc5024->client, GC5024_MODE_SELECT,
585 GC5024_MODE_SW_STANDBY);
586 ret |= gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x00);
587 }
588 break;
589 default:
590 ret = -ENOIOCTLCMD;
591 break;
592 }
593
594 return ret;
595 }
596
597 #ifdef CONFIG_COMPAT
gc5024_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)598 static long gc5024_compat_ioctl32(struct v4l2_subdev *sd,
599 unsigned int cmd, unsigned long arg)
600 {
601 void __user *up = compat_ptr(arg);
602 struct rkmodule_inf *inf;
603 struct rkmodule_awb_cfg *cfg;
604 long ret;
605 u32 stream = 0;
606
607 switch (cmd) {
608 case RKMODULE_GET_MODULE_INFO:
609 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
610 if (!inf) {
611 ret = -ENOMEM;
612 return ret;
613 }
614
615 ret = gc5024_ioctl(sd, cmd, inf);
616 if (!ret)
617 ret = copy_to_user(up, inf, sizeof(*inf));
618 kfree(inf);
619 break;
620 case RKMODULE_AWB_CFG:
621 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
622 if (!cfg) {
623 ret = -ENOMEM;
624 return ret;
625 }
626
627 ret = copy_from_user(cfg, up, sizeof(*cfg));
628 if (!ret)
629 ret = gc5024_ioctl(sd, cmd, cfg);
630 kfree(cfg);
631 break;
632 case RKMODULE_SET_QUICK_STREAM:
633 ret = copy_from_user(&stream, up, sizeof(u32));
634 if (!ret)
635 ret = gc5024_ioctl(sd, cmd, &stream);
636 break;
637 default:
638 ret = -ENOIOCTLCMD;
639 break;
640 }
641
642 return ret;
643 }
644 #endif
645
__gc5024_start_stream(struct gc5024 * gc5024)646 static int __gc5024_start_stream(struct gc5024 *gc5024)
647 {
648 int ret;
649
650 ret = gc5024_write_array(gc5024->client, gc5024->cur_mode->reg_list);
651 if (ret)
652 return ret;
653
654 /* In case these controls are set before streaming */
655 mutex_unlock(&gc5024->mutex);
656 ret = v4l2_ctrl_handler_setup(&gc5024->ctrl_handler);
657 mutex_lock(&gc5024->mutex);
658 if (ret)
659 return ret;
660
661 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x03);
662 ret |= gc5024_write_reg(gc5024->client, GC5024_MODE_SELECT,
663 GC5024_MODE_STREAMING);
664 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x00);
665 return ret;
666 }
667
__gc5024_stop_stream(struct gc5024 * gc5024)668 static int __gc5024_stop_stream(struct gc5024 *gc5024)
669 {
670 int ret;
671
672 ret = gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x03);
673 ret |= gc5024_write_reg(gc5024->client, GC5024_MODE_SELECT,
674 GC5024_MODE_SW_STANDBY);
675 ret |= gc5024_write_reg(gc5024->client, GC5024_PAGE_SELECT, 0x00);
676 return ret;
677 }
678
gc5024_s_stream(struct v4l2_subdev * sd,int on)679 static int gc5024_s_stream(struct v4l2_subdev *sd, int on)
680 {
681 struct gc5024 *gc5024 = to_gc5024(sd);
682 struct i2c_client *client = gc5024->client;
683 int ret = 0;
684
685 mutex_lock(&gc5024->mutex);
686 on = !!on;
687 if (on == gc5024->streaming)
688 goto unlock_and_return;
689
690 if (on) {
691 ret = pm_runtime_get_sync(&client->dev);
692 if (ret < 0) {
693 pm_runtime_put_noidle(&client->dev);
694 goto unlock_and_return;
695 }
696
697 ret = __gc5024_start_stream(gc5024);
698 if (ret) {
699 v4l2_err(sd, "start stream failed while write regs\n");
700 pm_runtime_put(&client->dev);
701 goto unlock_and_return;
702 }
703 } else {
704 __gc5024_stop_stream(gc5024);
705 pm_runtime_put(&client->dev);
706 }
707
708 gc5024->streaming = on;
709
710 unlock_and_return:
711 mutex_unlock(&gc5024->mutex);
712
713 return ret;
714 }
715
gc5024_s_power(struct v4l2_subdev * sd,int on)716 static int gc5024_s_power(struct v4l2_subdev *sd, int on)
717 {
718 struct gc5024 *gc5024 = to_gc5024(sd);
719 struct i2c_client *client = gc5024->client;
720 int ret = 0;
721
722 mutex_lock(&gc5024->mutex);
723
724 /* If the power state is not modified - no work to do. */
725 if (gc5024->power_on == !!on)
726 goto unlock_and_return;
727
728 if (on) {
729 ret = pm_runtime_get_sync(&client->dev);
730 if (ret < 0) {
731 pm_runtime_put_noidle(&client->dev);
732 goto unlock_and_return;
733 }
734
735 ret = gc5024_write_array(gc5024->client, gc5024_global_regs);
736 if (ret) {
737 v4l2_err(sd, "could not set init registers\n");
738 pm_runtime_put_noidle(&client->dev);
739 goto unlock_and_return;
740 }
741
742 gc5024->power_on = true;
743 } else {
744 pm_runtime_put(&client->dev);
745 gc5024->power_on = false;
746 }
747
748 unlock_and_return:
749 mutex_unlock(&gc5024->mutex);
750
751 return ret;
752 }
753
754 /* Calculate the delay in us by clock rate and clock cycles */
gc5024_cal_delay(u32 cycles)755 static inline u32 gc5024_cal_delay(u32 cycles)
756 {
757 return DIV_ROUND_UP(cycles, GC5024_XVCLK_FREQ / 1000 / 1000);
758 }
759
__gc5024_power_on(struct gc5024 * gc5024)760 static int __gc5024_power_on(struct gc5024 *gc5024)
761 {
762 int ret;
763 u32 delay_us;
764 struct device *dev = &gc5024->client->dev;
765
766 if (!IS_ERR_OR_NULL(gc5024->pins_default)) {
767 ret = pinctrl_select_state(gc5024->pinctrl,
768 gc5024->pins_default);
769 if (ret < 0)
770 dev_err(dev, "could not set pins\n");
771 }
772 ret = clk_set_rate(gc5024->xvclk, GC5024_XVCLK_FREQ);
773 if (ret < 0)
774 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
775 if (clk_get_rate(gc5024->xvclk) != GC5024_XVCLK_FREQ)
776 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
777 ret = clk_prepare_enable(gc5024->xvclk);
778 if (ret < 0) {
779 dev_err(dev, "Failed to enable xvclk\n");
780 return ret;
781 }
782
783 if (!IS_ERR(gc5024->pwdn_gpio))
784 gpiod_set_value_cansleep(gc5024->pwdn_gpio, 0);
785
786 if (!IS_ERR(gc5024->reset_gpio))
787 gpiod_set_value_cansleep(gc5024->reset_gpio, 0);
788
789 usleep_range(500, 1000);
790
791 ret = regulator_bulk_enable(GC5024_NUM_SUPPLIES, gc5024->supplies);
792 if (ret < 0) {
793 dev_err(dev, "Failed to enable regulators\n");
794 goto disable_clk;
795 }
796
797 if (!IS_ERR(gc5024->reset_gpio))
798 gpiod_set_value_cansleep(gc5024->reset_gpio, 1);
799
800 /* 8192 cycles prior to first SCCB transaction */
801 delay_us = gc5024_cal_delay(8192);
802 usleep_range(delay_us, delay_us * 2);
803
804 return 0;
805
806 disable_clk:
807 clk_disable_unprepare(gc5024->xvclk);
808
809 return ret;
810 }
811
__gc5024_power_off(struct gc5024 * gc5024)812 static void __gc5024_power_off(struct gc5024 *gc5024)
813 {
814 int ret;
815 struct device *dev = &gc5024->client->dev;
816
817 if (!IS_ERR(gc5024->pwdn_gpio))
818 gpiod_set_value_cansleep(gc5024->pwdn_gpio, 1);
819 clk_disable_unprepare(gc5024->xvclk);
820 if (!IS_ERR(gc5024->reset_gpio))
821 gpiod_set_value_cansleep(gc5024->reset_gpio, 0);
822 if (!IS_ERR_OR_NULL(gc5024->pins_sleep)) {
823 ret = pinctrl_select_state(gc5024->pinctrl,
824 gc5024->pins_sleep);
825 if (ret < 0)
826 dev_dbg(dev, "could not set pins\n");
827 }
828 regulator_bulk_disable(GC5024_NUM_SUPPLIES, gc5024->supplies);
829 }
830
gc5024_runtime_resume(struct device * dev)831 static int gc5024_runtime_resume(struct device *dev)
832 {
833 struct i2c_client *client = to_i2c_client(dev);
834 struct v4l2_subdev *sd = i2c_get_clientdata(client);
835 struct gc5024 *gc5024 = to_gc5024(sd);
836
837 return __gc5024_power_on(gc5024);
838 }
839
gc5024_runtime_suspend(struct device * dev)840 static int gc5024_runtime_suspend(struct device *dev)
841 {
842 struct i2c_client *client = to_i2c_client(dev);
843 struct v4l2_subdev *sd = i2c_get_clientdata(client);
844 struct gc5024 *gc5024 = to_gc5024(sd);
845
846 __gc5024_power_off(gc5024);
847
848 return 0;
849 }
850
851 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc5024_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)852 static int gc5024_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
853 {
854 struct gc5024 *gc5024 = to_gc5024(sd);
855 struct v4l2_mbus_framefmt *try_fmt =
856 v4l2_subdev_get_try_format(sd, fh->pad, 0);
857 const struct gc5024_mode *def_mode = &supported_modes[0];
858
859 mutex_lock(&gc5024->mutex);
860 /* Initialize try_fmt */
861 try_fmt->width = def_mode->width;
862 try_fmt->height = def_mode->height;
863 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
864 try_fmt->field = V4L2_FIELD_NONE;
865
866 mutex_unlock(&gc5024->mutex);
867 /* No crop or compose */
868
869 return 0;
870 }
871 #endif
872
sensor_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)873 static int sensor_g_mbus_config(struct v4l2_subdev *sd,
874 struct v4l2_mbus_config *config)
875 {
876 struct gc5024 *sensor = to_gc5024(sd);
877 struct device *dev = &sensor->client->dev;
878
879 dev_info(dev, "%s(%d) enter!\n", __func__, __LINE__);
880
881 if (2 == sensor->lane_num) {
882 config->type = V4L2_MBUS_CSI2;
883 config->flags = V4L2_MBUS_CSI2_2_LANE |
884 V4L2_MBUS_CSI2_CHANNEL_0 |
885 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
886 } else {
887 dev_err(&sensor->client->dev,
888 "unsupported lane_num(%d)\n", sensor->lane_num);
889 }
890 return 0;
891 }
892
gc5024_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)893 static int gc5024_enum_frame_interval(struct v4l2_subdev *sd,
894 struct v4l2_subdev_pad_config *cfg,
895 struct v4l2_subdev_frame_interval_enum *fie)
896 {
897 struct gc5024 *gc5024 = to_gc5024(sd);
898
899 if (fie->index >= gc5024->cfg_num)
900 return -EINVAL;
901
902 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
903 fie->width = supported_modes[fie->index].width;
904 fie->height = supported_modes[fie->index].height;
905 fie->interval = supported_modes[fie->index].max_fps;
906 return 0;
907 }
908
909 static const struct dev_pm_ops gc5024_pm_ops = {
910 SET_RUNTIME_PM_OPS(gc5024_runtime_suspend,
911 gc5024_runtime_resume, NULL)
912 };
913
914 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
915 static const struct v4l2_subdev_internal_ops gc5024_internal_ops = {
916 .open = gc5024_open,
917 };
918 #endif
919
920 static const struct v4l2_subdev_core_ops gc5024_core_ops = {
921 .s_power = gc5024_s_power,
922 .ioctl = gc5024_ioctl,
923 #ifdef CONFIG_COMPAT
924 .compat_ioctl32 = gc5024_compat_ioctl32,
925 #endif
926 };
927
928 static const struct v4l2_subdev_video_ops gc5024_video_ops = {
929 .g_mbus_config = sensor_g_mbus_config,
930 .s_stream = gc5024_s_stream,
931 .g_frame_interval = gc5024_g_frame_interval,
932 };
933
934 static const struct v4l2_subdev_pad_ops gc5024_pad_ops = {
935 .enum_mbus_code = gc5024_enum_mbus_code,
936 .enum_frame_size = gc5024_enum_frame_sizes,
937 .enum_frame_interval = gc5024_enum_frame_interval,
938 .get_fmt = gc5024_get_fmt,
939 .set_fmt = gc5024_set_fmt,
940 };
941
942 static const struct v4l2_subdev_ops gc5024_subdev_ops = {
943 .core = &gc5024_core_ops,
944 .video = &gc5024_video_ops,
945 .pad = &gc5024_pad_ops,
946 };
947
gc5024_set_gain_reg(struct gc5024 * gc5024,u32 a_gain)948 static int gc5024_set_gain_reg(struct gc5024 *gc5024, u32 a_gain)
949 {
950 int ret = 0;
951 u32 temp = 0;
952
953 ret = gc5024_write_reg(gc5024->client,
954 GC5024_PAGE_SELECT,
955 0x00);
956 if (a_gain >= GC5024_ANALOG_GAIN_1 &&
957 a_gain < GC5024_ANALOG_GAIN_2) {
958 ret |= gc5024_write_reg(gc5024->client,
959 GC5024_ANALOG_GAIN_REG,
960 0x00);
961 temp = a_gain;
962 ret |= gc5024_write_reg(gc5024->client,
963 GC5024_PREGAIN_H_REG,
964 temp >> 6);
965 ret |= gc5024_write_reg(gc5024->client,
966 GC5024_PREGAIN_L_REG,
967 (temp << 2) & 0xfc);
968 } else if (a_gain >= GC5024_ANALOG_GAIN_2 &&
969 a_gain < GC5024_ANALOG_GAIN_3) {
970 ret |= gc5024_write_reg(gc5024->client,
971 GC5024_ANALOG_GAIN_REG,
972 0x01);
973 temp = 64 * a_gain / GC5024_ANALOG_GAIN_2;
974 ret |= gc5024_write_reg(gc5024->client,
975 GC5024_PREGAIN_H_REG,
976 temp >> 6);
977 ret |= gc5024_write_reg(gc5024->client,
978 GC5024_PREGAIN_L_REG,
979 (temp << 2) & 0xfc);
980 } else if (a_gain >= GC5024_ANALOG_GAIN_3 &&
981 a_gain < GC5024_ANALOG_GAIN_4) {
982 ret |= gc5024_write_reg(gc5024->client,
983 GC5024_ANALOG_GAIN_REG,
984 0x02);
985 temp = 64 * a_gain / GC5024_ANALOG_GAIN_3;
986 ret |= gc5024_write_reg(gc5024->client,
987 GC5024_PREGAIN_H_REG,
988 temp >> 6);
989 ret |= gc5024_write_reg(gc5024->client,
990 GC5024_PREGAIN_L_REG,
991 (temp << 2) & 0xfc);
992 } else if (a_gain >= GC5024_ANALOG_GAIN_4 &&
993 a_gain < GC5024_ANALOG_GAIN_5) {
994 ret |= gc5024_write_reg(gc5024->client,
995 GC5024_ANALOG_GAIN_REG,
996 0x03);
997 temp = 64 * a_gain / GC5024_ANALOG_GAIN_4;
998 ret |= gc5024_write_reg(gc5024->client,
999 GC5024_PREGAIN_H_REG,
1000 temp >> 6);
1001 ret |= gc5024_write_reg(gc5024->client,
1002 GC5024_PREGAIN_L_REG,
1003 (temp << 2) & 0xfc);
1004 } else if (a_gain >= GC5024_ANALOG_GAIN_5 &&
1005 a_gain < GC5024_ANALOG_GAIN_6) {
1006 ret |= gc5024_write_reg(gc5024->client,
1007 GC5024_ANALOG_GAIN_REG,
1008 0x04);
1009 temp = 64 * a_gain / GC5024_ANALOG_GAIN_5;
1010 ret |= gc5024_write_reg(gc5024->client,
1011 GC5024_PREGAIN_H_REG,
1012 temp >> 6);
1013 ret |= gc5024_write_reg(gc5024->client,
1014 GC5024_PREGAIN_L_REG,
1015 (temp << 2) & 0xfc);
1016 } else if (a_gain >= GC5024_ANALOG_GAIN_6 &&
1017 a_gain < GC5024_ANALOG_GAIN_7) {
1018 ret |= gc5024_write_reg(gc5024->client,
1019 GC5024_ANALOG_GAIN_REG,
1020 0x05);
1021 temp = 64 * a_gain / GC5024_ANALOG_GAIN_6;
1022 ret |= gc5024_write_reg(gc5024->client,
1023 GC5024_PREGAIN_H_REG,
1024 temp >> 6);
1025 ret |= gc5024_write_reg(gc5024->client,
1026 GC5024_PREGAIN_L_REG,
1027 (temp << 2) & 0xfc);
1028 } else {
1029 ret |= gc5024_write_reg(gc5024->client,
1030 GC5024_ANALOG_GAIN_REG,
1031 0x06);
1032 temp = 64 * a_gain / GC5024_ANALOG_GAIN_7;
1033 ret |= gc5024_write_reg(gc5024->client,
1034 GC5024_PREGAIN_H_REG,
1035 temp >> 6);
1036 ret |= gc5024_write_reg(gc5024->client,
1037 GC5024_PREGAIN_L_REG,
1038 (temp << 2) & 0xfc);
1039 }
1040 return ret;
1041 }
1042
gc5024_set_ctrl(struct v4l2_ctrl * ctrl)1043 static int gc5024_set_ctrl(struct v4l2_ctrl *ctrl)
1044 {
1045 struct gc5024 *gc5024 = container_of(ctrl->handler,
1046 struct gc5024, ctrl_handler);
1047 struct i2c_client *client = gc5024->client;
1048 s64 max;
1049 int ret = 0;
1050
1051 /* Propagate change of current control to all related controls */
1052 switch (ctrl->id) {
1053 case V4L2_CID_VBLANK:
1054 /* Update max exposure while meeting expected vblanking */
1055 max = gc5024->cur_mode->height + ctrl->val - 4;
1056 __v4l2_ctrl_modify_range(gc5024->exposure,
1057 gc5024->exposure->minimum, max,
1058 gc5024->exposure->step,
1059 gc5024->exposure->default_value);
1060 break;
1061 }
1062
1063 if (!pm_runtime_get_if_in_use(&client->dev))
1064 return 0;
1065
1066 switch (ctrl->id) {
1067 case V4L2_CID_EXPOSURE:
1068 /* 4 least significant bits of expsoure are fractional part */
1069 ret |= gc5024_write_reg(gc5024->client,
1070 GC5024_PAGE_SELECT,
1071 0x00);
1072 ret |= gc5024_write_reg(gc5024->client,
1073 GC5024_REG_EXPOSURE_H,
1074 (ctrl->val >> 8) & 0x3f);
1075 ret |= gc5024_write_reg(gc5024->client,
1076 GC5024_REG_EXPOSURE_L,
1077 ctrl->val & 0xff);
1078 break;
1079 case V4L2_CID_ANALOGUE_GAIN:
1080 ret = gc5024_set_gain_reg(gc5024, ctrl->val);
1081 break;
1082 case V4L2_CID_VBLANK:
1083 ret = gc5024_write_reg(gc5024->client,
1084 GC5024_PAGE_SELECT,
1085 0x00);
1086 ret |= gc5024_write_reg(gc5024->client,
1087 GC5024_REG_VTS_H,
1088 ((ctrl->val) >> 8) & 0x1f);
1089 ret |= gc5024_write_reg(gc5024->client,
1090 GC5024_REG_VTS_L,
1091 (ctrl->val) & 0xff);
1092 break;
1093
1094 default:
1095 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1096 __func__, ctrl->id, ctrl->val);
1097 break;
1098 }
1099
1100 pm_runtime_put(&client->dev);
1101
1102 return ret;
1103 }
1104
1105 static const struct v4l2_ctrl_ops gc5024_ctrl_ops = {
1106 .s_ctrl = gc5024_set_ctrl,
1107 };
1108
gc5024_initialize_controls(struct gc5024 * gc5024)1109 static int gc5024_initialize_controls(struct gc5024 *gc5024)
1110 {
1111 const struct gc5024_mode *mode;
1112 struct v4l2_ctrl_handler *handler;
1113 struct v4l2_ctrl *ctrl;
1114 s64 exposure_max, vblank_def;
1115 u32 h_blank;
1116 int ret;
1117 struct device *dev = &gc5024->client->dev;
1118
1119 dev_info(dev, "Enter %s(%d) !\n", __func__, __LINE__);
1120 handler = &gc5024->ctrl_handler;
1121 mode = gc5024->cur_mode;
1122 ret = v4l2_ctrl_handler_init(handler, 8);
1123 if (ret)
1124 return ret;
1125 handler->lock = &gc5024->mutex;
1126
1127 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1128 0, 0, link_freq_menu_items);
1129 if (ctrl)
1130 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1131
1132 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1133 0, GC5024_PIXEL_RATE, 1, GC5024_PIXEL_RATE);
1134
1135 h_blank = mode->hts_def - mode->width;
1136 gc5024->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1137 h_blank, h_blank, 1, h_blank);
1138 if (gc5024->hblank)
1139 gc5024->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1140
1141 vblank_def = mode->vts_def - mode->height;
1142 gc5024->vblank = v4l2_ctrl_new_std(handler, &gc5024_ctrl_ops,
1143 V4L2_CID_VBLANK, vblank_def,
1144 GC5024_VTS_MAX - mode->height,
1145 1, vblank_def);
1146
1147 exposure_max = mode->vts_def - 4;
1148 gc5024->exposure = v4l2_ctrl_new_std(handler, &gc5024_ctrl_ops,
1149 V4L2_CID_EXPOSURE, GC5024_EXPOSURE_MIN,
1150 exposure_max, GC5024_EXPOSURE_STEP,
1151 mode->exp_def);
1152
1153 gc5024->anal_gain = v4l2_ctrl_new_std(handler, &gc5024_ctrl_ops,
1154 V4L2_CID_ANALOGUE_GAIN, GC5024_GAIN_MIN,
1155 GC5024_GAIN_MAX, GC5024_GAIN_STEP,
1156 GC5024_GAIN_DEFAULT);
1157
1158 if (handler->error) {
1159 ret = handler->error;
1160 dev_err(&gc5024->client->dev,
1161 "Failed to init controls(%d)\n", ret);
1162 goto err_free_handler;
1163 }
1164
1165 gc5024->subdev.ctrl_handler = handler;
1166
1167 return 0;
1168
1169 err_free_handler:
1170 v4l2_ctrl_handler_free(handler);
1171
1172 return ret;
1173 }
1174
gc5024_check_sensor_id(struct gc5024 * gc5024,struct i2c_client * client)1175 static int gc5024_check_sensor_id(struct gc5024 *gc5024,
1176 struct i2c_client *client)
1177 {
1178 struct device *dev = &gc5024->client->dev;
1179 u8 pid, ver = 0x00;
1180 int ret;
1181 unsigned short id;
1182
1183 ret = gc5024_read_reg(client, GC5024_REG_CHIP_ID_H, &pid);
1184 if (ret) {
1185 dev_err(dev, "Read chip ID H register error\n");
1186 return ret;
1187 }
1188
1189 ret = gc5024_read_reg(client, GC5024_REG_CHIP_ID_L, &ver);
1190 if (ret) {
1191 dev_err(dev, "Read chip ID L register error\n");
1192 return ret;
1193 }
1194
1195 id = SENSOR_ID(pid, ver);
1196 if (id != CHIP_ID) {
1197 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1198 return ret;
1199 }
1200
1201 dev_info(dev, "detected gc%04x sensor\n", id);
1202
1203 return 0;
1204 }
1205
gc5024_configure_regulators(struct gc5024 * gc5024)1206 static int gc5024_configure_regulators(struct gc5024 *gc5024)
1207 {
1208 unsigned int i;
1209
1210 for (i = 0; i < GC5024_NUM_SUPPLIES; i++)
1211 gc5024->supplies[i].supply = gc5024_supply_names[i];
1212
1213 return devm_regulator_bulk_get(&gc5024->client->dev,
1214 GC5024_NUM_SUPPLIES,
1215 gc5024->supplies);
1216 }
1217
gc5024_parse_of(struct gc5024 * gc5024)1218 static int gc5024_parse_of(struct gc5024 *gc5024)
1219 {
1220 struct device *dev = &gc5024->client->dev;
1221 struct device_node *endpoint;
1222 struct fwnode_handle *fwnode;
1223 int rval;
1224
1225 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1226 if (!endpoint) {
1227 dev_err(dev, "Failed to get endpoint\n");
1228 return -EINVAL;
1229 }
1230 fwnode = of_fwnode_handle(endpoint);
1231 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1232 if (rval <= 0) {
1233 dev_warn(dev, " Get mipi lane num failed!\n");
1234 return -1;
1235 }
1236
1237 gc5024->lane_num = rval;
1238 if (2 == gc5024->lane_num) {
1239 gc5024->cur_mode = &supported_modes_2lane[0];
1240 supported_modes = supported_modes_2lane;
1241 gc5024->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1242
1243 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1244 gc5024->pixel_rate = MIPI_FREQ * 2U * gc5024->lane_num / 10U;
1245 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
1246 gc5024->lane_num, gc5024->pixel_rate);
1247 } else {
1248 dev_err(dev, "unsupported lane_num(%d)\n", gc5024->lane_num);
1249 return -1;
1250 }
1251 return 0;
1252 }
1253
gc5024_probe(struct i2c_client * client,const struct i2c_device_id * id)1254 static int gc5024_probe(struct i2c_client *client,
1255 const struct i2c_device_id *id)
1256 {
1257 struct device *dev = &client->dev;
1258 struct device_node *node = dev->of_node;
1259 struct gc5024 *gc5024;
1260 struct v4l2_subdev *sd;
1261 char facing[2];
1262 int ret;
1263
1264 dev_info(dev, "driver version: %02x.%02x.%02x",
1265 DRIVER_VERSION >> 16,
1266 (DRIVER_VERSION & 0xff00) >> 8,
1267 DRIVER_VERSION & 0x00ff);
1268
1269 gc5024 = devm_kzalloc(dev, sizeof(*gc5024), GFP_KERNEL);
1270 if (!gc5024)
1271 return -ENOMEM;
1272
1273 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1274 &gc5024->module_index);
1275 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1276 &gc5024->module_facing);
1277 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1278 &gc5024->module_name);
1279 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1280 &gc5024->len_name);
1281 if (ret) {
1282 dev_err(dev, "could not get module information!\n");
1283 return -EINVAL;
1284 }
1285
1286 gc5024->client = client;
1287
1288 gc5024->xvclk = devm_clk_get(dev, "xvclk");
1289 if (IS_ERR(gc5024->xvclk)) {
1290 dev_err(dev, "Failed to get xvclk\n");
1291 return -EINVAL;
1292 }
1293
1294 gc5024->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1295 if (IS_ERR(gc5024->reset_gpio))
1296 dev_warn(dev, "Failed to get reset-gpios\n");
1297
1298 gc5024->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_HIGH);
1299 if (IS_ERR(gc5024->pwdn_gpio))
1300 dev_warn(dev, "Failed to get pwdn-gpios\n");
1301
1302 ret = gc5024_parse_of(gc5024);
1303 if (ret != 0)
1304 return -EINVAL;
1305 gc5024->pinctrl = devm_pinctrl_get(dev);
1306 if (!IS_ERR(gc5024->pinctrl)) {
1307 gc5024->pins_default =
1308 pinctrl_lookup_state(gc5024->pinctrl,
1309 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1310 if (IS_ERR(gc5024->pins_default))
1311 dev_err(dev, "could not get default pinstate\n");
1312
1313 gc5024->pins_sleep =
1314 pinctrl_lookup_state(gc5024->pinctrl,
1315 OF_CAMERA_PINCTRL_STATE_SLEEP);
1316 if (IS_ERR(gc5024->pins_sleep))
1317 dev_err(dev, "could not get sleep pinstate\n");
1318 } else {
1319 dev_err(dev, "no pinctrl\n");
1320 }
1321
1322 ret = gc5024_configure_regulators(gc5024);
1323 if (ret) {
1324 dev_err(dev, "Failed to get power regulators\n");
1325 return ret;
1326 }
1327
1328 mutex_init(&gc5024->mutex);
1329
1330 sd = &gc5024->subdev;
1331 v4l2_i2c_subdev_init(sd, client, &gc5024_subdev_ops);
1332 ret = gc5024_initialize_controls(gc5024);
1333 if (ret)
1334 goto err_destroy_mutex;
1335
1336 ret = __gc5024_power_on(gc5024);
1337 if (ret)
1338 goto err_free_handler;
1339
1340 ret = gc5024_check_sensor_id(gc5024, client);
1341 if (ret)
1342 goto err_power_off;
1343
1344 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1345 sd->internal_ops = &gc5024_internal_ops;
1346 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1347 #endif
1348 #if defined(CONFIG_MEDIA_CONTROLLER)
1349 gc5024->pad.flags = MEDIA_PAD_FL_SOURCE;
1350 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1351 ret = media_entity_pads_init(&sd->entity, 1, &gc5024->pad);
1352
1353 if (ret < 0)
1354 goto err_power_off;
1355 #endif
1356
1357 memset(facing, 0, sizeof(facing));
1358 if (strcmp(gc5024->module_facing, "back") == 0)
1359 facing[0] = 'b';
1360 else
1361 facing[0] = 'f';
1362
1363 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1364 gc5024->module_index, facing,
1365 GC5024_NAME, dev_name(sd->dev));
1366 ret = v4l2_async_register_subdev_sensor_common(sd);
1367 if (ret) {
1368 dev_err(dev, "v4l2 async register subdev failed\n");
1369 goto err_clean_entity;
1370 }
1371
1372 pm_runtime_set_active(dev);
1373 pm_runtime_enable(dev);
1374 pm_runtime_idle(dev);
1375
1376 return 0;
1377
1378 err_clean_entity:
1379 #if defined(CONFIG_MEDIA_CONTROLLER)
1380 media_entity_cleanup(&sd->entity);
1381 #endif
1382 err_power_off:
1383 __gc5024_power_off(gc5024);
1384 err_free_handler:
1385 v4l2_ctrl_handler_free(&gc5024->ctrl_handler);
1386 err_destroy_mutex:
1387 mutex_destroy(&gc5024->mutex);
1388
1389 return ret;
1390 }
1391
gc5024_remove(struct i2c_client * client)1392 static int gc5024_remove(struct i2c_client *client)
1393 {
1394 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1395 struct gc5024 *gc5024 = to_gc5024(sd);
1396
1397 v4l2_async_unregister_subdev(sd);
1398 #if defined(CONFIG_MEDIA_CONTROLLER)
1399 media_entity_cleanup(&sd->entity);
1400 #endif
1401 v4l2_ctrl_handler_free(&gc5024->ctrl_handler);
1402 mutex_destroy(&gc5024->mutex);
1403
1404 pm_runtime_disable(&client->dev);
1405 if (!pm_runtime_status_suspended(&client->dev))
1406 __gc5024_power_off(gc5024);
1407 pm_runtime_set_suspended(&client->dev);
1408
1409 return 0;
1410 }
1411
1412 #if IS_ENABLED(CONFIG_OF)
1413 static const struct of_device_id gc5024_of_match[] = {
1414 { .compatible = "galaxycore,gc5024" },
1415 {},
1416 };
1417 MODULE_DEVICE_TABLE(of, gc5024_of_match);
1418 #endif
1419
1420 static const struct i2c_device_id gc5024_match_id[] = {
1421 { "galaxycore,gc5024", 0 },
1422 { },
1423 };
1424
1425 static struct i2c_driver gc5024_i2c_driver = {
1426 .driver = {
1427 .name = GC5024_NAME,
1428 .pm = &gc5024_pm_ops,
1429 .of_match_table = of_match_ptr(gc5024_of_match),
1430 },
1431 .probe = &gc5024_probe,
1432 .remove = &gc5024_remove,
1433 .id_table = gc5024_match_id,
1434 };
1435
sensor_mod_init(void)1436 static int __init sensor_mod_init(void)
1437 {
1438 return i2c_add_driver(&gc5024_i2c_driver);
1439 }
1440
sensor_mod_exit(void)1441 static void __exit sensor_mod_exit(void)
1442 {
1443 i2c_del_driver(&gc5024_i2c_driver);
1444 }
1445
1446 device_initcall_sync(sensor_mod_init);
1447 module_exit(sensor_mod_exit);
1448
1449 MODULE_DESCRIPTION("GC5024 CMOS Image Sensor driver");
1450 MODULE_LICENSE("GPL v2");
1451