1 /*SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * gc2355 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
7 * V0.0X01.0X03 add enum_frame_interval function.
8 * V0.0X01.0X04 add quick stream on/off
9 * V0.0X01.0X05 add function g_mbus_config
10 */
11 #define DEBUG 1
12 #include <linux/clk.h>
13 #include <linux/device.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/sysfs.h>
21 #include <linux/slab.h>
22 #include <linux/version.h>
23 #include <linux/rk-camera-module.h>
24 #include <media/media-entity.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-subdev.h>
28 #include <linux/pinctrl/consumer.h>
29
30 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x5)
31
32 #ifndef V4L2_CID_DIGITAL_GAIN
33 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
34 #endif
35
36 #define GC2355_LINK_FREQ_420MHZ 420000000
37 /* pixel rate = link frequency * 1 * lanes / BITS_PER_SAMPLE */
38 #define GC2355_PIXEL_RATE (GC2355_LINK_FREQ_420MHZ * 2 * 1 / 10)
39 #define GC2355_XVCLK_FREQ 24000000
40
41 #define CHIP_ID 0x2355
42 #define GC2355_REG_CHIP_ID_H 0xf0
43 #define GC2355_REG_CHIP_ID_L 0xf1
44 #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
45
46 #define GC2355_PAGE_SELECT 0xfe
47 #define GC2355_MODE_SELECT 0x10
48 #define GC2355_MODE_SW_STANDBY 0x00
49 #define GC2355_MODE_STREAMING 0x90
50
51 #define GC2355_REG_EXPOSURE_H 0x03
52 #define GC2355_REG_EXPOSURE_L 0x04
53 #define GC2355_EXPOSURE_MIN 4
54 #define GC2355_EXPOSURE_STEP 1
55 #define GC2355_VTS_MAX 0x7fff
56
57 #define GC2355_ANALOG_GAIN_1 64 /*1.00x*/
58 #define GC2355_ANALOG_GAIN_2 88 /*1.375x*/
59 #define GC2355_ANALOG_GAIN_3 122 /*1.90x*/
60 #define GC2355_ANALOG_GAIN_4 168 /*2.625x*/
61 #define GC2355_ANALOG_GAIN_5 239 /*3.738x*/
62 #define GC2355_ANALOG_GAIN_6 330 /*5.163x*/
63 #define GC2355_ANALOG_GAIN_7 470 /*7.350x*/
64
65 #define GC2355_ANALOG_GAIN_REG 0xb6
66 #define GC2355_PREGAIN_H_REG 0xb1
67 #define GC2355_PREGAIN_L_REG 0xb2
68
69 #define GC2355_GAIN_MIN 0x40
70 #define GC2355_GAIN_MAX 0x200
71 #define GC2355_GAIN_STEP 1
72 #define GC2355_GAIN_DEFAULT 0x80
73
74 #define GC2355_REG_VTS_H 0x03
75 #define GC2355_REG_VTS_L 0x04
76
77 #define REG_NULL 0xFFFF
78
79 #define GC2355_LANES 1
80 #define GC2355_BITS_PER_SAMPLE 10
81
82 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
83 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
84
85 #define GC2355_NAME "gc2355"
86
87 static const char * const gc2355_supply_names[] = {
88 "avdd", /* Analog power */
89 "dovdd", /* Digital I/O power */
90 "dvdd", /* Digital core power */
91 };
92
93 #define GC2355_NUM_SUPPLIES ARRAY_SIZE(gc2355_supply_names)
94
95 struct regval {
96 u16 addr;
97 u8 val;
98 };
99
100 struct gc2355_mode {
101 u32 width;
102 u32 height;
103 struct v4l2_fract max_fps;
104 u32 hts_def;
105 u32 vts_def;
106 u32 exp_def;
107 const struct regval *reg_list;
108 };
109
110 struct gc2355 {
111 struct i2c_client *client;
112 struct clk *xvclk;
113 struct gpio_desc *reset_gpio;
114 struct gpio_desc *pwdn_gpio;
115 struct regulator_bulk_data supplies[GC2355_NUM_SUPPLIES];
116
117 struct pinctrl *pinctrl;
118 struct pinctrl_state *pins_default;
119 struct pinctrl_state *pins_sleep;
120
121 struct v4l2_subdev subdev;
122 struct media_pad pad;
123 struct v4l2_ctrl_handler ctrl_handler;
124 struct v4l2_ctrl *exposure;
125 struct v4l2_ctrl *anal_gain;
126 struct v4l2_ctrl *digi_gain;
127 struct v4l2_ctrl *hblank;
128 struct v4l2_ctrl *vblank;
129 struct v4l2_ctrl *test_pattern;
130 struct mutex mutex;
131 bool streaming;
132 const struct gc2355_mode *cur_mode;
133 u32 module_index;
134 const char *module_facing;
135 const char *module_name;
136 const char *len_name;
137 };
138
139 #define to_gc2355(sd) container_of(sd, struct gc2355, subdev)
140
141 /*
142 * Xclk 24Mhz
143 */
144 static const struct regval gc2355_global_regs[] = {
145 /////////////////////////////////////////////////////
146 ////////////////////// SYS //////////////////////
147 /////////////////////////////////////////////////////
148 {0xfe, 0x80},
149 {0xfe, 0x80},
150 {0xfe, 0x80},
151 {0xf2, 0x00}, //sync_pad_io_ebi
152 {0xf6, 0x00}, //up down
153 {0xfc, 0x06},
154 {0xf7, 0x19}, //19 //clk_double pll enable
155 {0xf8, 0x06}, //Pll mode 2
156 {0xf9, 0x0e}, //de//[0] pll enable
157 {0xfa, 0x00}, //div
158 {0xfe, 0x00},
159
160 /////////////////////////////////////////////////////
161 //////////////// ANALOG & CISCTL ////////////////
162 /////////////////////////////////////////////////////
163 {0x03, 0x04},
164 {0x04, 0x5f},
165 {0x05, 0x01}, //HB
166 {0x06, 0x22},
167 {0x07, 0x00}, //VB
168 {0x08, 0x0b},
169 {0x0a, 0x00}, //row start
170 {0x0c, 0x04}, //0c//col start
171 {0x0d, 0x04},
172 {0x0e, 0xc0},
173 {0x0f, 0x06},
174 {0x10, 0x50}, //Window setting 1616x1216
175 {0x17, 0x14},
176 {0x19, 0x0b}, //09
177 {0x1b, 0x49}, //48
178 {0x1c, 0x12},
179 {0x1d, 0x10}, //double reset
180 {0x1e, 0xbc}, //a8//col_r/rowclk_mode/rsthigh_en FPN
181 {0x1f, 0xc8}, //08//rsgl_s_mode/vpix_s_mode
182 {0x20, 0x71},
183 {0x21, 0x20}, //rsg
184 {0x22, 0xa0},
185 {0x23, 0x51}, //01
186 {0x24, 0x19}, //0b //55
187 {0x27, 0x20},
188 {0x28, 0x00},
189 {0x2b, 0x81}, //80 //00 sf_s_mode FPN
190 {0x2c, 0x38}, //50 //5c ispg FPN
191 {0x2e, 0x16}, //05//eq width
192 {0x2f, 0x14}, //[3:0]tx_width
193 {0x30, 0x00},
194 {0x31, 0x01},
195 {0x32, 0x02},
196 {0x33, 0x03},
197 {0x34, 0x07},
198 {0x35, 0x0b},
199 {0x36, 0x0f},
200
201 /////////////////////////////////////////////////////
202 ////////////////////// gain /////////////////////
203 /////////////////////////////////////////////////////
204 {0xb0, 0x50}, //1.25x
205 {0xb1, 0x02},
206 {0xb2, 0xe0}, //2.86x
207 {0xb3, 0x40},
208 {0xb4, 0x40},
209 {0xb5, 0x40},
210 {0xb6, 0x03}, //2.8x
211
212 /////////////////////////////////////////////////////
213 ////////////////////// crop /////////////////////
214 /////////////////////////////////////////////////////
215 {0x92, 0x02},
216 {0x95, 0x04},
217 {0x96, 0xb0},
218 {0x97, 0x06},
219 {0x98, 0x40}, //out window set 1600x1200
220
221 /////////////////////////////////////////////////////
222 ////////////////////// BLK /////////////////////
223 /////////////////////////////////////////////////////
224 {0x18, 0x02},
225 {0x1a, 0x01},
226 {0x40, 0x42},
227 {0x41, 0x00},
228
229 {0x44, 0x00},
230 {0x45, 0x00},
231 {0x46, 0x00},
232 {0x47, 0x00},
233 {0x48, 0x00},
234 {0x49, 0x00},
235 {0x4a, 0x00},
236 {0x4b, 0x00}, //clear offset
237
238 {0x4e, 0x3c}, //BLK select
239 {0x4f, 0x00},
240 {0x5e, 0x00}, //offset ratio
241 {0x66, 0x20}, //dark ratio
242
243 {0x6a, 0x02},
244 {0x6b, 0x02},
245 {0x6c, 0x00},
246 {0x6d, 0x00},
247 {0x6e, 0x00},
248 {0x6f, 0x00},
249 {0x70, 0x02},
250 {0x71, 0x02}, //manual offset
251
252 /////////////////////////////////////////////////////
253 ////////////////// Dark sun /////////////////////
254 /////////////////////////////////////////////////////
255 {0x87, 0x03}, //
256 {0xe0, 0xe7}, //dark sun en/extend mode
257 {0xe3, 0xc0}, //clamp
258
259 /////////////////////////////////////////////////////
260 ////////////////////// MIPI /////////////////////
261 /////////////////////////////////////////////////////
262 {0xfe, 0x03},
263 {0x01, 0x83}, //0x87 2lane
264 {0x02, 0x00},
265 {0x03, 0x90},
266 {0x04, 0x01},
267 {0x05, 0x00},
268 {0x06, 0xa2},
269 {0x10, 0x00}, //94//1lane raw8
270 {0x11, 0x2b},
271 {0x12, 0xd0},
272 {0x13, 0x07},
273
274 /* p3:0x15 [1:0]clklane_mode
275 * 00 : Enter LP mode between Frame;
276 * 01: Enter LP mode between Row;
277 * 10: Continuous HS mode
278 */
279 {0x15, 0x60},
280 {0x21, 0x10},
281 {0x22, 0x05},
282 {0x23, 0x30},
283 {0x24, 0x02},
284 {0x25, 0x15},
285 {0x26, 0x08},
286 {0x27, 0x06},
287 {0x29, 0x06},
288 {0x2a, 0x0a},
289 {0x2b, 0x08},
290 {0x40, 0x00},
291 {0x41, 0x00},
292 {0x42, 0x40},
293 {0x43, 0x06},
294 {0xfe, 0x00},
295 {REG_NULL, 0x00},
296 };
297
298 /*
299 * Xclk 24Mhz
300 * max_framerate 30fps
301 * mipi_datarate per lane 1008Mbps
302 */
303 static const struct regval gc2355_1600x1200_regs[] = {
304 {REG_NULL, 0x00},
305 };
306
307 static const struct gc2355_mode supported_modes[] = {
308 {
309 .width = 1600,
310 .height = 1200,
311 .max_fps = {
312 .numerator = 10000,
313 .denominator = 300000,
314 },
315 .exp_def = 0x04d0,
316 .hts_def = 0x08cc,
317 .vts_def = 0x04d9,
318 .reg_list = gc2355_1600x1200_regs,
319 },
320 };
321
322 static const s64 link_freq_menu_items[] = {
323 GC2355_LINK_FREQ_420MHZ
324 };
325
326 /* sensor register write */
gc2355_write_reg(struct i2c_client * client,u8 reg,u8 val)327 static int gc2355_write_reg(struct i2c_client *client, u8 reg, u8 val)
328 {
329 struct i2c_msg msg;
330 u8 buf[2];
331 int ret;
332
333 dev_info(&client->dev, "%s(%d) enter!\n", __func__, __LINE__);
334 dev_info(&client->dev, "gc2355 write reg(0x%x val:0x%x)!\n", reg, val);
335 buf[0] = reg & 0xFF;
336 buf[1] = val;
337
338 msg.addr = client->addr;
339 msg.flags = client->flags;
340 msg.buf = buf;
341 msg.len = sizeof(buf);
342
343 ret = i2c_transfer(client->adapter, &msg, 1);
344 if (ret >= 0)
345 return 0;
346
347 dev_err(&client->dev,
348 "gc2355 write reg(0x%x val:0x%x) failed !\n", reg, val);
349
350 return ret;
351 }
352
353 /* sensor register read */
gc2355_read_reg(struct i2c_client * client,u8 reg,u8 * val)354 static int gc2355_read_reg(struct i2c_client *client, u8 reg, u8 *val)
355 {
356 struct i2c_msg msg[2];
357 u8 buf[1];
358 int ret;
359
360 buf[0] = reg & 0xFF;
361
362 msg[0].addr = client->addr;
363 msg[0].flags = client->flags;
364 msg[0].buf = buf;
365 msg[0].len = sizeof(buf);
366
367 msg[1].addr = client->addr;
368 msg[1].flags = client->flags | I2C_M_RD;
369 msg[1].buf = buf;
370 msg[1].len = 1;
371
372 ret = i2c_transfer(client->adapter, msg, 2);
373 if (ret >= 0) {
374 *val = buf[0];
375 return 0;
376 }
377
378 dev_err(&client->dev,
379 "gc2355 read reg:0x%x failed !\n", reg);
380
381 return ret;
382 }
383
gc2355_write_array(struct i2c_client * client,const struct regval * regs)384 static int gc2355_write_array(struct i2c_client *client,
385 const struct regval *regs)
386 {
387 u32 i;
388 int ret = 0;
389
390 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
391 ret = gc2355_write_reg(client, regs[i].addr, regs[i].val);
392
393 return ret;
394 }
395
gc2355_get_reso_dist(const struct gc2355_mode * mode,struct v4l2_mbus_framefmt * framefmt)396 static int gc2355_get_reso_dist(const struct gc2355_mode *mode,
397 struct v4l2_mbus_framefmt *framefmt)
398 {
399 return abs(mode->width - framefmt->width) +
400 abs(mode->height - framefmt->height);
401 }
402
403 static const struct gc2355_mode *
gc2355_find_best_fit(struct v4l2_subdev_format * fmt)404 gc2355_find_best_fit(struct v4l2_subdev_format *fmt)
405 {
406 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
407 int dist;
408 int cur_best_fit = 0;
409 int cur_best_fit_dist = -1;
410 unsigned int i;
411
412 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
413 dist = gc2355_get_reso_dist(&supported_modes[i], framefmt);
414 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
415 cur_best_fit_dist = dist;
416 cur_best_fit = i;
417 }
418 }
419
420 return &supported_modes[cur_best_fit];
421 }
422
gc2355_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)423 static int gc2355_set_fmt(struct v4l2_subdev *sd,
424 struct v4l2_subdev_pad_config *cfg,
425 struct v4l2_subdev_format *fmt)
426 {
427 struct gc2355 *gc2355 = to_gc2355(sd);
428 const struct gc2355_mode *mode;
429 s64 h_blank, vblank_def;
430
431 mutex_lock(&gc2355->mutex);
432
433 mode = gc2355_find_best_fit(fmt);
434 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
435 fmt->format.width = mode->width;
436 fmt->format.height = mode->height;
437 fmt->format.field = V4L2_FIELD_NONE;
438 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
439 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
440 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
441 #else
442 mutex_unlock(&gc2355->mutex);
443 return -ENOTTY;
444 #endif
445 } else {
446 gc2355->cur_mode = mode;
447 h_blank = mode->hts_def - mode->width;
448 __v4l2_ctrl_modify_range(gc2355->hblank, h_blank,
449 h_blank, 1, h_blank);
450 vblank_def = mode->vts_def - mode->height;
451 __v4l2_ctrl_modify_range(gc2355->vblank, vblank_def,
452 GC2355_VTS_MAX - mode->height,
453 1, vblank_def);
454 }
455
456 mutex_unlock(&gc2355->mutex);
457
458 return 0;
459 }
460
gc2355_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)461 static int gc2355_get_fmt(struct v4l2_subdev *sd,
462 struct v4l2_subdev_pad_config *cfg,
463 struct v4l2_subdev_format *fmt)
464 {
465 struct gc2355 *gc2355 = to_gc2355(sd);
466 const struct gc2355_mode *mode = gc2355->cur_mode;
467
468 mutex_lock(&gc2355->mutex);
469 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
470 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
471 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
472 #else
473 mutex_unlock(&gc2355->mutex);
474 return -ENOTTY;
475 #endif
476 } else {
477 fmt->format.width = mode->width;
478 fmt->format.height = mode->height;
479 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
480 fmt->format.field = V4L2_FIELD_NONE;
481 }
482 mutex_unlock(&gc2355->mutex);
483
484 return 0;
485 }
486
gc2355_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)487 static int gc2355_enum_mbus_code(struct v4l2_subdev *sd,
488 struct v4l2_subdev_pad_config *cfg,
489 struct v4l2_subdev_mbus_code_enum *code)
490 {
491 if (code->index != 0)
492 return -EINVAL;
493 code->code = MEDIA_BUS_FMT_SRGGB10_1X10;
494
495 return 0;
496 }
497
gc2355_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)498 static int gc2355_enum_frame_sizes(struct v4l2_subdev *sd,
499 struct v4l2_subdev_pad_config *cfg,
500 struct v4l2_subdev_frame_size_enum *fse)
501 {
502 if (fse->index >= ARRAY_SIZE(supported_modes))
503 return -EINVAL;
504
505 if (fse->code != MEDIA_BUS_FMT_SRGGB10_1X10)
506 return -EINVAL;
507
508 fse->min_width = supported_modes[fse->index].width;
509 fse->max_width = supported_modes[fse->index].width;
510 fse->max_height = supported_modes[fse->index].height;
511 fse->min_height = supported_modes[fse->index].height;
512
513 return 0;
514 }
515
gc2355_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)516 static int gc2355_g_frame_interval(struct v4l2_subdev *sd,
517 struct v4l2_subdev_frame_interval *fi)
518 {
519 struct gc2355 *gc2355 = to_gc2355(sd);
520 const struct gc2355_mode *mode = gc2355->cur_mode;
521
522 fi->interval = mode->max_fps;
523
524 return 0;
525 }
526
gc2355_get_module_inf(struct gc2355 * gc2355,struct rkmodule_inf * inf)527 static void gc2355_get_module_inf(struct gc2355 *gc2355,
528 struct rkmodule_inf *inf)
529 {
530 memset(inf, 0, sizeof(*inf));
531 strlcpy(inf->base.sensor, GC2355_NAME, sizeof(inf->base.sensor));
532 strlcpy(inf->base.module, gc2355->module_name,
533 sizeof(inf->base.module));
534 strlcpy(inf->base.lens, gc2355->len_name, sizeof(inf->base.lens));
535 }
536
gc2355_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)537 static long gc2355_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
538 {
539 struct gc2355 *gc2355 = to_gc2355(sd);
540 long ret = 0;
541 u32 stream = 0;
542
543 switch (cmd) {
544 case RKMODULE_GET_MODULE_INFO:
545 gc2355_get_module_inf(gc2355, (struct rkmodule_inf *)arg);
546 break;
547 case RKMODULE_SET_QUICK_STREAM:
548
549 stream = *((u32 *)arg);
550
551 if (stream) {
552 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x03);
553 ret |= gc2355_write_reg(gc2355->client, GC2355_MODE_SELECT,
554 GC2355_MODE_STREAMING);
555 ret |= gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x00);
556 } else {
557 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x03);
558 ret |= gc2355_write_reg(gc2355->client, GC2355_MODE_SELECT,
559 GC2355_MODE_SW_STANDBY);
560 ret |= gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x00);
561 }
562 break;
563 default:
564 ret = -ENOIOCTLCMD;
565 break;
566 }
567
568 return ret;
569 }
570
571 #ifdef CONFIG_COMPAT
gc2355_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)572 static long gc2355_compat_ioctl32(struct v4l2_subdev *sd,
573 unsigned int cmd, unsigned long arg)
574 {
575 void __user *up = compat_ptr(arg);
576 struct rkmodule_inf *inf;
577 struct rkmodule_awb_cfg *cfg;
578 long ret;
579 u32 stream = 0;
580
581 switch (cmd) {
582 case RKMODULE_GET_MODULE_INFO:
583 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
584 if (!inf) {
585 ret = -ENOMEM;
586 return ret;
587 }
588
589 ret = gc2355_ioctl(sd, cmd, inf);
590 if (!ret)
591 ret = copy_to_user(up, inf, sizeof(*inf));
592 kfree(inf);
593 break;
594 case RKMODULE_AWB_CFG:
595 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
596 if (!cfg) {
597 ret = -ENOMEM;
598 return ret;
599 }
600
601 ret = copy_from_user(cfg, up, sizeof(*cfg));
602 if (!ret)
603 ret = gc2355_ioctl(sd, cmd, cfg);
604 kfree(cfg);
605 break;
606 case RKMODULE_SET_QUICK_STREAM:
607 ret = copy_from_user(&stream, up, sizeof(u32));
608 if (!ret)
609 ret = gc2355_ioctl(sd, cmd, &stream);
610 break;
611 default:
612 ret = -ENOIOCTLCMD;
613 break;
614 }
615
616 return ret;
617 }
618 #endif
619
__gc2355_start_stream(struct gc2355 * gc2355)620 static int __gc2355_start_stream(struct gc2355 *gc2355)
621 {
622 int ret;
623
624 ret = gc2355_write_array(gc2355->client, gc2355_global_regs);
625 if (ret)
626 return ret;
627
628 ret = gc2355_write_array(gc2355->client, gc2355->cur_mode->reg_list);
629 if (ret)
630 return ret;
631
632 /* In case these controls are set before streaming */
633 mutex_unlock(&gc2355->mutex);
634 ret = v4l2_ctrl_handler_setup(&gc2355->ctrl_handler);
635 mutex_lock(&gc2355->mutex);
636 if (ret)
637 return ret;
638
639 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x03);
640 ret = gc2355_write_reg(gc2355->client, GC2355_MODE_SELECT,
641 GC2355_MODE_STREAMING);
642 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x00);
643 return ret;
644 }
645
__gc2355_stop_stream(struct gc2355 * gc2355)646 static int __gc2355_stop_stream(struct gc2355 *gc2355)
647 {
648 int ret;
649
650 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x03);
651 ret = gc2355_write_reg(gc2355->client, GC2355_MODE_SELECT,
652 GC2355_MODE_SW_STANDBY);
653 ret = gc2355_write_reg(gc2355->client, GC2355_PAGE_SELECT, 0x00);
654 return ret;
655 }
656
gc2355_s_stream(struct v4l2_subdev * sd,int on)657 static int gc2355_s_stream(struct v4l2_subdev *sd, int on)
658 {
659 struct gc2355 *gc2355 = to_gc2355(sd);
660 struct i2c_client *client = gc2355->client;
661 int ret = 0;
662
663 mutex_lock(&gc2355->mutex);
664 on = !!on;
665 if (on == gc2355->streaming)
666 goto unlock_and_return;
667
668 if (on) {
669 ret = pm_runtime_get_sync(&client->dev);
670 if (ret < 0) {
671 pm_runtime_put_noidle(&client->dev);
672 goto unlock_and_return;
673 }
674
675 ret = __gc2355_start_stream(gc2355);
676 if (ret) {
677 v4l2_err(sd, "start stream failed while write regs\n");
678 pm_runtime_put(&client->dev);
679 goto unlock_and_return;
680 }
681 } else {
682 __gc2355_stop_stream(gc2355);
683 pm_runtime_put(&client->dev);
684 }
685
686 gc2355->streaming = on;
687
688 unlock_and_return:
689 mutex_unlock(&gc2355->mutex);
690
691 return ret;
692 }
693
694 /* Calculate the delay in us by clock rate and clock cycles */
gc2355_cal_delay(u32 cycles)695 static inline u32 gc2355_cal_delay(u32 cycles)
696 {
697 return DIV_ROUND_UP(cycles, GC2355_XVCLK_FREQ / 1000 / 1000);
698 }
699
__gc2355_power_on(struct gc2355 * gc2355)700 static int __gc2355_power_on(struct gc2355 *gc2355)
701 {
702 int ret;
703 u32 delay_us;
704 struct device *dev = &gc2355->client->dev;
705
706 if (!IS_ERR_OR_NULL(gc2355->pins_default)) {
707 ret = pinctrl_select_state(gc2355->pinctrl,
708 gc2355->pins_default);
709 if (ret < 0)
710 dev_err(dev, "could not set pins\n");
711 }
712 ret = clk_set_rate(gc2355->xvclk, GC2355_XVCLK_FREQ);
713 if (ret < 0)
714 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
715 if (clk_get_rate(gc2355->xvclk) != GC2355_XVCLK_FREQ)
716 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
717 ret = clk_prepare_enable(gc2355->xvclk);
718 if (ret < 0) {
719 dev_err(dev, "Failed to enable xvclk\n");
720 return ret;
721 }
722 if (!IS_ERR(gc2355->reset_gpio))
723 gpiod_set_value_cansleep(gc2355->reset_gpio, 0);
724
725 ret = regulator_bulk_enable(GC2355_NUM_SUPPLIES, gc2355->supplies);
726 if (ret < 0) {
727 dev_err(dev, "Failed to enable regulators\n");
728 goto disable_clk;
729 }
730
731 if (!IS_ERR(gc2355->reset_gpio))
732 gpiod_set_value_cansleep(gc2355->reset_gpio, 1);
733
734 usleep_range(500, 1000);
735 if (!IS_ERR(gc2355->pwdn_gpio))
736 gpiod_set_value_cansleep(gc2355->pwdn_gpio, 1);
737
738 /* 8192 cycles prior to first SCCB transaction */
739 delay_us = gc2355_cal_delay(8192);
740 usleep_range(delay_us, delay_us * 2);
741
742 return 0;
743
744 disable_clk:
745 clk_disable_unprepare(gc2355->xvclk);
746
747 return ret;
748 }
749
__gc2355_power_off(struct gc2355 * gc2355)750 static void __gc2355_power_off(struct gc2355 *gc2355)
751 {
752 int ret;
753 struct device *dev = &gc2355->client->dev;
754
755 if (!IS_ERR(gc2355->pwdn_gpio))
756 gpiod_set_value_cansleep(gc2355->pwdn_gpio, 0);
757 clk_disable_unprepare(gc2355->xvclk);
758 if (!IS_ERR(gc2355->reset_gpio))
759 gpiod_set_value_cansleep(gc2355->reset_gpio, 0);
760 if (!IS_ERR_OR_NULL(gc2355->pins_sleep)) {
761 ret = pinctrl_select_state(gc2355->pinctrl,
762 gc2355->pins_sleep);
763 if (ret < 0)
764 dev_dbg(dev, "could not set pins\n");
765 }
766 regulator_bulk_disable(GC2355_NUM_SUPPLIES, gc2355->supplies);
767 }
768
gc2355_runtime_resume(struct device * dev)769 static int gc2355_runtime_resume(struct device *dev)
770 {
771 struct i2c_client *client = to_i2c_client(dev);
772 struct v4l2_subdev *sd = i2c_get_clientdata(client);
773 struct gc2355 *gc2355 = to_gc2355(sd);
774
775 return __gc2355_power_on(gc2355);
776 }
777
gc2355_runtime_suspend(struct device * dev)778 static int gc2355_runtime_suspend(struct device *dev)
779 {
780 struct i2c_client *client = to_i2c_client(dev);
781 struct v4l2_subdev *sd = i2c_get_clientdata(client);
782 struct gc2355 *gc2355 = to_gc2355(sd);
783
784 __gc2355_power_off(gc2355);
785
786 return 0;
787 }
788
789 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc2355_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)790 static int gc2355_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
791 {
792 struct gc2355 *gc2355 = to_gc2355(sd);
793 struct v4l2_mbus_framefmt *try_fmt =
794 v4l2_subdev_get_try_format(sd, fh->pad, 0);
795 const struct gc2355_mode *def_mode = &supported_modes[0];
796
797 mutex_lock(&gc2355->mutex);
798 /* Initialize try_fmt */
799 try_fmt->width = def_mode->width;
800 try_fmt->height = def_mode->height;
801 try_fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
802 try_fmt->field = V4L2_FIELD_NONE;
803
804 mutex_unlock(&gc2355->mutex);
805 /* No crop or compose */
806
807 return 0;
808 }
809 #endif
810
gc2355_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)811 static int gc2355_enum_frame_interval(struct v4l2_subdev *sd,
812 struct v4l2_subdev_pad_config *cfg,
813 struct v4l2_subdev_frame_interval_enum *fie)
814 {
815 if (fie->index >= ARRAY_SIZE(supported_modes))
816 return -EINVAL;
817
818 fie->code = MEDIA_BUS_FMT_SRGGB10_1X10;
819 fie->width = supported_modes[fie->index].width;
820 fie->height = supported_modes[fie->index].height;
821 fie->interval = supported_modes[fie->index].max_fps;
822 return 0;
823 }
824
gc2355_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)825 static int gc2355_g_mbus_config(struct v4l2_subdev *sd,
826 struct v4l2_mbus_config *config)
827 {
828 u32 val = 0;
829
830 val = 1 << (GC2355_LANES - 1) |
831 V4L2_MBUS_CSI2_CHANNEL_0 |
832 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
833 config->type = V4L2_MBUS_CSI2;
834 config->flags = val;
835
836 return 0;
837 }
838
839 static const struct dev_pm_ops gc2355_pm_ops = {
840 SET_RUNTIME_PM_OPS(gc2355_runtime_suspend,
841 gc2355_runtime_resume, NULL)
842 };
843
844 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
845 static const struct v4l2_subdev_internal_ops gc2355_internal_ops = {
846 .open = gc2355_open,
847 };
848 #endif
849
850 static const struct v4l2_subdev_core_ops gc2355_core_ops = {
851 .ioctl = gc2355_ioctl,
852 #ifdef CONFIG_COMPAT
853 .compat_ioctl32 = gc2355_compat_ioctl32,
854 #endif
855 };
856
857 static const struct v4l2_subdev_video_ops gc2355_video_ops = {
858 .s_stream = gc2355_s_stream,
859 .g_frame_interval = gc2355_g_frame_interval,
860 .g_mbus_config = gc2355_g_mbus_config,
861 };
862
863 static const struct v4l2_subdev_pad_ops gc2355_pad_ops = {
864 .enum_mbus_code = gc2355_enum_mbus_code,
865 .enum_frame_size = gc2355_enum_frame_sizes,
866 .enum_frame_interval = gc2355_enum_frame_interval,
867 .get_fmt = gc2355_get_fmt,
868 .set_fmt = gc2355_set_fmt,
869 };
870
871 static const struct v4l2_subdev_ops gc2355_subdev_ops = {
872 .core = &gc2355_core_ops,
873 .video = &gc2355_video_ops,
874 .pad = &gc2355_pad_ops,
875 };
876
gc2355_set_ctrl(struct v4l2_ctrl * ctrl)877 static int gc2355_set_ctrl(struct v4l2_ctrl *ctrl)
878 {
879 struct gc2355 *gc2355 = container_of(ctrl->handler,
880 struct gc2355, ctrl_handler);
881 struct i2c_client *client = gc2355->client;
882 s64 max;
883 int ret = 0;
884 s32 usGain, temp;
885
886 /* Propagate change of current control to all related controls */
887 switch (ctrl->id) {
888 case V4L2_CID_VBLANK:
889 /* Update max exposure while meeting expected vblanking */
890 max = gc2355->cur_mode->height + ctrl->val - 4;
891 __v4l2_ctrl_modify_range(gc2355->exposure,
892 gc2355->exposure->minimum, max,
893 gc2355->exposure->step,
894 gc2355->exposure->default_value);
895 break;
896 }
897
898 if (!pm_runtime_get_if_in_use(&client->dev))
899 return 0;
900
901 switch (ctrl->id) {
902 case V4L2_CID_EXPOSURE:
903 /* 4 least significant bits of expsoure are fractional part */
904 ret = gc2355_write_reg(gc2355->client,
905 GC2355_PAGE_SELECT,
906 0x00);
907 ret = gc2355_write_reg(gc2355->client,
908 GC2355_REG_EXPOSURE_H,
909 (ctrl->val >> 8) & 0x3f);
910 ret = gc2355_write_reg(gc2355->client,
911 GC2355_REG_EXPOSURE_L,
912 ctrl->val & 0xff);
913 break;
914 case V4L2_CID_ANALOGUE_GAIN:
915 usGain = ctrl->val;
916 ret = gc2355_write_reg(gc2355->client,
917 GC2355_PAGE_SELECT,
918 0x03);
919 if ((usGain >= GC2355_ANALOG_GAIN_1) &&
920 (usGain < GC2355_ANALOG_GAIN_2)) {
921 ret = gc2355_write_reg(gc2355->client,
922 GC2355_ANALOG_GAIN_REG,
923 0x00);
924 temp = usGain;
925 ret = gc2355_write_reg(gc2355->client,
926 GC2355_PREGAIN_H_REG,
927 temp >> 6);
928 ret = gc2355_write_reg(gc2355->client,
929 GC2355_PREGAIN_L_REG,
930 (temp << 2) & 0xfc);
931 } else if ((usGain >= GC2355_ANALOG_GAIN_2) &&
932 (usGain < GC2355_ANALOG_GAIN_3)) {
933 ret = gc2355_write_reg(gc2355->client,
934 GC2355_ANALOG_GAIN_REG,
935 0x01);
936 temp = 64 * usGain / GC2355_ANALOG_GAIN_2;
937 ret = gc2355_write_reg(gc2355->client,
938 GC2355_PREGAIN_H_REG,
939 temp >> 6);
940 ret = gc2355_write_reg(gc2355->client,
941 GC2355_PREGAIN_L_REG,
942 (temp << 2) & 0xfc);
943 } else if ((usGain >= GC2355_ANALOG_GAIN_3) &&
944 (usGain < GC2355_ANALOG_GAIN_4)) {
945 ret = gc2355_write_reg(gc2355->client,
946 GC2355_ANALOG_GAIN_REG,
947 0x02);
948 temp = 64 * usGain / GC2355_ANALOG_GAIN_3;
949 ret = gc2355_write_reg(gc2355->client,
950 GC2355_PREGAIN_H_REG,
951 temp >> 6);
952 ret = gc2355_write_reg(gc2355->client,
953 GC2355_PREGAIN_L_REG,
954 (temp << 2) & 0xfc);
955 } else if (usGain >= GC2355_ANALOG_GAIN_4) {
956 ret = gc2355_write_reg(gc2355->client,
957 GC2355_ANALOG_GAIN_REG,
958 0x03);
959 temp = 64 * usGain / GC2355_ANALOG_GAIN_4;
960 ret = gc2355_write_reg(gc2355->client,
961 GC2355_PREGAIN_H_REG,
962 temp >> 6);
963 ret = gc2355_write_reg(gc2355->client,
964 GC2355_PREGAIN_L_REG,
965 (temp << 2) & 0xfc);
966 }
967 break;
968 case V4L2_CID_VBLANK:
969 ret = gc2355_write_reg(gc2355->client,
970 GC2355_PAGE_SELECT,
971 0x00);
972 ret = gc2355_write_reg(gc2355->client,
973 GC2355_REG_VTS_H,
974 ((ctrl->val + gc2355->cur_mode->height) >> 8) & 0x3f);
975 ret = gc2355_write_reg(gc2355->client, GC2355_REG_VTS_L,
976 (ctrl->val + gc2355->cur_mode->height) &
977 0xff);
978 break;
979
980 default:
981 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
982 __func__, ctrl->id, ctrl->val);
983 break;
984 }
985
986 pm_runtime_put(&client->dev);
987
988 return ret;
989 }
990
991 static const struct v4l2_ctrl_ops gc2355_ctrl_ops = {
992 .s_ctrl = gc2355_set_ctrl,
993 };
994
gc2355_initialize_controls(struct gc2355 * gc2355)995 static int gc2355_initialize_controls(struct gc2355 *gc2355)
996 {
997 const struct gc2355_mode *mode;
998 struct v4l2_ctrl_handler *handler;
999 struct v4l2_ctrl *ctrl;
1000 s64 exposure_max, vblank_def;
1001 u32 h_blank;
1002 int ret;
1003 struct device *dev = &gc2355->client->dev;
1004
1005 dev_info(dev, "Enter %s(%d) !\n", __func__, __LINE__);
1006 handler = &gc2355->ctrl_handler;
1007 mode = gc2355->cur_mode;
1008 ret = v4l2_ctrl_handler_init(handler, 8);
1009 if (ret)
1010 return ret;
1011 handler->lock = &gc2355->mutex;
1012
1013 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1014 0, 0, link_freq_menu_items);
1015 if (ctrl)
1016 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1017
1018 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1019 0, GC2355_PIXEL_RATE, 1, GC2355_PIXEL_RATE);
1020
1021 h_blank = mode->hts_def - mode->width;
1022 gc2355->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1023 h_blank, h_blank, 1, h_blank);
1024 if (gc2355->hblank)
1025 gc2355->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1026
1027 vblank_def = mode->vts_def - mode->height;
1028 gc2355->vblank = v4l2_ctrl_new_std(handler, &gc2355_ctrl_ops,
1029 V4L2_CID_VBLANK, vblank_def,
1030 GC2355_VTS_MAX - mode->height,
1031 1, vblank_def);
1032
1033 exposure_max = mode->vts_def - 4;
1034 gc2355->exposure = v4l2_ctrl_new_std(handler, &gc2355_ctrl_ops,
1035 V4L2_CID_EXPOSURE, GC2355_EXPOSURE_MIN,
1036 exposure_max, GC2355_EXPOSURE_STEP,
1037 mode->exp_def);
1038
1039 gc2355->anal_gain = v4l2_ctrl_new_std(handler, &gc2355_ctrl_ops,
1040 V4L2_CID_ANALOGUE_GAIN, GC2355_GAIN_MIN,
1041 GC2355_GAIN_MAX, GC2355_GAIN_STEP,
1042 GC2355_GAIN_DEFAULT);
1043
1044 if (handler->error) {
1045 ret = handler->error;
1046 dev_err(&gc2355->client->dev,
1047 "Failed to init controls(%d)\n", ret);
1048 goto err_free_handler;
1049 }
1050
1051 gc2355->subdev.ctrl_handler = handler;
1052
1053 return 0;
1054
1055 err_free_handler:
1056 v4l2_ctrl_handler_free(handler);
1057
1058 return ret;
1059 }
1060
gc2355_check_sensor_id(struct gc2355 * gc2355,struct i2c_client * client)1061 static int gc2355_check_sensor_id(struct gc2355 *gc2355,
1062 struct i2c_client *client)
1063 {
1064 struct device *dev = &gc2355->client->dev;
1065 u8 pid, ver = 0x00;
1066 int ret;
1067 unsigned short id;
1068
1069 ret = gc2355_read_reg(client, GC2355_REG_CHIP_ID_H, &pid);
1070 if (ret) {
1071 dev_err(dev, "Read chip ID H register error\n");
1072 return ret;
1073 }
1074
1075 ret = gc2355_read_reg(client, GC2355_REG_CHIP_ID_L, &ver);
1076 if (ret) {
1077 dev_err(dev, "Read chip ID L register error\n");
1078 return ret;
1079 }
1080
1081 id = SENSOR_ID(pid, ver);
1082 if (id != CHIP_ID) {
1083 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1084 return ret;
1085 }
1086
1087 dev_info(dev, "detected gc%04x sensor\n", id);
1088
1089 return 0;
1090 }
1091
gc2355_configure_regulators(struct gc2355 * gc2355)1092 static int gc2355_configure_regulators(struct gc2355 *gc2355)
1093 {
1094 unsigned int i;
1095
1096 for (i = 0; i < GC2355_NUM_SUPPLIES; i++)
1097 gc2355->supplies[i].supply = gc2355_supply_names[i];
1098
1099 return devm_regulator_bulk_get(&gc2355->client->dev,
1100 GC2355_NUM_SUPPLIES,
1101 gc2355->supplies);
1102 }
1103
gc2355_probe(struct i2c_client * client,const struct i2c_device_id * id)1104 static int gc2355_probe(struct i2c_client *client,
1105 const struct i2c_device_id *id)
1106 {
1107 struct device *dev = &client->dev;
1108 struct device_node *node = dev->of_node;
1109 struct gc2355 *gc2355;
1110 struct v4l2_subdev *sd;
1111 char facing[2];
1112 int ret;
1113
1114 dev_info(dev, "driver version: %02x.%02x.%02x",
1115 DRIVER_VERSION >> 16,
1116 (DRIVER_VERSION & 0xff00) >> 8,
1117 DRIVER_VERSION & 0x00ff);
1118
1119 gc2355 = devm_kzalloc(dev, sizeof(*gc2355), GFP_KERNEL);
1120 if (!gc2355)
1121 return -ENOMEM;
1122
1123 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1124 &gc2355->module_index);
1125 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1126 &gc2355->module_facing);
1127 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1128 &gc2355->module_name);
1129 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1130 &gc2355->len_name);
1131 if (ret) {
1132 dev_err(dev, "could not get module information!\n");
1133 return -EINVAL;
1134 }
1135
1136 gc2355->client = client;
1137 gc2355->cur_mode = &supported_modes[0];
1138
1139 gc2355->xvclk = devm_clk_get(dev, "xvclk");
1140 if (IS_ERR(gc2355->xvclk)) {
1141 dev_err(dev, "Failed to get xvclk\n");
1142 return -EINVAL;
1143 }
1144
1145 gc2355->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1146 if (IS_ERR(gc2355->reset_gpio))
1147 dev_warn(dev, "Failed to get reset-gpios\n");
1148
1149 gc2355->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1150 if (IS_ERR(gc2355->pwdn_gpio))
1151 dev_warn(dev, "Failed to get pwdn-gpios\n");
1152
1153 gc2355->pinctrl = devm_pinctrl_get(dev);
1154 if (!IS_ERR(gc2355->pinctrl)) {
1155 gc2355->pins_default =
1156 pinctrl_lookup_state(gc2355->pinctrl,
1157 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1158 if (IS_ERR(gc2355->pins_default))
1159 dev_err(dev, "could not get default pinstate\n");
1160
1161 gc2355->pins_sleep =
1162 pinctrl_lookup_state(gc2355->pinctrl,
1163 OF_CAMERA_PINCTRL_STATE_SLEEP);
1164 if (IS_ERR(gc2355->pins_sleep))
1165 dev_err(dev, "could not get sleep pinstate\n");
1166 } else {
1167 dev_err(dev, "no pinctrl\n");
1168 }
1169
1170 ret = gc2355_configure_regulators(gc2355);
1171 if (ret) {
1172 dev_err(dev, "Failed to get power regulators\n");
1173 return ret;
1174 }
1175
1176 mutex_init(&gc2355->mutex);
1177
1178 sd = &gc2355->subdev;
1179 v4l2_i2c_subdev_init(sd, client, &gc2355_subdev_ops);
1180 ret = gc2355_initialize_controls(gc2355);
1181 if (ret)
1182 goto err_destroy_mutex;
1183
1184 ret = __gc2355_power_on(gc2355);
1185 if (ret)
1186 goto err_free_handler;
1187
1188 ret = gc2355_check_sensor_id(gc2355, client);
1189 if (ret)
1190 goto err_power_off;
1191
1192 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1193 sd->internal_ops = &gc2355_internal_ops;
1194 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1195 V4L2_SUBDEV_FL_HAS_EVENTS;
1196 #endif
1197 #if defined(CONFIG_MEDIA_CONTROLLER)
1198 gc2355->pad.flags = MEDIA_PAD_FL_SOURCE;
1199 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1200 ret = media_entity_pads_init(&sd->entity, 1, &gc2355->pad);
1201 if (ret < 0)
1202 goto err_power_off;
1203 #endif
1204
1205 memset(facing, 0, sizeof(facing));
1206 if (strcmp(gc2355->module_facing, "back") == 0)
1207 facing[0] = 'b';
1208 else
1209 facing[0] = 'f';
1210
1211 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1212 gc2355->module_index, facing,
1213 GC2355_NAME, dev_name(sd->dev));
1214 ret = v4l2_async_register_subdev_sensor_common(sd);
1215 if (ret) {
1216 dev_err(dev, "v4l2 async register subdev failed\n");
1217 goto err_clean_entity;
1218 }
1219
1220 pm_runtime_set_active(dev);
1221 pm_runtime_enable(dev);
1222 pm_runtime_idle(dev);
1223
1224 return 0;
1225
1226 err_clean_entity:
1227 #if defined(CONFIG_MEDIA_CONTROLLER)
1228 media_entity_cleanup(&sd->entity);
1229 #endif
1230 err_power_off:
1231 __gc2355_power_off(gc2355);
1232 err_free_handler:
1233 v4l2_ctrl_handler_free(&gc2355->ctrl_handler);
1234 err_destroy_mutex:
1235 mutex_destroy(&gc2355->mutex);
1236
1237 return ret;
1238 }
1239
gc2355_remove(struct i2c_client * client)1240 static int gc2355_remove(struct i2c_client *client)
1241 {
1242 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1243 struct gc2355 *gc2355 = to_gc2355(sd);
1244
1245 v4l2_async_unregister_subdev(sd);
1246 #if defined(CONFIG_MEDIA_CONTROLLER)
1247 media_entity_cleanup(&sd->entity);
1248 #endif
1249 v4l2_ctrl_handler_free(&gc2355->ctrl_handler);
1250 mutex_destroy(&gc2355->mutex);
1251
1252 pm_runtime_disable(&client->dev);
1253 if (!pm_runtime_status_suspended(&client->dev))
1254 __gc2355_power_off(gc2355);
1255 pm_runtime_set_suspended(&client->dev);
1256
1257 return 0;
1258 }
1259
1260 #if IS_ENABLED(CONFIG_OF)
1261 static const struct of_device_id gc2355_of_match[] = {
1262 { .compatible = "galaxycore,gc2355" },
1263 {},
1264 };
1265 MODULE_DEVICE_TABLE(of, gc2355_of_match);
1266 #endif
1267
1268 static const struct i2c_device_id gc2355_match_id[] = {
1269 { "galaxycore,gc2355", 0 },
1270 { },
1271 };
1272
1273 static struct i2c_driver gc2355_i2c_driver = {
1274 .driver = {
1275 .name = GC2355_NAME,
1276 .pm = &gc2355_pm_ops,
1277 .of_match_table = of_match_ptr(gc2355_of_match),
1278 },
1279 .probe = &gc2355_probe,
1280 .remove = &gc2355_remove,
1281 .id_table = gc2355_match_id,
1282 };
1283
sensor_mod_init(void)1284 static int __init sensor_mod_init(void)
1285 {
1286 return i2c_add_driver(&gc2355_i2c_driver);
1287 }
1288
sensor_mod_exit(void)1289 static void __exit sensor_mod_exit(void)
1290 {
1291 i2c_del_driver(&gc2355_i2c_driver);
1292 }
1293
1294 device_initcall_sync(sensor_mod_init);
1295 module_exit(sensor_mod_exit);
1296
1297 MODULE_DESCRIPTION("GC2355 CMOS Image Sensor driver");
1298 MODULE_LICENSE("GPL v2");
1299