1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * gc2053 sensor driver
4 *
5 * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X00 first version.
8 * V0.0X01.0X01 add quick stream on/off
9 * V0.0X01.0X02 support slave mode
10 */
11
12 #include <linux/clk.h>
13 #include <linux/device.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/of.h>
20 #include <linux/of_graph.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/sysfs.h>
23 #include <linux/slab.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <linux/version.h>
26 #include <linux/rk-camera-module.h>
27
28 #include <media/v4l2-async.h>
29 #include <media/media-entity.h>
30 #include <media/v4l2-common.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-mediabus.h>
37 #include <media/v4l2-subdev.h>
38
39 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x02)
40 #define GC2053_NAME "gc2053"
41 #define GC2053_MEDIA_BUS_FMT MEDIA_BUS_FMT_SGRBG10_1X10
42
43 #define MIPI_FREQ_297M 297000000
44 #define GC2053_XVCLK_FREQ 24000000
45
46 #define GC2053_PAGE_SELECT 0xFE
47
48 #define GC2053_REG_CHIP_ID_H 0xF0
49 #define GC2053_REG_CHIP_ID_L 0xF1
50
51 #define GC2053_REG_EXP_H 0x03
52 #define GC2053_REG_EXP_L 0x04
53
54 #define GC2053_REG_VTS_H 0x41
55 #define GC2053_REG_VTS_L 0x42
56
57 #define GC2053_REG_CTRL_MODE 0x3E
58 #define GC2053_MODE_SW_STANDBY 0x11
59 #define GC2053_MODE_STREAMING 0x91
60
61 #define REG_NULL 0xFF
62
63 #define GC2053_CHIP_ID 0x2053
64
65 #define GC2053_VTS_MAX 0x3FFF
66 #define GC2053_HTS_MAX 0xFFF
67
68 #define GC2053_EXPOSURE_MAX 0x3FFF
69 #define GC2053_EXPOSURE_MIN 1
70 #define GC2053_EXPOSURE_STEP 1
71
72 #define GC2053_GAIN_MIN 0x40
73 #define GC2053_GAIN_MAX 0x2000
74 #define GC2053_GAIN_STEP 1
75 #define GC2053_GAIN_DEFAULT 64
76
77 #define GC2053_LANES 2
78
79 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
80 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
81
82 #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
83
84 #define GC2053_FLIP_MIRROR_REG 0x17
85
86 #define GC_MIRROR_BIT_MASK BIT(0)
87 #define GC_FLIP_BIT_MASK BIT(1)
88
89 static const char * const gc2053_supply_names[] = {
90 "dovdd", /* Digital I/O power */
91 "avdd", /* Analog power */
92 "dvdd", /* Digital core power */
93 };
94
95 #define GC2053_NUM_SUPPLIES ARRAY_SIZE(gc2053_supply_names)
96
97 #define to_gc2053(sd) container_of(sd, struct gc2053, subdev)
98
99 struct regval {
100 u8 addr;
101 u8 val;
102 };
103
104 struct gc2053_mode {
105 u32 width;
106 u32 height;
107 struct v4l2_fract max_fps;
108 u32 hts_def;
109 u32 vts_def;
110 u32 exp_def;
111 const struct regval *reg_list;
112 u32 hdr_mode;
113 u32 vc[PAD_MAX];
114 };
115
116 struct gc2053 {
117 struct i2c_client *client;
118 struct clk *xvclk;
119 struct gpio_desc *reset_gpio;
120 struct gpio_desc *pwdn_gpio;
121 struct gpio_desc *power_gpio;
122 struct regulator_bulk_data supplies[GC2053_NUM_SUPPLIES];
123
124 struct pinctrl *pinctrl;
125 struct pinctrl_state *pins_default;
126 struct pinctrl_state *pins_sleep;
127
128 struct v4l2_subdev subdev;
129 struct media_pad pad;
130 struct v4l2_ctrl_handler ctrl_handler;
131 struct v4l2_ctrl *exposure;
132 struct v4l2_ctrl *anal_gain;
133 struct v4l2_ctrl *hblank;
134 struct v4l2_ctrl *vblank;
135 struct v4l2_ctrl *h_flip;
136 struct v4l2_ctrl *v_flip;
137 struct mutex mutex;
138 bool streaming;
139 bool power_on;
140 const struct gc2053_mode *cur_mode;
141 unsigned int lane_num;
142 unsigned int cfg_num;
143 unsigned int pixel_rate;
144
145 u32 module_index;
146 const char *module_facing;
147 const char *module_name;
148 const char *len_name;
149 enum rkmodule_sync_mode sync_mode;
150 struct rkmodule_awb_cfg awb_cfg;
151 struct rkmodule_lsc_cfg lsc_cfg;
152 u8 flip;
153 };
154
155 /*
156 * window_size=1920*1080 mipi@2lane
157 * mclk=24mhz,mipi_clk=594Mbps
158 * pixel_line_total=2200,line_frame_total=1125
159 * row_time=29.629us,frame_rate=30fps
160 */
161 static const struct regval gc2053_1920x1080_regs_2lane[] = {
162 /****system****/
163 {0xfe, 0x80},
164 {0xfe, 0x80},
165 {0xfe, 0x80},
166 {0xfe, 0x00},
167 {0xf2, 0x00},
168 {0xf3, 0x00},
169 {0xf4, 0x36},
170 {0xf5, 0xc0},
171 {0xf6, 0x44},
172 {0xf7, 0x01},
173 {0xf8, 0x63},
174 {0xf9, 0x40},
175 {0xfc, 0x8e},
176 /****CISCTL & ANALOG****/
177 {0xfe, 0x00},
178 {0x87, 0x18},
179 {0xee, 0x30},
180 {0xd0, 0xb7},
181 {0x03, 0x04},
182 {0x04, 0x60},
183 {0x05, 0x04},
184 {0x06, 0x4c},
185 {0x07, 0x00},
186 {0x08, 0x11},
187 {0x09, 0x00},
188 {0x0a, 0x02},
189 {0x0b, 0x00},
190 {0x0c, 0x02},
191 {0x0d, 0x04},
192 {0x0e, 0x40},
193 {0x12, 0xe2},
194 {0x13, 0x16},
195 {0x19, 0x0a},
196 {0x21, 0x1c},
197 {0x28, 0x0a},
198 {0x29, 0x24},
199 {0x2b, 0x04},
200 {0x32, 0xf8},
201 {0x37, 0x03},
202 {0x39, 0x15},
203 {0x43, 0x07},
204 {0x44, 0x40},
205 {0x46, 0x0b},
206 {0x4b, 0x20},
207 {0x4e, 0x08},
208 {0x55, 0x20},
209 {0x66, 0x05},
210 {0x67, 0x05},
211 {0x77, 0x01},
212 {0x78, 0x00},
213 {0x7c, 0x93},
214 {0x8c, 0x12},
215 {0x8d, 0x92},
216 {0x90, 0x00},
217 {0x9d, 0x10},
218 {0xce, 0x7c},
219 {0xd2, 0x41},
220 {0xd3, 0xdc},
221 {0xe6, 0x50},
222 /*gain*/
223 {0xb6, 0xc0},
224 {0xb0, 0x60},
225 {0xb1, 0x01},
226 {0xb2, 0x00},
227 {0xb3, 0x00},
228 {0xb4, 0x00},
229 {0xb8, 0x01},
230 {0xb9, 0x00},
231 /*blk*/
232 {0x26, 0x30},
233 {0xfe, 0x01},
234 {0x40, 0x23},
235 {0x55, 0x07},
236 {0x60, 0x40},
237 {0xfe, 0x04},
238 {0x14, 0x78},
239 {0x15, 0x78},
240 {0x16, 0x78},
241 {0x17, 0x78},
242 /*window*/
243 {0xfe, 0x01},
244 {0x92, 0x02},
245 {0x94, 0x02},
246 {0x95, 0x04},
247 {0x96, 0x38},
248 {0x97, 0x07},
249 {0x98, 0x80},
250 /*ISP*/
251 {0xfe, 0x01},
252 {0x01, 0x05},
253 {0x02, 0x89},
254 {0x04, 0x01},
255 {0x07, 0xa6},
256 {0x08, 0xa9},
257 {0x09, 0xa8},
258 {0x0a, 0xa7},
259 {0x0b, 0xff},
260 {0x0c, 0xff},
261 {0x0f, 0x00},
262 {0x50, 0x1c},
263 {0x89, 0x03},
264 {0xfe, 0x04},
265 {0x28, 0x86},
266 {0x29, 0x86},
267 {0x2a, 0x86},
268 {0x2b, 0x68},
269 {0x2c, 0x68},
270 {0x2d, 0x68},
271 {0x2e, 0x68},
272 {0x2f, 0x68},
273 {0x30, 0x4f},
274 {0x31, 0x68},
275 {0x32, 0x67},
276 {0x33, 0x66},
277 {0x34, 0x66},
278 {0x35, 0x66},
279 {0x36, 0x66},
280 {0x37, 0x66},
281 {0x38, 0x62},
282 {0x39, 0x62},
283 {0x3a, 0x62},
284 {0x3b, 0x62},
285 {0x3c, 0x62},
286 {0x3d, 0x62},
287 {0x3e, 0x62},
288 {0x3f, 0x62},
289 /****DVP & MIPI****/
290 {0xfe, 0x01},
291 {0x9a, 0x06},
292 {0xfe, 0x00},
293 {0x7b, 0x2a},
294 {0x23, 0x2d},
295 {0xfe, 0x03},
296 {0x01, 0x27},
297 {0x02, 0x5f},
298 {0x03, 0xb6},
299 {0x12, 0x80},
300 {0x13, 0x07},
301 {0x15, 0x12},
302 {0xfe, 0x00},
303 {0x3e, 0x91},
304 {REG_NULL, 0x00},
305 };
306
307 static __maybe_unused const struct regval gc2053_master_mode_regs[] = {
308 {0xfe, 0x00},
309 {0x7f, 0x09},
310 {0x82, 0x01},
311 {0x83, 0x0c},
312 {0x84, 0x80},
313 {REG_NULL, 0x00},
314 };
315
316 static __maybe_unused const struct regval gc2053_slave_mode_regs[] = {
317 {0xfe, 0x00},
318 {0x7f, 0x09},
319 {0x82, 0x0a},
320 {0x83, 0x0b},
321 {0x84, 0x80},
322 {0x85, 0x51},
323 {REG_NULL, 0x00},
324 };
325
326 static const struct gc2053_mode supported_modes[] = {
327 {
328 .width = 1920,
329 .height = 1080,
330 .max_fps = {
331 .numerator = 10000,
332 .denominator = 300000,
333 },
334 .exp_def = 0x460,
335 .hts_def = 0x898,
336 .vts_def = 0x465,
337 .reg_list = gc2053_1920x1080_regs_2lane,
338 .hdr_mode = NO_HDR,
339 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
340 },
341 };
342
343 static const s64 link_freq_menu_items[] = {
344 MIPI_FREQ_297M
345 };
346
347 /* sensor register write */
gc2053_write_reg(struct i2c_client * client,u8 reg,u8 val)348 static int gc2053_write_reg(struct i2c_client *client, u8 reg, u8 val)
349 {
350 struct i2c_msg msg;
351 u8 buf[2];
352 int ret;
353
354 buf[0] = reg & 0xFF;
355 buf[1] = val;
356
357 msg.addr = client->addr;
358 msg.flags = client->flags;
359 msg.buf = buf;
360 msg.len = sizeof(buf);
361
362 ret = i2c_transfer(client->adapter, &msg, 1);
363 if (ret >= 0)
364 return 0;
365
366 dev_err(&client->dev,
367 "gc2053 write reg(0x%x val:0x%x) failed !\n", reg, val);
368
369 return ret;
370 }
371
gc2053_write_array(struct i2c_client * client,const struct regval * regs)372 static int gc2053_write_array(struct i2c_client *client,
373 const struct regval *regs)
374 {
375 int i, ret = 0;
376
377 i = 0;
378 while (regs[i].addr != REG_NULL) {
379 ret = gc2053_write_reg(client, regs[i].addr, regs[i].val);
380 if (ret) {
381 dev_err(&client->dev, "%s failed !\n", __func__);
382 break;
383 }
384 i++;
385 }
386
387 return ret;
388 }
389
390 /* sensor register read */
gc2053_read_reg(struct i2c_client * client,u8 reg,u8 * val)391 static int gc2053_read_reg(struct i2c_client *client, u8 reg, u8 *val)
392 {
393 struct i2c_msg msg[2];
394 u8 buf[1];
395 int ret;
396
397 buf[0] = reg & 0xFF;
398
399 msg[0].addr = client->addr;
400 msg[0].flags = client->flags;
401 msg[0].buf = buf;
402 msg[0].len = sizeof(buf);
403
404 msg[1].addr = client->addr;
405 msg[1].flags = client->flags | I2C_M_RD;
406 msg[1].buf = buf;
407 msg[1].len = 1;
408
409 ret = i2c_transfer(client->adapter, msg, 2);
410 if (ret >= 0) {
411 *val = buf[0];
412 return 0;
413 }
414
415 dev_err(&client->dev,
416 "gc2053 read reg(0x%x val:0x%x) failed !\n", reg, *val);
417
418 return ret;
419 }
420
gc2053_get_reso_dist(const struct gc2053_mode * mode,struct v4l2_mbus_framefmt * framefmt)421 static int gc2053_get_reso_dist(const struct gc2053_mode *mode,
422 struct v4l2_mbus_framefmt *framefmt)
423 {
424 return abs(mode->width - framefmt->width) +
425 abs(mode->height - framefmt->height);
426 }
427
428 static const struct gc2053_mode *
gc2053_find_best_fit(struct gc2053 * gc2053,struct v4l2_subdev_format * fmt)429 gc2053_find_best_fit(struct gc2053 *gc2053, struct v4l2_subdev_format *fmt)
430 {
431 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
432 int dist;
433 int cur_best_fit = 0;
434 int cur_best_fit_dist = -1;
435 unsigned int i;
436
437 for (i = 0; i < gc2053->cfg_num; i++) {
438 dist = gc2053_get_reso_dist(&supported_modes[i], framefmt);
439 if (cur_best_fit_dist == -1 || dist <= cur_best_fit_dist) {
440 cur_best_fit_dist = dist;
441 cur_best_fit = i;
442 }
443 }
444
445 return &supported_modes[cur_best_fit];
446 }
447
448 static const uint8_t gain_reg_table[29][4] = {
449 {0x00, 0x00, 0x01, 0x00},
450 {0x00, 0x10, 0x01, 0x0c},
451 {0x00, 0x20, 0x01, 0x1b},
452 {0x00, 0x30, 0x01, 0x2c},
453 {0x00, 0x40, 0x01, 0x3f},
454 {0x00, 0x50, 0x02, 0x16},
455 {0x00, 0x60, 0x02, 0x35},
456 {0x00, 0x70, 0x03, 0x16},
457 {0x00, 0x80, 0x04, 0x02},
458 {0x00, 0x90, 0x04, 0x31},
459 {0x00, 0xa0, 0x05, 0x32},
460 {0x00, 0xb0, 0x06, 0x35},
461 {0x00, 0xc0, 0x08, 0x04},
462 {0x00, 0x5a, 0x09, 0x19},
463 {0x00, 0x83, 0x0b, 0x0f},
464 {0x00, 0x93, 0x0d, 0x12},
465 {0x00, 0x84, 0x10, 0x00},
466 {0x00, 0x94, 0x12, 0x3a},
467 {0x01, 0x2c, 0x1a, 0x02},
468 {0x01, 0x3c, 0x1b, 0x20},
469 {0x00, 0x8c, 0x20, 0x0f},
470 {0x00, 0x9c, 0x26, 0x07},
471 {0x02, 0x64, 0x36, 0x21},
472 {0x02, 0x74, 0x37, 0x3a},
473 {0x00, 0xc6, 0x3d, 0x02},
474 {0x00, 0xdc, 0x3f, 0x3f},
475 {0x02, 0x85, 0x3f, 0x3f},
476 {0x02, 0x95, 0x3f, 0x3f},
477 {0x00, 0xce, 0x3f, 0x3f},
478 };
479
480 static const uint32_t gain_level_table[30] = {
481 64,
482 76,
483 91,
484 108,
485 127,
486 150,
487 181,
488 214,
489 258,
490 305,
491 370,
492 437,
493 516,
494 601,
495 719,
496 850,
497 1024,
498 1210,
499 1538,
500 1760,
501 2063,
502 2439,
503 2881,
504 3393,
505 3970,
506 4737,
507 5572,
508 6552,
509 7713,
510 0xffffffff
511 };
512
gc2053_set_gain(struct gc2053 * gc2053,u32 gain)513 static int gc2053_set_gain(struct gc2053 *gc2053, u32 gain)
514 {
515 int ret;
516 uint8_t i = 0;
517 uint8_t total = 0;
518 uint32_t temp = 0;
519
520 total = sizeof(gain_level_table) / sizeof(u32) - 1;
521 for (i = 0; i <= total; i++) {
522 if ((gain_level_table[i] <= gain) && (gain < gain_level_table[i+1]))
523 break;
524 }
525
526 if (i > total)
527 i = total;
528
529 ret = gc2053_write_reg(gc2053->client, 0xb4, gain_reg_table[i][0]);
530 ret |= gc2053_write_reg(gc2053->client, 0xb3, gain_reg_table[i][1]);
531 ret |= gc2053_write_reg(gc2053->client, 0xb8, gain_reg_table[i][2]);
532 ret |= gc2053_write_reg(gc2053->client, 0xb9, gain_reg_table[i][3]);
533
534 temp = 64 * gain / gain_level_table[i];
535 ret |= gc2053_write_reg(gc2053->client, 0xb1, (temp >> 6));
536 ret |= gc2053_write_reg(gc2053->client, 0xb2, (temp << 2) & 0xfc);
537
538 return ret;
539 }
540
gc2053_set_ctrl(struct v4l2_ctrl * ctrl)541 static int gc2053_set_ctrl(struct v4l2_ctrl *ctrl)
542 {
543 struct gc2053 *gc2053 = container_of(ctrl->handler,
544 struct gc2053, ctrl_handler);
545 struct i2c_client *client = gc2053->client;
546 s64 max;
547 int ret = 0;
548 u32 vts = 0;
549
550 /* Propagate change of current control to all related controls */
551 switch (ctrl->id) {
552 case V4L2_CID_VBLANK:
553 /* Update max exposure while meeting expected vblanking */
554 max = gc2053->cur_mode->height + ctrl->val - 4;
555 __v4l2_ctrl_modify_range(gc2053->exposure,
556 gc2053->exposure->minimum, max,
557 gc2053->exposure->step,
558 gc2053->exposure->default_value);
559 break;
560 }
561
562 if (!pm_runtime_get_if_in_use(&client->dev))
563 return 0;
564
565 switch (ctrl->id) {
566 case V4L2_CID_EXPOSURE:
567 ret = gc2053_write_reg(gc2053->client, GC2053_REG_EXP_H,
568 (ctrl->val >> 8) & 0x3f);
569 ret |= gc2053_write_reg(gc2053->client, GC2053_REG_EXP_L,
570 ctrl->val & 0xff);
571 break;
572 case V4L2_CID_ANALOGUE_GAIN:
573 gc2053_set_gain(gc2053, ctrl->val);
574 break;
575 case V4L2_CID_VBLANK:
576 vts = ctrl->val + gc2053->cur_mode->height;
577 /* Note: In master-slave mode, Galaxycore request slave sensor frame rate bigger than master. */
578 if (gc2053->sync_mode == INTERNAL_MASTER_MODE)
579 vts += 10;
580 ret = gc2053_write_reg(gc2053->client, GC2053_REG_VTS_H, (vts >> 8) & 0x3f);
581 ret |= gc2053_write_reg(gc2053->client, GC2053_REG_VTS_L, vts & 0xff);
582 /* TBD: master and slave not sync to streaming, but except sleep 20ms below */
583 usleep_range(20000, 50000);
584 break;
585 case V4L2_CID_HFLIP:
586 if (ctrl->val)
587 gc2053->flip |= GC_MIRROR_BIT_MASK;
588 else
589 gc2053->flip &= ~GC_MIRROR_BIT_MASK;
590 break;
591 case V4L2_CID_VFLIP:
592 if (ctrl->val)
593 gc2053->flip |= GC_FLIP_BIT_MASK;
594 else
595 gc2053->flip &= ~GC_FLIP_BIT_MASK;
596 break;
597 default:
598 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
599 __func__, ctrl->id, ctrl->val);
600 break;
601 }
602
603 pm_runtime_put(&client->dev);
604 return ret;
605 }
606
607 static const struct v4l2_ctrl_ops gc2053_ctrl_ops = {
608 .s_ctrl = gc2053_set_ctrl,
609 };
610
gc2053_configure_regulators(struct gc2053 * gc2053)611 static int gc2053_configure_regulators(struct gc2053 *gc2053)
612 {
613 unsigned int i;
614
615 for (i = 0; i < GC2053_NUM_SUPPLIES; i++)
616 gc2053->supplies[i].supply = gc2053_supply_names[i];
617
618 return devm_regulator_bulk_get(&gc2053->client->dev,
619 GC2053_NUM_SUPPLIES,
620 gc2053->supplies);
621 }
622
gc2053_parse_of(struct gc2053 * gc2053)623 static int gc2053_parse_of(struct gc2053 *gc2053)
624 {
625 struct device *dev = &gc2053->client->dev;
626 struct device_node *endpoint;
627 struct fwnode_handle *fwnode;
628 int rval;
629
630 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
631 if (!endpoint) {
632 dev_err(dev, "Failed to get endpoint\n");
633 return -EINVAL;
634 }
635 fwnode = of_fwnode_handle(endpoint);
636 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
637 if (rval <= 0) {
638 dev_warn(dev, " Get mipi lane num failed!\n");
639 return -1;
640 }
641
642 gc2053->lane_num = rval;
643 if (2 == gc2053->lane_num) {
644 gc2053->cur_mode = &supported_modes[0];
645 gc2053->cfg_num = ARRAY_SIZE(supported_modes);
646
647 /*pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
648 gc2053->pixel_rate = MIPI_FREQ_297M * 2U * (gc2053->lane_num) / 10U;
649 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
650 gc2053->lane_num, gc2053->pixel_rate);
651 } else {
652 dev_info(dev, "gc2053 can not support the lane num(%d)\n", gc2053->lane_num);
653 }
654 return 0;
655 }
656
gc2053_initialize_controls(struct gc2053 * gc2053)657 static int gc2053_initialize_controls(struct gc2053 *gc2053)
658 {
659 const struct gc2053_mode *mode;
660 struct v4l2_ctrl_handler *handler;
661 struct v4l2_ctrl *ctrl;
662 s64 exposure_max, vblank_def;
663 u32 h_blank;
664 int ret;
665
666 handler = &gc2053->ctrl_handler;
667 mode = gc2053->cur_mode;
668 ret = v4l2_ctrl_handler_init(handler, 8);
669 if (ret)
670 return ret;
671 handler->lock = &gc2053->mutex;
672
673 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
674 0, 0, link_freq_menu_items);
675 if (ctrl)
676 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
677
678 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
679 0, gc2053->pixel_rate, 1, gc2053->pixel_rate);
680
681 h_blank = mode->hts_def - mode->width;
682 gc2053->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
683 h_blank, h_blank, 1, h_blank);
684 if (gc2053->hblank)
685 gc2053->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
686
687 vblank_def = mode->vts_def - mode->height;
688 gc2053->vblank = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops,
689 V4L2_CID_VBLANK, vblank_def,
690 GC2053_VTS_MAX - mode->height,
691 1, vblank_def);
692
693 exposure_max = mode->vts_def - 4;
694 gc2053->exposure = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops,
695 V4L2_CID_EXPOSURE, GC2053_EXPOSURE_MIN,
696 exposure_max, GC2053_EXPOSURE_STEP,
697 mode->exp_def);
698
699 gc2053->anal_gain = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops,
700 V4L2_CID_ANALOGUE_GAIN, GC2053_GAIN_MIN,
701 GC2053_GAIN_MAX, GC2053_GAIN_STEP,
702 GC2053_GAIN_DEFAULT);
703
704 gc2053->h_flip = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops,
705 V4L2_CID_HFLIP, 0, 1, 1, 0);
706
707 gc2053->v_flip = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops,
708 V4L2_CID_VFLIP, 0, 1, 1, 0);
709 gc2053->flip = 0;
710
711 if (handler->error) {
712 ret = handler->error;
713 dev_err(&gc2053->client->dev,
714 "Failed to init controls(%d)\n", ret);
715 goto err_free_handler;
716 }
717
718 gc2053->subdev.ctrl_handler = handler;
719 return 0;
720
721 err_free_handler:
722 v4l2_ctrl_handler_free(handler);
723 return ret;
724 }
725
726 /* Calculate the delay in us by clock rate and clock cycles */
gc2053_cal_delay(u32 cycles)727 static inline u32 gc2053_cal_delay(u32 cycles)
728 {
729 return DIV_ROUND_UP(cycles, GC2053_XVCLK_FREQ / 1000 / 1000);
730 }
731
__gc2053_power_on(struct gc2053 * gc2053)732 static int __gc2053_power_on(struct gc2053 *gc2053)
733 {
734 int ret;
735 u32 delay_us;
736 struct device *dev = &gc2053->client->dev;
737
738 if (!IS_ERR_OR_NULL(gc2053->pins_default)) {
739 ret = pinctrl_select_state(gc2053->pinctrl,
740 gc2053->pins_default);
741 if (ret < 0)
742 dev_err(dev, "could not set pins\n");
743 }
744
745 ret = clk_set_rate(gc2053->xvclk, GC2053_XVCLK_FREQ);
746 if (ret < 0)
747 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
748 if (clk_get_rate(gc2053->xvclk) != GC2053_XVCLK_FREQ)
749 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
750 ret = clk_prepare_enable(gc2053->xvclk);
751 if (ret < 0) {
752 dev_err(dev, "Failed to enable xvclk\n");
753 return ret;
754 }
755
756 ret = regulator_bulk_enable(GC2053_NUM_SUPPLIES, gc2053->supplies);
757 if (ret < 0) {
758 dev_err(dev, "Failed to enable regulators\n");
759 goto disable_clk;
760 }
761 if (!IS_ERR(gc2053->power_gpio)) {
762 gpiod_set_value_cansleep(gc2053->power_gpio, 1);
763 usleep_range(100, 200);
764 }
765 if (!IS_ERR(gc2053->reset_gpio)) {
766 gpiod_set_value_cansleep(gc2053->reset_gpio, 1);
767 usleep_range(100, 200);
768 }
769 if (!IS_ERR(gc2053->pwdn_gpio))
770 gpiod_set_value_cansleep(gc2053->pwdn_gpio, 0);
771
772 if (!IS_ERR(gc2053->reset_gpio))
773 gpiod_set_value_cansleep(gc2053->reset_gpio, 0);
774 usleep_range(3000, 6000);
775 /* 8192 cycles prior to first SCCB transaction */
776 delay_us = gc2053_cal_delay(8192);
777 usleep_range(delay_us, delay_us * 2);
778 return 0;
779
780 disable_clk:
781 clk_disable_unprepare(gc2053->xvclk);
782 return ret;
783 }
784
__gc2053_power_off(struct gc2053 * gc2053)785 static void __gc2053_power_off(struct gc2053 *gc2053)
786 {
787 int ret;
788 struct device *dev = &gc2053->client->dev;
789
790 if (!IS_ERR(gc2053->pwdn_gpio))
791 gpiod_set_value_cansleep(gc2053->pwdn_gpio, 1);
792 clk_disable_unprepare(gc2053->xvclk);
793
794 if (!IS_ERR(gc2053->reset_gpio))
795 gpiod_set_value_cansleep(gc2053->reset_gpio, 1);
796
797 if (!IS_ERR_OR_NULL(gc2053->pins_sleep)) {
798 ret = pinctrl_select_state(gc2053->pinctrl,
799 gc2053->pins_sleep);
800 if (ret < 0)
801 dev_dbg(dev, "could not set pins\n");
802 }
803 if (!IS_ERR(gc2053->power_gpio))
804 gpiod_set_value_cansleep(gc2053->power_gpio, 0);
805 regulator_bulk_disable(GC2053_NUM_SUPPLIES, gc2053->supplies);
806 }
807
gc2053_check_sensor_id(struct gc2053 * gc2053,struct i2c_client * client)808 static int gc2053_check_sensor_id(struct gc2053 *gc2053,
809 struct i2c_client *client)
810 {
811 struct device *dev = &gc2053->client->dev;
812 u8 pid = 0, ver = 0;
813 u16 id = 0;
814 int ret = 0;
815
816 /* Check sensor revision */
817 ret = gc2053_read_reg(client, GC2053_REG_CHIP_ID_H, &pid);
818 ret |= gc2053_read_reg(client, GC2053_REG_CHIP_ID_L, &ver);
819 if (ret) {
820 dev_err(&client->dev, "gc2053_read_reg failed (%d)\n", ret);
821 return ret;
822 }
823
824 id = SENSOR_ID(pid, ver);
825 if (id != GC2053_CHIP_ID) {
826 dev_err(&client->dev,
827 "Sensor detection failed (%04X,%d)\n",
828 id, ret);
829 return -ENODEV;
830 }
831
832 dev_info(dev, "Detected GC%04x sensor\n", id);
833 return 0;
834 }
835
gc2053_set_flip(struct gc2053 * gc2053,u8 mode)836 static int gc2053_set_flip(struct gc2053 *gc2053, u8 mode)
837 {
838 u8 match_reg = 0;
839
840 gc2053_read_reg(gc2053->client, GC2053_FLIP_MIRROR_REG, &match_reg);
841
842 if (mode == GC_FLIP_BIT_MASK) {
843 match_reg |= GC_FLIP_BIT_MASK;
844 match_reg &= ~GC_MIRROR_BIT_MASK;
845 } else if (mode == GC_MIRROR_BIT_MASK) {
846 match_reg |= GC_MIRROR_BIT_MASK;
847 match_reg &= ~GC_FLIP_BIT_MASK;
848 } else if (mode == (GC_MIRROR_BIT_MASK |
849 GC_FLIP_BIT_MASK)) {
850 match_reg |= GC_FLIP_BIT_MASK;
851 match_reg |= GC_MIRROR_BIT_MASK;
852 } else {
853 match_reg &= ~GC_FLIP_BIT_MASK;
854 match_reg &= ~GC_MIRROR_BIT_MASK;
855 }
856 return gc2053_write_reg(gc2053->client, GC2053_FLIP_MIRROR_REG, match_reg);
857 }
858
__gc2053_start_stream(struct gc2053 * gc2053)859 static int __gc2053_start_stream(struct gc2053 *gc2053)
860 {
861 struct i2c_client *client = gc2053->client;
862 int ret;
863
864 ret = gc2053_write_array(client, gc2053->cur_mode->reg_list);
865 if (ret)
866 return ret;
867
868 /* In case these controls are set before streaming */
869 mutex_unlock(&gc2053->mutex);
870 ret = v4l2_ctrl_handler_setup(&gc2053->ctrl_handler);
871 mutex_lock(&gc2053->mutex);
872
873 ret |= gc2053_set_flip(gc2053, gc2053->flip);
874 if (ret)
875 return ret;
876 if (gc2053->sync_mode == INTERNAL_MASTER_MODE) {
877 ret = gc2053_write_array(client, gc2053_master_mode_regs);
878 if (ret)
879 dev_err(&client->dev,
880 "write internal master mode reg failed %d\n", ret);
881 } else if (gc2053->sync_mode == EXTERNAL_MASTER_MODE) {
882 ret = gc2053_write_array(client, gc2053_slave_mode_regs);
883 if (ret)
884 dev_err(&client->dev,
885 "write external master mode reg failed %d\n", ret);
886 } else if (gc2053->sync_mode == SLAVE_MODE) {
887 ret = gc2053_write_array(gc2053->client, gc2053_slave_mode_regs);
888 if (ret)
889 dev_err(&client->dev, "write slave mode reg failed %d\n", ret);
890 }
891
892 ret = gc2053_write_reg(gc2053->client, GC2053_REG_CTRL_MODE,
893 GC2053_MODE_STREAMING);
894
895 return ret;
896 }
897
__gc2053_stop_stream(struct gc2053 * gc2053)898 static int __gc2053_stop_stream(struct gc2053 *gc2053)
899 {
900 return gc2053_write_reg(gc2053->client, GC2053_REG_CTRL_MODE,
901 GC2053_MODE_SW_STANDBY);
902 }
903
gc2053_get_module_inf(struct gc2053 * gc2053,struct rkmodule_inf * inf)904 static void gc2053_get_module_inf(struct gc2053 *gc2053,
905 struct rkmodule_inf *inf)
906 {
907 memset(inf, 0, sizeof(*inf));
908 strlcpy(inf->base.sensor, GC2053_NAME, sizeof(inf->base.sensor));
909 strlcpy(inf->base.module, gc2053->module_name,
910 sizeof(inf->base.module));
911 strlcpy(inf->base.lens, gc2053->len_name, sizeof(inf->base.lens));
912 }
913
gc2053_set_awb_cfg(struct gc2053 * gc2053,struct rkmodule_awb_cfg * cfg)914 static void gc2053_set_awb_cfg(struct gc2053 *gc2053,
915 struct rkmodule_awb_cfg *cfg)
916 {
917 mutex_lock(&gc2053->mutex);
918 memcpy(&gc2053->awb_cfg, cfg, sizeof(*cfg));
919 mutex_unlock(&gc2053->mutex);
920 }
921
gc2053_set_lsc_cfg(struct gc2053 * gc2053,struct rkmodule_lsc_cfg * cfg)922 static void gc2053_set_lsc_cfg(struct gc2053 *gc2053,
923 struct rkmodule_lsc_cfg *cfg)
924 {
925 mutex_lock(&gc2053->mutex);
926 memcpy(&gc2053->lsc_cfg, cfg, sizeof(*cfg));
927 mutex_unlock(&gc2053->mutex);
928 }
929
gc2053_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)930 static long gc2053_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
931 {
932 struct gc2053 *gc2053 = to_gc2053(sd);
933 long ret = 0;
934 struct rkmodule_hdr_cfg *hdr_cfg;
935 u32 stream = 0;
936 u32 *sync_mode = NULL;
937
938 switch (cmd) {
939 case RKMODULE_GET_HDR_CFG:
940 hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
941 hdr_cfg->esp.mode = HDR_NORMAL_VC;
942 hdr_cfg->hdr_mode = gc2053->cur_mode->hdr_mode;
943 break;
944 case RKMODULE_GET_MODULE_INFO:
945 gc2053_get_module_inf(gc2053, (struct rkmodule_inf *)arg);
946 break;
947 case RKMODULE_AWB_CFG:
948 gc2053_set_awb_cfg(gc2053, (struct rkmodule_awb_cfg *)arg);
949 break;
950 case RKMODULE_LSC_CFG:
951 gc2053_set_lsc_cfg(gc2053, (struct rkmodule_lsc_cfg *)arg);
952 break;
953 case RKMODULE_SET_QUICK_STREAM:
954
955 stream = *((u32 *)arg);
956
957 if (stream)
958 ret = gc2053_write_reg(gc2053->client, GC2053_REG_CTRL_MODE,
959 GC2053_MODE_STREAMING);
960 else
961 ret = gc2053_write_reg(gc2053->client, GC2053_REG_CTRL_MODE,
962 GC2053_MODE_SW_STANDBY);
963 break;
964 case RKMODULE_GET_SYNC_MODE:
965 sync_mode = (u32 *)arg;
966 *sync_mode = gc2053->sync_mode;
967 break;
968 case RKMODULE_SET_SYNC_MODE:
969 sync_mode = (u32 *)arg;
970 gc2053->sync_mode = *sync_mode;
971 break;
972 default:
973 ret = -ENOTTY;
974 break;
975 }
976 return ret;
977 }
978
979 #ifdef CONFIG_COMPAT
gc2053_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)980 static long gc2053_compat_ioctl32(struct v4l2_subdev *sd,
981 unsigned int cmd, unsigned long arg)
982 {
983 void __user *up = compat_ptr(arg);
984 struct rkmodule_inf *inf;
985 struct rkmodule_awb_cfg *awb_cfg;
986 struct rkmodule_lsc_cfg *lsc_cfg;
987 struct rkmodule_hdr_cfg *hdr;
988 long ret = 0;
989 u32 stream = 0;
990 u32 sync_mode;
991
992 switch (cmd) {
993 case RKMODULE_GET_MODULE_INFO:
994 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
995 if (!inf) {
996 ret = -ENOMEM;
997 return ret;
998 }
999
1000 ret = gc2053_ioctl(sd, cmd, inf);
1001 if (!ret) {
1002 ret = copy_to_user(up, inf, sizeof(*inf));
1003 if (ret)
1004 ret = -EFAULT;
1005 }
1006 kfree(inf);
1007 break;
1008 case RKMODULE_AWB_CFG:
1009 awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL);
1010 if (!awb_cfg) {
1011 ret = -ENOMEM;
1012 return ret;
1013 }
1014
1015 if (copy_from_user(awb_cfg, up, sizeof(*awb_cfg))) {
1016 kfree(awb_cfg);
1017 return -EFAULT;
1018 }
1019
1020 ret = gc2053_ioctl(sd, cmd, awb_cfg);
1021 kfree(awb_cfg);
1022 break;
1023 case RKMODULE_LSC_CFG:
1024 lsc_cfg = kzalloc(sizeof(*lsc_cfg), GFP_KERNEL);
1025 if (!lsc_cfg) {
1026 ret = -ENOMEM;
1027 return ret;
1028 }
1029
1030 if (copy_from_user(lsc_cfg, up, sizeof(*lsc_cfg))) {
1031 kfree(lsc_cfg);
1032 return -EFAULT;
1033 }
1034
1035 ret = gc2053_ioctl(sd, cmd, lsc_cfg);
1036 kfree(lsc_cfg);
1037 break;
1038 case RKMODULE_GET_HDR_CFG:
1039 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1040 if (!hdr) {
1041 ret = -ENOMEM;
1042 return ret;
1043 }
1044
1045 ret = gc2053_ioctl(sd, cmd, hdr);
1046 if (!ret) {
1047 ret = copy_to_user(up, hdr, sizeof(*hdr));
1048 if (ret)
1049 ret = -EFAULT;
1050 }
1051 kfree(hdr);
1052 break;
1053 case RKMODULE_SET_HDR_CFG:
1054 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
1055 if (!hdr) {
1056 ret = -ENOMEM;
1057 return ret;
1058 }
1059
1060 if (copy_from_user(hdr, up, sizeof(*hdr))) {
1061 kfree(hdr);
1062 return -EFAULT;
1063 }
1064
1065 ret = gc2053_ioctl(sd, cmd, hdr);
1066 kfree(hdr);
1067 break;
1068 case RKMODULE_SET_QUICK_STREAM:
1069 if (copy_from_user(&stream, up, sizeof(u32)))
1070 return -EFAULT;
1071
1072 ret = gc2053_ioctl(sd, cmd, &stream);
1073 break;
1074 case RKMODULE_GET_SYNC_MODE:
1075 ret = gc2053_ioctl(sd, cmd, &sync_mode);
1076 if (!ret) {
1077 ret = copy_to_user(up, &sync_mode, sizeof(u32));
1078 if (ret)
1079 ret = -EFAULT;
1080 }
1081 break;
1082 case RKMODULE_SET_SYNC_MODE:
1083 ret = copy_from_user(&sync_mode, up, sizeof(u32));
1084 if (!ret)
1085 ret = gc2053_ioctl(sd, cmd, &sync_mode);
1086 else
1087 ret = -EFAULT;
1088 break;
1089 default:
1090 ret = -ENOTTY;
1091 break;
1092 }
1093 return ret;
1094 }
1095 #endif
1096
gc2053_s_stream(struct v4l2_subdev * sd,int on)1097 static int gc2053_s_stream(struct v4l2_subdev *sd, int on)
1098 {
1099 struct gc2053 *gc2053 = to_gc2053(sd);
1100 struct i2c_client *client = gc2053->client;
1101 int ret = 0;
1102
1103 mutex_lock(&gc2053->mutex);
1104 on = !!on;
1105 if (on == gc2053->streaming)
1106 goto unlock_and_return;
1107
1108 if (on) {
1109 ret = pm_runtime_get_sync(&client->dev);
1110 if (ret < 0) {
1111 pm_runtime_put_noidle(&client->dev);
1112 goto unlock_and_return;
1113 }
1114
1115 ret = __gc2053_start_stream(gc2053);
1116 if (ret) {
1117 v4l2_err(sd, "start stream failed while write regs\n");
1118 pm_runtime_put(&client->dev);
1119 goto unlock_and_return;
1120 }
1121 } else {
1122 __gc2053_stop_stream(gc2053);
1123 pm_runtime_put(&client->dev);
1124 }
1125
1126 gc2053->streaming = on;
1127
1128 unlock_and_return:
1129 mutex_unlock(&gc2053->mutex);
1130 return 0;
1131 }
1132
gc2053_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)1133 static int gc2053_g_frame_interval(struct v4l2_subdev *sd,
1134 struct v4l2_subdev_frame_interval *fi)
1135 {
1136 struct gc2053 *gc2053 = to_gc2053(sd);
1137 const struct gc2053_mode *mode = gc2053->cur_mode;
1138
1139 fi->interval = mode->max_fps;
1140
1141 return 0;
1142 }
1143
gc2053_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1144 static int gc2053_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
1145 struct v4l2_mbus_config *config)
1146 {
1147 struct gc2053 *gc2053 = to_gc2053(sd);
1148 const struct gc2053_mode *mode = gc2053->cur_mode;
1149 u32 val = 0;
1150
1151 if (mode->hdr_mode == NO_HDR)
1152 val = 1 << (GC2053_LANES - 1) |
1153 V4L2_MBUS_CSI2_CHANNEL_0 |
1154 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1155
1156 config->type = V4L2_MBUS_CSI2_DPHY;
1157 config->flags = val;
1158 return 0;
1159 }
gc2053_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1160 static int gc2053_enum_mbus_code(struct v4l2_subdev *sd,
1161 struct v4l2_subdev_pad_config *cfg,
1162 struct v4l2_subdev_mbus_code_enum *code)
1163 {
1164 if (code->index != 0)
1165 return -EINVAL;
1166 code->code = GC2053_MEDIA_BUS_FMT;
1167 return 0;
1168 }
1169
gc2053_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1170 static int gc2053_enum_frame_sizes(struct v4l2_subdev *sd,
1171 struct v4l2_subdev_pad_config *cfg,
1172 struct v4l2_subdev_frame_size_enum *fse)
1173 {
1174 struct gc2053 *gc2053 = to_gc2053(sd);
1175
1176 if (fse->index >= gc2053->cfg_num)
1177 return -EINVAL;
1178
1179 if (fse->code != GC2053_MEDIA_BUS_FMT)
1180 return -EINVAL;
1181
1182 fse->min_width = supported_modes[fse->index].width;
1183 fse->max_width = supported_modes[fse->index].width;
1184 fse->max_height = supported_modes[fse->index].height;
1185 fse->min_height = supported_modes[fse->index].height;
1186 return 0;
1187 }
1188
gc2053_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1189 static int gc2053_enum_frame_interval(struct v4l2_subdev *sd,
1190 struct v4l2_subdev_pad_config *cfg,
1191 struct v4l2_subdev_frame_interval_enum *fie)
1192 {
1193 struct gc2053 *gc2053 = to_gc2053(sd);
1194
1195 if (fie->index >= gc2053->cfg_num)
1196 return -EINVAL;
1197
1198 fie->code = GC2053_MEDIA_BUS_FMT;
1199 fie->width = supported_modes[fie->index].width;
1200 fie->height = supported_modes[fie->index].height;
1201 fie->interval = supported_modes[fie->index].max_fps;
1202 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1203 return 0;
1204 }
1205
gc2053_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1206 static int gc2053_set_fmt(struct v4l2_subdev *sd,
1207 struct v4l2_subdev_pad_config *cfg,
1208 struct v4l2_subdev_format *fmt)
1209 {
1210 struct gc2053 *gc2053 = to_gc2053(sd);
1211 const struct gc2053_mode *mode;
1212 s64 h_blank, vblank_def;
1213
1214 mutex_lock(&gc2053->mutex);
1215
1216 mode = gc2053_find_best_fit(gc2053, fmt);
1217 fmt->format.code = GC2053_MEDIA_BUS_FMT;
1218 fmt->format.width = mode->width;
1219 fmt->format.height = mode->height;
1220 fmt->format.field = V4L2_FIELD_NONE;
1221 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1222 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1223 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
1224 #else
1225 mutex_unlock(&gc2053->mutex);
1226 return -ENOTTY;
1227 #endif
1228 } else {
1229 gc2053->cur_mode = mode;
1230 h_blank = mode->hts_def - mode->width;
1231 __v4l2_ctrl_modify_range(gc2053->hblank, h_blank,
1232 h_blank, 1, h_blank);
1233 vblank_def = mode->vts_def - mode->height;
1234 __v4l2_ctrl_modify_range(gc2053->vblank, vblank_def,
1235 GC2053_VTS_MAX - mode->height,
1236 1, vblank_def);
1237 }
1238
1239 mutex_unlock(&gc2053->mutex);
1240 return 0;
1241 }
1242
gc2053_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1243 static int gc2053_get_fmt(struct v4l2_subdev *sd,
1244 struct v4l2_subdev_pad_config *cfg,
1245 struct v4l2_subdev_format *fmt)
1246 {
1247 struct gc2053 *gc2053 = to_gc2053(sd);
1248 const struct gc2053_mode *mode = gc2053->cur_mode;
1249
1250 mutex_lock(&gc2053->mutex);
1251 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1252 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1253 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1254 #else
1255 mutex_unlock(&gc2053->mutex);
1256 return -ENOTTY;
1257 #endif
1258 } else {
1259 fmt->format.width = mode->width;
1260 fmt->format.height = mode->height;
1261 fmt->format.code = GC2053_MEDIA_BUS_FMT;
1262 fmt->format.field = V4L2_FIELD_NONE;
1263
1264 /* format info: width/height/data type/virctual channel */
1265 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
1266 fmt->reserved[0] = mode->vc[fmt->pad];
1267 else
1268 fmt->reserved[0] = mode->vc[PAD0];
1269
1270 }
1271 mutex_unlock(&gc2053->mutex);
1272 return 0;
1273 }
1274
1275 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc2053_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1276 static int gc2053_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1277 {
1278 struct gc2053 *gc2053 = to_gc2053(sd);
1279 struct v4l2_mbus_framefmt *try_fmt =
1280 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1281 const struct gc2053_mode *def_mode = &supported_modes[0];
1282
1283 mutex_lock(&gc2053->mutex);
1284 /* Initialize try_fmt */
1285 try_fmt->width = def_mode->width;
1286 try_fmt->height = def_mode->height;
1287 try_fmt->code = GC2053_MEDIA_BUS_FMT;
1288 try_fmt->field = V4L2_FIELD_NONE;
1289
1290 mutex_unlock(&gc2053->mutex);
1291 /* No crop or compose */
1292 return 0;
1293 }
1294 #endif
1295
1296 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1297 static const struct v4l2_subdev_internal_ops gc2053_internal_ops = {
1298 .open = gc2053_open,
1299 };
1300 #endif
1301
gc2053_s_power(struct v4l2_subdev * sd,int on)1302 static int gc2053_s_power(struct v4l2_subdev *sd, int on)
1303 {
1304 struct gc2053 *gc2053 = to_gc2053(sd);
1305 struct i2c_client *client = gc2053->client;
1306 int ret = 0;
1307
1308 mutex_lock(&gc2053->mutex);
1309
1310 /* If the power state is not modified - no work to do. */
1311 if (gc2053->power_on == !!on)
1312 goto unlock_and_return;
1313
1314 if (on) {
1315 ret = pm_runtime_get_sync(&client->dev);
1316 if (ret < 0) {
1317 pm_runtime_put_noidle(&client->dev);
1318 goto unlock_and_return;
1319 }
1320
1321 gc2053->power_on = true;
1322 } else {
1323 pm_runtime_put(&client->dev);
1324 gc2053->power_on = false;
1325 }
1326
1327 unlock_and_return:
1328 mutex_unlock(&gc2053->mutex);
1329
1330 return ret;
1331 }
1332
1333 static const struct v4l2_subdev_core_ops gc2053_core_ops = {
1334 .s_power = gc2053_s_power,
1335 .ioctl = gc2053_ioctl,
1336 #ifdef CONFIG_COMPAT
1337 .compat_ioctl32 = gc2053_compat_ioctl32,
1338 #endif
1339 };
1340
1341 static const struct v4l2_subdev_video_ops gc2053_video_ops = {
1342 .s_stream = gc2053_s_stream,
1343 .g_frame_interval = gc2053_g_frame_interval,
1344 };
1345
1346 static const struct v4l2_subdev_pad_ops gc2053_pad_ops = {
1347 .enum_mbus_code = gc2053_enum_mbus_code,
1348 .enum_frame_size = gc2053_enum_frame_sizes,
1349 .enum_frame_interval = gc2053_enum_frame_interval,
1350 .get_fmt = gc2053_get_fmt,
1351 .set_fmt = gc2053_set_fmt,
1352 .get_mbus_config = gc2053_g_mbus_config,
1353 };
1354
1355 static const struct v4l2_subdev_ops gc2053_subdev_ops = {
1356 .core = &gc2053_core_ops,
1357 .video = &gc2053_video_ops,
1358 .pad = &gc2053_pad_ops,
1359 };
1360
gc2053_runtime_resume(struct device * dev)1361 static int __maybe_unused gc2053_runtime_resume(struct device *dev)
1362 {
1363 struct i2c_client *client = to_i2c_client(dev);
1364 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1365 struct gc2053 *gc2053 = to_gc2053(sd);
1366
1367 __gc2053_power_on(gc2053);
1368 return 0;
1369 }
1370
gc2053_runtime_suspend(struct device * dev)1371 static int __maybe_unused gc2053_runtime_suspend(struct device *dev)
1372 {
1373 struct i2c_client *client = to_i2c_client(dev);
1374 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1375 struct gc2053 *gc2053 = to_gc2053(sd);
1376
1377 __gc2053_power_off(gc2053);
1378 return 0;
1379 }
1380
1381 static const struct dev_pm_ops gc2053_pm_ops = {
1382 SET_RUNTIME_PM_OPS(gc2053_runtime_suspend,
1383 gc2053_runtime_resume, NULL)
1384 };
1385
gc2053_probe(struct i2c_client * client,const struct i2c_device_id * id)1386 static int gc2053_probe(struct i2c_client *client,
1387 const struct i2c_device_id *id)
1388 {
1389 struct device *dev = &client->dev;
1390 struct device_node *node = dev->of_node;
1391 struct gc2053 *gc2053;
1392 struct v4l2_subdev *sd;
1393 char facing[2];
1394 int ret;
1395 const char *sync_mode_name = NULL;
1396
1397 dev_info(dev, "driver version: %02x.%02x.%02x",
1398 DRIVER_VERSION >> 16,
1399 (DRIVER_VERSION & 0xff00) >> 8,
1400 DRIVER_VERSION & 0x00ff);
1401
1402 gc2053 = devm_kzalloc(dev, sizeof(*gc2053), GFP_KERNEL);
1403 if (!gc2053)
1404 return -ENOMEM;
1405
1406 gc2053->client = client;
1407 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1408 &gc2053->module_index);
1409 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1410 &gc2053->module_facing);
1411 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1412 &gc2053->module_name);
1413 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1414 &gc2053->len_name);
1415 if (ret) {
1416 dev_err(dev,
1417 "could not get module information!\n");
1418 return -EINVAL;
1419 }
1420
1421 ret = of_property_read_string(node, RKMODULE_CAMERA_SYNC_MODE,
1422 &sync_mode_name);
1423 if (ret) {
1424 gc2053->sync_mode = NO_SYNC_MODE;
1425 dev_err(dev, "could not get sync mode!\n");
1426 } else {
1427 if (strcmp(sync_mode_name, RKMODULE_EXTERNAL_MASTER_MODE) == 0)
1428 gc2053->sync_mode = EXTERNAL_MASTER_MODE;
1429 else if (strcmp(sync_mode_name, RKMODULE_INTERNAL_MASTER_MODE) == 0)
1430 gc2053->sync_mode = INTERNAL_MASTER_MODE;
1431 else if (strcmp(sync_mode_name, RKMODULE_SLAVE_MODE) == 0)
1432 gc2053->sync_mode = SLAVE_MODE;
1433 }
1434
1435 gc2053->xvclk = devm_clk_get(&client->dev, "xvclk");
1436 if (IS_ERR(gc2053->xvclk)) {
1437 dev_err(&client->dev, "Failed to get xvclk\n");
1438 return -EINVAL;
1439 }
1440
1441 gc2053->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1442 if (IS_ERR(gc2053->reset_gpio))
1443 dev_warn(dev, "Failed to get reset-gpios\n");
1444
1445 gc2053->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1446 if (IS_ERR(gc2053->pwdn_gpio))
1447 dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
1448
1449 gc2053->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
1450 if (IS_ERR(gc2053->power_gpio))
1451 dev_warn(dev, "Failed to get power-gpios\n");
1452
1453 ret = gc2053_configure_regulators(gc2053);
1454 if (ret) {
1455 dev_err(dev, "Failed to get power regulators\n");
1456 return ret;
1457 }
1458
1459 ret = gc2053_parse_of(gc2053);
1460 if (ret != 0)
1461 return -EINVAL;
1462
1463 gc2053->pinctrl = devm_pinctrl_get(dev);
1464 if (!IS_ERR(gc2053->pinctrl)) {
1465 gc2053->pins_default =
1466 pinctrl_lookup_state(gc2053->pinctrl,
1467 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1468 if (IS_ERR(gc2053->pins_default))
1469 dev_err(dev, "could not get default pinstate\n");
1470
1471 gc2053->pins_sleep =
1472 pinctrl_lookup_state(gc2053->pinctrl,
1473 OF_CAMERA_PINCTRL_STATE_SLEEP);
1474 if (IS_ERR(gc2053->pins_sleep))
1475 dev_err(dev, "could not get sleep pinstate\n");
1476 } else {
1477 dev_err(dev, "no pinctrl\n");
1478 }
1479
1480 mutex_init(&gc2053->mutex);
1481
1482 sd = &gc2053->subdev;
1483 v4l2_i2c_subdev_init(sd, client, &gc2053_subdev_ops);
1484 ret = gc2053_initialize_controls(gc2053);
1485 if (ret)
1486 goto err_destroy_mutex;
1487
1488 ret = __gc2053_power_on(gc2053);
1489 if (ret)
1490 goto err_free_handler;
1491
1492 ret = gc2053_check_sensor_id(gc2053, client);
1493 if (ret)
1494 goto err_power_off;
1495
1496 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1497 sd->internal_ops = &gc2053_internal_ops;
1498 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1499 #endif
1500 #if defined(CONFIG_MEDIA_CONTROLLER)
1501 gc2053->pad.flags = MEDIA_PAD_FL_SOURCE;
1502 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1503 ret = media_entity_pads_init(&sd->entity, 1, &gc2053->pad);
1504 if (ret < 0)
1505 goto err_power_off;
1506 #endif
1507
1508 memset(facing, 0, sizeof(facing));
1509 if (strcmp(gc2053->module_facing, "back") == 0)
1510 facing[0] = 'b';
1511 else
1512 facing[0] = 'f';
1513
1514 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1515 gc2053->module_index, facing,
1516 GC2053_NAME, dev_name(sd->dev));
1517
1518 ret = v4l2_async_register_subdev_sensor_common(sd);
1519 if (ret) {
1520 dev_err(dev, "v4l2 async register subdev failed\n");
1521 goto err_clean_entity;
1522 }
1523
1524 pm_runtime_set_active(dev);
1525 pm_runtime_enable(dev);
1526 pm_runtime_idle(dev);
1527
1528 return 0;
1529
1530 err_clean_entity:
1531 #if defined(CONFIG_MEDIA_CONTROLLER)
1532 media_entity_cleanup(&sd->entity);
1533 #endif
1534
1535 err_power_off:
1536 __gc2053_power_off(gc2053);
1537 err_free_handler:
1538 v4l2_ctrl_handler_free(&gc2053->ctrl_handler);
1539
1540 err_destroy_mutex:
1541 mutex_destroy(&gc2053->mutex);
1542 return ret;
1543 }
1544
gc2053_remove(struct i2c_client * client)1545 static int gc2053_remove(struct i2c_client *client)
1546 {
1547 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1548 struct gc2053 *gc2053 = to_gc2053(sd);
1549
1550 v4l2_async_unregister_subdev(sd);
1551 #if defined(CONFIG_MEDIA_CONTROLLER)
1552 media_entity_cleanup(&sd->entity);
1553 #endif
1554 v4l2_ctrl_handler_free(&gc2053->ctrl_handler);
1555 mutex_destroy(&gc2053->mutex);
1556
1557 pm_runtime_disable(&client->dev);
1558 if (!pm_runtime_status_suspended(&client->dev))
1559 __gc2053_power_off(gc2053);
1560 pm_runtime_set_suspended(&client->dev);
1561 return 0;
1562 }
1563
1564 static const struct i2c_device_id gc2053_match_id[] = {
1565 { "gc2053", 0 },
1566 { },
1567 };
1568
1569 #if IS_ENABLED(CONFIG_OF)
1570 static const struct of_device_id gc2053_of_match[] = {
1571 { .compatible = "galaxycore,gc2053" },
1572 {},
1573 };
1574 MODULE_DEVICE_TABLE(of, gc2053_of_match);
1575 #endif
1576
1577 static struct i2c_driver gc2053_i2c_driver = {
1578 .driver = {
1579 .name = GC2053_NAME,
1580 .pm = &gc2053_pm_ops,
1581 .of_match_table = of_match_ptr(gc2053_of_match),
1582 },
1583 .probe = &gc2053_probe,
1584 .remove = &gc2053_remove,
1585 .id_table = gc2053_match_id,
1586 };
1587
sensor_mod_init(void)1588 static int __init sensor_mod_init(void)
1589 {
1590 return i2c_add_driver(&gc2053_i2c_driver);
1591 }
1592
sensor_mod_exit(void)1593 static void __exit sensor_mod_exit(void)
1594 {
1595 i2c_del_driver(&gc2053_i2c_driver);
1596 }
1597
1598 device_initcall_sync(sensor_mod_init);
1599 module_exit(sensor_mod_exit);
1600
1601 MODULE_DESCRIPTION("GC2035 CMOS Image Sensor driver");
1602 MODULE_LICENSE("GPL v2");
1603