1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * gc0403 driver
4 *
5 * Copyright (C) 2019 Fuzhou Rockchip Electronics Co.,Ltd.
6 * V0.0X01.0X02 add enum_frame_interval function.
7 * V0.0X01.0X03 add quick stream on/off
8 * V0.0X01.0X04 add function g_mbus_config
9 */
10
11 #include <linux/clk.h>
12 #include <linux/device.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/sysfs.h>
20 #include <media/media-entity.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-subdev.h>
24 #include <linux/rk-camera-module.h>
25 #include <linux/version.h>
26
27 /*
28 * GC0403 register definitions
29 */
30 #define GC0403_REG_EXP_H 0x03
31 #define GC0403_REG_EXP_L 0x04
32 #define GC0403_REG_VBLK_H 0x07
33 #define GC0403_REG_VBLK_L 0x08
34 #define GC0403_REG_MIPI_EN 0x10
35 #define GC0403_REG_DGAIN_H 0xb1
36 #define GC0403_REG_DGAIN_L 0xb2
37 #define GC0403_REG_AGAIN 0xb6
38 #define GC0403_REG_CHIP_ID_H 0xf0
39 #define GC0403_REG_CHIP_ID_L 0xf1
40 #define PAGE_SELECT_REG 0xfe
41 #define REG_NULL 0xff
42
43 #define GC0403_CHIP_ID 0x0403
44 #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
45
46 #define GC0403_ANALOG_GAIN_MIN 0
47 #define GC0403_ANALOG_GAIN_MAX 0x0a
48 #define GC0403_ANALOG_GAIN_STP 1
49 #define GC0403_ANALOG_GAIN_DFT 1
50 /* gain[4:0] [0x00,0x0a]*/
51 #define GC0403_FETCH_ANALOG_GAIN(VAL) ((VAL) & 0x0F)
52
53 #ifndef V4L2_CID_DIGITAL_GAIN
54 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
55 #endif
56
57 #define GC0403_DIGI_GAIN_MIN 0x40
58 #define GC0403_DIGI_GAIN_MAX 0x3ff
59 #define GC0403_DIGI_GAIN_STP 1
60 #define GC0403_DIGI_GAIN_DFT 0x40
61 /* gain[9:6] */
62 #define GC0403_FETCH_DIGITAL_GAIN_HIGH(VAL) (((VAL) >> 6) & 0x0F)
63 /* gain[5:0] */
64 #define GC0403_FETCH_DIGITAL_GAIN_LOW(VAL) (((VAL) << 2) & 0xFC)
65
66 #define GC0403_TOTAL_GAIN_MIN 100
67 #define GC0403_TOTAL_GAIN_MAX 3200
68 #define GC0403_TOTAL_GAIN_STEP 1
69
70 #define GC0403_EXPOSURE_MAX 8191
71 #define GC0403_EXPOSURE_MIN 1
72
73 #define GC0403_NAME "gc0403"
74 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x03)
75
76 #define GC0403_XVCLK_FREQ 24000000
77 #define GC0403_LINK_FREQ 96000000
78 #define GC0403_PIXEL_RATE (GC0403_LINK_FREQ * 2 * 1 / 10)
79
80 #define GC0403_LANES 1
81
82 static const s64 link_freq_menu_items[] = {
83 GC0403_LINK_FREQ
84 };
85
86 static const char * const gc0403_supply_names[] = {
87 "dovdd", /* Digital I/O power */
88 "avdd", /* Analog power */
89 };
90
91 #define GC0403_NUM_SUPPLIES ARRAY_SIZE(gc0403_supply_names)
92
93 struct regval {
94 u8 addr;
95 u8 val;
96 };
97
98 struct gc0403_mode {
99 u32 width;
100 u32 height;
101 struct v4l2_fract max_fps;
102 u32 hts_def;
103 u32 vts_def;
104 u32 exp_def;
105 const struct regval *reg_list;
106 };
107
108 struct gc0403 {
109 struct i2c_client *client;
110 struct clk *xvclk;
111 struct gpio_desc *pwdn_gpio;
112 struct regulator_bulk_data supplies[GC0403_NUM_SUPPLIES];
113
114 struct v4l2_subdev subdev;
115 struct media_pad pad;
116 struct v4l2_ctrl_handler ctrl_handler;
117 struct v4l2_ctrl *exposure;
118 struct v4l2_ctrl *anal_gain;
119 struct v4l2_ctrl *digi_gain;
120 struct v4l2_ctrl *hblank;
121 struct v4l2_ctrl *vblank;
122 /* mutex lock, protect current operation */
123 struct mutex mutex;
124 bool streaming;
125 const struct gc0403_mode *cur_mode;
126 u32 module_index;
127 const char *module_facing;
128 const char *module_name;
129 const char *len_name;
130 };
131
132 #define to_gc0403(sd) container_of(sd, struct gc0403, subdev)
133
134 /*
135 * MCLK=24Mhz
136 * MIPI_CLOCK=192Mbps
137 * Actual_window_size=640*480
138 * HD=1362
139 * VD=586
140 * row_time=56.75us,FPS = 30fps;
141 */
142 static const struct regval gc0403_vga_regs[] = {
143 /****SYS****/
144 {0xfe, 0x80},
145 {0xfe, 0x80},
146 {0xfe, 0x80},
147 {0xf2, 0x00}, /* sync_pad_io_ebi */
148 {0xf6, 0x00}, /*up down */
149 {0xfc, 0xc6},
150 {0xf7, 0x19}, /* pll enable */
151 {0xf8, 0x01}, /* Pll mode 2 */
152 {0xf9, 0x3e}, /* [0] pll enable solve IOVDD large current problem */
153 {0xfe, 0x03},
154 {0x06, 0x80},
155 {0x06, 0x00},
156 {0xfe, 0x00},
157 {0xf9, 0x2e},
158 {0xfe, 0x00},
159 {0xfa, 0x00}, /* div */
160 {0xfe, 0x00},
161 /**ANALOG&CISCTL**/
162 {0x03, 0x02},
163 {0x04, 0x55},
164 {0x05, 0x01}, /* H blank */
165 {0x06, 0x49}, /* H blank=bb=187 */
166 {0x07, 0x00}, /* VB */
167 {0x08, 0x5a}, /* VB=E8=232 */
168 {0x09, 0x00},
169 {0x0a, 0x2c},
170 {0x0b, 0x00},
171 {0x0c, 0x3c},
172 {0x0d, 0x01}, /* win_height */
173 {0x0e, 0xf0}, /* 496 */
174 {0x0f, 0x02}, /* win_width */
175 {0x10, 0x90}, /* 656 */
176 {0x11, 0x23}, /* 44FPN abnormal column */
177 {0x12, 0x10},
178 {0x13, 0x11},
179 {0x14, 0x01},
180 {0x15, 0x00},
181 {0x16, 0xc0},
182 {0x17, 0x14},
183 {0x18, 0x02},
184 {0x19, 0x38},
185 {0x1a, 0x11},
186 {0x1b, 0x06},
187 {0x1c, 0x04},
188 {0x1d, 0x00},
189 {0x1e, 0xfc},
190 {0x1f, 0x09},
191 {0x20, 0xb5},
192 {0x21, 0x3f},
193 {0x22, 0xe6},
194 {0x23, 0x32},
195 {0x24, 0x2f},
196 {0x27, 0x00},
197 {0x28, 0x00},
198 {0x2a, 0x00},
199 {0x2b, 0x00},
200 {0x2c, 0x00},
201 {0x2d, 0x01},
202 {0x2e, 0xf0},
203 {0x2f, 0x01},
204 {0x25, 0xc0},
205 {0x3d, 0xe0},
206 {0x3e, 0x45},
207 {0x3f, 0x1f},
208 {0xc2, 0x17},
209 {0x30, 0x22},
210 {0x31, 0x23},
211 {0x32, 0x02},
212 {0x33, 0x03},
213 {0x34, 0x04},
214 {0x35, 0x05},
215 {0x36, 0x06},
216 {0x37, 0x07},
217 {0x38, 0x0f},
218 {0x39, 0x17},
219 {0x3a, 0x1f},
220 /****ISP****/
221 {0xfe, 0x00},
222 {0x8a, 0x00},
223 {0x8c, 0x07},
224 {0x8e, 0x02}, /* luma value not normal */
225 {0x90, 0x01},
226 {0x94, 0x02},
227 {0x95, 0x01},
228 {0x96, 0xe0}, /* 480 */
229 {0x97, 0x02},
230 {0x98, 0x80}, /* 640 */
231 /****BLK****/
232 {0xfe, 0x00},
233 {0x18, 0x02},
234 {0x40, 0x22},
235 {0x41, 0x01},
236 {0x5e, 0x00},
237 {0x66, 0x20},
238 /****MIPI****/
239 {0xfe, 0x03},
240 {0x01, 0x83},
241 {0x02, 0x11},
242 {0x03, 0x96},
243 {0x04, 0x01},
244 {0x05, 0x00},
245 {0x06, 0xa4},
246 {0x10, 0x90},
247 {0x11, 0x2b},
248 {0x12, 0x20},
249 {0x13, 0x03},
250 {0x15, 0x00},
251 {0x21, 0x10},
252 {0x22, 0x03},
253 {0x23, 0x20},
254 {0x24, 0x02},
255 {0x25, 0x10},
256 {0x26, 0x05},
257 {0x21, 0x10},
258 {0x29, 0x03},
259 {0x2a, 0x0a},
260 {0x2b, 0x04},
261 {0xfe, 0x00},
262 {0xb0, 0x50},
263 {0xb6, 0x09},
264 {REG_NULL, 0x00},
265 };
266
267 /*
268 * MCLK=24Mhz
269 * MIPI_CLOCK=192Mbps
270 * Actual_window_size=768*576
271 * HD=1206
272 * VD=663
273 * row_time=50.25us,FPS = 30fps;
274 */
275 static const struct regval gc0403_768x576_regs[] = {
276 /****SYS****/
277 {0xfe, 0x80},
278 {0xfe, 0x80},
279 {0xfe, 0x80},
280 {0xf2, 0x00}, /* sync_pad_io_ebi */
281 {0xf6, 0x00}, /* up down */
282 {0xfc, 0xc6},
283 {0xf7, 0x19}, /* pll enable */
284 {0xf8, 0x01}, /* Pll mode 2 */
285 {0xf9, 0x3e}, /* [0] pll enable solve IOVDD large current problem */
286 {0xfe, 0x03},
287 {0x06, 0x80},
288 {0x06, 0x00},
289 {0xfe, 0x00},
290 {0xf9, 0x2e},
291 {0xfe, 0x00},
292 {0xfa, 0x00}, /* div */
293 {0xfe, 0x00},
294 /**ANALOG&CISCTL**/
295 {0x03, 0x02},
296 {0x04, 0x55},
297 {0x05, 0x00}, /* H blank */
298 {0x06, 0xbb}, /* H blank=bb=187 */
299 {0x07, 0x00}, /* VB */
300 {0x08, 0x46}, /* VB=E8=232 */
301 {0x0c, 0x04},
302 {0x0d, 0x02}, /* win_height */
303 {0x0e, 0x48}, /* 584 */
304 {0x0f, 0x03}, /* win_width */
305 {0x10, 0x08}, /* 776 */
306 {0x11, 0x23}, /* 44FPN abnormal column */
307 {0x12, 0x10},
308 {0x13, 0x11},
309 {0x14, 0x01},
310 {0x15, 0x00},
311 {0x16, 0xc0},
312 {0x17, 0x14},
313 {0x18, 0x02},
314 {0x19, 0x38},
315 {0x1a, 0x11},
316 {0x1b, 0x06},
317 {0x1c, 0x04},
318 {0x1d, 0x00},
319 {0x1e, 0xfc},
320 {0x1f, 0x09},
321 {0x20, 0xb5},
322 {0x21, 0x3f},
323 {0x22, 0xe6},
324 {0x23, 0x32},
325 {0x24, 0x2f},
326 {0x27, 0x00},
327 {0x28, 0x00},
328 {0x2a, 0x00},
329 {0x2b, 0x00},
330 {0x2c, 0x00},
331 {0x2d, 0x01},
332 {0x2e, 0xf0},
333 {0x2f, 0x01},
334 {0x25, 0xc0},
335 {0x3d, 0xe0},
336 {0x3e, 0x45},
337 {0x3f, 0x1f},
338 {0xc2, 0x17},
339 {0x30, 0x22},
340 {0x31, 0x23},
341 {0x32, 0x02},
342 {0x33, 0x03},
343 {0x34, 0x04},
344 {0x35, 0x05},
345 {0x36, 0x06},
346 {0x37, 0x07},
347 {0x38, 0x0f},
348 {0x39, 0x17},
349 {0x3a, 0x1f},
350 /****ISP****/
351 {0xfe, 0x00},
352 {0x8a, 0x00},
353 {0x8c, 0x07},
354 {0x8e, 0x02}, /* luma value not normal */
355 {0x90, 0x01},
356 {0x94, 0x02},
357 {0x95, 0x02},
358 {0x96, 0x40}, /* 576 */
359 {0x97, 0x03},
360 {0x98, 0x00}, /* 768 */
361 /****BLK****/
362 {0xfe, 0x00},
363 {0x18, 0x02},
364 {0x40, 0x22},
365 {0x41, 0x01},
366 {0x5e, 0x00},
367 {0x66, 0x20},
368 /****MIPI****/
369 {0xfe, 0x03},
370 {0x01, 0x83},
371 {0x02, 0x11},
372 {0x03, 0x96},
373 {0x04, 0x01},
374 {0x05, 0x00},
375 {0x06, 0xa4},
376 {0x10, 0x80},
377 {0x11, 0x2b},
378 {0x12, 0xc0},
379 {0x13, 0x03},
380 {0x15, 0x00},
381 {0x21, 0x10},
382 {0x22, 0x03},
383 {0x23, 0x20},
384 {0x24, 0x02},
385 {0x25, 0x10},
386 {0x26, 0x05},
387 {0x21, 0x10},
388 {0x29, 0x01},
389 {0x2a, 0x0a},
390 {0x2b, 0x04},
391 {0xfe, 0x00},
392 {0xb0, 0x50},
393 {0xb6, 0x01},
394 {REG_NULL, 0x00},
395 };
396
397 static const struct gc0403_mode supported_modes[] = {
398 {
399 .width = 640,
400 .height = 480,
401 .max_fps = {
402 .numerator = 10000,
403 .denominator = 300000,
404 },
405 .exp_def = 500,
406 .hts_def = 1362,
407 .vts_def = 586,
408 .reg_list = gc0403_vga_regs,
409 },
410 {
411 .width = 768,
412 .height = 576,
413 .max_fps = {
414 .numerator = 10000,
415 .denominator = 300000,
416 },
417 .exp_def = 500,
418 .hts_def = 1206,
419 .vts_def = 663,
420 .reg_list = gc0403_768x576_regs,
421 }
422 };
423
424 /* sensor register write */
gc0403_write_reg(struct i2c_client * client,u8 reg,u8 val)425 static int gc0403_write_reg(struct i2c_client *client, u8 reg, u8 val)
426 {
427 struct i2c_msg msg;
428 u8 buf[2];
429 int ret;
430
431 buf[0] = reg & 0xFF;
432 buf[1] = val;
433
434 msg.addr = client->addr;
435 msg.flags = client->flags;
436 msg.buf = buf;
437 msg.len = sizeof(buf);
438
439 ret = i2c_transfer(client->adapter, &msg, 1);
440 if (ret >= 0)
441 return 0;
442
443 dev_err(&client->dev,
444 "gc0403 write reg(0x%x val:0x%x) failed !\n", reg, val);
445
446 return ret;
447 }
448
gc0403_write_array(struct i2c_client * client,const struct regval * regs)449 static int gc0403_write_array(struct i2c_client *client,
450 const struct regval *regs)
451 {
452 int i, ret = 0;
453
454 i = 0;
455 while (regs[i].addr != REG_NULL) {
456 ret = gc0403_write_reg(client, regs[i].addr, regs[i].val);
457 if (ret) {
458 dev_err(&client->dev, "%s failed !\n", __func__);
459 break;
460 }
461 i++;
462 }
463
464 return ret;
465 }
466
467 /* sensor register read */
gc0403_read_reg(struct i2c_client * client,u8 reg,u8 * val)468 static int gc0403_read_reg(struct i2c_client *client, u8 reg, u8 *val)
469 {
470 struct i2c_msg msg[2];
471 u8 buf[1];
472 int ret;
473
474 buf[0] = reg & 0xFF;
475
476 msg[0].addr = client->addr;
477 msg[0].flags = client->flags;
478 msg[0].buf = buf;
479 msg[0].len = sizeof(buf);
480
481 msg[1].addr = client->addr;
482 msg[1].flags = client->flags | I2C_M_RD;
483 msg[1].buf = buf;
484 msg[1].len = 1;
485
486 ret = i2c_transfer(client->adapter, msg, 2);
487 if (ret >= 0) {
488 *val = buf[0];
489 return 0;
490 }
491
492 dev_err(&client->dev,
493 "gc0403 read reg(0x%x val:0x%x) failed !\n", reg, *val);
494
495 return ret;
496 }
497
gc0403_get_reso_dist(const struct gc0403_mode * mode,struct v4l2_mbus_framefmt * framefmt)498 static int gc0403_get_reso_dist(const struct gc0403_mode *mode,
499 struct v4l2_mbus_framefmt *framefmt)
500 {
501 return abs(mode->width - framefmt->width) +
502 abs(mode->height - framefmt->height);
503 }
504
505 static const struct gc0403_mode *
gc0403_find_best_fit(struct v4l2_subdev_format * fmt)506 gc0403_find_best_fit(struct v4l2_subdev_format *fmt)
507 {
508 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
509 int dist;
510 int cur_best_fit = 0;
511 int cur_best_fit_dist = -1;
512 unsigned int i;
513
514 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
515 dist = gc0403_get_reso_dist(&supported_modes[i], framefmt);
516 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
517 cur_best_fit_dist = dist;
518 cur_best_fit = i;
519 }
520 }
521
522 return &supported_modes[cur_best_fit];
523 }
524
gc0403_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)525 static int gc0403_set_fmt(struct v4l2_subdev *sd,
526 struct v4l2_subdev_pad_config *cfg,
527 struct v4l2_subdev_format *fmt)
528 {
529 struct gc0403 *gc0403 = to_gc0403(sd);
530 const struct gc0403_mode *mode;
531
532 mutex_lock(&gc0403->mutex);
533
534 mode = gc0403_find_best_fit(fmt);
535 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
536 fmt->format.width = mode->width;
537 fmt->format.height = mode->height;
538 fmt->format.field = V4L2_FIELD_NONE;
539 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
540 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
541 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
542 #else
543 mutex_unlock(&gc0403->mutex);
544 return -ENOTTY;
545 #endif
546 } else {
547 gc0403->cur_mode = mode;
548 }
549
550 mutex_unlock(&gc0403->mutex);
551
552 return 0;
553 }
554
gc0403_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)555 static int gc0403_get_fmt(struct v4l2_subdev *sd,
556 struct v4l2_subdev_pad_config *cfg,
557 struct v4l2_subdev_format *fmt)
558 {
559 struct gc0403 *gc0403 = to_gc0403(sd);
560 const struct gc0403_mode *mode = gc0403->cur_mode;
561
562 mutex_lock(&gc0403->mutex);
563 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
564 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
565 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
566 #else
567 mutex_unlock(&gc0403->mutex);
568 return -ENOTTY;
569 #endif
570 } else {
571 fmt->format.width = mode->width;
572 fmt->format.height = mode->height;
573 fmt->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
574 fmt->format.field = V4L2_FIELD_NONE;
575 }
576 mutex_unlock(&gc0403->mutex);
577
578 return 0;
579 }
580
gc0403_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)581 static int gc0403_enum_mbus_code(struct v4l2_subdev *sd,
582 struct v4l2_subdev_pad_config *cfg,
583 struct v4l2_subdev_mbus_code_enum *code)
584 {
585 if (code->index != 0)
586 return -EINVAL;
587
588 code->code = MEDIA_BUS_FMT_SRGGB10_1X10;
589
590 return 0;
591 }
592
gc0403_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)593 static int gc0403_enum_frame_sizes(struct v4l2_subdev *sd,
594 struct v4l2_subdev_pad_config *cfg,
595 struct v4l2_subdev_frame_size_enum *fse)
596 {
597 if (fse->index >= ARRAY_SIZE(supported_modes))
598 return -EINVAL;
599
600 if (fse->code != MEDIA_BUS_FMT_SRGGB10_1X10)
601 return -EINVAL;
602
603 fse->min_width = supported_modes[fse->index].width;
604 fse->max_width = supported_modes[fse->index].width;
605 fse->max_height = supported_modes[fse->index].height;
606 fse->min_height = supported_modes[fse->index].height;
607
608 return 0;
609 }
610
gc0403_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)611 static int gc0403_g_frame_interval(struct v4l2_subdev *sd,
612 struct v4l2_subdev_frame_interval *fi)
613 {
614 struct gc0403 *gc0403 = to_gc0403(sd);
615 const struct gc0403_mode *mode = gc0403->cur_mode;
616
617 fi->interval = mode->max_fps;
618
619 return 0;
620 }
621
gc0403_get_module_inf(struct gc0403 * gc0403,struct rkmodule_inf * inf)622 static void gc0403_get_module_inf(struct gc0403 *gc0403,
623 struct rkmodule_inf *inf)
624 {
625 memset(inf, 0, sizeof(*inf));
626 strlcpy(inf->base.sensor, GC0403_NAME, sizeof(inf->base.sensor));
627 strlcpy(inf->base.module, gc0403->module_name,
628 sizeof(inf->base.module));
629 strlcpy(inf->base.lens, gc0403->len_name, sizeof(inf->base.lens));
630 }
631
gc0403_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)632 static long gc0403_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
633 {
634 struct gc0403 *gc0403 = to_gc0403(sd);
635 long ret = 0;
636 u32 stream = 0;
637
638 switch (cmd) {
639 case RKMODULE_GET_MODULE_INFO:
640 gc0403_get_module_inf(gc0403, (struct rkmodule_inf *)arg);
641 break;
642 case RKMODULE_SET_QUICK_STREAM:
643
644 stream = *((u32 *)arg);
645
646 if (stream) {
647 ret = gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x03);
648 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_MIPI_EN, 0x90);
649 ret |= gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x00);
650 } else {
651 ret = gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x03);
652 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_MIPI_EN, 0x80);
653 ret |= gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x00);
654 }
655 break;
656 default:
657 ret = -ENOIOCTLCMD;
658 break;
659 }
660
661 return ret;
662 }
663
664 #ifdef CONFIG_COMPAT
gc0403_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)665 static long gc0403_compat_ioctl32(struct v4l2_subdev *sd,
666 unsigned int cmd, unsigned long arg)
667 {
668 void __user *up = compat_ptr(arg);
669 struct rkmodule_inf *inf;
670 struct rkmodule_awb_cfg *cfg;
671 long ret;
672 u32 stream = 0;
673
674 switch (cmd) {
675 case RKMODULE_GET_MODULE_INFO:
676 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
677 if (!inf) {
678 ret = -ENOMEM;
679 return ret;
680 }
681
682 ret = gc0403_ioctl(sd, cmd, inf);
683 if (!ret) {
684 ret = copy_to_user(up, inf, sizeof(*inf));
685 if (ret) {
686 ret = -EFAULT;
687 return ret;
688 }
689 }
690 kfree(inf);
691 break;
692 case RKMODULE_AWB_CFG:
693 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
694 if (!cfg) {
695 ret = -ENOMEM;
696 return ret;
697 }
698
699 ret = copy_from_user(cfg, up, sizeof(*cfg));
700 if (!ret)
701 ret = gc0403_ioctl(sd, cmd, cfg);
702 else
703 ret = -EFAULT;
704 kfree(cfg);
705 break;
706 case RKMODULE_SET_QUICK_STREAM:
707 ret = copy_from_user(&stream, up, sizeof(u32));
708 if (!ret)
709 ret = gc0403_ioctl(sd, cmd, &stream);
710 break;
711 default:
712 ret = -ENOIOCTLCMD;
713 break;
714 }
715
716 return ret;
717 }
718 #endif
719
__gc0403_start_stream(struct gc0403 * gc0403)720 static int __gc0403_start_stream(struct gc0403 *gc0403)
721 {
722 int ret = 0;
723
724 /* In case these controls are set before streaming */
725 mutex_unlock(&gc0403->mutex);
726 ret = v4l2_ctrl_handler_setup(&gc0403->ctrl_handler);
727 mutex_lock(&gc0403->mutex);
728 if (ret)
729 return ret;
730 ret = gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x03);
731 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_MIPI_EN, 0x90);
732 ret |= gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x00);
733
734 return ret;
735 }
736
__gc0403_stop_stream(struct gc0403 * gc0403)737 static int __gc0403_stop_stream(struct gc0403 *gc0403)
738 {
739 int ret = 0;
740
741 ret = gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x03);
742 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_MIPI_EN, 0x80);
743 ret |= gc0403_write_reg(gc0403->client, PAGE_SELECT_REG, 0x00);
744
745 return ret;
746 }
747
748 static int __gc0403_power_on(struct gc0403 *gc0403);
749 static void __gc0403_power_off(struct gc0403 *gc0403);
750
gc0403_s_power(struct v4l2_subdev * sd,int on)751 static int gc0403_s_power(struct v4l2_subdev *sd, int on)
752 {
753 struct gc0403 *gc0403 = to_gc0403(sd);
754 int ret = 0;
755
756 mutex_lock(&gc0403->mutex);
757
758 on = !!on;
759 if (on)
760 ret = pm_runtime_get_sync(&gc0403->client->dev);
761 else
762 ret = pm_runtime_put(&gc0403->client->dev);
763
764 mutex_unlock(&gc0403->mutex);
765
766 return ret;
767 }
768
gc0403_s_stream(struct v4l2_subdev * sd,int on)769 static int gc0403_s_stream(struct v4l2_subdev *sd, int on)
770 {
771 struct gc0403 *gc0403 = to_gc0403(sd);
772 int ret = 0;
773
774 mutex_lock(&gc0403->mutex);
775 on = !!on;
776 if (on == gc0403->streaming)
777 goto unlock_and_return;
778
779 if (on) {
780 ret = __gc0403_start_stream(gc0403);
781 if (ret) {
782 v4l2_err(sd, "start stream failed while write regs\n");
783 goto unlock_and_return;
784 }
785 } else {
786 __gc0403_stop_stream(gc0403);
787 usleep_range(33 * 1000, 35 * 1000);
788 }
789
790 gc0403->streaming = on;
791
792 unlock_and_return:
793 mutex_unlock(&gc0403->mutex);
794
795 return ret;
796 }
797
798 /* Calculate the delay in us by clock rate and clock cycles */
__gc0403_power_on(struct gc0403 * gc0403)799 static int __gc0403_power_on(struct gc0403 *gc0403)
800 {
801 int ret;
802 struct device *dev = &gc0403->client->dev;
803
804 ret = clk_set_rate(gc0403->xvclk, GC0403_XVCLK_FREQ);
805 if (ret < 0) {
806 dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
807 return ret;
808 }
809 if (clk_get_rate(gc0403->xvclk) != GC0403_XVCLK_FREQ)
810 dev_warn(dev, "xvclk mismatched,modes are based on 24MHz\n");
811 ret = clk_prepare_enable(gc0403->xvclk);
812 if (ret < 0) {
813 dev_err(dev, "Failed to enable xvclk\n");
814 return ret;
815 }
816
817 ret = regulator_bulk_enable(GC0403_NUM_SUPPLIES, gc0403->supplies);
818 if (ret < 0) {
819 dev_err(dev, "Failed to enable regulators\n");
820 goto disable_clk;
821 }
822
823 if (!IS_ERR(gc0403->pwdn_gpio))
824 gpiod_set_value_cansleep(gc0403->pwdn_gpio, 0);
825 /* here usleep at least 10~15ms，will better */
826 usleep_range(10 * 1000, 15 * 1000);
827
828 ret = gc0403_write_array(gc0403->client, gc0403->cur_mode->reg_list);
829 if (ret)
830 return ret;
831 usleep_range(10 * 1000, 20 * 1000);
832
833 return 0;
834
835 disable_clk:
836 clk_disable_unprepare(gc0403->xvclk);
837
838 return ret;
839 }
840
__gc0403_power_off(struct gc0403 * gc0403)841 static void __gc0403_power_off(struct gc0403 *gc0403)
842 {
843 if (!IS_ERR(gc0403->pwdn_gpio))
844 gpiod_set_value_cansleep(gc0403->pwdn_gpio, 1);
845 clk_disable_unprepare(gc0403->xvclk);
846 regulator_bulk_disable(GC0403_NUM_SUPPLIES, gc0403->supplies);
847 }
848
gc0403_runtime_resume(struct device * dev)849 static int gc0403_runtime_resume(struct device *dev)
850 {
851 struct i2c_client *client = to_i2c_client(dev);
852 struct v4l2_subdev *sd = i2c_get_clientdata(client);
853 struct gc0403 *gc0403 = to_gc0403(sd);
854 int ret;
855
856 ret = __gc0403_power_on(gc0403);
857 if (ret)
858 return ret;
859
860 if (gc0403->streaming) {
861 ret = gc0403_s_stream(sd, 1);
862 if (ret)
863 __gc0403_power_off(gc0403);
864 }
865
866 return ret;
867 }
868
gc0403_runtime_suspend(struct device * dev)869 static int gc0403_runtime_suspend(struct device *dev)
870 {
871 struct i2c_client *client = to_i2c_client(dev);
872 struct v4l2_subdev *sd = i2c_get_clientdata(client);
873 struct gc0403 *gc0403 = to_gc0403(sd);
874
875 __gc0403_power_off(gc0403);
876
877 return 0;
878 }
879
880 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc0403_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)881 static int gc0403_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
882 {
883 struct gc0403 *gc0403 = to_gc0403(sd);
884 struct v4l2_mbus_framefmt *try_fmt =
885 v4l2_subdev_get_try_format(sd, fh->pad, 0);
886 const struct gc0403_mode *def_mode = &supported_modes[1];
887
888 mutex_lock(&gc0403->mutex);
889 /* Initialize try_fmt */
890 try_fmt->width = def_mode->width;
891 try_fmt->height = def_mode->height;
892 try_fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
893 try_fmt->field = V4L2_FIELD_NONE;
894
895 mutex_unlock(&gc0403->mutex);
896 /* No crop or compose */
897
898 return 0;
899 }
900 #endif
901
gc0403_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)902 static int gc0403_enum_frame_interval(struct v4l2_subdev *sd,
903 struct v4l2_subdev_pad_config *cfg,
904 struct v4l2_subdev_frame_interval_enum *fie)
905 {
906 if (fie->index >= ARRAY_SIZE(supported_modes))
907 return -EINVAL;
908
909 fie->code = MEDIA_BUS_FMT_SRGGB10_1X10;
910 fie->width = supported_modes[fie->index].width;
911 fie->height = supported_modes[fie->index].height;
912 fie->interval = supported_modes[fie->index].max_fps;
913 return 0;
914 }
915
gc0403_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)916 static int gc0403_g_mbus_config(struct v4l2_subdev *sd,
917 struct v4l2_mbus_config *config)
918 {
919 u32 val = 0;
920
921 val = 1 << (GC0403_LANES - 1) |
922 V4L2_MBUS_CSI2_CHANNEL_0 |
923 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
924 config->type = V4L2_MBUS_CSI2;
925 config->flags = val;
926
927 return 0;
928 }
929
930 static const struct dev_pm_ops gc0403_pm_ops = {
931 SET_RUNTIME_PM_OPS(gc0403_runtime_suspend,
932 gc0403_runtime_resume, NULL)
933 };
934
935 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
936 static const struct v4l2_subdev_internal_ops gc0403_internal_ops = {
937 .open = gc0403_open,
938 };
939 #endif
940
941 static struct v4l2_subdev_core_ops gc0403_core_ops = {
942 .s_power = gc0403_s_power,
943 .ioctl = gc0403_ioctl,
944 #ifdef CONFIG_COMPAT
945 .compat_ioctl32 = gc0403_compat_ioctl32,
946 #endif
947 };
948
949 static const struct v4l2_subdev_video_ops gc0403_video_ops = {
950 .s_stream = gc0403_s_stream,
951 .g_frame_interval = gc0403_g_frame_interval,
952 .g_mbus_config = gc0403_g_mbus_config,
953 };
954
955 static const struct v4l2_subdev_pad_ops gc0403_pad_ops = {
956 .enum_mbus_code = gc0403_enum_mbus_code,
957 .enum_frame_size = gc0403_enum_frame_sizes,
958 .enum_frame_interval = gc0403_enum_frame_interval,
959 .get_fmt = gc0403_get_fmt,
960 .set_fmt = gc0403_set_fmt,
961 };
962
963 static const struct v4l2_subdev_ops gc0403_subdev_ops = {
964 .core = &gc0403_core_ops,
965 .video = &gc0403_video_ops,
966 .pad = &gc0403_pad_ops,
967 };
968
gc0403_set_ctrl(struct v4l2_ctrl * ctrl)969 static int gc0403_set_ctrl(struct v4l2_ctrl *ctrl)
970 {
971 struct gc0403 *gc0403 = container_of(ctrl->handler,
972 struct gc0403, ctrl_handler);
973 struct i2c_client *client = gc0403->client;
974 int ret = 0;
975 int analog_gain_table[] = {100, 142, 250, 354, 490, 691, 970,
976 1363, 1945, 2704, 3889};
977 int table_cnt = 11;
978 int analog_gain_reg_value = 0x00;
979 int digital_gain_reg_value = 0x00;
980 int total_gain = 0;
981 int analog_gain = 0;
982 int i = 0;
983
984 if (!pm_runtime_get_if_in_use(&client->dev))
985 return 0;
986
987 switch (ctrl->id) {
988 case V4L2_CID_EXPOSURE:
989 dev_dbg(&client->dev,
990 "gc0403: V4L2_CID_EXPOSURE exp val = 0x%x\n",
991 ctrl->val);
992 /* 4 least significant bits of expsoure are fractional part */
993 ret = gc0403_write_reg(gc0403->client, GC0403_REG_EXP_H,
994 (ctrl->val >> 8) & 0x1f);
995 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_EXP_L,
996 ctrl->val & 0xff);
997 break;
998 case V4L2_CID_ANALOGUE_GAIN:
999 case V4L2_CID_DIGITAL_GAIN:
1000 total_gain = ctrl->val;
1001 for (i = 0; i < table_cnt; i++) {
1002 if (total_gain < analog_gain_table[i])
1003 break;
1004 }
1005
1006 i = i - 1;
1007 if (i < 0)
1008 i = 0;
1009
1010 analog_gain = analog_gain_table[i];
1011 analog_gain_reg_value = i;
1012 digital_gain_reg_value = total_gain * 64 / analog_gain;
1013
1014 if (analog_gain_reg_value < GC0403_ANALOG_GAIN_MIN)
1015 analog_gain_reg_value = GC0403_ANALOG_GAIN_MIN;
1016 if (analog_gain_reg_value > GC0403_ANALOG_GAIN_MAX)
1017 analog_gain_reg_value = GC0403_ANALOG_GAIN_MAX;
1018
1019 if (digital_gain_reg_value < GC0403_DIGI_GAIN_MIN)
1020 digital_gain_reg_value = GC0403_DIGI_GAIN_MIN;
1021 if (digital_gain_reg_value > GC0403_DIGI_GAIN_MAX)
1022 digital_gain_reg_value = GC0403_DIGI_GAIN_MAX;
1023
1024 ret = gc0403_write_reg(gc0403->client,
1025 GC0403_REG_AGAIN,
1026 GC0403_FETCH_ANALOG_GAIN
1027 (analog_gain_reg_value));
1028 ret |= gc0403_write_reg(gc0403->client,
1029 GC0403_REG_DGAIN_H,
1030 GC0403_FETCH_DIGITAL_GAIN_HIGH
1031 (digital_gain_reg_value));
1032 ret |= gc0403_write_reg(gc0403->client,
1033 GC0403_REG_DGAIN_L,
1034 GC0403_FETCH_DIGITAL_GAIN_LOW
1035 (digital_gain_reg_value));
1036
1037 dev_dbg(&client->dev, "gc0403: gain: %d,a: %d,d: %d\n",
1038 total_gain, analog_gain_reg_value,
1039 digital_gain_reg_value);
1040 break;
1041 case V4L2_CID_VBLANK:
1042 ret = gc0403_write_reg(gc0403->client, GC0403_REG_VBLK_H,
1043 (ctrl->val) >> 8);
1044 ret |= gc0403_write_reg(gc0403->client, GC0403_REG_VBLK_L,
1045 (ctrl->val) & 0xff);
1046 break;
1047 default:
1048 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1049 __func__, ctrl->id, ctrl->val);
1050 break;
1051 }
1052
1053 pm_runtime_put(&client->dev);
1054
1055 return ret;
1056 }
1057
1058 static const struct v4l2_ctrl_ops gc0403_ctrl_ops = {
1059 .s_ctrl = gc0403_set_ctrl,
1060 };
1061
gc0403_initialize_controls(struct gc0403 * gc0403)1062 static int gc0403_initialize_controls(struct gc0403 *gc0403)
1063 {
1064 const struct gc0403_mode *mode;
1065 struct v4l2_ctrl_handler *handler;
1066 struct v4l2_ctrl *ctrl;
1067 s64 vblank_def;
1068 u32 h_blank;
1069 int ret;
1070
1071 handler = &gc0403->ctrl_handler;
1072 mode = gc0403->cur_mode;
1073 ret = v4l2_ctrl_handler_init(handler, 5);
1074 if (ret)
1075 return ret;
1076 handler->lock = &gc0403->mutex;
1077
1078 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1079 0, 0, link_freq_menu_items);
1080 if (ctrl)
1081 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1082
1083 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1084 0, GC0403_PIXEL_RATE, 1, GC0403_PIXEL_RATE);
1085
1086 h_blank = mode->hts_def - mode->width;
1087 gc0403->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1088 h_blank, h_blank, 1, h_blank);
1089 if (gc0403->hblank)
1090 gc0403->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1091
1092 vblank_def = mode->vts_def - mode->height;
1093 gc0403->vblank = v4l2_ctrl_new_std(handler, &gc0403_ctrl_ops,
1094 V4L2_CID_VBLANK, vblank_def, vblank_def,
1095 1, vblank_def);
1096
1097 gc0403->exposure = v4l2_ctrl_new_std(handler, &gc0403_ctrl_ops,
1098 V4L2_CID_EXPOSURE,
1099 GC0403_EXPOSURE_MIN, GC0403_EXPOSURE_MAX,
1100 1, mode->exp_def);
1101
1102 /* Anolog gain */
1103 gc0403->anal_gain = v4l2_ctrl_new_std(handler, &gc0403_ctrl_ops,
1104 V4L2_CID_ANALOGUE_GAIN, GC0403_TOTAL_GAIN_MIN,
1105 GC0403_TOTAL_GAIN_MAX, GC0403_TOTAL_GAIN_STEP,
1106 GC0403_TOTAL_GAIN_MIN);
1107
1108 /* Digital gain */
1109 gc0403->digi_gain = v4l2_ctrl_new_std(handler, &gc0403_ctrl_ops,
1110 V4L2_CID_DIGITAL_GAIN, GC0403_TOTAL_GAIN_MIN,
1111 GC0403_TOTAL_GAIN_MAX, GC0403_TOTAL_GAIN_STEP,
1112 GC0403_TOTAL_GAIN_MIN);
1113
1114 if (handler->error) {
1115 ret = handler->error;
1116 dev_err(&gc0403->client->dev,
1117 "Failed to init controls(%d)\n", ret);
1118 goto err_free_handler;
1119 }
1120
1121 gc0403->subdev.ctrl_handler = handler;
1122
1123 return 0;
1124
1125 err_free_handler:
1126 v4l2_ctrl_handler_free(handler);
1127
1128 return ret;
1129 }
1130
gc0403_check_sensor_id(struct gc0403 * gc0403,struct i2c_client * client)1131 static int gc0403_check_sensor_id(struct gc0403 *gc0403,
1132 struct i2c_client *client)
1133 {
1134 struct device *dev = &gc0403->client->dev;
1135 u8 pid = 0, ver = 0;
1136 u16 id = 0;
1137 int ret = 0;
1138
1139 /* Check sensor revision */
1140 ret = gc0403_read_reg(client, GC0403_REG_CHIP_ID_H, &pid);
1141 ret |= gc0403_read_reg(client, GC0403_REG_CHIP_ID_L, &ver);
1142 if (ret) {
1143 dev_err(&client->dev, "gc0403_read_reg failed (%d)\n", ret);
1144 return ret;
1145 }
1146
1147 id = SENSOR_ID(pid, ver);
1148 if (id != GC0403_CHIP_ID) {
1149 dev_err(&client->dev,
1150 "Sensor detection failed (%04X,%d)\n",
1151 id, ret);
1152 return -ENODEV;
1153 }
1154
1155 dev_info(dev, "Detected GC%04x sensor\n", id);
1156
1157 return 0;
1158 }
1159
gc0403_configure_regulators(struct gc0403 * gc0403)1160 static int gc0403_configure_regulators(struct gc0403 *gc0403)
1161 {
1162 unsigned int i;
1163
1164 for (i = 0; i < GC0403_NUM_SUPPLIES; i++)
1165 gc0403->supplies[i].supply = gc0403_supply_names[i];
1166
1167 return devm_regulator_bulk_get(&gc0403->client->dev,
1168 GC0403_NUM_SUPPLIES,
1169 gc0403->supplies);
1170 }
1171
gc0403_probe(struct i2c_client * client,const struct i2c_device_id * id)1172 static int gc0403_probe(struct i2c_client *client,
1173 const struct i2c_device_id *id)
1174 {
1175 struct device *dev = &client->dev;
1176 /* add a dev_node */
1177 struct device_node *node = dev->of_node;
1178 struct gc0403 *gc0403;
1179 struct v4l2_subdev *sd;
1180 char facing[2];
1181 int ret;
1182
1183 /* add info */
1184 dev_info(dev, "driver version: %02x.%02x.%02x",
1185 DRIVER_VERSION >> 16,
1186 (DRIVER_VERSION & 0xff00) >> 8,
1187 DRIVER_VERSION & 0x00ff);
1188
1189 gc0403 = devm_kzalloc(dev, sizeof(*gc0403), GFP_KERNEL);
1190 if (!gc0403)
1191 return -ENOMEM;
1192
1193 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1194 &gc0403->module_index);
1195 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1196 &gc0403->module_facing);
1197 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1198 &gc0403->module_name);
1199 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1200 &gc0403->len_name);
1201 if (ret) {
1202 dev_err(dev, "could not get module information!\n");
1203 return -EINVAL;
1204 }
1205
1206 gc0403->client = client;
1207 gc0403->cur_mode = &supported_modes[1];
1208
1209 gc0403->xvclk = devm_clk_get(dev, "xvclk");
1210 if (IS_ERR(gc0403->xvclk)) {
1211 dev_err(dev, "Failed to get xvclk\n");
1212 return -EINVAL;
1213 }
1214
1215 gc0403->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1216 if (IS_ERR(gc0403->pwdn_gpio))
1217 dev_warn(dev, "Failed to get pwdn-gpios\n");
1218
1219 ret = gc0403_configure_regulators(gc0403);
1220 if (ret) {
1221 dev_err(dev, "Failed to get power regulators\n");
1222 return ret;
1223 }
1224
1225 mutex_init(&gc0403->mutex);
1226
1227 sd = &gc0403->subdev;
1228 v4l2_i2c_subdev_init(sd, client, &gc0403_subdev_ops);
1229 ret = gc0403_initialize_controls(gc0403);
1230 if (ret)
1231 goto err_destroy_mutex;
1232
1233 ret = __gc0403_power_on(gc0403);
1234 if (ret)
1235 goto err_free_handler;
1236
1237 ret = gc0403_check_sensor_id(gc0403, client);
1238 if (ret)
1239 goto err_power_off;
1240
1241 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1242 sd->internal_ops = &gc0403_internal_ops;
1243 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1244 V4L2_SUBDEV_FL_HAS_EVENTS;
1245 #endif
1246 #if defined(CONFIG_MEDIA_CONTROLLER)
1247 gc0403->pad.flags = MEDIA_PAD_FL_SOURCE;
1248 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1249 ret = media_entity_pads_init(&sd->entity, 1, &gc0403->pad);
1250 if (ret < 0)
1251 goto err_power_off;
1252 #endif
1253
1254 memset(facing, 0, sizeof(facing));
1255 if (strcmp(gc0403->module_facing, "back") == 0)
1256 facing[0] = 'b';
1257 else
1258 facing[0] = 'f';
1259
1260 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1261 gc0403->module_index, facing,
1262 GC0403_NAME, dev_name(sd->dev));
1263
1264 ret = v4l2_async_register_subdev_sensor_common(sd);
1265 if (ret) {
1266 dev_err(dev, "v4l2 async register subdev failed\n");
1267 goto err_clean_entity;
1268 }
1269
1270 pm_runtime_set_active(dev);
1271 pm_runtime_enable(dev);
1272 pm_runtime_idle(dev);
1273
1274 return 0;
1275
1276 err_clean_entity:
1277 #if defined(CONFIG_MEDIA_CONTROLLER)
1278 media_entity_cleanup(&sd->entity);
1279 #endif
1280 err_power_off:
1281 __gc0403_power_off(gc0403);
1282 err_free_handler:
1283 v4l2_ctrl_handler_free(&gc0403->ctrl_handler);
1284 err_destroy_mutex:
1285 mutex_destroy(&gc0403->mutex);
1286
1287 return ret;
1288 }
1289
gc0403_remove(struct i2c_client * client)1290 static int gc0403_remove(struct i2c_client *client)
1291 {
1292 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1293 struct gc0403 *gc0403 = to_gc0403(sd);
1294
1295 v4l2_async_unregister_subdev(sd);
1296 #if defined(CONFIG_MEDIA_CONTROLLER)
1297 media_entity_cleanup(&sd->entity);
1298 #endif
1299 v4l2_ctrl_handler_free(&gc0403->ctrl_handler);
1300 mutex_destroy(&gc0403->mutex);
1301
1302 pm_runtime_disable(&client->dev);
1303 if (!pm_runtime_status_suspended(&client->dev))
1304 __gc0403_power_off(gc0403);
1305 pm_runtime_set_suspended(&client->dev);
1306
1307 return 0;
1308 }
1309
1310 #if IS_ENABLED(CONFIG_OF)
1311 static const struct of_device_id gc0403_of_match[] = {
1312 { .compatible = "galaxycore,gc0403" },
1313 {},
1314 };
1315 MODULE_DEVICE_TABLE(of, gc0403_of_match);
1316 #endif
1317
1318 static const struct i2c_device_id gc0403_match_id[] = {
1319 { "gc0403", 0 },
1320 { },
1321 };
1322
1323 static struct i2c_driver gc0403_i2c_driver = {
1324 .driver = {
1325 .name = "gc0403",
1326 .pm = &gc0403_pm_ops,
1327 .of_match_table = of_match_ptr(gc0403_of_match),
1328 },
1329 .probe = &gc0403_probe,
1330 .remove = &gc0403_remove,
1331 .id_table = gc0403_match_id,
1332 };
1333
sensor_mod_init(void)1334 static int __init sensor_mod_init(void)
1335 {
1336 return i2c_add_driver(&gc0403_i2c_driver);
1337 }
1338
sensor_mod_exit(void)1339 static void __exit sensor_mod_exit(void)
1340 {
1341 i2c_del_driver(&gc0403_i2c_driver);
1342 }
1343
1344 device_initcall_sync(sensor_mod_init);
1345 module_exit(sensor_mod_exit);
1346
1347 MODULE_DESCRIPTION("Galaxycore gc0403 sensor driver");
1348 MODULE_LICENSE("GPL v2");
1349