1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
4 *
5 * Author: Ziyuan Xu <xzy.xu@rock-chips.com>
6 */
7
8 #include <linux/module.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/platform_device.h>
11 #include <linux/of.h>
12 #include <linux/of_device.h>
13 #include <linux/iio/consumer.h>
14 #include <linux/iio/iio.h>
15
16 /**
17 * id: the index of analog switch inputs
18 * saradc_chan_id: the index of analog switch 'x' output
19 * gpio_mask: set the value of switch-gpios with mask, that
20 * makes the 'id' connect to 'saradc_chan_id'.
21 */
22 struct gpio_muxadc_chan_data {
23 u32 id;
24 u32 saradc_chan_id;
25 u32 gpio_mask;
26 };
27
28 #define MUXADC_CHANNEL(_index, _id, _mask) { \
29 .id = _index, \
30 .saradc_chan_id = _id, \
31 .gpio_mask = _mask, \
32 }
33
34 /**
35 * nr_chans: the number of analog switch 'x' output
36 * saradc_nr_chans: the number of analog switch inputs
37 * chans: pointer to get the muxadc channel information
38 */
39 struct gpio_muxadc_data {
40 u32 nr_chans;
41 u32 saradc_nr_chans;
42 const struct gpio_muxadc_chan_data *chans;
43 };
44
45 /**
46 * gpios: pointer of digital enable input gpios
47 * adc_chans: pointer of the 'saraadc' channel
48 * muxchans: specification of a single analog switch 'x'
49 * output channel
50 * data: pointer to get the muxadc channels information
51 * nr_chans: the number of analog switch 'x' output
52 */
53 struct gpio_muxadc {
54 struct gpio_descs *gpios;
55 struct iio_channel *adc_chans;
56 struct iio_chan_spec *muxchans;
57 const struct gpio_muxadc_data *data;
58 u32 nr_chans;
59 };
60
gpio_muxadc_chan_read_by_index(struct gpio_muxadc * muxadc,int index,int * val)61 static int gpio_muxadc_chan_read_by_index(struct gpio_muxadc *muxadc,
62 int index, int *val)
63 {
64 struct iio_channel *saradc_chan;
65 const struct gpio_muxadc_chan_data *chan_data;
66 u32 i, saradc_chan_id;
67
68 chan_data = &muxadc->data->chans[index];
69 for (i = 0; i < muxadc->gpios->ndescs; i++) {
70 struct gpio_desc *gpiod = muxadc->gpios->desc[i];
71 int gpio_val = chan_data->gpio_mask & BIT(i) ? 1 : 0;
72
73 gpiod_set_value(gpiod, gpio_val);
74 }
75
76 saradc_chan_id = chan_data->saradc_chan_id;
77 saradc_chan = &muxadc->adc_chans[saradc_chan_id];
78 return iio_read_channel_raw(saradc_chan, val);
79 }
80
gpio_muxadc_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)81 static int gpio_muxadc_read_raw(struct iio_dev *indio_dev,
82 struct iio_chan_spec const *chan,
83 int *val, int *val2, long mask)
84 {
85 struct gpio_muxadc *muxadc = iio_priv(indio_dev);
86 int ret = IIO_VAL_INT;
87
88 switch (mask) {
89 case IIO_CHAN_INFO_RAW:
90 ret = gpio_muxadc_chan_read_by_index(muxadc,
91 chan->channel, val);
92 break;
93 default:
94 return -EINVAL;
95 }
96
97 return ret;
98 }
99
100 static const struct iio_info gpio_muxadc_iio_info = {
101 .read_raw = gpio_muxadc_read_raw,
102 };
103
104 static const struct gpio_muxadc_chan_data mux_sgm3699_chans_data[] = {
105 MUXADC_CHANNEL(0, 0, 0b00),
106 MUXADC_CHANNEL(1, 1, 0b00),
107 MUXADC_CHANNEL(2, 2, 0b00),
108 MUXADC_CHANNEL(3, 3, 0b00),
109 MUXADC_CHANNEL(4, 0, 0b01),
110 MUXADC_CHANNEL(5, 1, 0b01),
111 MUXADC_CHANNEL(6, 2, 0b11),
112 MUXADC_CHANNEL(7, 3, 0b11),
113 };
114
115 static const struct gpio_muxadc_data mux_sgm3699_data = {
116 .saradc_nr_chans = 4,
117 .nr_chans = ARRAY_SIZE(mux_sgm3699_chans_data),
118 .chans = mux_sgm3699_chans_data,
119 };
120
121 static const struct gpio_muxadc_chan_data mux_sgm48752_chans_data[] = {
122 MUXADC_CHANNEL(0, 0, 0b00),
123 MUXADC_CHANNEL(1, 1, 0b00),
124 MUXADC_CHANNEL(2, 0, 0b10),
125 MUXADC_CHANNEL(3, 1, 0b10),
126 MUXADC_CHANNEL(4, 0, 0b01),
127 MUXADC_CHANNEL(5, 1, 0b01),
128 MUXADC_CHANNEL(6, 0, 0b11),
129 MUXADC_CHANNEL(7, 1, 0b11),
130 };
131
132 static const struct gpio_muxadc_data mux_sgm48752_data = {
133 .saradc_nr_chans = 2,
134 .nr_chans = ARRAY_SIZE(mux_sgm48752_chans_data),
135 .chans = mux_sgm48752_chans_data,
136 };
137
138 static const struct of_device_id of_gpio_muxadc_match[] = {
139 {
140 .compatible = "sgm3699",
141 .data = &mux_sgm3699_data,
142 },
143 {
144 .compatible = "sgm48752",
145 .data = &mux_sgm48752_data,
146 },
147 {},
148 };
149 MODULE_DEVICE_TABLE(of, of_gpio_muxadc_match);
150
gpio_muxadc_probe(struct platform_device * pdev)151 static int gpio_muxadc_probe(struct platform_device *pdev)
152 {
153 struct gpio_muxadc *muxadc;
154 struct iio_dev *indio_dev;
155 const struct of_device_id *match;
156 struct device *dev = &pdev->dev;
157 struct device_node *np = pdev->dev.of_node;
158 u32 i, nr_adc_chans = 0;
159
160 indio_dev = devm_iio_device_alloc(dev, sizeof(*muxadc));
161 if (!indio_dev)
162 return -ENOMEM;
163
164 muxadc = iio_priv(indio_dev);
165
166 match = of_match_device(of_gpio_muxadc_match, dev);
167 if (!match) {
168 dev_err(dev, "failed to match device\n");
169 return -ENODEV;
170 }
171 muxadc->data = match->data;
172
173 muxadc->gpios = devm_gpiod_get_array(dev, "switch", GPIOD_OUT_LOW);
174 if (IS_ERR(muxadc->gpios)) {
175 dev_err(dev, "property of switch-gpios not specified\n");
176 return PTR_ERR(muxadc->gpios);
177 }
178
179 muxadc->adc_chans = iio_channel_get_all(dev);
180 if (IS_ERR(muxadc->adc_chans))
181 return PTR_ERR(muxadc->adc_chans);
182 /*
183 * It's necessary to get the number of input ADC, and make a
184 * comparison with chan_data->saradc_nr_chans. Otherwise it
185 * might fall in to trap.
186 */
187 while (muxadc->adc_chans[nr_adc_chans].indio_dev)
188 nr_adc_chans++;
189 if (muxadc->data->saradc_nr_chans != nr_adc_chans) {
190 dev_err(dev, "the number of io-channels is mismatch\n");
191 return -EINVAL;
192 }
193
194 muxadc->nr_chans = of_property_count_strings(np, "labels");
195 if (muxadc->nr_chans != muxadc->data->nr_chans) {
196 dev_err(dev, "should provide %d label\n",
197 muxadc->nr_chans);
198 return -EINVAL;
199 }
200
201 muxadc->muxchans = devm_kcalloc(dev, muxadc->nr_chans,
202 sizeof(struct iio_chan_spec),
203 GFP_KERNEL);
204 if (!muxadc->muxchans)
205 return -ENOMEM;
206
207 for (i = 0; i < muxadc->nr_chans; i++) {
208 /*
209 * The specification of each muxadc channel will be
210 * in_voltage_<label> without been indexed.
211 */
212 muxadc->muxchans[i].type = IIO_VOLTAGE;
213 muxadc->muxchans[i].channel = i;
214 muxadc->muxchans[i].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
215 of_property_read_string_index(np, "labels", i,
216 &muxadc->muxchans[i].extend_name);
217 }
218
219 indio_dev->name = dev_name(dev);
220 indio_dev->dev.parent = dev;
221 indio_dev->dev.of_node = dev->of_node;
222 indio_dev->info = &gpio_muxadc_iio_info;
223 indio_dev->modes = INDIO_DIRECT_MODE;
224 indio_dev->channels = muxadc->muxchans;
225 indio_dev->num_channels = muxadc->nr_chans;
226
227 return iio_device_register(indio_dev);
228 }
229
gpio_muxadc_remove(struct platform_device * pdev)230 static int gpio_muxadc_remove(struct platform_device *pdev)
231 {
232 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
233
234 iio_device_unregister(indio_dev);
235 return 0;
236 }
237
238 static struct platform_driver gpio_muxadc_driver = {
239 .probe = gpio_muxadc_probe,
240 .remove = gpio_muxadc_remove,
241 .driver = {
242 .name = "gpio-muxadc",
243 .of_match_table = of_gpio_muxadc_match,
244 },
245 };
246
247 module_platform_driver(gpio_muxadc_driver);
248
249 MODULE_AUTHOR("Ziyuan Xu <xzy.xu@rock-chips.com>");
250 MODULE_DESCRIPTION("GPIO MUX ADC driver");
251 MODULE_LICENSE("GPL v2");
252