1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/module.h>
3 #include <linux/clk.h>
4 #include <linux/delay.h>
5 #include <linux/err.h>
6 #include <linux/hdmi.h>
7 #include <linux/mutex.h>
8 #include <linux/mfd/syscon.h>
9 #include <linux/nvmem-consumer.h>
10 #include <linux/of_device.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regmap.h>
13
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_crtc_helper.h>
16 #include <drm/drm_of.h>
17 #include <drm/drm_probe_helper.h>
18
19 #include <uapi/linux/videodev2.h>
20
21 #include "rockchip_drm_drv.h"
22 #include "rockchip_drm_tve.h"
23 #include "rockchip_drm_vop.h"
24
25 #define RK322X_VDAC_STANDARD 0x15
26
27 static const struct drm_display_mode cvbs_mode[] = {
28 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
29 816, 864, 0, 576, 580, 586, 625, 0,
30 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
31 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
32 0, },
33
34 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
35 815, 858, 0, 480, 480, 486, 525, 0,
36 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
37 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
38 0, },
39 };
40
41 struct env_config {
42 u32 offset;
43 u32 value;
44 };
45
46 static struct env_config ntsc_bt656_config[] = {
47 { BT656_DECODER_CROP, 0x00000000 },
48 { BT656_DECODER_SIZE, 0x01e002d0 },
49 { BT656_DECODER_HTOTAL_HS_END, 0x035a003e },
50 { BT656_DECODER_VACT_ST_HACT_ST, 0x00160069 },
51 { BT656_DECODER_VTOTAL_VS_END, 0x020d0003 },
52 { BT656_DECODER_VS_ST_END_F1, 0x01060109 },
53 { BT656_DECODER_DBG_REG, 0x024002d0 },
54 { BT656_DECODER_CTRL, 0x00000009 },
55 };
56
57 static struct env_config ntsc_tve_config[] = {
58 { TVE_MODE_CTRL, 0x000af906 },
59 { TVE_HOR_TIMING1, 0x00c07a81 },
60 { TVE_HOR_TIMING2, 0x169810fc },
61 { TVE_HOR_TIMING3, 0x96b40000 },
62 { TVE_SUB_CAR_FRQ, 0x21f07bd7 },
63 { TVE_IMAGE_POSITION, 0x001500d6 },
64 { TVE_ROUTING, 0x10088880 },
65 { TVE_SYNC_ADJUST, 0x00000000 },
66 { TVE_STATUS, 0x00000000 },
67 { TVE_CTRL, 0x00000000 },
68 { TVE_INTR_STATUS, 0x00000000 },
69 { TVE_INTR_EN, 0x00000000 },
70 { TVE_INTR_CLR, 0x00000000 },
71 { TVE_COLOR_BUSRT_SAT, 0x0052543c },
72 { TVE_CHROMA_BANDWIDTH, 0x00000002 },
73 { TVE_BRIGHTNESS_CONTRAST, 0x00008300 },
74 { TVE_CLAMP, 0x00000000 },
75 };
76
77 static struct env_config pal_bt656_config[] = {
78 { BT656_DECODER_CROP, 0x00000000 },
79 { BT656_DECODER_SIZE, 0x024002d0 },
80 { BT656_DECODER_HTOTAL_HS_END, 0x0360003f },
81 { BT656_DECODER_VACT_ST_HACT_ST, 0x0016006f },
82 { BT656_DECODER_VTOTAL_VS_END, 0x02710003 },
83 { BT656_DECODER_VS_ST_END_F1, 0x0138013b },
84 { BT656_DECODER_DBG_REG, 0x024002d0 },
85 { BT656_DECODER_CTRL, 0x00000009 },
86 };
87
88 static struct env_config pal_tve_config[] = {
89 { TVE_MODE_CTRL, 0x010ab906 },
90 { TVE_HOR_TIMING1, 0x00c28381 },
91 { TVE_HOR_TIMING2, 0x267d111d },
92 { TVE_HOR_TIMING3, 0x66c00880 },
93 { TVE_SUB_CAR_FRQ, 0x2a098acb },
94 { TVE_IMAGE_POSITION, 0x001500f6 },
95 { TVE_ROUTING, 0x10008882 },
96 { TVE_SYNC_ADJUST, 0x00000000 },
97 { TVE_STATUS, 0x000000b0 },
98 { TVE_CTRL, 0x00000000 },
99 { TVE_INTR_STATUS, 0x00000000 },
100 { TVE_INTR_EN, 0x00000000 },
101 { TVE_INTR_CLR, 0x00000000 },
102 { TVE_COLOR_BUSRT_SAT, 0x00356245 },
103 { TVE_CHROMA_BANDWIDTH, 0x00000022 },
104 { TVE_BRIGHTNESS_CONTRAST, 0x0000aa00 },
105 { TVE_CLAMP, 0x00000000 },
106 };
107
108 #define BT656_ENV_CONFIG_SIZE (sizeof(ntsc_bt656_config) / sizeof(struct env_config))
109 #define TVE_ENV_CONFIG_SIZE (sizeof(ntsc_tve_config) / sizeof(struct env_config))
110
111 #define tve_writel(offset, v) writel_relaxed(v, tve->regbase + (offset))
112 #define tve_readl(offset) readl_relaxed(tve->regbase + (offset))
113
114 #define tve_dac_writel(offset, v) writel_relaxed(v, tve->vdacbase + (offset))
115 #define tve_dac_readl(offset) readl_relaxed(tve->vdacbase + (offset))
116
117 #define tve_dac_grf_writel(offset, v) regmap_write(tve->dac_grf, offset, v)
118 #define tve_dac_grf_readl(offset, v) regmap_read(tve->dac_grf, offset, v)
119
120 #define connector_to_tve(x) container_of(x, struct rockchip_tve, connector)
121 #define encoder_to_tve(x) container_of(x, struct rockchip_tve, encoder)
122
123 struct rockchip_tve_data {
124 int input_format;
125 int soc_type;
126 };
127
tve_write_block(struct rockchip_tve * tve,struct env_config * config,int len)128 static void tve_write_block(struct rockchip_tve *tve, struct env_config *config, int len)
129 {
130 int i;
131
132 for (i = 0; i < len; i++)
133 tve_writel(config[i].offset, config[i].value);
134 }
135
136 static int
rockchip_tve_get_modes(struct drm_connector * connector)137 rockchip_tve_get_modes(struct drm_connector *connector)
138 {
139 int count;
140 struct rockchip_tve *tve = connector_to_tve(connector);
141
142 for (count = 0; count < ARRAY_SIZE(cvbs_mode); count++) {
143 struct drm_display_mode *mode_ptr;
144
145 mode_ptr = drm_mode_duplicate(connector->dev,
146 &cvbs_mode[count]);
147 if (tve->preferred_mode == count)
148 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
149 drm_mode_probed_add(connector, mode_ptr);
150 }
151
152 return count;
153 }
154
155 static enum drm_mode_status
rockchip_tve_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)156 rockchip_tve_mode_valid(struct drm_connector *connector,
157 struct drm_display_mode *mode)
158 {
159 return MODE_OK;
160 }
161
rockchip_tve_best_encoder(struct drm_connector * connector)162 static struct drm_encoder *rockchip_tve_best_encoder(struct drm_connector
163 *connector)
164 {
165 struct rockchip_tve *tve = connector_to_tve(connector);
166
167 return &tve->encoder;
168 }
169
rockchip_encoder_destroy(struct drm_encoder * encoder)170 static void rockchip_encoder_destroy(struct drm_encoder *encoder)
171 {
172 drm_encoder_cleanup(encoder);
173 }
174
175 static enum drm_connector_status
rockchip_tve_connector_detect(struct drm_connector * connector,bool force)176 rockchip_tve_connector_detect(struct drm_connector *connector, bool force)
177 {
178 return connector_status_connected;
179 }
180
rockchip_tve_connector_destroy(struct drm_connector * connector)181 static void rockchip_tve_connector_destroy(struct drm_connector *connector)
182 {
183 drm_connector_cleanup(connector);
184 }
185
tve_set_mode(struct rockchip_tve * tve)186 static void tve_set_mode(struct rockchip_tve *tve)
187 {
188 struct env_config *bt656_cfg, *tve_cfg;
189 int mode = tve->tv_format;
190
191 if (tve->soc_type == SOC_RK3528) {
192 tve_writel(TVE_LUMA_FILTER1, tve->lumafilter0);
193 tve_writel(TVE_LUMA_FILTER2, tve->lumafilter1);
194 tve_writel(TVE_LUMA_FILTER3, tve->lumafilter2);
195 tve_writel(TVE_LUMA_FILTER4, tve->lumafilter3);
196 tve_writel(TVE_LUMA_FILTER5, tve->lumafilter4);
197 tve_writel(TVE_LUMA_FILTER6, tve->lumafilter5);
198 tve_writel(TVE_LUMA_FILTER7, tve->lumafilter6);
199 tve_writel(TVE_LUMA_FILTER8, tve->lumafilter7);
200 } else {
201 dev_dbg(tve->dev, "tve set mode:%d\n", mode);
202 if (tve->input_format == INPUT_FORMAT_RGB)
203 tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
204 v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
205 v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(0));
206 else
207 tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
208 v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
209 v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(3));
210
211 tve_writel(TV_LUMA_FILTER0, tve->lumafilter0);
212 tve_writel(TV_LUMA_FILTER1, tve->lumafilter1);
213 tve_writel(TV_LUMA_FILTER2, tve->lumafilter2);
214 }
215
216 if (mode == TVOUT_CVBS_NTSC) {
217 dev_dbg(tve->dev, "NTSC MODE\n");
218
219 if (tve->soc_type == SOC_RK3528) {
220 bt656_cfg = ntsc_bt656_config;
221 tve_cfg = ntsc_tve_config;
222
223 tve_write_block(tve, bt656_cfg, BT656_ENV_CONFIG_SIZE);
224 tve_write_block(tve, tve_cfg, TVE_ENV_CONFIG_SIZE);
225 } else {
226 tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(1) |
227 v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
228 v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
229 tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_NTSC) |
230 v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
231 tve_writel(TV_SATURATION, 0x0042543C);
232 if (tve->test_mode)
233 tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00008300);
234 else
235 tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00007900);
236
237 tve_writel(TV_FREQ_SC, 0x21F07BD7);
238 tve_writel(TV_SYNC_TIMING, 0x00C07a81);
239 tve_writel(TV_ADJ_TIMING, 0x96B40000 | 0x70);
240 tve_writel(TV_ACT_ST, 0x001500D6);
241 tve_writel(TV_ACT_TIMING, 0x069800FC | (1 << 12) | (1 << 28));
242 }
243 } else if (mode == TVOUT_CVBS_PAL) {
244 dev_dbg(tve->dev, "PAL MODE\n");
245
246 if (tve->soc_type == SOC_RK3528) {
247 bt656_cfg = pal_bt656_config;
248 tve_cfg = pal_tve_config;
249
250 tve_write_block(tve, bt656_cfg, BT656_ENV_CONFIG_SIZE);
251 tve_write_block(tve, tve_cfg, TVE_ENV_CONFIG_SIZE);
252 } else {
253 tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(0) |
254 v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
255 v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
256 tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_PAL) |
257 v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
258
259 tve_writel(TV_SATURATION, tve->saturation);
260 tve_writel(TV_BRIGHTNESS_CONTRAST, tve->brightcontrast);
261
262 tve_writel(TV_FREQ_SC, 0x2A098ACB);
263 tve_writel(TV_SYNC_TIMING, 0x00C28381);
264 tve_writel(TV_ADJ_TIMING, (0xc << 28) | 0x06c00800 | 0x80);
265 tve_writel(TV_ACT_ST, 0x001500F6);
266 tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
267
268 tve_writel(TV_ADJ_TIMING, tve->adjtiming);
269 tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
270 }
271 }
272
273 if (tve->soc_type == SOC_RK3528) {
274 u32 upsample_mode = 0;
275 u32 mask = 0;
276 u32 val = 0;
277 bool upsample_en;
278
279 upsample_en = tve->upsample_mode ? 1 : 0;
280 if (upsample_en)
281 upsample_mode = tve->upsample_mode - 1;
282 mask = m_TVE_DCLK_POL | m_TVE_DCLK_EN | m_DCLK_UPSAMPLE_2X4X |
283 m_DCLK_UPSAMPLE_EN | m_TVE_MODE | m_TVE_EN;
284 val = v_TVE_DCLK_POL(0) | v_TVE_DCLK_EN(1) | v_DCLK_UPSAMPLE_2X4X(upsample_mode) |
285 v_DCLK_UPSAMPLE_EN(upsample_en) | v_TVE_MODE(tve->tv_format) | v_TVE_EN(1);
286
287 tve_dac_grf_writel(RK3528_VO_GRF_CVBS_CON, (mask << 16) | val);
288 }
289 }
290
dac_init(struct rockchip_tve * tve)291 static void dac_init(struct rockchip_tve *tve)
292 {
293 tve_dac_writel(VDAC_VDAC1, v_CUR_REG(tve->dac1level) |
294 m_DR_PWR_DOWN | m_BG_PWR_DOWN);
295 tve_dac_writel(VDAC_VDAC2, v_CUR_CTR(tve->daclevel));
296 tve_dac_writel(VDAC_VDAC3, v_CAB_EN(0));
297 }
298
dac_enable(struct rockchip_tve * tve,bool enable)299 static void dac_enable(struct rockchip_tve *tve, bool enable)
300 {
301 u32 mask = 0;
302 u32 val = 0;
303 u32 grfreg = 0;
304 u32 offset = 0;
305
306 if (enable) {
307 dev_dbg(tve->dev, "dac enable\n");
308
309 if (tve->soc_type == SOC_RK3036) {
310 mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
311 val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve->daclevel);
312 grfreg = RK3036_GRF_SOC_CON3;
313 } else if (tve->soc_type == SOC_RK312X) {
314 mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
315 val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve->daclevel);
316 grfreg = RK312X_GRF_TVE_CON;
317 } else if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
318 val = v_CUR_REG(tve->dac1level) | v_DR_PWR_DOWN(0) | v_BG_PWR_DOWN(0);
319 offset = VDAC_VDAC1;
320 } else if (tve->soc_type == SOC_RK3528) {
321 /*
322 * Reset the vdac
323 */
324 tve_dac_writel(VDAC_CLK_RST, v_ANALOG_RST(0) | v_DIGITAL_RST(0));
325 msleep(20);
326 tve_dac_writel(VDAC_CLK_RST, v_ANALOG_RST(1) | v_DIGITAL_RST(1));
327
328 tve_dac_writel(VDAC_CURRENT_CTRL, v_OUT_CURRENT(tve->vdac_out_current));
329
330 val = v_REF_VOLTAGE(7) | v_DAC_PWN(1) | v_BIAS_PWN(1);
331 offset = VDAC_PWM_REF_CTRL;
332 }
333 } else {
334 dev_dbg(tve->dev, "dac disable\n");
335
336 if (tve->soc_type == SOC_RK312X) {
337 mask = m_VBG_EN | m_DAC_EN;
338 grfreg = RK312X_GRF_TVE_CON;
339 } else if (tve->soc_type == SOC_RK3036) {
340 mask = m_VBG_EN | m_DAC_EN;
341 grfreg = RK3036_GRF_SOC_CON3;
342 } else if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
343 val = v_CUR_REG(tve->dac1level) | m_DR_PWR_DOWN | m_BG_PWR_DOWN;
344 offset = VDAC_VDAC1;
345 } else if (tve->soc_type == SOC_RK3528) {
346 val = v_DAC_PWN(0) | v_BIAS_PWN(0);
347 offset = VDAC_PWM_REF_CTRL;
348 }
349 }
350
351 if (grfreg)
352 tve_dac_grf_writel(grfreg, (mask << 16) | val);
353 else if (tve->vdacbase)
354 tve_dac_writel(offset, val);
355 }
356
cvbs_set_disable(struct rockchip_tve * tve)357 static int cvbs_set_disable(struct rockchip_tve *tve)
358 {
359 int ret = 0;
360
361 dev_dbg(tve->dev, "%s\n", __func__);
362 if (!tve->enable)
363 return 0;
364
365 ret = pm_runtime_put(tve->dev);
366 if (ret < 0) {
367 dev_err(tve->dev, "failed to put pm runtime: %d\n", ret);
368 return ret;
369 }
370 dac_enable(tve, false);
371 tve->enable = 0;
372
373 return 0;
374 }
375
376 /*
377 * RK3528 supports bt656 to cvbs, and the others support rgb to cvbs.
378 *
379 * ┌──────────┐
380 * │ rgb data ├─────────────────────────────────────┐
381 * └──────────┘ │
382 * ▼
383 * ┌────────────┐ ┌───────────────┐ ┌───────────────────┐ ┌──────┐ ┌────────┐
384 * │ bt656 data ├───►│ bt656 decoder ├───►│ cvbs(tve) encoder ├───►│ vdac ├───►│ screen │
385 * └────────────┘ └───────────────┘ └───────────────────┘ └──────┘ └────────┘
386 *
387 */
cvbs_set_enable(struct rockchip_tve * tve)388 static int cvbs_set_enable(struct rockchip_tve *tve)
389 {
390 int ret = 0;
391
392 dev_dbg(tve->dev, "%s\n", __func__);
393 if (tve->enable)
394 return 0;
395
396 ret = pm_runtime_get_sync(tve->dev);
397 if (ret < 0) {
398 dev_err(tve->dev, "failed to get pm runtime: %d\n", ret);
399 return ret;
400 }
401 tve_set_mode(tve);
402 msleep(1000);
403 dac_enable(tve, true);
404 tve->enable = 1;
405
406 return 0;
407 }
408
rockchip_tve_encoder_enable(struct drm_encoder * encoder)409 static void rockchip_tve_encoder_enable(struct drm_encoder *encoder)
410 {
411 struct rockchip_tve *tve = encoder_to_tve(encoder);
412
413 mutex_lock(&tve->suspend_lock);
414
415 dev_dbg(tve->dev, "tve encoder enable\n");
416 cvbs_set_enable(tve);
417
418 mutex_unlock(&tve->suspend_lock);
419 }
420
rockchip_tve_encoder_disable(struct drm_encoder * encoder)421 static void rockchip_tve_encoder_disable(struct drm_encoder *encoder)
422 {
423 struct rockchip_tve *tve = encoder_to_tve(encoder);
424
425 mutex_lock(&tve->suspend_lock);
426
427 dev_dbg(tve->dev, "tve encoder enable\n");
428 cvbs_set_disable(tve);
429
430 mutex_unlock(&tve->suspend_lock);
431 }
432
rockchip_tve_encoder_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)433 static void rockchip_tve_encoder_mode_set(struct drm_encoder *encoder,
434 struct drm_display_mode *mode,
435 struct drm_display_mode *adjusted_mode)
436 {
437 struct rockchip_tve *tve = encoder_to_tve(encoder);
438
439 dev_dbg(tve->dev, "encoder mode set:%s\n", adjusted_mode->name);
440
441 if (adjusted_mode->vdisplay == 576)
442 tve->tv_format = TVOUT_CVBS_PAL;
443 else
444 tve->tv_format = TVOUT_CVBS_NTSC;
445
446 if (tve->enable) {
447 dac_enable(tve, false);
448 msleep(200);
449
450 tve_set_mode(tve);
451 dac_enable(tve, true);
452 }
453 }
454
455 static bool
rockchip_tve_encoder_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)456 rockchip_tve_encoder_mode_fixup(struct drm_encoder *encoder,
457 const struct drm_display_mode *mode,
458 struct drm_display_mode *adjusted_mode)
459 {
460 return true;
461 }
462
463 static int
rockchip_tve_encoder_atomic_check(struct drm_encoder * encoder,struct drm_crtc_state * crtc_state,struct drm_connector_state * conn_state)464 rockchip_tve_encoder_atomic_check(struct drm_encoder *encoder,
465 struct drm_crtc_state *crtc_state,
466 struct drm_connector_state *conn_state)
467 {
468 struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
469 struct rockchip_tve *tve = encoder_to_tve(encoder);
470 struct drm_connector *connector = conn_state->connector;
471 struct drm_display_info *info = &connector->display_info;
472
473 s->output_mode = ROCKCHIP_OUT_MODE_P888;
474 s->output_type = DRM_MODE_CONNECTOR_TV;
475 if (info->num_bus_formats)
476 s->bus_format = info->bus_formats[0];
477 else
478 s->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
479
480 /*
481 * For RK3528:
482 * VOP -> BT656 output -> BT656 decoder -> TVE encoder -> CVBS output
483 */
484 if (tve->soc_type == SOC_RK3528)
485 s->output_if |= VOP_OUTPUT_IF_BT656;
486 s->color_space = V4L2_COLORSPACE_SMPTE170M;
487 s->tv_state = &conn_state->tv;
488
489 return 0;
490 }
491
492 static const struct drm_connector_helper_funcs
493 rockchip_tve_connector_helper_funcs = {
494 .mode_valid = rockchip_tve_mode_valid,
495 .get_modes = rockchip_tve_get_modes,
496 .best_encoder = rockchip_tve_best_encoder,
497 };
498
499 static const struct drm_encoder_funcs rockchip_tve_encoder_funcs = {
500 .destroy = rockchip_encoder_destroy,
501 };
502
503 static const struct drm_connector_funcs rockchip_tve_connector_funcs = {
504 .detect = rockchip_tve_connector_detect,
505 .fill_modes = drm_helper_probe_single_connector_modes,
506 .destroy = rockchip_tve_connector_destroy,
507 .reset = drm_atomic_helper_connector_reset,
508 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
509 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
510 };
511
512 static const struct drm_encoder_helper_funcs
513 rockchip_tve_encoder_helper_funcs = {
514 .mode_fixup = rockchip_tve_encoder_mode_fixup,
515 .mode_set = rockchip_tve_encoder_mode_set,
516 .enable = rockchip_tve_encoder_enable,
517 .disable = rockchip_tve_encoder_disable,
518 .atomic_check = rockchip_tve_encoder_atomic_check,
519 };
520
tve_read_otp_by_name(struct rockchip_tve * tve,char * name,u8 * val,u8 default_val)521 static int tve_read_otp_by_name(struct rockchip_tve *tve, char *name, u8 *val, u8 default_val)
522 {
523 struct nvmem_cell *cell;
524 size_t len;
525 unsigned char *efuse_buf;
526 int ret = -EINVAL;
527
528 *val = default_val;
529 cell = nvmem_cell_get(tve->dev, name);
530 if (!IS_ERR(cell)) {
531 efuse_buf = nvmem_cell_read(cell, &len);
532 nvmem_cell_put(cell);
533 if (!IS_ERR(efuse_buf)) {
534 *val = efuse_buf[0];
535 kfree(efuse_buf);
536 return 0;
537 }
538 }
539
540 dev_err(tve->dev, "failed to read %s from otp, use default\n", name);
541
542 return ret;
543 }
544
tve_parse_dt(struct device_node * np,struct rockchip_tve * tve)545 static int tve_parse_dt(struct device_node *np, struct rockchip_tve *tve)
546 {
547 int ret, val;
548 u8 out_current, version;
549
550 ret = of_property_read_u32(np, "rockchip,tvemode", &val);
551 if (ret < 0) {
552 tve->preferred_mode = 0;
553 } else if (val > 1) {
554 dev_err(tve->dev, "tve mode value invalid\n");
555 return -EINVAL;
556 }
557 tve->preferred_mode = val;
558
559 ret = of_property_read_u32(np, "rockchip,lumafilter0", &val);
560 if (val == 0 || ret < 0)
561 return -EINVAL;
562 tve->lumafilter0 = val;
563
564 ret = of_property_read_u32(np, "rockchip,lumafilter1", &val);
565 if (val == 0 || ret < 0)
566 return -EINVAL;
567 tve->lumafilter1 = val;
568
569 ret = of_property_read_u32(np, "rockchip,lumafilter2", &val);
570 if (val == 0 || ret < 0)
571 return -EINVAL;
572 tve->lumafilter2 = val;
573
574 ret = of_property_read_u32(np, "rockchip,lumafilter3", &val);
575 if (val == 0 || ret < 0)
576 return -EINVAL;
577 tve->lumafilter3 = val;
578
579 ret = of_property_read_u32(np, "rockchip,lumafilter4", &val);
580 if (val == 0 || ret < 0)
581 return -EINVAL;
582 tve->lumafilter4 = val;
583
584 ret = of_property_read_u32(np, "rockchip,lumafilter5", &val);
585 if (val == 0 || ret < 0)
586 return -EINVAL;
587 tve->lumafilter5 = val;
588
589 ret = of_property_read_u32(np, "rockchip,lumafilter6", &val);
590 if (val == 0 || ret < 0)
591 return -EINVAL;
592 tve->lumafilter6 = val;
593
594 ret = of_property_read_u32(np, "rockchip,lumafilter7", &val);
595 if (val == 0 || ret < 0)
596 return -EINVAL;
597 tve->lumafilter7 = val;
598
599 ret = of_property_read_u32(np, "rockchip,tve-upsample", &val);
600 if (val > DCLK_UPSAMPLEx4 || ret < 0)
601 return -EINVAL;
602 tve->upsample_mode = val;
603
604 /*
605 * Read vdac output current from OTP if exists, and the default
606 * current val is 0xd2.
607 */
608 ret = tve_read_otp_by_name(tve, "out-current", &out_current, 0xd2);
609 if (!ret) {
610 if (out_current) {
611 /*
612 * If test version is 0x0, the value of vdac out current
613 * needs to be reduced by one.
614 */
615 ret = tve_read_otp_by_name(tve, "version", &version, 0x0);
616 if (!ret) {
617 if (version == 0x0)
618 out_current -= 1;
619 }
620 } else {
621 /*
622 * If the current value read from OTP is 0, set it to default.
623 */
624 out_current = 0xd2;
625 }
626 }
627 tve->vdac_out_current = out_current;
628
629 return 0;
630 }
631
tve_parse_dt_legacy(struct device_node * np,struct rockchip_tve * tve)632 static int tve_parse_dt_legacy(struct device_node *np, struct rockchip_tve *tve)
633 {
634 int ret, val;
635 u32 getdac = 0;
636 size_t len;
637 struct nvmem_cell *cell;
638 unsigned char *efuse_buf;
639
640 ret = of_property_read_u32(np, "rockchip,tvemode", &val);
641 if (ret < 0) {
642 tve->preferred_mode = 0;
643 } else if (val > 1) {
644 dev_err(tve->dev, "tve mode value invalid\n");
645 return -EINVAL;
646 }
647 tve->preferred_mode = val;
648
649 ret = of_property_read_u32(np, "rockchip,saturation", &val);
650 if (val == 0 || ret < 0)
651 return -EINVAL;
652 tve->saturation = val;
653
654 ret = of_property_read_u32(np, "rockchip,brightcontrast", &val);
655 if (val == 0 || ret < 0)
656 return -EINVAL;
657 tve->brightcontrast = val;
658
659 ret = of_property_read_u32(np, "rockchip,adjtiming", &val);
660 if (val == 0 || ret < 0)
661 return -EINVAL;
662 tve->adjtiming = val;
663
664 ret = of_property_read_u32(np, "rockchip,lumafilter0", &val);
665 if (val == 0 || ret < 0)
666 return -EINVAL;
667 tve->lumafilter0 = val;
668
669 ret = of_property_read_u32(np, "rockchip,lumafilter1", &val);
670 if (val == 0 || ret < 0)
671 return -EINVAL;
672 tve->lumafilter1 = val;
673
674 ret = of_property_read_u32(np, "rockchip,lumafilter2", &val);
675 if (val == 0 || ret < 0)
676 return -EINVAL;
677 tve->lumafilter2 = val;
678
679 ret = of_property_read_u32(np, "rockchip,daclevel", &val);
680 if (val == 0 || ret < 0) {
681 return -EINVAL;
682 } else {
683 tve->daclevel = val;
684 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
685 cell = nvmem_cell_get(tve->dev, "tve_dac_adj");
686 if (IS_ERR(cell)) {
687 dev_dbg(tve->dev, "failed to get id cell: %ld\n", PTR_ERR(cell));
688 } else {
689 efuse_buf = nvmem_cell_read(cell, &len);
690 nvmem_cell_put(cell);
691 if (IS_ERR(efuse_buf))
692 return PTR_ERR(efuse_buf);
693 if (len == 1)
694 getdac = efuse_buf[0];
695 kfree(efuse_buf);
696
697 if (getdac > 0) {
698 tve->daclevel = getdac + 5 + val - RK322X_VDAC_STANDARD;
699 if (tve->daclevel > 0x3f) {
700 dev_err(tve->dev, "rk322x daclevel error!\n");
701 tve->daclevel = val;
702 }
703 }
704 }
705 }
706 }
707
708 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
709 ret = of_property_read_u32(np, "rockchip,dac1level", &val);
710 if ((val == 0) || (ret < 0))
711 return -EINVAL;
712 tve->dac1level = val;
713 }
714
715 return 0;
716 }
717
tve_check_lumafilter(struct rockchip_tve * tve)718 static bool tve_check_lumafilter(struct rockchip_tve *tve)
719 {
720 int lumafilter[8] = {INT_MAX};
721
722 /*
723 * The default lumafilter value is 0. If lumafilter value
724 * is equal to the dts value, uboot logo is enabled.
725 */
726 if (tve->soc_type == SOC_RK3528) {
727 lumafilter[0] = tve_readl(TVE_LUMA_FILTER1);
728 lumafilter[1] = tve_readl(TVE_LUMA_FILTER2);
729 lumafilter[2] = tve_readl(TVE_LUMA_FILTER3);
730 lumafilter[3] = tve_readl(TVE_LUMA_FILTER4);
731 lumafilter[4] = tve_readl(TVE_LUMA_FILTER5);
732 lumafilter[5] = tve_readl(TVE_LUMA_FILTER6);
733 lumafilter[6] = tve_readl(TVE_LUMA_FILTER7);
734 lumafilter[7] = tve_readl(TVE_LUMA_FILTER8);
735
736 if (lumafilter[0] == tve->lumafilter0 &&
737 lumafilter[1] == tve->lumafilter1 &&
738 lumafilter[2] == tve->lumafilter2 &&
739 lumafilter[3] == tve->lumafilter3 &&
740 lumafilter[4] == tve->lumafilter4 &&
741 lumafilter[5] == tve->lumafilter5 &&
742 lumafilter[6] == tve->lumafilter6 &&
743 lumafilter[7] == tve->lumafilter7) {
744 return true;
745 }
746 } else {
747 lumafilter[0] = tve_readl(TV_LUMA_FILTER0);
748 lumafilter[1] = tve_readl(TV_LUMA_FILTER1);
749 lumafilter[2] = tve_readl(TV_LUMA_FILTER2);
750
751 if (lumafilter[0] == tve->lumafilter0 &&
752 lumafilter[1] == tve->lumafilter1 &&
753 lumafilter[2] == tve->lumafilter2) {
754 return true;
755 }
756 }
757
758 return false;
759 }
760
check_uboot_logo(struct rockchip_tve * tve)761 static void check_uboot_logo(struct rockchip_tve *tve)
762 {
763 int vdac;
764
765 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
766 vdac = tve_dac_readl(VDAC_VDAC1);
767 /* Whether the dac power has been turned down. */
768 if (vdac & m_DR_PWR_DOWN) {
769 tve->connector.dpms = DRM_MODE_DPMS_OFF;
770 return;
771 }
772 }
773
774 if (tve_check_lumafilter(tve)) {
775 tve->connector.dpms = DRM_MODE_DPMS_ON;
776 return;
777 }
778
779 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328)
780 dac_init(tve);
781
782 tve->connector.dpms = DRM_MODE_DPMS_OFF;
783 }
784
785 static const struct rockchip_tve_data rk3036_tve = {
786 .soc_type = SOC_RK3036,
787 .input_format = INPUT_FORMAT_RGB,
788 };
789
790 static const struct rockchip_tve_data rk312x_tve = {
791 .soc_type = SOC_RK312X,
792 .input_format = INPUT_FORMAT_RGB,
793 };
794
795 static const struct rockchip_tve_data rk322x_tve = {
796 .soc_type = SOC_RK322X,
797 .input_format = INPUT_FORMAT_YUV,
798 };
799
800 static const struct rockchip_tve_data rk3328_tve = {
801 .soc_type = SOC_RK3328,
802 .input_format = INPUT_FORMAT_YUV,
803 };
804
805 static const struct rockchip_tve_data rk3528_tve = {
806 .soc_type = SOC_RK3528,
807 .input_format = INPUT_FORMAT_YUV,
808 };
809
810 static const struct of_device_id rockchip_tve_dt_ids[] = {
811 { .compatible = "rockchip,rk3036-tve", .data = &rk3036_tve },
812 { .compatible = "rockchip,rk312x-tve", .data = &rk312x_tve },
813 { .compatible = "rockchip,rk322x-tve", .data = &rk322x_tve },
814 { .compatible = "rockchip,rk3328-tve", .data = &rk3328_tve },
815 { .compatible = "rockchip,rk3528-tve", .data = &rk3528_tve },
816 {}
817 };
818
819 MODULE_DEVICE_TABLE(of, rockchip_tve_dt_ids);
820
rockchip_tve_bind(struct device * dev,struct device * master,void * data)821 static int rockchip_tve_bind(struct device *dev, struct device *master,
822 void *data)
823 {
824 struct platform_device *pdev = to_platform_device(dev);
825 struct drm_device *drm_dev = data;
826 struct device_node *np = dev->of_node;
827 const struct of_device_id *match;
828 const struct rockchip_tve_data *tve_data;
829 struct rockchip_tve *tve;
830 struct resource *res;
831 struct drm_encoder *encoder;
832 struct drm_connector *connector;
833 int ret;
834
835 tve = devm_kzalloc(dev, sizeof(*tve), GFP_KERNEL);
836 if (!tve)
837 return -ENOMEM;
838
839 match = of_match_node(rockchip_tve_dt_ids, np);
840 if (!match) {
841 dev_err(tve->dev, "tve can't match node\n");
842 return -EINVAL;
843 }
844
845 tve->dev = &pdev->dev;
846 tve_data = of_device_get_match_data(dev);
847 if (tve_data) {
848 tve->soc_type = tve_data->soc_type;
849 tve->input_format = tve_data->input_format;
850 }
851
852 if (tve->soc_type == SOC_RK3528)
853 ret = tve_parse_dt(np, tve);
854 else
855 ret = tve_parse_dt_legacy(np, tve);
856 if (ret) {
857 dev_err(tve->dev, "TVE parse dts error!");
858 return -EINVAL;
859 }
860
861 tve->enable = 0;
862 tve->drm_dev = drm_dev;
863 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
864 tve->reg_phy_base = res->start;
865 tve->len = resource_size(res);
866 tve->regbase = devm_ioremap(tve->dev, res->start, tve->len);
867 if (IS_ERR(tve->regbase)) {
868 dev_err(tve->dev,
869 "tv encoder device map registers failed!");
870 return PTR_ERR(tve->regbase);
871 }
872
873 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328 ||
874 tve->soc_type == SOC_RK3528) {
875 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
876 tve->len = resource_size(res);
877 tve->vdacbase = devm_ioremap(tve->dev, res->start, tve->len);
878 if (IS_ERR(tve->vdacbase)) {
879 dev_err(tve->dev, "tv encoder device dac map registers failed!");
880 return PTR_ERR(tve->vdacbase);
881 }
882 }
883
884 if (tve->soc_type == SOC_RK3036) {
885 tve->aclk = devm_clk_get(tve->dev, "aclk");
886 if (IS_ERR(tve->aclk)) {
887 dev_err(tve->dev, "Unable to get tve aclk\n");
888 return PTR_ERR(tve->aclk);
889 }
890
891 ret = clk_prepare_enable(tve->aclk);
892 if (ret) {
893 dev_err(tve->dev, "Cannot enable tve aclk: %d\n", ret);
894 return ret;
895 }
896 } else if (tve->soc_type == SOC_RK3528) {
897 tve->hclk = devm_clk_get(tve->dev, "hclk");
898 if (IS_ERR(tve->hclk)) {
899 dev_err(tve->dev, "Unable to get tve hclk\n");
900 return PTR_ERR(tve->hclk);
901 }
902
903 ret = clk_prepare_enable(tve->hclk);
904 if (ret) {
905 dev_err(tve->dev, "Cannot enable tve hclk: %d\n", ret);
906 return ret;
907 }
908
909 tve->pclk_vdac = devm_clk_get(tve->dev, "pclk_vdac");
910 if (IS_ERR(tve->pclk_vdac)) {
911 dev_err(tve->dev, "Unable to get vdac pclk\n");
912 return PTR_ERR(tve->pclk_vdac);
913 }
914
915 ret = clk_prepare_enable(tve->pclk_vdac);
916 if (ret) {
917 dev_err(tve->dev, "Cannot enable vdac pclk: %d\n", ret);
918 return ret;
919 }
920
921 tve->dclk = devm_clk_get(tve->dev, "dclk");
922 if (IS_ERR(tve->dclk)) {
923 dev_err(tve->dev, "Unable to get tve dclk\n");
924 return PTR_ERR(tve->dclk);
925 }
926
927 ret = clk_prepare_enable(tve->dclk);
928 if (ret) {
929 dev_err(tve->dev, "Cannot enable tve dclk: %d\n", ret);
930 return ret;
931 }
932
933 if (tve->upsample_mode == DCLK_UPSAMPLEx4) {
934 tve->dclk_4x = devm_clk_get(tve->dev, "dclk_4x");
935 if (IS_ERR(tve->dclk_4x)) {
936 dev_err(tve->dev, "Unable to get tve dclk_4x\n");
937 return PTR_ERR(tve->dclk_4x);
938 }
939
940 ret = clk_prepare_enable(tve->dclk_4x);
941 if (ret) {
942 dev_err(tve->dev, "Cannot enable tve dclk_4x: %d\n", ret);
943 return ret;
944 }
945 }
946 }
947
948 tve->dac_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
949
950 mutex_init(&tve->suspend_lock);
951 check_uboot_logo(tve);
952 tve->tv_format = TVOUT_CVBS_PAL;
953 encoder = &tve->encoder;
954 encoder->possible_crtcs = rockchip_drm_of_find_possible_crtcs(drm_dev,
955 dev->of_node);
956 dev_dbg(tve->dev, "possible_crtc:%d\n", encoder->possible_crtcs);
957
958 ret = drm_encoder_init(drm_dev, encoder, &rockchip_tve_encoder_funcs,
959 DRM_MODE_ENCODER_TVDAC, NULL);
960 if (ret < 0) {
961 dev_err(tve->dev, "failed to initialize encoder with drm\n");
962 goto err_disable_aclk;
963 }
964
965 drm_encoder_helper_add(encoder, &rockchip_tve_encoder_helper_funcs);
966
967 connector = &tve->connector;
968 connector->interlace_allowed = 1;
969 ret = drm_connector_init(drm_dev, connector,
970 &rockchip_tve_connector_funcs,
971 DRM_MODE_CONNECTOR_TV);
972 if (ret < 0) {
973 dev_dbg(tve->dev, "failed to initialize connector with drm\n");
974 goto err_free_encoder;
975 }
976
977 drm_connector_helper_add(connector,
978 &rockchip_tve_connector_helper_funcs);
979
980 ret = drm_connector_attach_encoder(connector, encoder);
981 if (ret < 0) {
982 dev_dbg(tve->dev, "failed to attach connector and encoder\n");
983 goto err_free_connector;
984 }
985 tve->sub_dev.connector = &tve->connector;
986 tve->sub_dev.of_node = tve->dev->of_node;
987 rockchip_drm_register_sub_dev(&tve->sub_dev);
988
989 pm_runtime_enable(dev);
990 dev_set_drvdata(dev, tve);
991 dev_dbg(tve->dev, "%s tv encoder probe ok\n", match->compatible);
992
993 return 0;
994
995 err_free_connector:
996 drm_connector_cleanup(connector);
997 err_free_encoder:
998 drm_encoder_cleanup(encoder);
999 err_disable_aclk:
1000 if (tve->soc_type == SOC_RK3036)
1001 clk_disable_unprepare(tve->aclk);
1002
1003 return ret;
1004 }
1005
rockchip_tve_unbind(struct device * dev,struct device * master,void * data)1006 static void rockchip_tve_unbind(struct device *dev, struct device *master,
1007 void *data)
1008 {
1009 struct rockchip_tve *tve = dev_get_drvdata(dev);
1010
1011 rockchip_drm_unregister_sub_dev(&tve->sub_dev);
1012 rockchip_tve_encoder_disable(&tve->encoder);
1013
1014 drm_connector_cleanup(&tve->connector);
1015 drm_encoder_cleanup(&tve->encoder);
1016
1017 pm_runtime_disable(dev);
1018 dev_set_drvdata(dev, NULL);
1019 }
1020
1021 static const struct component_ops rockchip_tve_component_ops = {
1022 .bind = rockchip_tve_bind,
1023 .unbind = rockchip_tve_unbind,
1024 };
1025
rockchip_tve_probe(struct platform_device * pdev)1026 static int rockchip_tve_probe(struct platform_device *pdev)
1027 {
1028 component_add(&pdev->dev, &rockchip_tve_component_ops);
1029
1030 return 0;
1031 }
1032
rockchip_tve_shutdown(struct platform_device * pdev)1033 static void rockchip_tve_shutdown(struct platform_device *pdev)
1034 {
1035 struct rockchip_tve *tve = dev_get_drvdata(&pdev->dev);
1036
1037 if (!tve)
1038 return;
1039
1040 mutex_lock(&tve->suspend_lock);
1041
1042 dev_dbg(tve->dev, "tve shutdown\n");
1043 cvbs_set_disable(tve);
1044
1045 mutex_unlock(&tve->suspend_lock);
1046 }
1047
rockchip_tve_remove(struct platform_device * pdev)1048 static int rockchip_tve_remove(struct platform_device *pdev)
1049 {
1050 component_del(&pdev->dev, &rockchip_tve_component_ops);
1051
1052 return 0;
1053 }
1054
1055 struct platform_driver rockchip_tve_driver = {
1056 .probe = rockchip_tve_probe,
1057 .remove = rockchip_tve_remove,
1058 .shutdown = rockchip_tve_shutdown,
1059 .driver = {
1060 .name = "rockchip-tve",
1061 .of_match_table = of_match_ptr(rockchip_tve_dt_ids),
1062 },
1063 };
1064
1065 MODULE_AUTHOR("Algea Cao <Algea.cao@rock-chips.com>");
1066 MODULE_DESCRIPTION("ROCKCHIP TVE Driver");
1067 MODULE_LICENSE("GPL v2");
1068