1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * dw-hdmi-qp-i2s-audio.c
4 *
5 * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
6 * Author: Sugar Zhang <sugar.zhang@rock-chips.com>
7 */
8
9 #include <linux/dma-mapping.h>
10 #include <linux/module.h>
11
12 #include <drm/bridge/dw_hdmi.h>
13 #include <drm/drm_crtc.h>
14
15 #include <sound/hdmi-codec.h>
16
17 #include "dw-hdmi-qp.h"
18 #include "dw-hdmi-qp-audio.h"
19
20 #define DRIVER_NAME "dw-hdmi-qp-i2s-audio"
21
hdmi_write(struct dw_hdmi_qp_i2s_audio_data * audio,u32 val,int offset)22 static inline void hdmi_write(struct dw_hdmi_qp_i2s_audio_data *audio,
23 u32 val, int offset)
24 {
25 struct dw_hdmi_qp *hdmi = audio->hdmi;
26
27 audio->write(hdmi, val, offset);
28 }
29
hdmi_read(struct dw_hdmi_qp_i2s_audio_data * audio,int offset)30 static inline u32 hdmi_read(struct dw_hdmi_qp_i2s_audio_data *audio, int offset)
31 {
32 struct dw_hdmi_qp *hdmi = audio->hdmi;
33
34 return audio->read(hdmi, offset);
35 }
36
hdmi_mod(struct dw_hdmi_qp_i2s_audio_data * audio,u32 data,u32 mask,u32 reg)37 static inline void hdmi_mod(struct dw_hdmi_qp_i2s_audio_data *audio,
38 u32 data, u32 mask, u32 reg)
39 {
40 struct dw_hdmi_qp *hdmi = audio->hdmi;
41
42 return audio->mod(hdmi, data, mask, reg);
43 }
44
dw_hdmi_qp_i2s_hw_params(struct device * dev,void * data,struct hdmi_codec_daifmt * fmt,struct hdmi_codec_params * hparms)45 static int dw_hdmi_qp_i2s_hw_params(struct device *dev, void *data,
46 struct hdmi_codec_daifmt *fmt,
47 struct hdmi_codec_params *hparms)
48 {
49 struct dw_hdmi_qp_i2s_audio_data *audio = data;
50 struct dw_hdmi_qp *hdmi = audio->hdmi;
51 bool ref2stream = false;
52
53 if (fmt->bit_clk_master | fmt->frame_clk_master) {
54 dev_err(dev, "unsupported clock settings\n");
55 return -EINVAL;
56 }
57
58 if (fmt->bit_fmt == SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE)
59 ref2stream = true;
60
61 dw_hdmi_qp_set_audio_interface(hdmi, fmt, hparms);
62 dw_hdmi_qp_set_sample_rate(hdmi, hparms->sample_rate);
63 dw_hdmi_qp_set_channel_status(hdmi, hparms->iec.status, ref2stream);
64 dw_hdmi_qp_set_channel_count(hdmi, hparms->channels);
65 dw_hdmi_qp_set_channel_allocation(hdmi, hparms->cea.channel_allocation);
66 dw_hdmi_qp_set_audio_infoframe(hdmi, hparms);
67
68 return 0;
69 }
70
dw_hdmi_qp_i2s_audio_startup(struct device * dev,void * data)71 static int dw_hdmi_qp_i2s_audio_startup(struct device *dev, void *data)
72 {
73 struct dw_hdmi_qp_i2s_audio_data *audio = data;
74 struct dw_hdmi_qp *hdmi = audio->hdmi;
75
76 dw_hdmi_qp_audio_enable(hdmi);
77
78 return 0;
79 }
80
dw_hdmi_qp_i2s_audio_shutdown(struct device * dev,void * data)81 static void dw_hdmi_qp_i2s_audio_shutdown(struct device *dev, void *data)
82 {
83 struct dw_hdmi_qp_i2s_audio_data *audio = data;
84 struct dw_hdmi_qp *hdmi = audio->hdmi;
85
86 dw_hdmi_qp_audio_disable(hdmi);
87 }
88
dw_hdmi_qp_i2s_get_eld(struct device * dev,void * data,uint8_t * buf,size_t len)89 static int dw_hdmi_qp_i2s_get_eld(struct device *dev, void *data, uint8_t *buf,
90 size_t len)
91 {
92 struct dw_hdmi_qp_i2s_audio_data *audio = data;
93
94 memcpy(buf, audio->eld, min_t(size_t, MAX_ELD_BYTES, len));
95
96 return 0;
97 }
98
dw_hdmi_qp_i2s_get_dai_id(struct snd_soc_component * component,struct device_node * endpoint)99 static int dw_hdmi_qp_i2s_get_dai_id(struct snd_soc_component *component,
100 struct device_node *endpoint)
101 {
102 struct of_endpoint of_ep;
103 int ret;
104
105 ret = of_graph_parse_endpoint(endpoint, &of_ep);
106 if (ret < 0)
107 return ret;
108
109 /*
110 * HDMI sound should be located as reg = <2>
111 * Then, it is sound port 0
112 */
113 if (of_ep.port == 2)
114 return 0;
115
116 return -EINVAL;
117 }
118
dw_hdmi_qp_i2s_hook_plugged_cb(struct device * dev,void * data,hdmi_codec_plugged_cb fn,struct device * codec_dev)119 static int dw_hdmi_qp_i2s_hook_plugged_cb(struct device *dev, void *data,
120 hdmi_codec_plugged_cb fn,
121 struct device *codec_dev)
122 {
123 struct dw_hdmi_qp_i2s_audio_data *audio = data;
124 struct dw_hdmi_qp *hdmi = audio->hdmi;
125
126 return dw_hdmi_qp_set_plugged_cb(hdmi, fn, codec_dev);
127 }
128
129 static struct hdmi_codec_ops dw_hdmi_qp_i2s_ops = {
130 .hw_params = dw_hdmi_qp_i2s_hw_params,
131 .audio_startup = dw_hdmi_qp_i2s_audio_startup,
132 .audio_shutdown = dw_hdmi_qp_i2s_audio_shutdown,
133 .get_eld = dw_hdmi_qp_i2s_get_eld,
134 .get_dai_id = dw_hdmi_qp_i2s_get_dai_id,
135 .hook_plugged_cb = dw_hdmi_qp_i2s_hook_plugged_cb,
136 };
137
snd_dw_hdmi_qp_probe(struct platform_device * pdev)138 static int snd_dw_hdmi_qp_probe(struct platform_device *pdev)
139 {
140 struct dw_hdmi_qp_i2s_audio_data *audio = pdev->dev.platform_data;
141 struct platform_device_info pdevinfo;
142 struct hdmi_codec_pdata pdata;
143 struct platform_device *platform;
144
145 pdata.ops = &dw_hdmi_qp_i2s_ops;
146 pdata.i2s = 1;
147 pdata.max_i2s_channels = 8;
148 pdata.data = audio;
149
150 memset(&pdevinfo, 0, sizeof(pdevinfo));
151 pdevinfo.parent = pdev->dev.parent;
152 pdevinfo.id = PLATFORM_DEVID_AUTO;
153 pdevinfo.name = HDMI_CODEC_DRV_NAME;
154 pdevinfo.data = &pdata;
155 pdevinfo.size_data = sizeof(pdata);
156 pdevinfo.dma_mask = DMA_BIT_MASK(32);
157
158 platform = platform_device_register_full(&pdevinfo);
159 if (IS_ERR(platform))
160 return PTR_ERR(platform);
161
162 dev_set_drvdata(&pdev->dev, platform);
163
164 return 0;
165 }
166
snd_dw_hdmi_qp_remove(struct platform_device * pdev)167 static int snd_dw_hdmi_qp_remove(struct platform_device *pdev)
168 {
169 struct platform_device *platform = dev_get_drvdata(&pdev->dev);
170
171 platform_device_unregister(platform);
172
173 return 0;
174 }
175
176 static struct platform_driver snd_dw_hdmi_qp_driver = {
177 .probe = snd_dw_hdmi_qp_probe,
178 .remove = snd_dw_hdmi_qp_remove,
179 .driver = {
180 .name = DRIVER_NAME,
181 },
182 };
183 module_platform_driver(snd_dw_hdmi_qp_driver);
184
185 MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");
186 MODULE_DESCRIPTION("Synopsis Designware HDMI QP I2S ALSA SoC interface");
187 MODULE_LICENSE("GPL v2");
188 MODULE_ALIAS("platform:" DRIVER_NAME);
189