1 // SPDX-License-Identifier: GPL-2.0 2 ///***************************************** 3 // Copyright (C) 2009-2019 4 // ITE Tech. Inc. All Rights Reserved 5 ///***************************************** 6 // @file <mipi_rx.h> 7 // @author Pet.Weng@ite.com.tw 8 // @date 2019/02/15 9 // @fileversion: IT6161_SAMPLE_0.50 10 //******************************************/ 11 12 #ifndef _MIPIRX_H_ 13 #define _MIPIRX_H_ 14 15 #define MIPIRX_Debug_message 1 16 #define DEBUG_MIPIRX 17 #ifdef DEBUG_MIPIRX 18 #define MIPIRX_DEBUG_PRINT(x) printf x 19 #else 20 #define MIPIRX_DEBUG_PRINT(x) 21 #endif 22 23 #define ENABLE_MIPI_SOURCE (0) 24 ////////////////////////////////////////////////////////////////////// 25 //reference: MIPI Alliance Specification for DSI Ch8.7 Table 16 Data Types for Processor-sourced Packets 26 #define RGB_24b 0x3E 27 #define RGB_30b 0x0D 28 #define RGB_36b 0x1D 29 #define RGB_18b 0x1E 30 #define RGB_18b_L 0x2E 31 #define YCbCr_16b 0x2C 32 #define YCbCr_20b 0x0C 33 #define YCbCr_24b 0x1C 34 35 36 37 38 #define FrmPkt 0 39 #define SbSFull 3 40 #define TopBtm 6 41 #define SbSHalf 8 42 43 #define DDC75K 0 44 #define DDC125K 1 45 #define DDC312K 2 46 47 48 #define PICAR_NO 0 49 #define PICAR4_3 1 50 #define PICAR16_9 2 51 52 #define ACTAR_PIC 8 53 #define ACTAR4_3 9 54 #define ACTAR16_9 10 55 #define ACTAR14_9 11 56 57 58 // int LaneNo, EnLBR, VidFmt, TstPat, LaneNoOri, EnLBROri; 59 60 // Debug Option 61 //int EnDebug = FALSE; // (default = FALSE) 62 //int REG_RXTXDebug = 1; // 1:TX 0:RX 63 //tx 64 //int TxDbgSel = 0x00; //0x10:test 65 //int REGDBGMUX = 0; 66 //int EnDbgTxOut = 0; 67 //rx 68 // int RxDbgSel = 3;//0x11:PPS 69 // int PPSDbgSel = 0; 70 #define LMDbgSel 0 //int LMDbgSel= 0; //0~7 71 72 73 ///////////////////////////MPRX///////////////////// 74 // for PatGen 75 #define EnRxPatGen FALSE// int EnRxPatGen = FALSE; // TRUE : HSync , VSync , DE from patgen, progressive mode only (default = FALSE) 76 77 78 79 // MP PtGen option 80 #define MPVidType RGB_24b//RGB_24b//RGB_24b//int MPVidType = RGB_18b_L; // RGB_24b, RGB_18b, RGB_18b_L 81 82 //system control 83 // #define MPPHYPCLKInv FALSE//int MPPHYPCLKInv = FALSE; // for FPGA only, >200MHz set TRUE 84 85 #if (IC_VERSION == 0xC0) 86 // #define MPPHYMCLKInv FALSE//int MPPHYMCLKInv = TRUE; //default:TRUE 87 #define InvMCLK TRUE //int InvMCLK = FALSE; //FALSE for solomon, if NonUFO, MCLK max = 140MHz with InvMCLK=TRUE 88 #else 89 // #define MPPHYMCLKInv TRUE//int MPPHYMCLKInv = TRUE; //default:TRUE 90 #define InvMCLK FALSE //int InvMCLK = FALSE; //FALSE for solomon, if NonUFO, MCLK max = 140MHz with InvMCLK=TRUE 91 #endif //#if (IC_VERSION == 0xC0) 92 93 // #define MPPHYMCLKOInv FALSE//int MPPHYMCLKOInv = FALSE; 94 95 #define InvPCLK FALSE//int InvPCLK = FALSE; 96 //#define MPLaneNum (MIPIRX_LANE_NUM - 1)//3//int MPLaneNum = 3; // 0: 1-lane, 1: 2-lane, 2: 3-lane, 3: 4-lane 97 // int MPPCLKSel = AUTO; 98 // #define EnMPx1PCLK FALSE//int EnMPx1PCLK = FALSE;//FALSE; // FALSE: 3/4(for 4 Lane) , 3/2(for 2 Lane) , 3(for 1 Lane) PCLK 99 // TRUE : 1 (for 4 Lane) , 2 (for 2 Lane) , 4(for 1 Lane) PCLK 100 //system misc control 101 #if (IC_VERSION == 0xC0) 102 #define PDREFCLK FALSE//int PDREFCLK = TRUE; 103 #else 104 #define PDREFCLK TRUE//int PDREFCLK = TRUE; 105 #endif //#if (IC_VERSION == C0) 106 107 #define PDREFCNT 0//int PDREFCNT = 0; //when PDREFCLK=TRUE, 0:div2, 1:div4, 2:div8, 3:divg16 108 #define EnIntWakeU3 FALSE//int EnIntWakeU3 = FALSE; 109 #define EnIOIDDQ FALSE//int EnIOIDDQ = FALSE; 110 #define EnStb2Rst FALSE//int EnStb2Rst = FALSE; 111 #define EnExtStdby FALSE//int EnExtStdby = FALSE; 112 #define EnStandby FALSE//int EnStandby = FALSE; 113 #define MPLaneSwap FALSE//int MPLaneSwap = FALSE; 114 #define MPPNSwap FALSE//int MPPNSwap = FALSE; //TRUE: MTK , FALSE: Solomon 115 116 // int ForceTxCLKStb = FALSE; //TRUE:define _hdmitx_jitter_ 117 118 119 120 //int DisMHSyncErr = FALSE; 121 #define DisPHSyncErr FALSE//int DisPHSyncErr = FALSE; 122 #define DisECCErr FALSE//int DisECCErr = FALSE; 123 124 // PPI option 125 #define EnContCK TRUE//int EnContCK = TRUE; 126 #define HSSetNum 3//int HSSetNum = 3; 127 #if (IC_VERSION == 0xC0) 128 #define SkipStg 4//int SkipStg = 2; 129 #else 130 #define SkipStg 2//int SkipStg = 2; 131 #endif //#if (IC_VERSION == 0xC0) 132 #define EnDeSkew TRUE//int EnDeSkew = TRUE; 133 #define PPIDbgSel 12//0//int PPIDbgSel= 0; //0~15 134 #define RegIgnrNull 1//int RegIgnrNull = 1; 135 #define RegIgnrBlk 1//int RegIgnrBlk = 1; 136 #define RegEnDummyECC 0//int RegEnDummyECC = 0; 137 138 // LM option 139 #define EOTPSel 0//int EOTPSel = 0; //0~15 140 141 // PPS option 142 #define EnMBPM FALSE//FALSE//int EnMBPM = FALSE; // enable MIPI Bypass Mode 143 #if (EnMBPM == TRUE) 144 #define PREC_Update TRUE//int PREC_Update = FALSE; // enable P-timing update 145 #define MREC_Update TRUE//int MREC_Update = FALSE; // enable M-timing update 146 #define EnTBPM TRUE//int EnTBPM = FALSE; // enable HDMITX Bypass Mode 147 #else 148 #define PREC_Update FALSE//int PREC_Update = FALSE; // enable P-timing update 149 #define MREC_Update FALSE//int MREC_Update = FALSE; // enable M-timing update 150 #define EnTBPM FALSE//int EnTBPM = FALSE; // enable HDMITX Bypass Mode 151 #endif //#if (EnMBPM == TRUE) 152 153 #define REGSELDEF FALSE//int REGSELDEF = FALSE; 154 #define EnMPExtPCLK FALSE//int EnMPExtPCLK = FALSE; 155 #define MPForceStb FALSE//int MPForceStb = FALSE; 156 #define EnHReSync FALSE//int EnHReSync = FALSE ; // default FALSE 157 #define EnVReSync FALSE//int EnVReSync = FALSE; // default TRUE 158 #define EnFReSync FALSE//int EnFReSync = FALSE; 159 #define EnVREnh FALSE//int EnVREnh = FALSE; // default TRUE 160 #define EnVREnhSel 1//int EnVREnhSel = 1; // 0:Div2, 1:Div4, 2:Div8, 3:Div16, 4:Div32 161 #define EnMAvg TRUE//int EnMAvg = TRUE; 162 #if (IC_VERSION == 0xC0) 163 #define MShift 4//int MShift = 5; // default: 0 //fmt2 fmt4 :4 164 #define PPSFFRdStg 0x04//int PPSFFRdStg = 0x10; //PPSFFRdStg(2:0) 165 #define RegAutoSync TRUE//int RegAutoSync = TRUE;//add sync falling //pet:D0 20200211 166 #else 167 #define MShift 5//int MShift = 5; // default: 0 //fmt2 fmt4 :4 168 #define PPSFFRdStg 0x10//int PPSFFRdStg = 0x10; //PPSFFRdStg(2:0) 169 #endif //#if (IC_VERSION == 0xC0) 170 #define PShift 3//int PShift = 3; // default: 3 171 #define EnFFAutoRst TRUE//int EnFFAutoRst = TRUE; 172 173 #define RegEnSyncErr FALSE//int RegEnSyncErr = FALSE; 174 #define EnTxCRC TRUE//int EnTxCRC = TRUE; 175 #define TxCRCnum (0x20) //D0 20200211//(0x00)//TxCRCnum(6:0)//int TxCRCnum = 0x00; //TxCRCnum(6:0) 176 177 178 179 ////////////////////////////////////////////////////////////////////// 180 void DumpMIPIRXReg(void); 181 void MIPIRX_DevLoopProc(void); 182 void set_ppara(void); 183 #endif // _MIPIRX_H_ 184