1 /* 2 * 3 * (C) COPYRIGHT 2013-2017 ARM Limited. All rights reserved. 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation, and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * A copy of the licence is included with the program, and can also be obtained 11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, 12 * Boston, MA 02110-1301, USA. 13 * 14 */ 15 16 17 18 /** 19 * @file mali_kbase_config_defaults.h 20 * 21 * Default values for configuration settings 22 * 23 */ 24 25 #ifndef _KBASE_CONFIG_DEFAULTS_H_ 26 #define _KBASE_CONFIG_DEFAULTS_H_ 27 28 /* Include mandatory definitions per platform */ 29 #include <mali_kbase_config_platform.h> 30 31 /** 32 * Boolean indicating whether the driver is configured to be secure at 33 * a potential loss of performance. 34 * 35 * This currently affects only r0p0-15dev0 HW and earlier. 36 * 37 * On r0p0-15dev0 HW and earlier, there are tradeoffs between security and 38 * performance: 39 * 40 * - When this is set to true, the driver remains fully secure, 41 * but potentially loses performance compared with setting this to 42 * false. 43 * - When set to false, the driver is open to certain security 44 * attacks. 45 * 46 * From r0p0-00rel0 and onwards, there is no security loss by setting 47 * this to false, and no performance loss by setting it to 48 * true. 49 */ 50 #define DEFAULT_SECURE_BUT_LOSS_OF_PERFORMANCE false 51 52 enum { 53 /** 54 * Use unrestricted Address ID width on the AXI bus. 55 */ 56 KBASE_AID_32 = 0x0, 57 58 /** 59 * Restrict GPU to a half of maximum Address ID count. 60 * This will reduce performance, but reduce bus load due to GPU. 61 */ 62 KBASE_AID_16 = 0x3, 63 64 /** 65 * Restrict GPU to a quarter of maximum Address ID count. 66 * This will reduce performance, but reduce bus load due to GPU. 67 */ 68 KBASE_AID_8 = 0x2, 69 70 /** 71 * Restrict GPU to an eighth of maximum Address ID count. 72 * This will reduce performance, but reduce bus load due to GPU. 73 */ 74 KBASE_AID_4 = 0x1 75 }; 76 77 /** 78 * Default setting for read Address ID limiting on AXI bus. 79 * 80 * Attached value: u32 register value 81 * KBASE_AID_32 - use the full 32 IDs (5 ID bits) 82 * KBASE_AID_16 - use 16 IDs (4 ID bits) 83 * KBASE_AID_8 - use 8 IDs (3 ID bits) 84 * KBASE_AID_4 - use 4 IDs (2 ID bits) 85 * Default value: KBASE_AID_32 (no limit). Note hardware implementation 86 * may limit to a lower value. 87 */ 88 #define DEFAULT_ARID_LIMIT KBASE_AID_32 89 90 /** 91 * Default setting for write Address ID limiting on AXI. 92 * 93 * Attached value: u32 register value 94 * KBASE_AID_32 - use the full 32 IDs (5 ID bits) 95 * KBASE_AID_16 - use 16 IDs (4 ID bits) 96 * KBASE_AID_8 - use 8 IDs (3 ID bits) 97 * KBASE_AID_4 - use 4 IDs (2 ID bits) 98 * Default value: KBASE_AID_32 (no limit). Note hardware implementation 99 * may limit to a lower value. 100 */ 101 #define DEFAULT_AWID_LIMIT KBASE_AID_32 102 103 /** 104 * Default UMP device mapping. A UMP_DEVICE_<device>_SHIFT value which 105 * defines which UMP device this GPU should be mapped to. 106 */ 107 #define DEFAULT_UMP_GPU_DEVICE_SHIFT UMP_DEVICE_Z_SHIFT 108 109 /* 110 * Default period for DVFS sampling 111 */ 112 // #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ 113 #define DEFAULT_PM_DVFS_PERIOD 20 /* 20 ms */ 114 115 /* 116 * Power Management poweroff tick granuality. This is in nanoseconds to 117 * allow HR timer support. 118 * 119 * On each scheduling tick, the power manager core may decide to: 120 * -# Power off one or more shader cores 121 * -# Power off the entire GPU 122 */ 123 #define DEFAULT_PM_GPU_POWEROFF_TICK_NS (400000) /* 400us */ 124 125 /* 126 * Power Manager number of ticks before shader cores are powered off 127 */ 128 #define DEFAULT_PM_POWEROFF_TICK_SHADER (2) /* 400-800us */ 129 130 /* 131 * Power Manager number of ticks before GPU is powered off 132 */ 133 #define DEFAULT_PM_POWEROFF_TICK_GPU (2) /* 400-800us */ 134 135 /* 136 * Default scheduling tick granuality 137 */ 138 #define DEFAULT_JS_SCHEDULING_PERIOD_NS (100000000u) /* 100ms */ 139 140 /* 141 * Default minimum number of scheduling ticks before jobs are soft-stopped. 142 * 143 * This defines the time-slice for a job (which may be different from that of a 144 * context) 145 */ 146 #define DEFAULT_JS_SOFT_STOP_TICKS (1) /* 100ms-200ms */ 147 148 /* 149 * Default minimum number of scheduling ticks before CL jobs are soft-stopped. 150 */ 151 #define DEFAULT_JS_SOFT_STOP_TICKS_CL (1) /* 100ms-200ms */ 152 153 /* 154 * Default minimum number of scheduling ticks before jobs are hard-stopped 155 */ 156 #define DEFAULT_JS_HARD_STOP_TICKS_SS (50) /* 5s */ 157 #define DEFAULT_JS_HARD_STOP_TICKS_SS_8408 (300) /* 30s */ 158 159 /* 160 * Default minimum number of scheduling ticks before CL jobs are hard-stopped. 161 */ 162 #define DEFAULT_JS_HARD_STOP_TICKS_CL (50) /* 5s */ 163 164 /* 165 * Default minimum number of scheduling ticks before jobs are hard-stopped 166 * during dumping 167 */ 168 #define DEFAULT_JS_HARD_STOP_TICKS_DUMPING (15000) /* 1500s */ 169 170 /* 171 * Default timeout for some software jobs, after which the software event wait 172 * jobs will be cancelled. 173 */ 174 #define DEFAULT_JS_SOFT_JOB_TIMEOUT (3000) /* 3s */ 175 176 /* 177 * Default minimum number of scheduling ticks before the GPU is reset to clear a 178 * "stuck" job 179 */ 180 #define DEFAULT_JS_RESET_TICKS_SS (55) /* 5.5s */ 181 #define DEFAULT_JS_RESET_TICKS_SS_8408 (450) /* 45s */ 182 183 /* 184 * Default minimum number of scheduling ticks before the GPU is reset to clear a 185 * "stuck" CL job. 186 */ 187 #define DEFAULT_JS_RESET_TICKS_CL (55) /* 5.5s */ 188 189 /* 190 * Default minimum number of scheduling ticks before the GPU is reset to clear a 191 * "stuck" job during dumping. 192 */ 193 #define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */ 194 195 /* 196 * Default number of milliseconds given for other jobs on the GPU to be 197 * soft-stopped when the GPU needs to be reset. 198 */ 199 #define DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */ 200 201 /* 202 * Default timeslice that a context is scheduled in for, in nanoseconds. 203 * 204 * When a context has used up this amount of time across its jobs, it is 205 * scheduled out to let another run. 206 * 207 * @note the resolution is nanoseconds (ns) here, because that's the format 208 * often used by the OS. 209 */ 210 #define DEFAULT_JS_CTX_TIMESLICE_NS (50000000) /* 50ms */ 211 212 /* 213 * Perform GPU power down using only platform specific code, skipping DDK power 214 * management. 215 * 216 * If this is non-zero then kbase will avoid powering down shader cores, the 217 * tiler, and the L2 cache, instead just powering down the entire GPU through 218 * platform specific code. This may be required for certain platform 219 * integrations. 220 * 221 * Note that as this prevents kbase from powering down shader cores, this limits 222 * the available power policies to coarse_demand and always_on. 223 */ 224 #define PLATFORM_POWER_DOWN_ONLY (1) 225 226 #endif /* _KBASE_CONFIG_DEFAULTS_H_ */ 227 228